andes_riscv::plic

Module regs

Source

Structsยง

  • Target claim and complete.
  • Feature enable register.
  • Version and the maximum priority.
  • no description available.
  • Number of supported interrupt sources and targets.
  • no description available.
  • Preempted priority stack.
  • no description available.
  • Target0 priority threshold.
  • no description available.