Module twi0

Source
Expand description

Two-Wire Interface

Modules§

ctrla
Control A
dbgctrl
Debug Control Register
dualctrl
Dual Control
maddr
Master Address
mbaud
Master Baurd Rate Control
mctrla
Master Control A
mctrlb
Master Control B
mdata
Master Data
mstatus
Master Status
saddr
Slave Address
saddrmask
Slave Address Mask
sctrla
Slave Control A
sctrlb
Slave Control B
sdata
Slave Data
sstatus
Slave Status

Structs§

RegisterBlock
Register block

Type Aliases§

CTRLA
CTRLA (rw) register accessor: an alias for Reg<CTRLA_SPEC>
DBGCTRL
DBGCTRL (rw) register accessor: an alias for Reg<DBGCTRL_SPEC>
DUALCTRL
DUALCTRL (rw) register accessor: an alias for Reg<DUALCTRL_SPEC>
MADDR
MADDR (rw) register accessor: an alias for Reg<MADDR_SPEC>
MBAUD
MBAUD (rw) register accessor: an alias for Reg<MBAUD_SPEC>
MCTRLA
MCTRLA (rw) register accessor: an alias for Reg<MCTRLA_SPEC>
MCTRLB
MCTRLB (rw) register accessor: an alias for Reg<MCTRLB_SPEC>
MDATA
MDATA (rw) register accessor: an alias for Reg<MDATA_SPEC>
MSTATUS
MSTATUS (rw) register accessor: an alias for Reg<MSTATUS_SPEC>
SADDR
SADDR (rw) register accessor: an alias for Reg<SADDR_SPEC>
SADDRMASK
SADDRMASK (rw) register accessor: an alias for Reg<SADDRMASK_SPEC>
SCTRLA
SCTRLA (rw) register accessor: an alias for Reg<SCTRLA_SPEC>
SCTRLB
SCTRLB (rw) register accessor: an alias for Reg<SCTRLB_SPEC>
SDATA
SDATA (rw) register accessor: an alias for Reg<SDATA_SPEC>
SSTATUS
SSTATUS (rw) register accessor: an alias for Reg<SSTATUS_SPEC>