avr_device/devices/atmega328p/adc/
admux.rs1#[doc = "Register `ADMUX` reader"]
2pub struct R(crate::R<ADMUX_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ADMUX_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ADMUX_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ADMUX_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ADMUX` writer"]
17pub struct W(crate::W<ADMUX_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ADMUX_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ADMUX_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ADMUX_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MUX` reader - Analog Channel Selection Bits"]
38pub type MUX_R = crate::FieldReader<u8, MUX_A>;
39#[doc = "Analog Channel Selection Bits\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum MUX_A {
43 #[doc = "0: ADC Single Ended Input pin 0"]
44 ADC0 = 0,
45 #[doc = "1: ADC Single Ended Input pin 1"]
46 ADC1 = 1,
47 #[doc = "2: ADC Single Ended Input pin 2"]
48 ADC2 = 2,
49 #[doc = "3: ADC Single Ended Input pin 3"]
50 ADC3 = 3,
51 #[doc = "4: ADC Single Ended Input pin 4"]
52 ADC4 = 4,
53 #[doc = "5: ADC Single Ended Input pin 5"]
54 ADC5 = 5,
55 #[doc = "6: ADC Single Ended Input pin 6"]
56 ADC6 = 6,
57 #[doc = "7: ADC Single Ended Input pin 7"]
58 ADC7 = 7,
59 #[doc = "8: Temperature sensor"]
60 TEMPSENS = 8,
61 #[doc = "14: Internal Reference (VBG)"]
62 ADC_VBG = 14,
63 #[doc = "15: 0V (GND)"]
64 ADC_GND = 15,
65}
66impl From<MUX_A> for u8 {
67 #[inline(always)]
68 fn from(variant: MUX_A) -> Self {
69 variant as _
70 }
71}
72impl MUX_R {
73 #[doc = "Get enumerated values variant"]
74 #[inline(always)]
75 pub fn variant(&self) -> Option<MUX_A> {
76 match self.bits {
77 0 => Some(MUX_A::ADC0),
78 1 => Some(MUX_A::ADC1),
79 2 => Some(MUX_A::ADC2),
80 3 => Some(MUX_A::ADC3),
81 4 => Some(MUX_A::ADC4),
82 5 => Some(MUX_A::ADC5),
83 6 => Some(MUX_A::ADC6),
84 7 => Some(MUX_A::ADC7),
85 8 => Some(MUX_A::TEMPSENS),
86 14 => Some(MUX_A::ADC_VBG),
87 15 => Some(MUX_A::ADC_GND),
88 _ => None,
89 }
90 }
91 #[doc = "Checks if the value of the field is `ADC0`"]
92 #[inline(always)]
93 pub fn is_adc0(&self) -> bool {
94 *self == MUX_A::ADC0
95 }
96 #[doc = "Checks if the value of the field is `ADC1`"]
97 #[inline(always)]
98 pub fn is_adc1(&self) -> bool {
99 *self == MUX_A::ADC1
100 }
101 #[doc = "Checks if the value of the field is `ADC2`"]
102 #[inline(always)]
103 pub fn is_adc2(&self) -> bool {
104 *self == MUX_A::ADC2
105 }
106 #[doc = "Checks if the value of the field is `ADC3`"]
107 #[inline(always)]
108 pub fn is_adc3(&self) -> bool {
109 *self == MUX_A::ADC3
110 }
111 #[doc = "Checks if the value of the field is `ADC4`"]
112 #[inline(always)]
113 pub fn is_adc4(&self) -> bool {
114 *self == MUX_A::ADC4
115 }
116 #[doc = "Checks if the value of the field is `ADC5`"]
117 #[inline(always)]
118 pub fn is_adc5(&self) -> bool {
119 *self == MUX_A::ADC5
120 }
121 #[doc = "Checks if the value of the field is `ADC6`"]
122 #[inline(always)]
123 pub fn is_adc6(&self) -> bool {
124 *self == MUX_A::ADC6
125 }
126 #[doc = "Checks if the value of the field is `ADC7`"]
127 #[inline(always)]
128 pub fn is_adc7(&self) -> bool {
129 *self == MUX_A::ADC7
130 }
131 #[doc = "Checks if the value of the field is `TEMPSENS`"]
132 #[inline(always)]
133 pub fn is_tempsens(&self) -> bool {
134 *self == MUX_A::TEMPSENS
135 }
136 #[doc = "Checks if the value of the field is `ADC_VBG`"]
137 #[inline(always)]
138 pub fn is_adc_vbg(&self) -> bool {
139 *self == MUX_A::ADC_VBG
140 }
141 #[doc = "Checks if the value of the field is `ADC_GND`"]
142 #[inline(always)]
143 pub fn is_adc_gnd(&self) -> bool {
144 *self == MUX_A::ADC_GND
145 }
146}
147#[doc = "Field `MUX` writer - Analog Channel Selection Bits"]
148pub type MUX_W<'a, const O: u8> = crate::FieldWriter<'a, u8, ADMUX_SPEC, u8, MUX_A, 4, O>;
149impl<'a, const O: u8> MUX_W<'a, O> {
150 #[doc = "ADC Single Ended Input pin 0"]
151 #[inline(always)]
152 pub fn adc0(self) -> &'a mut W {
153 self.variant(MUX_A::ADC0)
154 }
155 #[doc = "ADC Single Ended Input pin 1"]
156 #[inline(always)]
157 pub fn adc1(self) -> &'a mut W {
158 self.variant(MUX_A::ADC1)
159 }
160 #[doc = "ADC Single Ended Input pin 2"]
161 #[inline(always)]
162 pub fn adc2(self) -> &'a mut W {
163 self.variant(MUX_A::ADC2)
164 }
165 #[doc = "ADC Single Ended Input pin 3"]
166 #[inline(always)]
167 pub fn adc3(self) -> &'a mut W {
168 self.variant(MUX_A::ADC3)
169 }
170 #[doc = "ADC Single Ended Input pin 4"]
171 #[inline(always)]
172 pub fn adc4(self) -> &'a mut W {
173 self.variant(MUX_A::ADC4)
174 }
175 #[doc = "ADC Single Ended Input pin 5"]
176 #[inline(always)]
177 pub fn adc5(self) -> &'a mut W {
178 self.variant(MUX_A::ADC5)
179 }
180 #[doc = "ADC Single Ended Input pin 6"]
181 #[inline(always)]
182 pub fn adc6(self) -> &'a mut W {
183 self.variant(MUX_A::ADC6)
184 }
185 #[doc = "ADC Single Ended Input pin 7"]
186 #[inline(always)]
187 pub fn adc7(self) -> &'a mut W {
188 self.variant(MUX_A::ADC7)
189 }
190 #[doc = "Temperature sensor"]
191 #[inline(always)]
192 pub fn tempsens(self) -> &'a mut W {
193 self.variant(MUX_A::TEMPSENS)
194 }
195 #[doc = "Internal Reference (VBG)"]
196 #[inline(always)]
197 pub fn adc_vbg(self) -> &'a mut W {
198 self.variant(MUX_A::ADC_VBG)
199 }
200 #[doc = "0V (GND)"]
201 #[inline(always)]
202 pub fn adc_gnd(self) -> &'a mut W {
203 self.variant(MUX_A::ADC_GND)
204 }
205}
206#[doc = "Field `ADLAR` reader - Left Adjust Result"]
207pub type ADLAR_R = crate::BitReader<bool>;
208#[doc = "Field `ADLAR` writer - Left Adjust Result"]
209pub type ADLAR_W<'a, const O: u8> = crate::BitWriter<'a, u8, ADMUX_SPEC, bool, O>;
210#[doc = "Field `REFS` reader - Reference Selection Bits"]
211pub type REFS_R = crate::FieldReader<u8, REFS_A>;
212#[doc = "Reference Selection Bits\n\nValue on reset: 0"]
213#[derive(Clone, Copy, Debug, PartialEq, Eq)]
214#[repr(u8)]
215pub enum REFS_A {
216 #[doc = "0: Aref Internal Vref turned off"]
217 AREF = 0,
218 #[doc = "1: AVcc with external capacitor at AREF pin"]
219 AVCC = 1,
220 #[doc = "3: Internal 1.1V Voltage Reference with external capacitor at AREF pin"]
221 INTERNAL = 3,
222}
223impl From<REFS_A> for u8 {
224 #[inline(always)]
225 fn from(variant: REFS_A) -> Self {
226 variant as _
227 }
228}
229impl REFS_R {
230 #[doc = "Get enumerated values variant"]
231 #[inline(always)]
232 pub fn variant(&self) -> Option<REFS_A> {
233 match self.bits {
234 0 => Some(REFS_A::AREF),
235 1 => Some(REFS_A::AVCC),
236 3 => Some(REFS_A::INTERNAL),
237 _ => None,
238 }
239 }
240 #[doc = "Checks if the value of the field is `AREF`"]
241 #[inline(always)]
242 pub fn is_aref(&self) -> bool {
243 *self == REFS_A::AREF
244 }
245 #[doc = "Checks if the value of the field is `AVCC`"]
246 #[inline(always)]
247 pub fn is_avcc(&self) -> bool {
248 *self == REFS_A::AVCC
249 }
250 #[doc = "Checks if the value of the field is `INTERNAL`"]
251 #[inline(always)]
252 pub fn is_internal(&self) -> bool {
253 *self == REFS_A::INTERNAL
254 }
255}
256#[doc = "Field `REFS` writer - Reference Selection Bits"]
257pub type REFS_W<'a, const O: u8> = crate::FieldWriter<'a, u8, ADMUX_SPEC, u8, REFS_A, 2, O>;
258impl<'a, const O: u8> REFS_W<'a, O> {
259 #[doc = "Aref Internal Vref turned off"]
260 #[inline(always)]
261 pub fn aref(self) -> &'a mut W {
262 self.variant(REFS_A::AREF)
263 }
264 #[doc = "AVcc with external capacitor at AREF pin"]
265 #[inline(always)]
266 pub fn avcc(self) -> &'a mut W {
267 self.variant(REFS_A::AVCC)
268 }
269 #[doc = "Internal 1.1V Voltage Reference with external capacitor at AREF pin"]
270 #[inline(always)]
271 pub fn internal(self) -> &'a mut W {
272 self.variant(REFS_A::INTERNAL)
273 }
274}
275impl R {
276 #[doc = "Bits 0:3 - Analog Channel Selection Bits"]
277 #[inline(always)]
278 pub fn mux(&self) -> MUX_R {
279 MUX_R::new(self.bits & 0x0f)
280 }
281 #[doc = "Bit 5 - Left Adjust Result"]
282 #[inline(always)]
283 pub fn adlar(&self) -> ADLAR_R {
284 ADLAR_R::new(((self.bits >> 5) & 1) != 0)
285 }
286 #[doc = "Bits 6:7 - Reference Selection Bits"]
287 #[inline(always)]
288 pub fn refs(&self) -> REFS_R {
289 REFS_R::new((self.bits >> 6) & 3)
290 }
291}
292impl W {
293 #[doc = "Bits 0:3 - Analog Channel Selection Bits"]
294 #[inline(always)]
295 #[must_use]
296 pub fn mux(&mut self) -> MUX_W<0> {
297 MUX_W::new(self)
298 }
299 #[doc = "Bit 5 - Left Adjust Result"]
300 #[inline(always)]
301 #[must_use]
302 pub fn adlar(&mut self) -> ADLAR_W<5> {
303 ADLAR_W::new(self)
304 }
305 #[doc = "Bits 6:7 - Reference Selection Bits"]
306 #[inline(always)]
307 #[must_use]
308 pub fn refs(&mut self) -> REFS_W<6> {
309 REFS_W::new(self)
310 }
311 #[doc = "Writes raw bits to the register."]
312 #[inline(always)]
313 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
314 self.0.bits(bits);
315 self
316 }
317}
318#[doc = "The ADC multiplexer Selection Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [admux](index.html) module"]
319pub struct ADMUX_SPEC;
320impl crate::RegisterSpec for ADMUX_SPEC {
321 type Ux = u8;
322}
323#[doc = "`read()` method returns [admux::R](R) reader structure"]
324impl crate::Readable for ADMUX_SPEC {
325 type Reader = R;
326}
327#[doc = "`write(|w| ..)` method takes [admux::W](W) writer structure"]
328impl crate::Writable for ADMUX_SPEC {
329 type Writer = W;
330 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
331 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
332}
333#[doc = "`reset()` method sets ADMUX to value 0"]
334impl crate::Resettable for ADMUX_SPEC {
335 const RESET_VALUE: Self::Ux = 0;
336}