avr_device/devices/atmega328p/fuse/
low.rs

1#[doc = "Register `LOW` reader"]
2pub struct R(crate::R<LOW_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LOW_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LOW_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LOW_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LOW` writer"]
17pub struct W(crate::W<LOW_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LOW_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LOW_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LOW_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SUT_CKSEL` reader - Select Clock Source"]
38pub type SUT_CKSEL_R = crate::FieldReader<u8, SUT_CKSEL_A>;
39#[doc = "Select Clock Source\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SUT_CKSEL_A {
43    #[doc = "0: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
44    EXTCLK_6CK_14CK_0MS = 0,
45    #[doc = "2: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
46    INTRCOSC_8MHZ_6CK_14CK_0MS = 2,
47    #[doc = "3: Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
48    INTRCOSC_128KHZ_6CK_14CK_0MS = 3,
49    #[doc = "4: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"]
50    EXTLOFXTAL_1KCK_14CK_0MS = 4,
51    #[doc = "5: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"]
52    EXTLOFXTAL_32KCK_14CK_0MS = 5,
53    #[doc = "6: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
54    EXTFSXTAL_258CK_14CK_4MS1 = 6,
55    #[doc = "7: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
56    EXTFSXTAL_1KCK_14CK_65MS = 7,
57    #[doc = "8: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
58    EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1 = 8,
59    #[doc = "9: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
60    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS = 9,
61    #[doc = "10: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
62    EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1 = 10,
63    #[doc = "11: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
64    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS = 11,
65    #[doc = "12: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
66    EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1 = 12,
67    #[doc = "13: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
68    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS = 13,
69    #[doc = "14: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
70    EXTXOSC_8MHZ_XX_258CK_14CK_4MS1 = 14,
71    #[doc = "15: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
72    EXTXOSC_8MHZ_XX_1KCK_14CK_65MS = 15,
73    #[doc = "16: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
74    EXTCLK_6CK_14CK_4MS1 = 16,
75    #[doc = "18: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
76    INTRCOSC_8MHZ_6CK_14CK_4MS1 = 18,
77    #[doc = "19: Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
78    INTRCOSC_128KHZ_6CK_14CK_4MS1 = 19,
79    #[doc = "20: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"]
80    EXTLOFXTAL_1KCK_14CK_4MS1 = 20,
81    #[doc = "21: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"]
82    EXTLOFXTAL_32KCK_14CK_4MS1 = 21,
83    #[doc = "22: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
84    EXTFSXTAL_258CK_14CK_65MS = 22,
85    #[doc = "23: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
86    EXTFSXTAL_16KCK_14CK_0MS = 23,
87    #[doc = "24: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
88    EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS = 24,
89    #[doc = "25: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
90    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS = 25,
91    #[doc = "26: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
92    EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS = 26,
93    #[doc = "27: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
94    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS = 27,
95    #[doc = "28: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
96    EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS = 28,
97    #[doc = "29: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
98    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS = 29,
99    #[doc = "30: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
100    EXTXOSC_8MHZ_XX_258CK_14CK_65MS = 30,
101    #[doc = "31: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
102    EXTXOSC_8MHZ_XX_16KCK_14CK_0MS = 31,
103    #[doc = "32: Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
104    EXTCLK_6CK_14CK_65MS = 32,
105    #[doc = "34: Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
106    INTRCOSC_8MHZ_6CK_14CK_65MS = 34,
107    #[doc = "35: Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
108    INTRCOSC_128KHZ_6CK_14CK_65MS = 35,
109    #[doc = "36: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"]
110    EXTLOFXTAL_1KCK_14CK_65MS = 36,
111    #[doc = "37: Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"]
112    EXTLOFXTAL_32KCK_14CK_65MS = 37,
113    #[doc = "38: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
114    EXTFSXTAL_1KCK_14CK_0MS = 38,
115    #[doc = "39: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
116    EXTFSXTAL_16KCK_14CK_4MS1 = 39,
117    #[doc = "40: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
118    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS = 40,
119    #[doc = "41: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
120    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1 = 41,
121    #[doc = "42: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
122    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS = 42,
123    #[doc = "43: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
124    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1 = 43,
125    #[doc = "44: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
126    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS = 44,
127    #[doc = "45: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
128    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1 = 45,
129    #[doc = "46: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
130    EXTXOSC_8MHZ_XX_1KCK_14CK_0MS = 46,
131    #[doc = "47: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
132    EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1 = 47,
133    #[doc = "54: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
134    EXTFSXTAL_1KCK_14CK_4MS1 = 54,
135    #[doc = "55: Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
136    EXTFSXTAL_16KCK_14CK_65MS = 55,
137    #[doc = "56: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
138    EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1 = 56,
139    #[doc = "57: Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
140    EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS = 57,
141    #[doc = "58: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
142    EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1 = 58,
143    #[doc = "59: Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
144    EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS = 59,
145    #[doc = "60: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
146    EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1 = 60,
147    #[doc = "61: Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
148    EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS = 61,
149    #[doc = "62: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
150    EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1 = 62,
151    #[doc = "63: Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
152    EXTXOSC_8MHZ_XX_16KCK_14CK_65MS = 63,
153}
154impl From<SUT_CKSEL_A> for u8 {
155    #[inline(always)]
156    fn from(variant: SUT_CKSEL_A) -> Self {
157        variant as _
158    }
159}
160impl SUT_CKSEL_R {
161    #[doc = "Get enumerated values variant"]
162    #[inline(always)]
163    pub fn variant(&self) -> Option<SUT_CKSEL_A> {
164        match self.bits {
165            0 => Some(SUT_CKSEL_A::EXTCLK_6CK_14CK_0MS),
166            2 => Some(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_0MS),
167            3 => Some(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_0MS),
168            4 => Some(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_0MS),
169            5 => Some(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_0MS),
170            6 => Some(SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_4MS1),
171            7 => Some(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_65MS),
172            8 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1),
173            9 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS),
174            10 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1),
175            11 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS),
176            12 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1),
177            13 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS),
178            14 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_4MS1),
179            15 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_65MS),
180            16 => Some(SUT_CKSEL_A::EXTCLK_6CK_14CK_4MS1),
181            18 => Some(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_4MS1),
182            19 => Some(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_4MS1),
183            20 => Some(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_4MS1),
184            21 => Some(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_4MS1),
185            22 => Some(SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_65MS),
186            23 => Some(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_0MS),
187            24 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS),
188            25 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS),
189            26 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS),
190            27 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS),
191            28 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS),
192            29 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS),
193            30 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_65MS),
194            31 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_0MS),
195            32 => Some(SUT_CKSEL_A::EXTCLK_6CK_14CK_65MS),
196            34 => Some(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_65MS),
197            35 => Some(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_65MS),
198            36 => Some(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_65MS),
199            37 => Some(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_65MS),
200            38 => Some(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_0MS),
201            39 => Some(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_4MS1),
202            40 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS),
203            41 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1),
204            42 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS),
205            43 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1),
206            44 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS),
207            45 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1),
208            46 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_0MS),
209            47 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1),
210            54 => Some(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_4MS1),
211            55 => Some(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_65MS),
212            56 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1),
213            57 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS),
214            58 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1),
215            59 => Some(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS),
216            60 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1),
217            61 => Some(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS),
218            62 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1),
219            63 => Some(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_65MS),
220            _ => None,
221        }
222    }
223    #[doc = "Checks if the value of the field is `EXTCLK_6CK_14CK_0MS`"]
224    #[inline(always)]
225    pub fn is_extclk_6ck_14ck_0ms(&self) -> bool {
226        *self == SUT_CKSEL_A::EXTCLK_6CK_14CK_0MS
227    }
228    #[doc = "Checks if the value of the field is `INTRCOSC_8MHZ_6CK_14CK_0MS`"]
229    #[inline(always)]
230    pub fn is_intrcosc_8mhz_6ck_14ck_0ms(&self) -> bool {
231        *self == SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_0MS
232    }
233    #[doc = "Checks if the value of the field is `INTRCOSC_128KHZ_6CK_14CK_0MS`"]
234    #[inline(always)]
235    pub fn is_intrcosc_128khz_6ck_14ck_0ms(&self) -> bool {
236        *self == SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_0MS
237    }
238    #[doc = "Checks if the value of the field is `EXTLOFXTAL_1KCK_14CK_0MS`"]
239    #[inline(always)]
240    pub fn is_extlofxtal_1kck_14ck_0ms(&self) -> bool {
241        *self == SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_0MS
242    }
243    #[doc = "Checks if the value of the field is `EXTLOFXTAL_32KCK_14CK_0MS`"]
244    #[inline(always)]
245    pub fn is_extlofxtal_32kck_14ck_0ms(&self) -> bool {
246        *self == SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_0MS
247    }
248    #[doc = "Checks if the value of the field is `EXTFSXTAL_258CK_14CK_4MS1`"]
249    #[inline(always)]
250    pub fn is_extfsxtal_258ck_14ck_4ms1(&self) -> bool {
251        *self == SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_4MS1
252    }
253    #[doc = "Checks if the value of the field is `EXTFSXTAL_1KCK_14CK_65MS`"]
254    #[inline(always)]
255    pub fn is_extfsxtal_1kck_14ck_65ms(&self) -> bool {
256        *self == SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_65MS
257    }
258    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1`"]
259    #[inline(always)]
260    pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_4ms1(&self) -> bool {
261        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1
262    }
263    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS`"]
264    #[inline(always)]
265    pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_65ms(&self) -> bool {
266        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS
267    }
268    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1`"]
269    #[inline(always)]
270    pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_4ms1(&self) -> bool {
271        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1
272    }
273    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS`"]
274    #[inline(always)]
275    pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_65ms(&self) -> bool {
276        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS
277    }
278    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1`"]
279    #[inline(always)]
280    pub fn is_extxosc_3mhz_8mhz_258ck_14ck_4ms1(&self) -> bool {
281        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1
282    }
283    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS`"]
284    #[inline(always)]
285    pub fn is_extxosc_3mhz_8mhz_1kck_14ck_65ms(&self) -> bool {
286        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS
287    }
288    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_258CK_14CK_4MS1`"]
289    #[inline(always)]
290    pub fn is_extxosc_8mhz_xx_258ck_14ck_4ms1(&self) -> bool {
291        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_4MS1
292    }
293    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_1KCK_14CK_65MS`"]
294    #[inline(always)]
295    pub fn is_extxosc_8mhz_xx_1kck_14ck_65ms(&self) -> bool {
296        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_65MS
297    }
298    #[doc = "Checks if the value of the field is `EXTCLK_6CK_14CK_4MS1`"]
299    #[inline(always)]
300    pub fn is_extclk_6ck_14ck_4ms1(&self) -> bool {
301        *self == SUT_CKSEL_A::EXTCLK_6CK_14CK_4MS1
302    }
303    #[doc = "Checks if the value of the field is `INTRCOSC_8MHZ_6CK_14CK_4MS1`"]
304    #[inline(always)]
305    pub fn is_intrcosc_8mhz_6ck_14ck_4ms1(&self) -> bool {
306        *self == SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_4MS1
307    }
308    #[doc = "Checks if the value of the field is `INTRCOSC_128KHZ_6CK_14CK_4MS1`"]
309    #[inline(always)]
310    pub fn is_intrcosc_128khz_6ck_14ck_4ms1(&self) -> bool {
311        *self == SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_4MS1
312    }
313    #[doc = "Checks if the value of the field is `EXTLOFXTAL_1KCK_14CK_4MS1`"]
314    #[inline(always)]
315    pub fn is_extlofxtal_1kck_14ck_4ms1(&self) -> bool {
316        *self == SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_4MS1
317    }
318    #[doc = "Checks if the value of the field is `EXTLOFXTAL_32KCK_14CK_4MS1`"]
319    #[inline(always)]
320    pub fn is_extlofxtal_32kck_14ck_4ms1(&self) -> bool {
321        *self == SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_4MS1
322    }
323    #[doc = "Checks if the value of the field is `EXTFSXTAL_258CK_14CK_65MS`"]
324    #[inline(always)]
325    pub fn is_extfsxtal_258ck_14ck_65ms(&self) -> bool {
326        *self == SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_65MS
327    }
328    #[doc = "Checks if the value of the field is `EXTFSXTAL_16KCK_14CK_0MS`"]
329    #[inline(always)]
330    pub fn is_extfsxtal_16kck_14ck_0ms(&self) -> bool {
331        *self == SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_0MS
332    }
333    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS`"]
334    #[inline(always)]
335    pub fn is_extxosc_0mhz4_0mhz9_258ck_14ck_65ms(&self) -> bool {
336        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS
337    }
338    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS`"]
339    #[inline(always)]
340    pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_0ms(&self) -> bool {
341        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS
342    }
343    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS`"]
344    #[inline(always)]
345    pub fn is_extxosc_0mhz9_3mhz_258ck_14ck_65ms(&self) -> bool {
346        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS
347    }
348    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS`"]
349    #[inline(always)]
350    pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_0ms(&self) -> bool {
351        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS
352    }
353    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS`"]
354    #[inline(always)]
355    pub fn is_extxosc_3mhz_8mhz_258ck_14ck_65ms(&self) -> bool {
356        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS
357    }
358    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS`"]
359    #[inline(always)]
360    pub fn is_extxosc_3mhz_8mhz_16kck_14ck_0ms(&self) -> bool {
361        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS
362    }
363    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_258CK_14CK_65MS`"]
364    #[inline(always)]
365    pub fn is_extxosc_8mhz_xx_258ck_14ck_65ms(&self) -> bool {
366        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_65MS
367    }
368    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_16KCK_14CK_0MS`"]
369    #[inline(always)]
370    pub fn is_extxosc_8mhz_xx_16kck_14ck_0ms(&self) -> bool {
371        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_0MS
372    }
373    #[doc = "Checks if the value of the field is `EXTCLK_6CK_14CK_65MS`"]
374    #[inline(always)]
375    pub fn is_extclk_6ck_14ck_65ms(&self) -> bool {
376        *self == SUT_CKSEL_A::EXTCLK_6CK_14CK_65MS
377    }
378    #[doc = "Checks if the value of the field is `INTRCOSC_8MHZ_6CK_14CK_65MS`"]
379    #[inline(always)]
380    pub fn is_intrcosc_8mhz_6ck_14ck_65ms(&self) -> bool {
381        *self == SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_65MS
382    }
383    #[doc = "Checks if the value of the field is `INTRCOSC_128KHZ_6CK_14CK_65MS`"]
384    #[inline(always)]
385    pub fn is_intrcosc_128khz_6ck_14ck_65ms(&self) -> bool {
386        *self == SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_65MS
387    }
388    #[doc = "Checks if the value of the field is `EXTLOFXTAL_1KCK_14CK_65MS`"]
389    #[inline(always)]
390    pub fn is_extlofxtal_1kck_14ck_65ms(&self) -> bool {
391        *self == SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_65MS
392    }
393    #[doc = "Checks if the value of the field is `EXTLOFXTAL_32KCK_14CK_65MS`"]
394    #[inline(always)]
395    pub fn is_extlofxtal_32kck_14ck_65ms(&self) -> bool {
396        *self == SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_65MS
397    }
398    #[doc = "Checks if the value of the field is `EXTFSXTAL_1KCK_14CK_0MS`"]
399    #[inline(always)]
400    pub fn is_extfsxtal_1kck_14ck_0ms(&self) -> bool {
401        *self == SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_0MS
402    }
403    #[doc = "Checks if the value of the field is `EXTFSXTAL_16KCK_14CK_4MS1`"]
404    #[inline(always)]
405    pub fn is_extfsxtal_16kck_14ck_4ms1(&self) -> bool {
406        *self == SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_4MS1
407    }
408    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS`"]
409    #[inline(always)]
410    pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_0ms(&self) -> bool {
411        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS
412    }
413    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1`"]
414    #[inline(always)]
415    pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_4ms1(&self) -> bool {
416        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1
417    }
418    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS`"]
419    #[inline(always)]
420    pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_0ms(&self) -> bool {
421        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS
422    }
423    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1`"]
424    #[inline(always)]
425    pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_4ms1(&self) -> bool {
426        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1
427    }
428    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS`"]
429    #[inline(always)]
430    pub fn is_extxosc_3mhz_8mhz_1kck_14ck_0ms(&self) -> bool {
431        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS
432    }
433    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1`"]
434    #[inline(always)]
435    pub fn is_extxosc_3mhz_8mhz_16kck_14ck_4ms1(&self) -> bool {
436        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1
437    }
438    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_1KCK_14CK_0MS`"]
439    #[inline(always)]
440    pub fn is_extxosc_8mhz_xx_1kck_14ck_0ms(&self) -> bool {
441        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_0MS
442    }
443    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1`"]
444    #[inline(always)]
445    pub fn is_extxosc_8mhz_xx_16kck_14ck_4ms1(&self) -> bool {
446        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1
447    }
448    #[doc = "Checks if the value of the field is `EXTFSXTAL_1KCK_14CK_4MS1`"]
449    #[inline(always)]
450    pub fn is_extfsxtal_1kck_14ck_4ms1(&self) -> bool {
451        *self == SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_4MS1
452    }
453    #[doc = "Checks if the value of the field is `EXTFSXTAL_16KCK_14CK_65MS`"]
454    #[inline(always)]
455    pub fn is_extfsxtal_16kck_14ck_65ms(&self) -> bool {
456        *self == SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_65MS
457    }
458    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1`"]
459    #[inline(always)]
460    pub fn is_extxosc_0mhz4_0mhz9_1kck_14ck_4ms1(&self) -> bool {
461        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1
462    }
463    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS`"]
464    #[inline(always)]
465    pub fn is_extxosc_0mhz4_0mhz9_16kck_14ck_65ms(&self) -> bool {
466        *self == SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS
467    }
468    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1`"]
469    #[inline(always)]
470    pub fn is_extxosc_0mhz9_3mhz_1kck_14ck_4ms1(&self) -> bool {
471        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1
472    }
473    #[doc = "Checks if the value of the field is `EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS`"]
474    #[inline(always)]
475    pub fn is_extxosc_0mhz9_3mhz_16kck_14ck_65ms(&self) -> bool {
476        *self == SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS
477    }
478    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1`"]
479    #[inline(always)]
480    pub fn is_extxosc_3mhz_8mhz_1kck_14ck_4ms1(&self) -> bool {
481        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1
482    }
483    #[doc = "Checks if the value of the field is `EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS`"]
484    #[inline(always)]
485    pub fn is_extxosc_3mhz_8mhz_16kck_14ck_65ms(&self) -> bool {
486        *self == SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS
487    }
488    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1`"]
489    #[inline(always)]
490    pub fn is_extxosc_8mhz_xx_1kck_14ck_4ms1(&self) -> bool {
491        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1
492    }
493    #[doc = "Checks if the value of the field is `EXTXOSC_8MHZ_XX_16KCK_14CK_65MS`"]
494    #[inline(always)]
495    pub fn is_extxosc_8mhz_xx_16kck_14ck_65ms(&self) -> bool {
496        *self == SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_65MS
497    }
498}
499#[doc = "Field `SUT_CKSEL` writer - Select Clock Source"]
500pub type SUT_CKSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u8, LOW_SPEC, u8, SUT_CKSEL_A, 6, O>;
501impl<'a, const O: u8> SUT_CKSEL_W<'a, O> {
502    #[doc = "Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
503    #[inline(always)]
504    pub fn extclk_6ck_14ck_0ms(self) -> &'a mut W {
505        self.variant(SUT_CKSEL_A::EXTCLK_6CK_14CK_0MS)
506    }
507    #[doc = "Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
508    #[inline(always)]
509    pub fn intrcosc_8mhz_6ck_14ck_0ms(self) -> &'a mut W {
510        self.variant(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_0MS)
511    }
512    #[doc = "Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms"]
513    #[inline(always)]
514    pub fn intrcosc_128khz_6ck_14ck_0ms(self) -> &'a mut W {
515        self.variant(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_0MS)
516    }
517    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms"]
518    #[inline(always)]
519    pub fn extlofxtal_1kck_14ck_0ms(self) -> &'a mut W {
520        self.variant(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_0MS)
521    }
522    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 0 ms"]
523    #[inline(always)]
524    pub fn extlofxtal_32kck_14ck_0ms(self) -> &'a mut W {
525        self.variant(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_0MS)
526    }
527    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
528    #[inline(always)]
529    pub fn extfsxtal_258ck_14ck_4ms1(self) -> &'a mut W {
530        self.variant(SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_4MS1)
531    }
532    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
533    #[inline(always)]
534    pub fn extfsxtal_1kck_14ck_65ms(self) -> &'a mut W {
535        self.variant(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_65MS)
536    }
537    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
538    #[inline(always)]
539    pub fn extxosc_0mhz4_0mhz9_258ck_14ck_4ms1(self) -> &'a mut W {
540        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_4MS1)
541    }
542    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
543    #[inline(always)]
544    pub fn extxosc_0mhz4_0mhz9_1kck_14ck_65ms(self) -> &'a mut W {
545        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_65MS)
546    }
547    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
548    #[inline(always)]
549    pub fn extxosc_0mhz9_3mhz_258ck_14ck_4ms1(self) -> &'a mut W {
550        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_4MS1)
551    }
552    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
553    #[inline(always)]
554    pub fn extxosc_0mhz9_3mhz_1kck_14ck_65ms(self) -> &'a mut W {
555        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_65MS)
556    }
557    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
558    #[inline(always)]
559    pub fn extxosc_3mhz_8mhz_258ck_14ck_4ms1(self) -> &'a mut W {
560        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_4MS1)
561    }
562    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
563    #[inline(always)]
564    pub fn extxosc_3mhz_8mhz_1kck_14ck_65ms(self) -> &'a mut W {
565        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_65MS)
566    }
567    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms"]
568    #[inline(always)]
569    pub fn extxosc_8mhz_xx_258ck_14ck_4ms1(self) -> &'a mut W {
570        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_4MS1)
571    }
572    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms"]
573    #[inline(always)]
574    pub fn extxosc_8mhz_xx_1kck_14ck_65ms(self) -> &'a mut W {
575        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_65MS)
576    }
577    #[doc = "Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
578    #[inline(always)]
579    pub fn extclk_6ck_14ck_4ms1(self) -> &'a mut W {
580        self.variant(SUT_CKSEL_A::EXTCLK_6CK_14CK_4MS1)
581    }
582    #[doc = "Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
583    #[inline(always)]
584    pub fn intrcosc_8mhz_6ck_14ck_4ms1(self) -> &'a mut W {
585        self.variant(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_4MS1)
586    }
587    #[doc = "Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms"]
588    #[inline(always)]
589    pub fn intrcosc_128khz_6ck_14ck_4ms1(self) -> &'a mut W {
590        self.variant(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_4MS1)
591    }
592    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms"]
593    #[inline(always)]
594    pub fn extlofxtal_1kck_14ck_4ms1(self) -> &'a mut W {
595        self.variant(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_4MS1)
596    }
597    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 4.1 ms"]
598    #[inline(always)]
599    pub fn extlofxtal_32kck_14ck_4ms1(self) -> &'a mut W {
600        self.variant(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_4MS1)
601    }
602    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
603    #[inline(always)]
604    pub fn extfsxtal_258ck_14ck_65ms(self) -> &'a mut W {
605        self.variant(SUT_CKSEL_A::EXTFSXTAL_258CK_14CK_65MS)
606    }
607    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
608    #[inline(always)]
609    pub fn extfsxtal_16kck_14ck_0ms(self) -> &'a mut W {
610        self.variant(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_0MS)
611    }
612    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
613    #[inline(always)]
614    pub fn extxosc_0mhz4_0mhz9_258ck_14ck_65ms(self) -> &'a mut W {
615        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_258CK_14CK_65MS)
616    }
617    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
618    #[inline(always)]
619    pub fn extxosc_0mhz4_0mhz9_16kck_14ck_0ms(self) -> &'a mut W {
620        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_0MS)
621    }
622    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
623    #[inline(always)]
624    pub fn extxosc_0mhz9_3mhz_258ck_14ck_65ms(self) -> &'a mut W {
625        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_258CK_14CK_65MS)
626    }
627    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
628    #[inline(always)]
629    pub fn extxosc_0mhz9_3mhz_16kck_14ck_0ms(self) -> &'a mut W {
630        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_0MS)
631    }
632    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
633    #[inline(always)]
634    pub fn extxosc_3mhz_8mhz_258ck_14ck_65ms(self) -> &'a mut W {
635        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_258CK_14CK_65MS)
636    }
637    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
638    #[inline(always)]
639    pub fn extxosc_3mhz_8mhz_16kck_14ck_0ms(self) -> &'a mut W {
640        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_0MS)
641    }
642    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms"]
643    #[inline(always)]
644    pub fn extxosc_8mhz_xx_258ck_14ck_65ms(self) -> &'a mut W {
645        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_258CK_14CK_65MS)
646    }
647    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms"]
648    #[inline(always)]
649    pub fn extxosc_8mhz_xx_16kck_14ck_0ms(self) -> &'a mut W {
650        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_0MS)
651    }
652    #[doc = "Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
653    #[inline(always)]
654    pub fn extclk_6ck_14ck_65ms(self) -> &'a mut W {
655        self.variant(SUT_CKSEL_A::EXTCLK_6CK_14CK_65MS)
656    }
657    #[doc = "Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
658    #[inline(always)]
659    pub fn intrcosc_8mhz_6ck_14ck_65ms(self) -> &'a mut W {
660        self.variant(SUT_CKSEL_A::INTRCOSC_8MHZ_6CK_14CK_65MS)
661    }
662    #[doc = "Int. RC Osc. 128kHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms"]
663    #[inline(always)]
664    pub fn intrcosc_128khz_6ck_14ck_65ms(self) -> &'a mut W {
665        self.variant(SUT_CKSEL_A::INTRCOSC_128KHZ_6CK_14CK_65MS)
666    }
667    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms"]
668    #[inline(always)]
669    pub fn extlofxtal_1kck_14ck_65ms(self) -> &'a mut W {
670        self.variant(SUT_CKSEL_A::EXTLOFXTAL_1KCK_14CK_65MS)
671    }
672    #[doc = "Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/14 CK + 65 ms"]
673    #[inline(always)]
674    pub fn extlofxtal_32kck_14ck_65ms(self) -> &'a mut W {
675        self.variant(SUT_CKSEL_A::EXTLOFXTAL_32KCK_14CK_65MS)
676    }
677    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
678    #[inline(always)]
679    pub fn extfsxtal_1kck_14ck_0ms(self) -> &'a mut W {
680        self.variant(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_0MS)
681    }
682    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
683    #[inline(always)]
684    pub fn extfsxtal_16kck_14ck_4ms1(self) -> &'a mut W {
685        self.variant(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_4MS1)
686    }
687    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
688    #[inline(always)]
689    pub fn extxosc_0mhz4_0mhz9_1kck_14ck_0ms(self) -> &'a mut W {
690        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_0MS)
691    }
692    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
693    #[inline(always)]
694    pub fn extxosc_0mhz4_0mhz9_16kck_14ck_4ms1(self) -> &'a mut W {
695        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_4MS1)
696    }
697    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
698    #[inline(always)]
699    pub fn extxosc_0mhz9_3mhz_1kck_14ck_0ms(self) -> &'a mut W {
700        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_0MS)
701    }
702    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
703    #[inline(always)]
704    pub fn extxosc_0mhz9_3mhz_16kck_14ck_4ms1(self) -> &'a mut W {
705        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_4MS1)
706    }
707    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
708    #[inline(always)]
709    pub fn extxosc_3mhz_8mhz_1kck_14ck_0ms(self) -> &'a mut W {
710        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_0MS)
711    }
712    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
713    #[inline(always)]
714    pub fn extxosc_3mhz_8mhz_16kck_14ck_4ms1(self) -> &'a mut W {
715        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_4MS1)
716    }
717    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms"]
718    #[inline(always)]
719    pub fn extxosc_8mhz_xx_1kck_14ck_0ms(self) -> &'a mut W {
720        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_0MS)
721    }
722    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms"]
723    #[inline(always)]
724    pub fn extxosc_8mhz_xx_16kck_14ck_4ms1(self) -> &'a mut W {
725        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_4MS1)
726    }
727    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
728    #[inline(always)]
729    pub fn extfsxtal_1kck_14ck_4ms1(self) -> &'a mut W {
730        self.variant(SUT_CKSEL_A::EXTFSXTAL_1KCK_14CK_4MS1)
731    }
732    #[doc = "Ext. Full-swing Crystal; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
733    #[inline(always)]
734    pub fn extfsxtal_16kck_14ck_65ms(self) -> &'a mut W {
735        self.variant(SUT_CKSEL_A::EXTFSXTAL_16KCK_14CK_65MS)
736    }
737    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
738    #[inline(always)]
739    pub fn extxosc_0mhz4_0mhz9_1kck_14ck_4ms1(self) -> &'a mut W {
740        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_1KCK_14CK_4MS1)
741    }
742    #[doc = "Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
743    #[inline(always)]
744    pub fn extxosc_0mhz4_0mhz9_16kck_14ck_65ms(self) -> &'a mut W {
745        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ4_0MHZ9_16KCK_14CK_65MS)
746    }
747    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
748    #[inline(always)]
749    pub fn extxosc_0mhz9_3mhz_1kck_14ck_4ms1(self) -> &'a mut W {
750        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_1KCK_14CK_4MS1)
751    }
752    #[doc = "Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
753    #[inline(always)]
754    pub fn extxosc_0mhz9_3mhz_16kck_14ck_65ms(self) -> &'a mut W {
755        self.variant(SUT_CKSEL_A::EXTXOSC_0MHZ9_3MHZ_16KCK_14CK_65MS)
756    }
757    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
758    #[inline(always)]
759    pub fn extxosc_3mhz_8mhz_1kck_14ck_4ms1(self) -> &'a mut W {
760        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_1KCK_14CK_4MS1)
761    }
762    #[doc = "Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
763    #[inline(always)]
764    pub fn extxosc_3mhz_8mhz_16kck_14ck_65ms(self) -> &'a mut W {
765        self.variant(SUT_CKSEL_A::EXTXOSC_3MHZ_8MHZ_16KCK_14CK_65MS)
766    }
767    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms"]
768    #[inline(always)]
769    pub fn extxosc_8mhz_xx_1kck_14ck_4ms1(self) -> &'a mut W {
770        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_1KCK_14CK_4MS1)
771    }
772    #[doc = "Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms"]
773    #[inline(always)]
774    pub fn extxosc_8mhz_xx_16kck_14ck_65ms(self) -> &'a mut W {
775        self.variant(SUT_CKSEL_A::EXTXOSC_8MHZ_XX_16KCK_14CK_65MS)
776    }
777}
778#[doc = "Field `CKOUT` reader - Clock output on PORTB0"]
779pub type CKOUT_R = crate::BitReader<bool>;
780#[doc = "Field `CKOUT` writer - Clock output on PORTB0"]
781pub type CKOUT_W<'a, const O: u8> = crate::BitWriter<'a, u8, LOW_SPEC, bool, O>;
782#[doc = "Field `CKDIV8` reader - Divide clock by 8 internally"]
783pub type CKDIV8_R = crate::BitReader<bool>;
784#[doc = "Field `CKDIV8` writer - Divide clock by 8 internally"]
785pub type CKDIV8_W<'a, const O: u8> = crate::BitWriter<'a, u8, LOW_SPEC, bool, O>;
786impl R {
787    #[doc = "Bits 0:5 - Select Clock Source"]
788    #[inline(always)]
789    pub fn sut_cksel(&self) -> SUT_CKSEL_R {
790        SUT_CKSEL_R::new(self.bits & 0x3f)
791    }
792    #[doc = "Bit 6 - Clock output on PORTB0"]
793    #[inline(always)]
794    pub fn ckout(&self) -> CKOUT_R {
795        CKOUT_R::new(((self.bits >> 6) & 1) != 0)
796    }
797    #[doc = "Bit 7 - Divide clock by 8 internally"]
798    #[inline(always)]
799    pub fn ckdiv8(&self) -> CKDIV8_R {
800        CKDIV8_R::new(((self.bits >> 7) & 1) != 0)
801    }
802}
803impl W {
804    #[doc = "Bits 0:5 - Select Clock Source"]
805    #[inline(always)]
806    #[must_use]
807    pub fn sut_cksel(&mut self) -> SUT_CKSEL_W<0> {
808        SUT_CKSEL_W::new(self)
809    }
810    #[doc = "Bit 6 - Clock output on PORTB0"]
811    #[inline(always)]
812    #[must_use]
813    pub fn ckout(&mut self) -> CKOUT_W<6> {
814        CKOUT_W::new(self)
815    }
816    #[doc = "Bit 7 - Divide clock by 8 internally"]
817    #[inline(always)]
818    #[must_use]
819    pub fn ckdiv8(&mut self) -> CKDIV8_W<7> {
820        CKDIV8_W::new(self)
821    }
822    #[doc = "Writes raw bits to the register."]
823    #[inline(always)]
824    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
825        self.0.bits(bits);
826        self
827    }
828}
829#[doc = "No Description.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [low](index.html) module"]
830pub struct LOW_SPEC;
831impl crate::RegisterSpec for LOW_SPEC {
832    type Ux = u8;
833}
834#[doc = "`read()` method returns [low::R](R) reader structure"]
835impl crate::Readable for LOW_SPEC {
836    type Reader = R;
837}
838#[doc = "`write(|w| ..)` method takes [low::W](W) writer structure"]
839impl crate::Writable for LOW_SPEC {
840    type Writer = W;
841    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
842    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
843}
844#[doc = "`reset()` method sets LOW to value 0"]
845impl crate::Resettable for LOW_SPEC {
846    const RESET_VALUE: Self::Ux = 0;
847}
avr_device/devices/atmega328p/fuse/low.rs

avr_device/devices/atmega328p/fuse/
low.rs
