avr_device/devices/atmega32u4/adc/
adcsrb.rs

1#[doc = "Register `ADCSRB` reader"]
2pub struct R(crate::R<ADCSRB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ADCSRB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ADCSRB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ADCSRB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ADCSRB` writer"]
17pub struct W(crate::W<ADCSRB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ADCSRB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ADCSRB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ADCSRB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ADTS` reader - ADC Auto Trigger Sources"]
38pub type ADTS_R = crate::FieldReader<u8, ADTS_A>;
39#[doc = "ADC Auto Trigger Sources\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum ADTS_A {
43    #[doc = "0: Free Running mode"]
44    VAL_0X00 = 0,
45    #[doc = "1: Analog Comparator"]
46    VAL_0X01 = 1,
47    #[doc = "2: External Interrupt Request 0"]
48    VAL_0X02 = 2,
49    #[doc = "3: Timer/Counter0 Compare Match A"]
50    VAL_0X03 = 3,
51    #[doc = "4: Timer/Counter0 Overflow"]
52    VAL_0X04 = 4,
53    #[doc = "5: Timer/Counter1 Compare Match B"]
54    VAL_0X05 = 5,
55    #[doc = "6: Timer/Counter1 Overflow"]
56    VAL_0X06 = 6,
57    #[doc = "7: Timer/Counter1 Capture Event"]
58    VAL_0X07 = 7,
59}
60impl From<ADTS_A> for u8 {
61    #[inline(always)]
62    fn from(variant: ADTS_A) -> Self {
63        variant as _
64    }
65}
66impl ADTS_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<ADTS_A> {
70        match self.bits {
71            0 => Some(ADTS_A::VAL_0X00),
72            1 => Some(ADTS_A::VAL_0X01),
73            2 => Some(ADTS_A::VAL_0X02),
74            3 => Some(ADTS_A::VAL_0X03),
75            4 => Some(ADTS_A::VAL_0X04),
76            5 => Some(ADTS_A::VAL_0X05),
77            6 => Some(ADTS_A::VAL_0X06),
78            7 => Some(ADTS_A::VAL_0X07),
79            _ => None,
80        }
81    }
82    #[doc = "Checks if the value of the field is `VAL_0X00`"]
83    #[inline(always)]
84    pub fn is_val_0x00(&self) -> bool {
85        *self == ADTS_A::VAL_0X00
86    }
87    #[doc = "Checks if the value of the field is `VAL_0X01`"]
88    #[inline(always)]
89    pub fn is_val_0x01(&self) -> bool {
90        *self == ADTS_A::VAL_0X01
91    }
92    #[doc = "Checks if the value of the field is `VAL_0X02`"]
93    #[inline(always)]
94    pub fn is_val_0x02(&self) -> bool {
95        *self == ADTS_A::VAL_0X02
96    }
97    #[doc = "Checks if the value of the field is `VAL_0X03`"]
98    #[inline(always)]
99    pub fn is_val_0x03(&self) -> bool {
100        *self == ADTS_A::VAL_0X03
101    }
102    #[doc = "Checks if the value of the field is `VAL_0X04`"]
103    #[inline(always)]
104    pub fn is_val_0x04(&self) -> bool {
105        *self == ADTS_A::VAL_0X04
106    }
107    #[doc = "Checks if the value of the field is `VAL_0X05`"]
108    #[inline(always)]
109    pub fn is_val_0x05(&self) -> bool {
110        *self == ADTS_A::VAL_0X05
111    }
112    #[doc = "Checks if the value of the field is `VAL_0X06`"]
113    #[inline(always)]
114    pub fn is_val_0x06(&self) -> bool {
115        *self == ADTS_A::VAL_0X06
116    }
117    #[doc = "Checks if the value of the field is `VAL_0X07`"]
118    #[inline(always)]
119    pub fn is_val_0x07(&self) -> bool {
120        *self == ADTS_A::VAL_0X07
121    }
122}
123#[doc = "Field `ADTS` writer - ADC Auto Trigger Sources"]
124pub type ADTS_W<'a, const O: u8> = crate::FieldWriter<'a, u8, ADCSRB_SPEC, u8, ADTS_A, 5, O>;
125impl<'a, const O: u8> ADTS_W<'a, O> {
126    #[doc = "Free Running mode"]
127    #[inline(always)]
128    pub fn val_0x00(self) -> &'a mut W {
129        self.variant(ADTS_A::VAL_0X00)
130    }
131    #[doc = "Analog Comparator"]
132    #[inline(always)]
133    pub fn val_0x01(self) -> &'a mut W {
134        self.variant(ADTS_A::VAL_0X01)
135    }
136    #[doc = "External Interrupt Request 0"]
137    #[inline(always)]
138    pub fn val_0x02(self) -> &'a mut W {
139        self.variant(ADTS_A::VAL_0X02)
140    }
141    #[doc = "Timer/Counter0 Compare Match A"]
142    #[inline(always)]
143    pub fn val_0x03(self) -> &'a mut W {
144        self.variant(ADTS_A::VAL_0X03)
145    }
146    #[doc = "Timer/Counter0 Overflow"]
147    #[inline(always)]
148    pub fn val_0x04(self) -> &'a mut W {
149        self.variant(ADTS_A::VAL_0X04)
150    }
151    #[doc = "Timer/Counter1 Compare Match B"]
152    #[inline(always)]
153    pub fn val_0x05(self) -> &'a mut W {
154        self.variant(ADTS_A::VAL_0X05)
155    }
156    #[doc = "Timer/Counter1 Overflow"]
157    #[inline(always)]
158    pub fn val_0x06(self) -> &'a mut W {
159        self.variant(ADTS_A::VAL_0X06)
160    }
161    #[doc = "Timer/Counter1 Capture Event"]
162    #[inline(always)]
163    pub fn val_0x07(self) -> &'a mut W {
164        self.variant(ADTS_A::VAL_0X07)
165    }
166}
167#[doc = "Field `MUX5` reader - Analog Channel and Gain Selection Bits"]
168pub type MUX5_R = crate::BitReader<bool>;
169#[doc = "Field `MUX5` writer - Analog Channel and Gain Selection Bits"]
170pub type MUX5_W<'a, const O: u8> = crate::BitWriter<'a, u8, ADCSRB_SPEC, bool, O>;
171#[doc = "Field `ADHSM` reader - ADC High Speed Mode"]
172pub type ADHSM_R = crate::BitReader<bool>;
173#[doc = "Field `ADHSM` writer - ADC High Speed Mode"]
174pub type ADHSM_W<'a, const O: u8> = crate::BitWriter<'a, u8, ADCSRB_SPEC, bool, O>;
175impl R {
176    #[doc = "Bits 0:4 - ADC Auto Trigger Sources"]
177    #[inline(always)]
178    pub fn adts(&self) -> ADTS_R {
179        ADTS_R::new(self.bits & 0x1f)
180    }
181    #[doc = "Bit 5 - Analog Channel and Gain Selection Bits"]
182    #[inline(always)]
183    pub fn mux5(&self) -> MUX5_R {
184        MUX5_R::new(((self.bits >> 5) & 1) != 0)
185    }
186    #[doc = "Bit 7 - ADC High Speed Mode"]
187    #[inline(always)]
188    pub fn adhsm(&self) -> ADHSM_R {
189        ADHSM_R::new(((self.bits >> 7) & 1) != 0)
190    }
191}
192impl W {
193    #[doc = "Bits 0:4 - ADC Auto Trigger Sources"]
194    #[inline(always)]
195    #[must_use]
196    pub fn adts(&mut self) -> ADTS_W<0> {
197        ADTS_W::new(self)
198    }
199    #[doc = "Bit 5 - Analog Channel and Gain Selection Bits"]
200    #[inline(always)]
201    #[must_use]
202    pub fn mux5(&mut self) -> MUX5_W<5> {
203        MUX5_W::new(self)
204    }
205    #[doc = "Bit 7 - ADC High Speed Mode"]
206    #[inline(always)]
207    #[must_use]
208    pub fn adhsm(&mut self) -> ADHSM_W<7> {
209        ADHSM_W::new(self)
210    }
211    #[doc = "Writes raw bits to the register."]
212    #[inline(always)]
213    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
214        self.0.bits(bits);
215        self
216    }
217}
218#[doc = "ADC Control and Status Register B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [adcsrb](index.html) module"]
219pub struct ADCSRB_SPEC;
220impl crate::RegisterSpec for ADCSRB_SPEC {
221    type Ux = u8;
222}
223#[doc = "`read()` method returns [adcsrb::R](R) reader structure"]
224impl crate::Readable for ADCSRB_SPEC {
225    type Reader = R;
226}
227#[doc = "`write(|w| ..)` method takes [adcsrb::W](W) writer structure"]
228impl crate::Writable for ADCSRB_SPEC {
229    type Writer = W;
230    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
231    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
232}
233#[doc = "`reset()` method sets ADCSRB to value 0"]
234impl crate::Resettable for ADCSRB_SPEC {
235    const RESET_VALUE: Self::Ux = 0;
236}
avr_device/devices/atmega32u4/adc/adcsrb.rs

avr_device/devices/atmega32u4/adc/
adcsrb.rs
