avr_device/devices/atmega32u4/exint/
eicrb.rs

1#[doc = "Register `EICRB` reader"]
2pub struct R(crate::R<EICRB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<EICRB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<EICRB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<EICRB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `EICRB` writer"]
17pub struct W(crate::W<EICRB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<EICRB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<EICRB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<EICRB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ISC4` reader - External Interrupt 7-4 Sense Control Bit"]
38pub type ISC4_R = crate::FieldReader<u8, ISC4_A>;
39#[doc = "External Interrupt 7-4 Sense Control Bit\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum ISC4_A {
43    #[doc = "0: Low Level of INTX"]
44    VAL_0X00 = 0,
45    #[doc = "1: Any Logical Change of INTX"]
46    VAL_0X01 = 1,
47    #[doc = "2: Falling Edge of INTX"]
48    VAL_0X02 = 2,
49    #[doc = "3: Rising Edge of INTX"]
50    VAL_0X03 = 3,
51}
52impl From<ISC4_A> for u8 {
53    #[inline(always)]
54    fn from(variant: ISC4_A) -> Self {
55        variant as _
56    }
57}
58impl ISC4_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> ISC4_A {
62        match self.bits {
63            0 => ISC4_A::VAL_0X00,
64            1 => ISC4_A::VAL_0X01,
65            2 => ISC4_A::VAL_0X02,
66            3 => ISC4_A::VAL_0X03,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `VAL_0X00`"]
71    #[inline(always)]
72    pub fn is_val_0x00(&self) -> bool {
73        *self == ISC4_A::VAL_0X00
74    }
75    #[doc = "Checks if the value of the field is `VAL_0X01`"]
76    #[inline(always)]
77    pub fn is_val_0x01(&self) -> bool {
78        *self == ISC4_A::VAL_0X01
79    }
80    #[doc = "Checks if the value of the field is `VAL_0X02`"]
81    #[inline(always)]
82    pub fn is_val_0x02(&self) -> bool {
83        *self == ISC4_A::VAL_0X02
84    }
85    #[doc = "Checks if the value of the field is `VAL_0X03`"]
86    #[inline(always)]
87    pub fn is_val_0x03(&self) -> bool {
88        *self == ISC4_A::VAL_0X03
89    }
90}
91#[doc = "Field `ISC4` writer - External Interrupt 7-4 Sense Control Bit"]
92pub type ISC4_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, EICRB_SPEC, u8, ISC4_A, 2, O>;
93impl<'a, const O: u8> ISC4_W<'a, O> {
94    #[doc = "Low Level of INTX"]
95    #[inline(always)]
96    pub fn val_0x00(self) -> &'a mut W {
97        self.variant(ISC4_A::VAL_0X00)
98    }
99    #[doc = "Any Logical Change of INTX"]
100    #[inline(always)]
101    pub fn val_0x01(self) -> &'a mut W {
102        self.variant(ISC4_A::VAL_0X01)
103    }
104    #[doc = "Falling Edge of INTX"]
105    #[inline(always)]
106    pub fn val_0x02(self) -> &'a mut W {
107        self.variant(ISC4_A::VAL_0X02)
108    }
109    #[doc = "Rising Edge of INTX"]
110    #[inline(always)]
111    pub fn val_0x03(self) -> &'a mut W {
112        self.variant(ISC4_A::VAL_0X03)
113    }
114}
115#[doc = "Field `ISC5` reader - External Interrupt 7-4 Sense Control Bit"]
116pub type ISC5_R = crate::FieldReader<u8, ISC5_A>;
117#[doc = "External Interrupt 7-4 Sense Control Bit\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119#[repr(u8)]
120pub enum ISC5_A {
121    #[doc = "0: Low Level of INTX"]
122    VAL_0X00 = 0,
123    #[doc = "1: Any Logical Change of INTX"]
124    VAL_0X01 = 1,
125    #[doc = "2: Falling Edge of INTX"]
126    VAL_0X02 = 2,
127    #[doc = "3: Rising Edge of INTX"]
128    VAL_0X03 = 3,
129}
130impl From<ISC5_A> for u8 {
131    #[inline(always)]
132    fn from(variant: ISC5_A) -> Self {
133        variant as _
134    }
135}
136impl ISC5_R {
137    #[doc = "Get enumerated values variant"]
138    #[inline(always)]
139    pub fn variant(&self) -> ISC5_A {
140        match self.bits {
141            0 => ISC5_A::VAL_0X00,
142            1 => ISC5_A::VAL_0X01,
143            2 => ISC5_A::VAL_0X02,
144            3 => ISC5_A::VAL_0X03,
145            _ => unreachable!(),
146        }
147    }
148    #[doc = "Checks if the value of the field is `VAL_0X00`"]
149    #[inline(always)]
150    pub fn is_val_0x00(&self) -> bool {
151        *self == ISC5_A::VAL_0X00
152    }
153    #[doc = "Checks if the value of the field is `VAL_0X01`"]
154    #[inline(always)]
155    pub fn is_val_0x01(&self) -> bool {
156        *self == ISC5_A::VAL_0X01
157    }
158    #[doc = "Checks if the value of the field is `VAL_0X02`"]
159    #[inline(always)]
160    pub fn is_val_0x02(&self) -> bool {
161        *self == ISC5_A::VAL_0X02
162    }
163    #[doc = "Checks if the value of the field is `VAL_0X03`"]
164    #[inline(always)]
165    pub fn is_val_0x03(&self) -> bool {
166        *self == ISC5_A::VAL_0X03
167    }
168}
169#[doc = "Field `ISC5` writer - External Interrupt 7-4 Sense Control Bit"]
170pub type ISC5_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, EICRB_SPEC, u8, ISC5_A, 2, O>;
171impl<'a, const O: u8> ISC5_W<'a, O> {
172    #[doc = "Low Level of INTX"]
173    #[inline(always)]
174    pub fn val_0x00(self) -> &'a mut W {
175        self.variant(ISC5_A::VAL_0X00)
176    }
177    #[doc = "Any Logical Change of INTX"]
178    #[inline(always)]
179    pub fn val_0x01(self) -> &'a mut W {
180        self.variant(ISC5_A::VAL_0X01)
181    }
182    #[doc = "Falling Edge of INTX"]
183    #[inline(always)]
184    pub fn val_0x02(self) -> &'a mut W {
185        self.variant(ISC5_A::VAL_0X02)
186    }
187    #[doc = "Rising Edge of INTX"]
188    #[inline(always)]
189    pub fn val_0x03(self) -> &'a mut W {
190        self.variant(ISC5_A::VAL_0X03)
191    }
192}
193#[doc = "Field `ISC6` reader - External Interrupt 7-4 Sense Control Bit"]
194pub type ISC6_R = crate::FieldReader<u8, ISC6_A>;
195#[doc = "External Interrupt 7-4 Sense Control Bit\n\nValue on reset: 0"]
196#[derive(Clone, Copy, Debug, PartialEq, Eq)]
197#[repr(u8)]
198pub enum ISC6_A {
199    #[doc = "0: Low Level of INTX"]
200    VAL_0X00 = 0,
201    #[doc = "1: Any Logical Change of INTX"]
202    VAL_0X01 = 1,
203    #[doc = "2: Falling Edge of INTX"]
204    VAL_0X02 = 2,
205    #[doc = "3: Rising Edge of INTX"]
206    VAL_0X03 = 3,
207}
208impl From<ISC6_A> for u8 {
209    #[inline(always)]
210    fn from(variant: ISC6_A) -> Self {
211        variant as _
212    }
213}
214impl ISC6_R {
215    #[doc = "Get enumerated values variant"]
216    #[inline(always)]
217    pub fn variant(&self) -> ISC6_A {
218        match self.bits {
219            0 => ISC6_A::VAL_0X00,
220            1 => ISC6_A::VAL_0X01,
221            2 => ISC6_A::VAL_0X02,
222            3 => ISC6_A::VAL_0X03,
223            _ => unreachable!(),
224        }
225    }
226    #[doc = "Checks if the value of the field is `VAL_0X00`"]
227    #[inline(always)]
228    pub fn is_val_0x00(&self) -> bool {
229        *self == ISC6_A::VAL_0X00
230    }
231    #[doc = "Checks if the value of the field is `VAL_0X01`"]
232    #[inline(always)]
233    pub fn is_val_0x01(&self) -> bool {
234        *self == ISC6_A::VAL_0X01
235    }
236    #[doc = "Checks if the value of the field is `VAL_0X02`"]
237    #[inline(always)]
238    pub fn is_val_0x02(&self) -> bool {
239        *self == ISC6_A::VAL_0X02
240    }
241    #[doc = "Checks if the value of the field is `VAL_0X03`"]
242    #[inline(always)]
243    pub fn is_val_0x03(&self) -> bool {
244        *self == ISC6_A::VAL_0X03
245    }
246}
247#[doc = "Field `ISC6` writer - External Interrupt 7-4 Sense Control Bit"]
248pub type ISC6_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, EICRB_SPEC, u8, ISC6_A, 2, O>;
249impl<'a, const O: u8> ISC6_W<'a, O> {
250    #[doc = "Low Level of INTX"]
251    #[inline(always)]
252    pub fn val_0x00(self) -> &'a mut W {
253        self.variant(ISC6_A::VAL_0X00)
254    }
255    #[doc = "Any Logical Change of INTX"]
256    #[inline(always)]
257    pub fn val_0x01(self) -> &'a mut W {
258        self.variant(ISC6_A::VAL_0X01)
259    }
260    #[doc = "Falling Edge of INTX"]
261    #[inline(always)]
262    pub fn val_0x02(self) -> &'a mut W {
263        self.variant(ISC6_A::VAL_0X02)
264    }
265    #[doc = "Rising Edge of INTX"]
266    #[inline(always)]
267    pub fn val_0x03(self) -> &'a mut W {
268        self.variant(ISC6_A::VAL_0X03)
269    }
270}
271#[doc = "Field `ISC7` reader - External Interrupt 7-4 Sense Control Bit"]
272pub type ISC7_R = crate::FieldReader<u8, ISC7_A>;
273#[doc = "External Interrupt 7-4 Sense Control Bit\n\nValue on reset: 0"]
274#[derive(Clone, Copy, Debug, PartialEq, Eq)]
275#[repr(u8)]
276pub enum ISC7_A {
277    #[doc = "0: Low Level of INTX"]
278    VAL_0X00 = 0,
279    #[doc = "1: Any Logical Change of INTX"]
280    VAL_0X01 = 1,
281    #[doc = "2: Falling Edge of INTX"]
282    VAL_0X02 = 2,
283    #[doc = "3: Rising Edge of INTX"]
284    VAL_0X03 = 3,
285}
286impl From<ISC7_A> for u8 {
287    #[inline(always)]
288    fn from(variant: ISC7_A) -> Self {
289        variant as _
290    }
291}
292impl ISC7_R {
293    #[doc = "Get enumerated values variant"]
294    #[inline(always)]
295    pub fn variant(&self) -> ISC7_A {
296        match self.bits {
297            0 => ISC7_A::VAL_0X00,
298            1 => ISC7_A::VAL_0X01,
299            2 => ISC7_A::VAL_0X02,
300            3 => ISC7_A::VAL_0X03,
301            _ => unreachable!(),
302        }
303    }
304    #[doc = "Checks if the value of the field is `VAL_0X00`"]
305    #[inline(always)]
306    pub fn is_val_0x00(&self) -> bool {
307        *self == ISC7_A::VAL_0X00
308    }
309    #[doc = "Checks if the value of the field is `VAL_0X01`"]
310    #[inline(always)]
311    pub fn is_val_0x01(&self) -> bool {
312        *self == ISC7_A::VAL_0X01
313    }
314    #[doc = "Checks if the value of the field is `VAL_0X02`"]
315    #[inline(always)]
316    pub fn is_val_0x02(&self) -> bool {
317        *self == ISC7_A::VAL_0X02
318    }
319    #[doc = "Checks if the value of the field is `VAL_0X03`"]
320    #[inline(always)]
321    pub fn is_val_0x03(&self) -> bool {
322        *self == ISC7_A::VAL_0X03
323    }
324}
325#[doc = "Field `ISC7` writer - External Interrupt 7-4 Sense Control Bit"]
326pub type ISC7_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, EICRB_SPEC, u8, ISC7_A, 2, O>;
327impl<'a, const O: u8> ISC7_W<'a, O> {
328    #[doc = "Low Level of INTX"]
329    #[inline(always)]
330    pub fn val_0x00(self) -> &'a mut W {
331        self.variant(ISC7_A::VAL_0X00)
332    }
333    #[doc = "Any Logical Change of INTX"]
334    #[inline(always)]
335    pub fn val_0x01(self) -> &'a mut W {
336        self.variant(ISC7_A::VAL_0X01)
337    }
338    #[doc = "Falling Edge of INTX"]
339    #[inline(always)]
340    pub fn val_0x02(self) -> &'a mut W {
341        self.variant(ISC7_A::VAL_0X02)
342    }
343    #[doc = "Rising Edge of INTX"]
344    #[inline(always)]
345    pub fn val_0x03(self) -> &'a mut W {
346        self.variant(ISC7_A::VAL_0X03)
347    }
348}
349impl R {
350    #[doc = "Bits 0:1 - External Interrupt 7-4 Sense Control Bit"]
351    #[inline(always)]
352    pub fn isc4(&self) -> ISC4_R {
353        ISC4_R::new(self.bits & 3)
354    }
355    #[doc = "Bits 2:3 - External Interrupt 7-4 Sense Control Bit"]
356    #[inline(always)]
357    pub fn isc5(&self) -> ISC5_R {
358        ISC5_R::new((self.bits >> 2) & 3)
359    }
360    #[doc = "Bits 4:5 - External Interrupt 7-4 Sense Control Bit"]
361    #[inline(always)]
362    pub fn isc6(&self) -> ISC6_R {
363        ISC6_R::new((self.bits >> 4) & 3)
364    }
365    #[doc = "Bits 6:7 - External Interrupt 7-4 Sense Control Bit"]
366    #[inline(always)]
367    pub fn isc7(&self) -> ISC7_R {
368        ISC7_R::new((self.bits >> 6) & 3)
369    }
370}
371impl W {
372    #[doc = "Bits 0:1 - External Interrupt 7-4 Sense Control Bit"]
373    #[inline(always)]
374    #[must_use]
375    pub fn isc4(&mut self) -> ISC4_W<0> {
376        ISC4_W::new(self)
377    }
378    #[doc = "Bits 2:3 - External Interrupt 7-4 Sense Control Bit"]
379    #[inline(always)]
380    #[must_use]
381    pub fn isc5(&mut self) -> ISC5_W<2> {
382        ISC5_W::new(self)
383    }
384    #[doc = "Bits 4:5 - External Interrupt 7-4 Sense Control Bit"]
385    #[inline(always)]
386    #[must_use]
387    pub fn isc6(&mut self) -> ISC6_W<4> {
388        ISC6_W::new(self)
389    }
390    #[doc = "Bits 6:7 - External Interrupt 7-4 Sense Control Bit"]
391    #[inline(always)]
392    #[must_use]
393    pub fn isc7(&mut self) -> ISC7_W<6> {
394        ISC7_W::new(self)
395    }
396    #[doc = "Writes raw bits to the register."]
397    #[inline(always)]
398    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
399        self.0.bits(bits);
400        self
401    }
402}
403#[doc = "External Interrupt Control Register B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eicrb](index.html) module"]
404pub struct EICRB_SPEC;
405impl crate::RegisterSpec for EICRB_SPEC {
406    type Ux = u8;
407}
408#[doc = "`read()` method returns [eicrb::R](R) reader structure"]
409impl crate::Readable for EICRB_SPEC {
410    type Reader = R;
411}
412#[doc = "`write(|w| ..)` method takes [eicrb::W](W) writer structure"]
413impl crate::Writable for EICRB_SPEC {
414    type Writer = W;
415    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
416    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
417}
418#[doc = "`reset()` method sets EICRB to value 0"]
419impl crate::Resettable for EICRB_SPEC {
420    const RESET_VALUE: Self::Ux = 0;
421}
avr_device/devices/atmega32u4/exint/eicrb.rs

avr_device/devices/atmega32u4/exint/
eicrb.rs
