avr_device/devices/atmega32u4/tc4/
tccr4a.rs1#[doc = "Register `TCCR4A` reader"]
2pub struct R(crate::R<TCCR4A_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<TCCR4A_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<TCCR4A_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<TCCR4A_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `TCCR4A` writer"]
17pub struct W(crate::W<TCCR4A_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<TCCR4A_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<TCCR4A_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<TCCR4A_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PWM4B` reader - No Description."]
38pub type PWM4B_R = crate::BitReader<bool>;
39#[doc = "Field `PWM4B` writer - No Description."]
40pub type PWM4B_W<'a, const O: u8> = crate::BitWriter<'a, u8, TCCR4A_SPEC, bool, O>;
41#[doc = "Field `PWM4A` reader - No Description."]
42pub type PWM4A_R = crate::BitReader<bool>;
43#[doc = "Field `PWM4A` writer - No Description."]
44pub type PWM4A_W<'a, const O: u8> = crate::BitWriter<'a, u8, TCCR4A_SPEC, bool, O>;
45#[doc = "Field `FOC4B` writer - Force Output Compare Match 4B"]
46pub type FOC4B_W<'a, const O: u8> = crate::BitWriter<'a, u8, TCCR4A_SPEC, bool, O>;
47#[doc = "Field `FOC4A` writer - Force Output Compare Match 4A"]
48pub type FOC4A_W<'a, const O: u8> = crate::BitWriter<'a, u8, TCCR4A_SPEC, bool, O>;
49#[doc = "Field `COM4B` reader - Compare Output Mode 4B, bits"]
50pub type COM4B_R = crate::FieldReader<u8, COM4B_A>;
51#[doc = "Compare Output Mode 4B, bits\n\nValue on reset: 0"]
52#[derive(Clone, Copy, Debug, PartialEq, Eq)]
53#[repr(u8)]
54pub enum COM4B_A {
55 #[doc = "0: Normal port operation, OCix disconnected"]
56 DISCONNECTED = 0,
57 #[doc = "1: Toggle OCix on Compare Match (Might depend on WGM)"]
58 MATCH_TOGGLE = 1,
59 #[doc = "2: Clear OCix on Compare Match (If PWM is enabled, OCix is set at TOP)"]
60 MATCH_CLEAR = 2,
61 #[doc = "3: Set OCix on Compare Match (If PWM is enabled, OCix is cleared at TOP)"]
62 MATCH_SET = 3,
63}
64impl From<COM4B_A> for u8 {
65 #[inline(always)]
66 fn from(variant: COM4B_A) -> Self {
67 variant as _
68 }
69}
70impl COM4B_R {
71 #[doc = "Get enumerated values variant"]
72 #[inline(always)]
73 pub fn variant(&self) -> COM4B_A {
74 match self.bits {
75 0 => COM4B_A::DISCONNECTED,
76 1 => COM4B_A::MATCH_TOGGLE,
77 2 => COM4B_A::MATCH_CLEAR,
78 3 => COM4B_A::MATCH_SET,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `DISCONNECTED`"]
83 #[inline(always)]
84 pub fn is_disconnected(&self) -> bool {
85 *self == COM4B_A::DISCONNECTED
86 }
87 #[doc = "Checks if the value of the field is `MATCH_TOGGLE`"]
88 #[inline(always)]
89 pub fn is_match_toggle(&self) -> bool {
90 *self == COM4B_A::MATCH_TOGGLE
91 }
92 #[doc = "Checks if the value of the field is `MATCH_CLEAR`"]
93 #[inline(always)]
94 pub fn is_match_clear(&self) -> bool {
95 *self == COM4B_A::MATCH_CLEAR
96 }
97 #[doc = "Checks if the value of the field is `MATCH_SET`"]
98 #[inline(always)]
99 pub fn is_match_set(&self) -> bool {
100 *self == COM4B_A::MATCH_SET
101 }
102}
103#[doc = "Field `COM4B` writer - Compare Output Mode 4B, bits"]
104pub type COM4B_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, TCCR4A_SPEC, u8, COM4B_A, 2, O>;
105impl<'a, const O: u8> COM4B_W<'a, O> {
106 #[doc = "Normal port operation, OCix disconnected"]
107 #[inline(always)]
108 pub fn disconnected(self) -> &'a mut W {
109 self.variant(COM4B_A::DISCONNECTED)
110 }
111 #[doc = "Toggle OCix on Compare Match (Might depend on WGM)"]
112 #[inline(always)]
113 pub fn match_toggle(self) -> &'a mut W {
114 self.variant(COM4B_A::MATCH_TOGGLE)
115 }
116 #[doc = "Clear OCix on Compare Match (If PWM is enabled, OCix is set at TOP)"]
117 #[inline(always)]
118 pub fn match_clear(self) -> &'a mut W {
119 self.variant(COM4B_A::MATCH_CLEAR)
120 }
121 #[doc = "Set OCix on Compare Match (If PWM is enabled, OCix is cleared at TOP)"]
122 #[inline(always)]
123 pub fn match_set(self) -> &'a mut W {
124 self.variant(COM4B_A::MATCH_SET)
125 }
126}
127#[doc = "Field `COM4A` reader - Compare Output Mode 1A, bits"]
128pub use COM4B_R as COM4A_R;
129#[doc = "Field `COM4A` writer - Compare Output Mode 1A, bits"]
130pub use COM4B_W as COM4A_W;
131impl R {
132 #[doc = "Bit 0 - No Description."]
133 #[inline(always)]
134 pub fn pwm4b(&self) -> PWM4B_R {
135 PWM4B_R::new((self.bits & 1) != 0)
136 }
137 #[doc = "Bit 1 - No Description."]
138 #[inline(always)]
139 pub fn pwm4a(&self) -> PWM4A_R {
140 PWM4A_R::new(((self.bits >> 1) & 1) != 0)
141 }
142 #[doc = "Bits 4:5 - Compare Output Mode 4B, bits"]
143 #[inline(always)]
144 pub fn com4b(&self) -> COM4B_R {
145 COM4B_R::new((self.bits >> 4) & 3)
146 }
147 #[doc = "Bits 6:7 - Compare Output Mode 1A, bits"]
148 #[inline(always)]
149 pub fn com4a(&self) -> COM4A_R {
150 COM4A_R::new((self.bits >> 6) & 3)
151 }
152}
153impl W {
154 #[doc = "Bit 0 - No Description."]
155 #[inline(always)]
156 #[must_use]
157 pub fn pwm4b(&mut self) -> PWM4B_W<0> {
158 PWM4B_W::new(self)
159 }
160 #[doc = "Bit 1 - No Description."]
161 #[inline(always)]
162 #[must_use]
163 pub fn pwm4a(&mut self) -> PWM4A_W<1> {
164 PWM4A_W::new(self)
165 }
166 #[doc = "Bit 2 - Force Output Compare Match 4B"]
167 #[inline(always)]
168 #[must_use]
169 pub fn foc4b(&mut self) -> FOC4B_W<2> {
170 FOC4B_W::new(self)
171 }
172 #[doc = "Bit 3 - Force Output Compare Match 4A"]
173 #[inline(always)]
174 #[must_use]
175 pub fn foc4a(&mut self) -> FOC4A_W<3> {
176 FOC4A_W::new(self)
177 }
178 #[doc = "Bits 4:5 - Compare Output Mode 4B, bits"]
179 #[inline(always)]
180 #[must_use]
181 pub fn com4b(&mut self) -> COM4B_W<4> {
182 COM4B_W::new(self)
183 }
184 #[doc = "Bits 6:7 - Compare Output Mode 1A, bits"]
185 #[inline(always)]
186 #[must_use]
187 pub fn com4a(&mut self) -> COM4A_W<6> {
188 COM4A_W::new(self)
189 }
190 #[doc = "Writes raw bits to the register."]
191 #[inline(always)]
192 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
193 self.0.bits(bits);
194 self
195 }
196}
197#[doc = "Timer/Counter4 Control Register A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tccr4a](index.html) module"]
198pub struct TCCR4A_SPEC;
199impl crate::RegisterSpec for TCCR4A_SPEC {
200 type Ux = u8;
201}
202#[doc = "`read()` method returns [tccr4a::R](R) reader structure"]
203impl crate::Readable for TCCR4A_SPEC {
204 type Reader = R;
205}
206#[doc = "`write(|w| ..)` method takes [tccr4a::W](W) writer structure"]
207impl crate::Writable for TCCR4A_SPEC {
208 type Writer = W;
209 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
210 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
211}
212#[doc = "`reset()` method sets TCCR4A to value 0"]
213impl crate::Resettable for TCCR4A_SPEC {
214 const RESET_VALUE: Self::Ux = 0;
215}