avr_device/devices/atmega4809/adc0/
ctrlc.rs

1#[doc = "Register `CTRLC` reader"]
2pub struct R(crate::R<CTRLC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLC` writer"]
17pub struct W(crate::W<CTRLC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PRESC` reader - Clock Pre-scaler"]
38pub type PRESC_R = crate::FieldReader<u8, PRESC_A>;
39#[doc = "Clock Pre-scaler\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum PRESC_A {
43    #[doc = "0: CLK_PER divided by 2"]
44    DIV2 = 0,
45    #[doc = "1: CLK_PER divided by 4"]
46    DIV4 = 1,
47    #[doc = "2: CLK_PER divided by 8"]
48    DIV8 = 2,
49    #[doc = "3: CLK_PER divided by 16"]
50    DIV16 = 3,
51    #[doc = "4: CLK_PER divided by 32"]
52    DIV32 = 4,
53    #[doc = "5: CLK_PER divided by 64"]
54    DIV64 = 5,
55    #[doc = "6: CLK_PER divided by 128"]
56    DIV128 = 6,
57    #[doc = "7: CLK_PER divided by 256"]
58    DIV256 = 7,
59}
60impl From<PRESC_A> for u8 {
61    #[inline(always)]
62    fn from(variant: PRESC_A) -> Self {
63        variant as _
64    }
65}
66impl PRESC_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> PRESC_A {
70        match self.bits {
71            0 => PRESC_A::DIV2,
72            1 => PRESC_A::DIV4,
73            2 => PRESC_A::DIV8,
74            3 => PRESC_A::DIV16,
75            4 => PRESC_A::DIV32,
76            5 => PRESC_A::DIV64,
77            6 => PRESC_A::DIV128,
78            7 => PRESC_A::DIV256,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `DIV2`"]
83    #[inline(always)]
84    pub fn is_div2(&self) -> bool {
85        *self == PRESC_A::DIV2
86    }
87    #[doc = "Checks if the value of the field is `DIV4`"]
88    #[inline(always)]
89    pub fn is_div4(&self) -> bool {
90        *self == PRESC_A::DIV4
91    }
92    #[doc = "Checks if the value of the field is `DIV8`"]
93    #[inline(always)]
94    pub fn is_div8(&self) -> bool {
95        *self == PRESC_A::DIV8
96    }
97    #[doc = "Checks if the value of the field is `DIV16`"]
98    #[inline(always)]
99    pub fn is_div16(&self) -> bool {
100        *self == PRESC_A::DIV16
101    }
102    #[doc = "Checks if the value of the field is `DIV32`"]
103    #[inline(always)]
104    pub fn is_div32(&self) -> bool {
105        *self == PRESC_A::DIV32
106    }
107    #[doc = "Checks if the value of the field is `DIV64`"]
108    #[inline(always)]
109    pub fn is_div64(&self) -> bool {
110        *self == PRESC_A::DIV64
111    }
112    #[doc = "Checks if the value of the field is `DIV128`"]
113    #[inline(always)]
114    pub fn is_div128(&self) -> bool {
115        *self == PRESC_A::DIV128
116    }
117    #[doc = "Checks if the value of the field is `DIV256`"]
118    #[inline(always)]
119    pub fn is_div256(&self) -> bool {
120        *self == PRESC_A::DIV256
121    }
122}
123#[doc = "Field `PRESC` writer - Clock Pre-scaler"]
124pub type PRESC_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, CTRLC_SPEC, u8, PRESC_A, 3, O>;
125impl<'a, const O: u8> PRESC_W<'a, O> {
126    #[doc = "CLK_PER divided by 2"]
127    #[inline(always)]
128    pub fn div2(self) -> &'a mut W {
129        self.variant(PRESC_A::DIV2)
130    }
131    #[doc = "CLK_PER divided by 4"]
132    #[inline(always)]
133    pub fn div4(self) -> &'a mut W {
134        self.variant(PRESC_A::DIV4)
135    }
136    #[doc = "CLK_PER divided by 8"]
137    #[inline(always)]
138    pub fn div8(self) -> &'a mut W {
139        self.variant(PRESC_A::DIV8)
140    }
141    #[doc = "CLK_PER divided by 16"]
142    #[inline(always)]
143    pub fn div16(self) -> &'a mut W {
144        self.variant(PRESC_A::DIV16)
145    }
146    #[doc = "CLK_PER divided by 32"]
147    #[inline(always)]
148    pub fn div32(self) -> &'a mut W {
149        self.variant(PRESC_A::DIV32)
150    }
151    #[doc = "CLK_PER divided by 64"]
152    #[inline(always)]
153    pub fn div64(self) -> &'a mut W {
154        self.variant(PRESC_A::DIV64)
155    }
156    #[doc = "CLK_PER divided by 128"]
157    #[inline(always)]
158    pub fn div128(self) -> &'a mut W {
159        self.variant(PRESC_A::DIV128)
160    }
161    #[doc = "CLK_PER divided by 256"]
162    #[inline(always)]
163    pub fn div256(self) -> &'a mut W {
164        self.variant(PRESC_A::DIV256)
165    }
166}
167#[doc = "Field `REFSEL` reader - Reference Selection"]
168pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
169#[doc = "Reference Selection\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq, Eq)]
171#[repr(u8)]
172pub enum REFSEL_A {
173    #[doc = "0: Internal reference"]
174    INTREF = 0,
175    #[doc = "1: VDD"]
176    VDDREF = 1,
177    #[doc = "2: External reference"]
178    VREFA = 2,
179}
180impl From<REFSEL_A> for u8 {
181    #[inline(always)]
182    fn from(variant: REFSEL_A) -> Self {
183        variant as _
184    }
185}
186impl REFSEL_R {
187    #[doc = "Get enumerated values variant"]
188    #[inline(always)]
189    pub fn variant(&self) -> Option<REFSEL_A> {
190        match self.bits {
191            0 => Some(REFSEL_A::INTREF),
192            1 => Some(REFSEL_A::VDDREF),
193            2 => Some(REFSEL_A::VREFA),
194            _ => None,
195        }
196    }
197    #[doc = "Checks if the value of the field is `INTREF`"]
198    #[inline(always)]
199    pub fn is_intref(&self) -> bool {
200        *self == REFSEL_A::INTREF
201    }
202    #[doc = "Checks if the value of the field is `VDDREF`"]
203    #[inline(always)]
204    pub fn is_vddref(&self) -> bool {
205        *self == REFSEL_A::VDDREF
206    }
207    #[doc = "Checks if the value of the field is `VREFA`"]
208    #[inline(always)]
209    pub fn is_vrefa(&self) -> bool {
210        *self == REFSEL_A::VREFA
211    }
212}
213#[doc = "Field `REFSEL` writer - Reference Selection"]
214pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u8, CTRLC_SPEC, u8, REFSEL_A, 2, O>;
215impl<'a, const O: u8> REFSEL_W<'a, O> {
216    #[doc = "Internal reference"]
217    #[inline(always)]
218    pub fn intref(self) -> &'a mut W {
219        self.variant(REFSEL_A::INTREF)
220    }
221    #[doc = "VDD"]
222    #[inline(always)]
223    pub fn vddref(self) -> &'a mut W {
224        self.variant(REFSEL_A::VDDREF)
225    }
226    #[doc = "External reference"]
227    #[inline(always)]
228    pub fn vrefa(self) -> &'a mut W {
229        self.variant(REFSEL_A::VREFA)
230    }
231}
232#[doc = "Field `SAMPCAP` reader - Sample Capacitance Selection"]
233pub type SAMPCAP_R = crate::BitReader<bool>;
234#[doc = "Field `SAMPCAP` writer - Sample Capacitance Selection"]
235pub type SAMPCAP_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLC_SPEC, bool, O>;
236impl R {
237    #[doc = "Bits 0:2 - Clock Pre-scaler"]
238    #[inline(always)]
239    pub fn presc(&self) -> PRESC_R {
240        PRESC_R::new(self.bits & 7)
241    }
242    #[doc = "Bits 4:5 - Reference Selection"]
243    #[inline(always)]
244    pub fn refsel(&self) -> REFSEL_R {
245        REFSEL_R::new((self.bits >> 4) & 3)
246    }
247    #[doc = "Bit 6 - Sample Capacitance Selection"]
248    #[inline(always)]
249    pub fn sampcap(&self) -> SAMPCAP_R {
250        SAMPCAP_R::new(((self.bits >> 6) & 1) != 0)
251    }
252}
253impl W {
254    #[doc = "Bits 0:2 - Clock Pre-scaler"]
255    #[inline(always)]
256    #[must_use]
257    pub fn presc(&mut self) -> PRESC_W<0> {
258        PRESC_W::new(self)
259    }
260    #[doc = "Bits 4:5 - Reference Selection"]
261    #[inline(always)]
262    #[must_use]
263    pub fn refsel(&mut self) -> REFSEL_W<4> {
264        REFSEL_W::new(self)
265    }
266    #[doc = "Bit 6 - Sample Capacitance Selection"]
267    #[inline(always)]
268    #[must_use]
269    pub fn sampcap(&mut self) -> SAMPCAP_W<6> {
270        SAMPCAP_W::new(self)
271    }
272    #[doc = "Writes raw bits to the register."]
273    #[inline(always)]
274    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
275        self.0.bits(bits);
276        self
277    }
278}
279#[doc = "Control C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlc](index.html) module"]
280pub struct CTRLC_SPEC;
281impl crate::RegisterSpec for CTRLC_SPEC {
282    type Ux = u8;
283}
284#[doc = "`read()` method returns [ctrlc::R](R) reader structure"]
285impl crate::Readable for CTRLC_SPEC {
286    type Reader = R;
287}
288#[doc = "`write(|w| ..)` method takes [ctrlc::W](W) writer structure"]
289impl crate::Writable for CTRLC_SPEC {
290    type Writer = W;
291    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
292    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
293}
294#[doc = "`reset()` method sets CTRLC to value 0"]
295impl crate::Resettable for CTRLC_SPEC {
296    const RESET_VALUE: Self::Ux = 0;
297}
avr_device/devices/atmega4809/adc0/ctrlc.rs

avr_device/devices/atmega4809/adc0/
ctrlc.rs
