avr_device/devices/atmega4809/ccl/
lut1ctrlb.rs

1#[doc = "Register `LUT1CTRLB` reader"]
2pub struct R(crate::R<LUT1CTRLB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LUT1CTRLB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LUT1CTRLB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LUT1CTRLB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LUT1CTRLB` writer"]
17pub struct W(crate::W<LUT1CTRLB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LUT1CTRLB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LUT1CTRLB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LUT1CTRLB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `INSEL0` reader - LUT Input 0 Source Selection"]
38pub type INSEL0_R = crate::FieldReader<u8, INSEL0_A>;
39#[doc = "LUT Input 0 Source Selection\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum INSEL0_A {
43    #[doc = "0: Masked input"]
44    MASK = 0,
45    #[doc = "1: Feedback input source"]
46    FEEDBACK = 1,
47    #[doc = "2: Linked LUT input source"]
48    LINK = 2,
49    #[doc = "3: Event input source A"]
50    EVENTA = 3,
51    #[doc = "4: Event input source B"]
52    EVENTB = 4,
53    #[doc = "5: IO pin LUTn-IN0 input source"]
54    IO = 5,
55    #[doc = "6: AC0 OUT input source"]
56    AC0 = 6,
57    #[doc = "8: USART0 TXD input source"]
58    USART0 = 8,
59    #[doc = "9: SPI0 MOSI input source"]
60    SPI0 = 9,
61    #[doc = "10: TCA0 WO0 input source"]
62    TCA0 = 10,
63    #[doc = "12: TCB0 WO input source"]
64    TCB0 = 12,
65}
66impl From<INSEL0_A> for u8 {
67    #[inline(always)]
68    fn from(variant: INSEL0_A) -> Self {
69        variant as _
70    }
71}
72impl INSEL0_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub fn variant(&self) -> Option<INSEL0_A> {
76        match self.bits {
77            0 => Some(INSEL0_A::MASK),
78            1 => Some(INSEL0_A::FEEDBACK),
79            2 => Some(INSEL0_A::LINK),
80            3 => Some(INSEL0_A::EVENTA),
81            4 => Some(INSEL0_A::EVENTB),
82            5 => Some(INSEL0_A::IO),
83            6 => Some(INSEL0_A::AC0),
84            8 => Some(INSEL0_A::USART0),
85            9 => Some(INSEL0_A::SPI0),
86            10 => Some(INSEL0_A::TCA0),
87            12 => Some(INSEL0_A::TCB0),
88            _ => None,
89        }
90    }
91    #[doc = "Checks if the value of the field is `MASK`"]
92    #[inline(always)]
93    pub fn is_mask(&self) -> bool {
94        *self == INSEL0_A::MASK
95    }
96    #[doc = "Checks if the value of the field is `FEEDBACK`"]
97    #[inline(always)]
98    pub fn is_feedback(&self) -> bool {
99        *self == INSEL0_A::FEEDBACK
100    }
101    #[doc = "Checks if the value of the field is `LINK`"]
102    #[inline(always)]
103    pub fn is_link(&self) -> bool {
104        *self == INSEL0_A::LINK
105    }
106    #[doc = "Checks if the value of the field is `EVENTA`"]
107    #[inline(always)]
108    pub fn is_eventa(&self) -> bool {
109        *self == INSEL0_A::EVENTA
110    }
111    #[doc = "Checks if the value of the field is `EVENTB`"]
112    #[inline(always)]
113    pub fn is_eventb(&self) -> bool {
114        *self == INSEL0_A::EVENTB
115    }
116    #[doc = "Checks if the value of the field is `IO`"]
117    #[inline(always)]
118    pub fn is_io(&self) -> bool {
119        *self == INSEL0_A::IO
120    }
121    #[doc = "Checks if the value of the field is `AC0`"]
122    #[inline(always)]
123    pub fn is_ac0(&self) -> bool {
124        *self == INSEL0_A::AC0
125    }
126    #[doc = "Checks if the value of the field is `USART0`"]
127    #[inline(always)]
128    pub fn is_usart0(&self) -> bool {
129        *self == INSEL0_A::USART0
130    }
131    #[doc = "Checks if the value of the field is `SPI0`"]
132    #[inline(always)]
133    pub fn is_spi0(&self) -> bool {
134        *self == INSEL0_A::SPI0
135    }
136    #[doc = "Checks if the value of the field is `TCA0`"]
137    #[inline(always)]
138    pub fn is_tca0(&self) -> bool {
139        *self == INSEL0_A::TCA0
140    }
141    #[doc = "Checks if the value of the field is `TCB0`"]
142    #[inline(always)]
143    pub fn is_tcb0(&self) -> bool {
144        *self == INSEL0_A::TCB0
145    }
146}
147#[doc = "Field `INSEL0` writer - LUT Input 0 Source Selection"]
148pub type INSEL0_W<'a, const O: u8> = crate::FieldWriter<'a, u8, LUT1CTRLB_SPEC, u8, INSEL0_A, 4, O>;
149impl<'a, const O: u8> INSEL0_W<'a, O> {
150    #[doc = "Masked input"]
151    #[inline(always)]
152    pub fn mask(self) -> &'a mut W {
153        self.variant(INSEL0_A::MASK)
154    }
155    #[doc = "Feedback input source"]
156    #[inline(always)]
157    pub fn feedback(self) -> &'a mut W {
158        self.variant(INSEL0_A::FEEDBACK)
159    }
160    #[doc = "Linked LUT input source"]
161    #[inline(always)]
162    pub fn link(self) -> &'a mut W {
163        self.variant(INSEL0_A::LINK)
164    }
165    #[doc = "Event input source A"]
166    #[inline(always)]
167    pub fn eventa(self) -> &'a mut W {
168        self.variant(INSEL0_A::EVENTA)
169    }
170    #[doc = "Event input source B"]
171    #[inline(always)]
172    pub fn eventb(self) -> &'a mut W {
173        self.variant(INSEL0_A::EVENTB)
174    }
175    #[doc = "IO pin LUTn-IN0 input source"]
176    #[inline(always)]
177    pub fn io(self) -> &'a mut W {
178        self.variant(INSEL0_A::IO)
179    }
180    #[doc = "AC0 OUT input source"]
181    #[inline(always)]
182    pub fn ac0(self) -> &'a mut W {
183        self.variant(INSEL0_A::AC0)
184    }
185    #[doc = "USART0 TXD input source"]
186    #[inline(always)]
187    pub fn usart0(self) -> &'a mut W {
188        self.variant(INSEL0_A::USART0)
189    }
190    #[doc = "SPI0 MOSI input source"]
191    #[inline(always)]
192    pub fn spi0(self) -> &'a mut W {
193        self.variant(INSEL0_A::SPI0)
194    }
195    #[doc = "TCA0 WO0 input source"]
196    #[inline(always)]
197    pub fn tca0(self) -> &'a mut W {
198        self.variant(INSEL0_A::TCA0)
199    }
200    #[doc = "TCB0 WO input source"]
201    #[inline(always)]
202    pub fn tcb0(self) -> &'a mut W {
203        self.variant(INSEL0_A::TCB0)
204    }
205}
206#[doc = "Field `INSEL1` reader - LUT Input 1 Source Selection"]
207pub type INSEL1_R = crate::FieldReader<u8, INSEL1_A>;
208#[doc = "LUT Input 1 Source Selection\n\nValue on reset: 0"]
209#[derive(Clone, Copy, Debug, PartialEq, Eq)]
210#[repr(u8)]
211pub enum INSEL1_A {
212    #[doc = "0: Masked input"]
213    MASK = 0,
214    #[doc = "1: Feedback input source"]
215    FEEDBACK = 1,
216    #[doc = "2: Linked LUT input source"]
217    LINK = 2,
218    #[doc = "3: Event input source A"]
219    EVENTA = 3,
220    #[doc = "4: Event input source B"]
221    EVENTB = 4,
222    #[doc = "5: IO pin LUTn-N1 input source"]
223    IO = 5,
224    #[doc = "6: AC0 OUT input source"]
225    AC0 = 6,
226    #[doc = "8: USART1 TXD input source"]
227    USART1 = 8,
228    #[doc = "9: SPI0 MOSI input source"]
229    SPI0 = 9,
230    #[doc = "10: TCA0 WO1 input source"]
231    TCA0 = 10,
232    #[doc = "12: TCB1 WO input source"]
233    TCB1 = 12,
234}
235impl From<INSEL1_A> for u8 {
236    #[inline(always)]
237    fn from(variant: INSEL1_A) -> Self {
238        variant as _
239    }
240}
241impl INSEL1_R {
242    #[doc = "Get enumerated values variant"]
243    #[inline(always)]
244    pub fn variant(&self) -> Option<INSEL1_A> {
245        match self.bits {
246            0 => Some(INSEL1_A::MASK),
247            1 => Some(INSEL1_A::FEEDBACK),
248            2 => Some(INSEL1_A::LINK),
249            3 => Some(INSEL1_A::EVENTA),
250            4 => Some(INSEL1_A::EVENTB),
251            5 => Some(INSEL1_A::IO),
252            6 => Some(INSEL1_A::AC0),
253            8 => Some(INSEL1_A::USART1),
254            9 => Some(INSEL1_A::SPI0),
255            10 => Some(INSEL1_A::TCA0),
256            12 => Some(INSEL1_A::TCB1),
257            _ => None,
258        }
259    }
260    #[doc = "Checks if the value of the field is `MASK`"]
261    #[inline(always)]
262    pub fn is_mask(&self) -> bool {
263        *self == INSEL1_A::MASK
264    }
265    #[doc = "Checks if the value of the field is `FEEDBACK`"]
266    #[inline(always)]
267    pub fn is_feedback(&self) -> bool {
268        *self == INSEL1_A::FEEDBACK
269    }
270    #[doc = "Checks if the value of the field is `LINK`"]
271    #[inline(always)]
272    pub fn is_link(&self) -> bool {
273        *self == INSEL1_A::LINK
274    }
275    #[doc = "Checks if the value of the field is `EVENTA`"]
276    #[inline(always)]
277    pub fn is_eventa(&self) -> bool {
278        *self == INSEL1_A::EVENTA
279    }
280    #[doc = "Checks if the value of the field is `EVENTB`"]
281    #[inline(always)]
282    pub fn is_eventb(&self) -> bool {
283        *self == INSEL1_A::EVENTB
284    }
285    #[doc = "Checks if the value of the field is `IO`"]
286    #[inline(always)]
287    pub fn is_io(&self) -> bool {
288        *self == INSEL1_A::IO
289    }
290    #[doc = "Checks if the value of the field is `AC0`"]
291    #[inline(always)]
292    pub fn is_ac0(&self) -> bool {
293        *self == INSEL1_A::AC0
294    }
295    #[doc = "Checks if the value of the field is `USART1`"]
296    #[inline(always)]
297    pub fn is_usart1(&self) -> bool {
298        *self == INSEL1_A::USART1
299    }
300    #[doc = "Checks if the value of the field is `SPI0`"]
301    #[inline(always)]
302    pub fn is_spi0(&self) -> bool {
303        *self == INSEL1_A::SPI0
304    }
305    #[doc = "Checks if the value of the field is `TCA0`"]
306    #[inline(always)]
307    pub fn is_tca0(&self) -> bool {
308        *self == INSEL1_A::TCA0
309    }
310    #[doc = "Checks if the value of the field is `TCB1`"]
311    #[inline(always)]
312    pub fn is_tcb1(&self) -> bool {
313        *self == INSEL1_A::TCB1
314    }
315}
316#[doc = "Field `INSEL1` writer - LUT Input 1 Source Selection"]
317pub type INSEL1_W<'a, const O: u8> = crate::FieldWriter<'a, u8, LUT1CTRLB_SPEC, u8, INSEL1_A, 4, O>;
318impl<'a, const O: u8> INSEL1_W<'a, O> {
319    #[doc = "Masked input"]
320    #[inline(always)]
321    pub fn mask(self) -> &'a mut W {
322        self.variant(INSEL1_A::MASK)
323    }
324    #[doc = "Feedback input source"]
325    #[inline(always)]
326    pub fn feedback(self) -> &'a mut W {
327        self.variant(INSEL1_A::FEEDBACK)
328    }
329    #[doc = "Linked LUT input source"]
330    #[inline(always)]
331    pub fn link(self) -> &'a mut W {
332        self.variant(INSEL1_A::LINK)
333    }
334    #[doc = "Event input source A"]
335    #[inline(always)]
336    pub fn eventa(self) -> &'a mut W {
337        self.variant(INSEL1_A::EVENTA)
338    }
339    #[doc = "Event input source B"]
340    #[inline(always)]
341    pub fn eventb(self) -> &'a mut W {
342        self.variant(INSEL1_A::EVENTB)
343    }
344    #[doc = "IO pin LUTn-N1 input source"]
345    #[inline(always)]
346    pub fn io(self) -> &'a mut W {
347        self.variant(INSEL1_A::IO)
348    }
349    #[doc = "AC0 OUT input source"]
350    #[inline(always)]
351    pub fn ac0(self) -> &'a mut W {
352        self.variant(INSEL1_A::AC0)
353    }
354    #[doc = "USART1 TXD input source"]
355    #[inline(always)]
356    pub fn usart1(self) -> &'a mut W {
357        self.variant(INSEL1_A::USART1)
358    }
359    #[doc = "SPI0 MOSI input source"]
360    #[inline(always)]
361    pub fn spi0(self) -> &'a mut W {
362        self.variant(INSEL1_A::SPI0)
363    }
364    #[doc = "TCA0 WO1 input source"]
365    #[inline(always)]
366    pub fn tca0(self) -> &'a mut W {
367        self.variant(INSEL1_A::TCA0)
368    }
369    #[doc = "TCB1 WO input source"]
370    #[inline(always)]
371    pub fn tcb1(self) -> &'a mut W {
372        self.variant(INSEL1_A::TCB1)
373    }
374}
375impl R {
376    #[doc = "Bits 0:3 - LUT Input 0 Source Selection"]
377    #[inline(always)]
378    pub fn insel0(&self) -> INSEL0_R {
379        INSEL0_R::new(self.bits & 0x0f)
380    }
381    #[doc = "Bits 4:7 - LUT Input 1 Source Selection"]
382    #[inline(always)]
383    pub fn insel1(&self) -> INSEL1_R {
384        INSEL1_R::new((self.bits >> 4) & 0x0f)
385    }
386}
387impl W {
388    #[doc = "Bits 0:3 - LUT Input 0 Source Selection"]
389    #[inline(always)]
390    #[must_use]
391    pub fn insel0(&mut self) -> INSEL0_W<0> {
392        INSEL0_W::new(self)
393    }
394    #[doc = "Bits 4:7 - LUT Input 1 Source Selection"]
395    #[inline(always)]
396    #[must_use]
397    pub fn insel1(&mut self) -> INSEL1_W<4> {
398        INSEL1_W::new(self)
399    }
400    #[doc = "Writes raw bits to the register."]
401    #[inline(always)]
402    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
403        self.0.bits(bits);
404        self
405    }
406}
407#[doc = "LUT Control 1 B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lut1ctrlb](index.html) module"]
408pub struct LUT1CTRLB_SPEC;
409impl crate::RegisterSpec for LUT1CTRLB_SPEC {
410    type Ux = u8;
411}
412#[doc = "`read()` method returns [lut1ctrlb::R](R) reader structure"]
413impl crate::Readable for LUT1CTRLB_SPEC {
414    type Reader = R;
415}
416#[doc = "`write(|w| ..)` method takes [lut1ctrlb::W](W) writer structure"]
417impl crate::Writable for LUT1CTRLB_SPEC {
418    type Writer = W;
419    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
420    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
421}
422#[doc = "`reset()` method sets LUT1CTRLB to value 0"]
423impl crate::Resettable for LUT1CTRLB_SPEC {
424    const RESET_VALUE: Self::Ux = 0;
425}
avr_device/devices/atmega4809/ccl/lut1ctrlb.rs

avr_device/devices/atmega4809/ccl/
lut1ctrlb.rs
