avr_device/devices/atmega4809/ccl/
lut3ctrlc.rs

1#[doc = "Register `LUT3CTRLC` reader"]
2pub struct R(crate::R<LUT3CTRLC_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LUT3CTRLC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LUT3CTRLC_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LUT3CTRLC_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LUT3CTRLC` writer"]
17pub struct W(crate::W<LUT3CTRLC_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LUT3CTRLC_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LUT3CTRLC_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LUT3CTRLC_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `INSEL2` reader - LUT Input 2 Source Selection"]
38pub type INSEL2_R = crate::FieldReader<u8, INSEL2_A>;
39#[doc = "LUT Input 2 Source Selection\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum INSEL2_A {
43    #[doc = "0: Masked input"]
44    MASK = 0,
45    #[doc = "1: Feedback input source"]
46    FEEDBACK = 1,
47    #[doc = "2: Linked LUT input source"]
48    LINK = 2,
49    #[doc = "3: Event input source A"]
50    EVENTA = 3,
51    #[doc = "4: Event input source B"]
52    EVENTB = 4,
53    #[doc = "5: IO pin LUTn-IN2 input source"]
54    IO = 5,
55    #[doc = "6: AC0 OUT input source"]
56    AC0 = 6,
57    #[doc = "8: USART2 TXD input source"]
58    USART2 = 8,
59    #[doc = "9: SPI0 SCK input source"]
60    SPI0 = 9,
61    #[doc = "10: TCA0 WO2 input source"]
62    TCA0 = 10,
63    #[doc = "12: TCB2 WO input source"]
64    TCB2 = 12,
65}
66impl From<INSEL2_A> for u8 {
67    #[inline(always)]
68    fn from(variant: INSEL2_A) -> Self {
69        variant as _
70    }
71}
72impl INSEL2_R {
73    #[doc = "Get enumerated values variant"]
74    #[inline(always)]
75    pub fn variant(&self) -> Option<INSEL2_A> {
76        match self.bits {
77            0 => Some(INSEL2_A::MASK),
78            1 => Some(INSEL2_A::FEEDBACK),
79            2 => Some(INSEL2_A::LINK),
80            3 => Some(INSEL2_A::EVENTA),
81            4 => Some(INSEL2_A::EVENTB),
82            5 => Some(INSEL2_A::IO),
83            6 => Some(INSEL2_A::AC0),
84            8 => Some(INSEL2_A::USART2),
85            9 => Some(INSEL2_A::SPI0),
86            10 => Some(INSEL2_A::TCA0),
87            12 => Some(INSEL2_A::TCB2),
88            _ => None,
89        }
90    }
91    #[doc = "Checks if the value of the field is `MASK`"]
92    #[inline(always)]
93    pub fn is_mask(&self) -> bool {
94        *self == INSEL2_A::MASK
95    }
96    #[doc = "Checks if the value of the field is `FEEDBACK`"]
97    #[inline(always)]
98    pub fn is_feedback(&self) -> bool {
99        *self == INSEL2_A::FEEDBACK
100    }
101    #[doc = "Checks if the value of the field is `LINK`"]
102    #[inline(always)]
103    pub fn is_link(&self) -> bool {
104        *self == INSEL2_A::LINK
105    }
106    #[doc = "Checks if the value of the field is `EVENTA`"]
107    #[inline(always)]
108    pub fn is_eventa(&self) -> bool {
109        *self == INSEL2_A::EVENTA
110    }
111    #[doc = "Checks if the value of the field is `EVENTB`"]
112    #[inline(always)]
113    pub fn is_eventb(&self) -> bool {
114        *self == INSEL2_A::EVENTB
115    }
116    #[doc = "Checks if the value of the field is `IO`"]
117    #[inline(always)]
118    pub fn is_io(&self) -> bool {
119        *self == INSEL2_A::IO
120    }
121    #[doc = "Checks if the value of the field is `AC0`"]
122    #[inline(always)]
123    pub fn is_ac0(&self) -> bool {
124        *self == INSEL2_A::AC0
125    }
126    #[doc = "Checks if the value of the field is `USART2`"]
127    #[inline(always)]
128    pub fn is_usart2(&self) -> bool {
129        *self == INSEL2_A::USART2
130    }
131    #[doc = "Checks if the value of the field is `SPI0`"]
132    #[inline(always)]
133    pub fn is_spi0(&self) -> bool {
134        *self == INSEL2_A::SPI0
135    }
136    #[doc = "Checks if the value of the field is `TCA0`"]
137    #[inline(always)]
138    pub fn is_tca0(&self) -> bool {
139        *self == INSEL2_A::TCA0
140    }
141    #[doc = "Checks if the value of the field is `TCB2`"]
142    #[inline(always)]
143    pub fn is_tcb2(&self) -> bool {
144        *self == INSEL2_A::TCB2
145    }
146}
147#[doc = "Field `INSEL2` writer - LUT Input 2 Source Selection"]
148pub type INSEL2_W<'a, const O: u8> = crate::FieldWriter<'a, u8, LUT3CTRLC_SPEC, u8, INSEL2_A, 4, O>;
149impl<'a, const O: u8> INSEL2_W<'a, O> {
150    #[doc = "Masked input"]
151    #[inline(always)]
152    pub fn mask(self) -> &'a mut W {
153        self.variant(INSEL2_A::MASK)
154    }
155    #[doc = "Feedback input source"]
156    #[inline(always)]
157    pub fn feedback(self) -> &'a mut W {
158        self.variant(INSEL2_A::FEEDBACK)
159    }
160    #[doc = "Linked LUT input source"]
161    #[inline(always)]
162    pub fn link(self) -> &'a mut W {
163        self.variant(INSEL2_A::LINK)
164    }
165    #[doc = "Event input source A"]
166    #[inline(always)]
167    pub fn eventa(self) -> &'a mut W {
168        self.variant(INSEL2_A::EVENTA)
169    }
170    #[doc = "Event input source B"]
171    #[inline(always)]
172    pub fn eventb(self) -> &'a mut W {
173        self.variant(INSEL2_A::EVENTB)
174    }
175    #[doc = "IO pin LUTn-IN2 input source"]
176    #[inline(always)]
177    pub fn io(self) -> &'a mut W {
178        self.variant(INSEL2_A::IO)
179    }
180    #[doc = "AC0 OUT input source"]
181    #[inline(always)]
182    pub fn ac0(self) -> &'a mut W {
183        self.variant(INSEL2_A::AC0)
184    }
185    #[doc = "USART2 TXD input source"]
186    #[inline(always)]
187    pub fn usart2(self) -> &'a mut W {
188        self.variant(INSEL2_A::USART2)
189    }
190    #[doc = "SPI0 SCK input source"]
191    #[inline(always)]
192    pub fn spi0(self) -> &'a mut W {
193        self.variant(INSEL2_A::SPI0)
194    }
195    #[doc = "TCA0 WO2 input source"]
196    #[inline(always)]
197    pub fn tca0(self) -> &'a mut W {
198        self.variant(INSEL2_A::TCA0)
199    }
200    #[doc = "TCB2 WO input source"]
201    #[inline(always)]
202    pub fn tcb2(self) -> &'a mut W {
203        self.variant(INSEL2_A::TCB2)
204    }
205}
206impl R {
207    #[doc = "Bits 0:3 - LUT Input 2 Source Selection"]
208    #[inline(always)]
209    pub fn insel2(&self) -> INSEL2_R {
210        INSEL2_R::new(self.bits & 0x0f)
211    }
212}
213impl W {
214    #[doc = "Bits 0:3 - LUT Input 2 Source Selection"]
215    #[inline(always)]
216    #[must_use]
217    pub fn insel2(&mut self) -> INSEL2_W<0> {
218        INSEL2_W::new(self)
219    }
220    #[doc = "Writes raw bits to the register."]
221    #[inline(always)]
222    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
223        self.0.bits(bits);
224        self
225    }
226}
227#[doc = "LUT Control 3 C\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lut3ctrlc](index.html) module"]
228pub struct LUT3CTRLC_SPEC;
229impl crate::RegisterSpec for LUT3CTRLC_SPEC {
230    type Ux = u8;
231}
232#[doc = "`read()` method returns [lut3ctrlc::R](R) reader structure"]
233impl crate::Readable for LUT3CTRLC_SPEC {
234    type Reader = R;
235}
236#[doc = "`write(|w| ..)` method takes [lut3ctrlc::W](W) writer structure"]
237impl crate::Writable for LUT3CTRLC_SPEC {
238    type Writer = W;
239    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
240    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241}
242#[doc = "`reset()` method sets LUT3CTRLC to value 0"]
243impl crate::Resettable for LUT3CTRLC_SPEC {
244    const RESET_VALUE: Self::Ux = 0;
245}
avr_device/devices/atmega4809/ccl/lut3ctrlc.rs

avr_device/devices/atmega4809/ccl/
lut3ctrlc.rs
