avr_device/devices/atmega4809/clkctrl/
mclkctrlb.rs

1#[doc = "Register `MCLKCTRLB` reader"]
2pub struct R(crate::R<MCLKCTRLB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCLKCTRLB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCLKCTRLB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCLKCTRLB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCLKCTRLB` writer"]
17pub struct W(crate::W<MCLKCTRLB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCLKCTRLB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCLKCTRLB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCLKCTRLB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PEN` reader - Prescaler enable"]
38pub type PEN_R = crate::BitReader<bool>;
39#[doc = "Field `PEN` writer - Prescaler enable"]
40pub type PEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, MCLKCTRLB_SPEC, bool, O>;
41#[doc = "Field `PDIV` reader - Prescaler division"]
42pub type PDIV_R = crate::FieldReader<u8, PDIV_A>;
43#[doc = "Prescaler division\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum PDIV_A {
47    #[doc = "0: 2X"]
48    _2X = 0,
49    #[doc = "1: 4X"]
50    _4X = 1,
51    #[doc = "2: 8X"]
52    _8X = 2,
53    #[doc = "3: 16X"]
54    _16X = 3,
55    #[doc = "4: 32X"]
56    _32X = 4,
57    #[doc = "5: 64X"]
58    _64X = 5,
59    #[doc = "8: 6X"]
60    _6X = 8,
61    #[doc = "9: 10X"]
62    _10X = 9,
63    #[doc = "10: 12X"]
64    _12X = 10,
65    #[doc = "11: 24X"]
66    _24X = 11,
67    #[doc = "12: 48X"]
68    _48X = 12,
69}
70impl From<PDIV_A> for u8 {
71    #[inline(always)]
72    fn from(variant: PDIV_A) -> Self {
73        variant as _
74    }
75}
76impl PDIV_R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub fn variant(&self) -> Option<PDIV_A> {
80        match self.bits {
81            0 => Some(PDIV_A::_2X),
82            1 => Some(PDIV_A::_4X),
83            2 => Some(PDIV_A::_8X),
84            3 => Some(PDIV_A::_16X),
85            4 => Some(PDIV_A::_32X),
86            5 => Some(PDIV_A::_64X),
87            8 => Some(PDIV_A::_6X),
88            9 => Some(PDIV_A::_10X),
89            10 => Some(PDIV_A::_12X),
90            11 => Some(PDIV_A::_24X),
91            12 => Some(PDIV_A::_48X),
92            _ => None,
93        }
94    }
95    #[doc = "Checks if the value of the field is `_2X`"]
96    #[inline(always)]
97    pub fn is_2x(&self) -> bool {
98        *self == PDIV_A::_2X
99    }
100    #[doc = "Checks if the value of the field is `_4X`"]
101    #[inline(always)]
102    pub fn is_4x(&self) -> bool {
103        *self == PDIV_A::_4X
104    }
105    #[doc = "Checks if the value of the field is `_8X`"]
106    #[inline(always)]
107    pub fn is_8x(&self) -> bool {
108        *self == PDIV_A::_8X
109    }
110    #[doc = "Checks if the value of the field is `_16X`"]
111    #[inline(always)]
112    pub fn is_16x(&self) -> bool {
113        *self == PDIV_A::_16X
114    }
115    #[doc = "Checks if the value of the field is `_32X`"]
116    #[inline(always)]
117    pub fn is_32x(&self) -> bool {
118        *self == PDIV_A::_32X
119    }
120    #[doc = "Checks if the value of the field is `_64X`"]
121    #[inline(always)]
122    pub fn is_64x(&self) -> bool {
123        *self == PDIV_A::_64X
124    }
125    #[doc = "Checks if the value of the field is `_6X`"]
126    #[inline(always)]
127    pub fn is_6x(&self) -> bool {
128        *self == PDIV_A::_6X
129    }
130    #[doc = "Checks if the value of the field is `_10X`"]
131    #[inline(always)]
132    pub fn is_10x(&self) -> bool {
133        *self == PDIV_A::_10X
134    }
135    #[doc = "Checks if the value of the field is `_12X`"]
136    #[inline(always)]
137    pub fn is_12x(&self) -> bool {
138        *self == PDIV_A::_12X
139    }
140    #[doc = "Checks if the value of the field is `_24X`"]
141    #[inline(always)]
142    pub fn is_24x(&self) -> bool {
143        *self == PDIV_A::_24X
144    }
145    #[doc = "Checks if the value of the field is `_48X`"]
146    #[inline(always)]
147    pub fn is_48x(&self) -> bool {
148        *self == PDIV_A::_48X
149    }
150}
151#[doc = "Field `PDIV` writer - Prescaler division"]
152pub type PDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u8, MCLKCTRLB_SPEC, u8, PDIV_A, 4, O>;
153impl<'a, const O: u8> PDIV_W<'a, O> {
154    #[doc = "2X"]
155    #[inline(always)]
156    pub fn _2x(self) -> &'a mut W {
157        self.variant(PDIV_A::_2X)
158    }
159    #[doc = "4X"]
160    #[inline(always)]
161    pub fn _4x(self) -> &'a mut W {
162        self.variant(PDIV_A::_4X)
163    }
164    #[doc = "8X"]
165    #[inline(always)]
166    pub fn _8x(self) -> &'a mut W {
167        self.variant(PDIV_A::_8X)
168    }
169    #[doc = "16X"]
170    #[inline(always)]
171    pub fn _16x(self) -> &'a mut W {
172        self.variant(PDIV_A::_16X)
173    }
174    #[doc = "32X"]
175    #[inline(always)]
176    pub fn _32x(self) -> &'a mut W {
177        self.variant(PDIV_A::_32X)
178    }
179    #[doc = "64X"]
180    #[inline(always)]
181    pub fn _64x(self) -> &'a mut W {
182        self.variant(PDIV_A::_64X)
183    }
184    #[doc = "6X"]
185    #[inline(always)]
186    pub fn _6x(self) -> &'a mut W {
187        self.variant(PDIV_A::_6X)
188    }
189    #[doc = "10X"]
190    #[inline(always)]
191    pub fn _10x(self) -> &'a mut W {
192        self.variant(PDIV_A::_10X)
193    }
194    #[doc = "12X"]
195    #[inline(always)]
196    pub fn _12x(self) -> &'a mut W {
197        self.variant(PDIV_A::_12X)
198    }
199    #[doc = "24X"]
200    #[inline(always)]
201    pub fn _24x(self) -> &'a mut W {
202        self.variant(PDIV_A::_24X)
203    }
204    #[doc = "48X"]
205    #[inline(always)]
206    pub fn _48x(self) -> &'a mut W {
207        self.variant(PDIV_A::_48X)
208    }
209}
210impl R {
211    #[doc = "Bit 0 - Prescaler enable"]
212    #[inline(always)]
213    pub fn pen(&self) -> PEN_R {
214        PEN_R::new((self.bits & 1) != 0)
215    }
216    #[doc = "Bits 1:4 - Prescaler division"]
217    #[inline(always)]
218    pub fn pdiv(&self) -> PDIV_R {
219        PDIV_R::new((self.bits >> 1) & 0x0f)
220    }
221}
222impl W {
223    #[doc = "Bit 0 - Prescaler enable"]
224    #[inline(always)]
225    #[must_use]
226    pub fn pen(&mut self) -> PEN_W<0> {
227        PEN_W::new(self)
228    }
229    #[doc = "Bits 1:4 - Prescaler division"]
230    #[inline(always)]
231    #[must_use]
232    pub fn pdiv(&mut self) -> PDIV_W<1> {
233        PDIV_W::new(self)
234    }
235    #[doc = "Writes raw bits to the register."]
236    #[inline(always)]
237    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
238        self.0.bits(bits);
239        self
240    }
241}
242#[doc = "MCLK Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mclkctrlb](index.html) module"]
243pub struct MCLKCTRLB_SPEC;
244impl crate::RegisterSpec for MCLKCTRLB_SPEC {
245    type Ux = u8;
246}
247#[doc = "`read()` method returns [mclkctrlb::R](R) reader structure"]
248impl crate::Readable for MCLKCTRLB_SPEC {
249    type Reader = R;
250}
251#[doc = "`write(|w| ..)` method takes [mclkctrlb::W](W) writer structure"]
252impl crate::Writable for MCLKCTRLB_SPEC {
253    type Writer = W;
254    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
255    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
256}
257#[doc = "`reset()` method sets MCLKCTRLB to value 0"]
258impl crate::Resettable for MCLKCTRLB_SPEC {
259    const RESET_VALUE: Self::Ux = 0;
260}
avr_device/devices/atmega4809/clkctrl/mclkctrlb.rs

avr_device/devices/atmega4809/clkctrl/
mclkctrlb.rs
