avr_device/devices/atmega4809/usart3/
ctrla.rs1#[doc = "Register `CTRLA` reader"]
2pub struct R(crate::R<CTRLA_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLA_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLA_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLA_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLA` writer"]
17pub struct W(crate::W<CTRLA_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLA_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLA_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLA_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `RS485` reader - RS485 Mode internal transmitter"]
38pub type RS485_R = crate::FieldReader<u8, RS485_A>;
39#[doc = "RS485 Mode internal transmitter\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum RS485_A {
43 #[doc = "0: RS485 Mode disabled"]
44 OFF = 0,
45 #[doc = "1: RS485 Mode External drive"]
46 EXT = 1,
47 #[doc = "2: RS485 Mode Internal drive"]
48 INT = 2,
49}
50impl From<RS485_A> for u8 {
51 #[inline(always)]
52 fn from(variant: RS485_A) -> Self {
53 variant as _
54 }
55}
56impl RS485_R {
57 #[doc = "Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> Option<RS485_A> {
60 match self.bits {
61 0 => Some(RS485_A::OFF),
62 1 => Some(RS485_A::EXT),
63 2 => Some(RS485_A::INT),
64 _ => None,
65 }
66 }
67 #[doc = "Checks if the value of the field is `OFF`"]
68 #[inline(always)]
69 pub fn is_off(&self) -> bool {
70 *self == RS485_A::OFF
71 }
72 #[doc = "Checks if the value of the field is `EXT`"]
73 #[inline(always)]
74 pub fn is_ext(&self) -> bool {
75 *self == RS485_A::EXT
76 }
77 #[doc = "Checks if the value of the field is `INT`"]
78 #[inline(always)]
79 pub fn is_int(&self) -> bool {
80 *self == RS485_A::INT
81 }
82}
83#[doc = "Field `RS485` writer - RS485 Mode internal transmitter"]
84pub type RS485_W<'a, const O: u8> = crate::FieldWriter<'a, u8, CTRLA_SPEC, u8, RS485_A, 2, O>;
85impl<'a, const O: u8> RS485_W<'a, O> {
86 #[doc = "RS485 Mode disabled"]
87 #[inline(always)]
88 pub fn off(self) -> &'a mut W {
89 self.variant(RS485_A::OFF)
90 }
91 #[doc = "RS485 Mode External drive"]
92 #[inline(always)]
93 pub fn ext(self) -> &'a mut W {
94 self.variant(RS485_A::EXT)
95 }
96 #[doc = "RS485 Mode Internal drive"]
97 #[inline(always)]
98 pub fn int(self) -> &'a mut W {
99 self.variant(RS485_A::INT)
100 }
101}
102#[doc = "Field `ABEIE` reader - Auto-baud Error Interrupt Enable"]
103pub type ABEIE_R = crate::BitReader<bool>;
104#[doc = "Field `ABEIE` writer - Auto-baud Error Interrupt Enable"]
105pub type ABEIE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
106#[doc = "Field `LBME` reader - Loop-back Mode Enable"]
107pub type LBME_R = crate::BitReader<bool>;
108#[doc = "Field `LBME` writer - Loop-back Mode Enable"]
109pub type LBME_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
110#[doc = "Field `RXSIE` reader - Receiver Start Frame Interrupt Enable"]
111pub type RXSIE_R = crate::BitReader<bool>;
112#[doc = "Field `RXSIE` writer - Receiver Start Frame Interrupt Enable"]
113pub type RXSIE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
114#[doc = "Field `DREIE` reader - Data Register Empty Interrupt Enable"]
115pub type DREIE_R = crate::BitReader<bool>;
116#[doc = "Field `DREIE` writer - Data Register Empty Interrupt Enable"]
117pub type DREIE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
118#[doc = "Field `TXCIE` reader - Transmit Complete Interrupt Enable"]
119pub type TXCIE_R = crate::BitReader<bool>;
120#[doc = "Field `TXCIE` writer - Transmit Complete Interrupt Enable"]
121pub type TXCIE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
122#[doc = "Field `RXCIE` reader - Receive Complete Interrupt Enable"]
123pub type RXCIE_R = crate::BitReader<bool>;
124#[doc = "Field `RXCIE` writer - Receive Complete Interrupt Enable"]
125pub type RXCIE_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLA_SPEC, bool, O>;
126impl R {
127 #[doc = "Bits 0:1 - RS485 Mode internal transmitter"]
128 #[inline(always)]
129 pub fn rs485(&self) -> RS485_R {
130 RS485_R::new(self.bits & 3)
131 }
132 #[doc = "Bit 2 - Auto-baud Error Interrupt Enable"]
133 #[inline(always)]
134 pub fn abeie(&self) -> ABEIE_R {
135 ABEIE_R::new(((self.bits >> 2) & 1) != 0)
136 }
137 #[doc = "Bit 3 - Loop-back Mode Enable"]
138 #[inline(always)]
139 pub fn lbme(&self) -> LBME_R {
140 LBME_R::new(((self.bits >> 3) & 1) != 0)
141 }
142 #[doc = "Bit 4 - Receiver Start Frame Interrupt Enable"]
143 #[inline(always)]
144 pub fn rxsie(&self) -> RXSIE_R {
145 RXSIE_R::new(((self.bits >> 4) & 1) != 0)
146 }
147 #[doc = "Bit 5 - Data Register Empty Interrupt Enable"]
148 #[inline(always)]
149 pub fn dreie(&self) -> DREIE_R {
150 DREIE_R::new(((self.bits >> 5) & 1) != 0)
151 }
152 #[doc = "Bit 6 - Transmit Complete Interrupt Enable"]
153 #[inline(always)]
154 pub fn txcie(&self) -> TXCIE_R {
155 TXCIE_R::new(((self.bits >> 6) & 1) != 0)
156 }
157 #[doc = "Bit 7 - Receive Complete Interrupt Enable"]
158 #[inline(always)]
159 pub fn rxcie(&self) -> RXCIE_R {
160 RXCIE_R::new(((self.bits >> 7) & 1) != 0)
161 }
162}
163impl W {
164 #[doc = "Bits 0:1 - RS485 Mode internal transmitter"]
165 #[inline(always)]
166 #[must_use]
167 pub fn rs485(&mut self) -> RS485_W<0> {
168 RS485_W::new(self)
169 }
170 #[doc = "Bit 2 - Auto-baud Error Interrupt Enable"]
171 #[inline(always)]
172 #[must_use]
173 pub fn abeie(&mut self) -> ABEIE_W<2> {
174 ABEIE_W::new(self)
175 }
176 #[doc = "Bit 3 - Loop-back Mode Enable"]
177 #[inline(always)]
178 #[must_use]
179 pub fn lbme(&mut self) -> LBME_W<3> {
180 LBME_W::new(self)
181 }
182 #[doc = "Bit 4 - Receiver Start Frame Interrupt Enable"]
183 #[inline(always)]
184 #[must_use]
185 pub fn rxsie(&mut self) -> RXSIE_W<4> {
186 RXSIE_W::new(self)
187 }
188 #[doc = "Bit 5 - Data Register Empty Interrupt Enable"]
189 #[inline(always)]
190 #[must_use]
191 pub fn dreie(&mut self) -> DREIE_W<5> {
192 DREIE_W::new(self)
193 }
194 #[doc = "Bit 6 - Transmit Complete Interrupt Enable"]
195 #[inline(always)]
196 #[must_use]
197 pub fn txcie(&mut self) -> TXCIE_W<6> {
198 TXCIE_W::new(self)
199 }
200 #[doc = "Bit 7 - Receive Complete Interrupt Enable"]
201 #[inline(always)]
202 #[must_use]
203 pub fn rxcie(&mut self) -> RXCIE_W<7> {
204 RXCIE_W::new(self)
205 }
206 #[doc = "Writes raw bits to the register."]
207 #[inline(always)]
208 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
209 self.0.bits(bits);
210 self
211 }
212}
213#[doc = "Control A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrla](index.html) module"]
214pub struct CTRLA_SPEC;
215impl crate::RegisterSpec for CTRLA_SPEC {
216 type Ux = u8;
217}
218#[doc = "`read()` method returns [ctrla::R](R) reader structure"]
219impl crate::Readable for CTRLA_SPEC {
220 type Reader = R;
221}
222#[doc = "`write(|w| ..)` method takes [ctrla::W](W) writer structure"]
223impl crate::Writable for CTRLA_SPEC {
224 type Writer = W;
225 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
226 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
227}
228#[doc = "`reset()` method sets CTRLA to value 0"]
229impl crate::Resettable for CTRLA_SPEC {
230 const RESET_VALUE: Self::Ux = 0;
231}