avr_device/devices/attiny85/tc0/
tccr0a.rs

1#[doc = "Register `TCCR0A` reader"]
2pub struct R(crate::R<TCCR0A_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TCCR0A_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TCCR0A_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TCCR0A_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TCCR0A` writer"]
17pub struct W(crate::W<TCCR0A_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TCCR0A_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TCCR0A_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TCCR0A_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WGM0` reader - Waveform Generation Mode"]
38pub type WGM0_R = crate::FieldReader<u8, WGM0_A>;
39#[doc = "Waveform Generation Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum WGM0_A {
43    #[doc = "0: Normal, Top: `0xff`, Update: *Immediate*, Flag: *MAX*"]
44    NORMAL_TOP = 0,
45    #[doc = "1: Phase Correct PWM, Top: `0xff`, Update: *TOP*, Flag: *BOTTOM*"]
46    PWM_PHASE = 1,
47    #[doc = "2: CTC, Top: *OCRA*, Update: *Immediate*, Flag: *MAX*"]
48    CTC = 2,
49    #[doc = "3: Fast PWM, Top: `0xff`, Update: *BOTTOM*, Flag: *TOP*"]
50    PWM_FAST = 3,
51}
52impl From<WGM0_A> for u8 {
53    #[inline(always)]
54    fn from(variant: WGM0_A) -> Self {
55        variant as _
56    }
57}
58impl WGM0_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> WGM0_A {
62        match self.bits {
63            0 => WGM0_A::NORMAL_TOP,
64            1 => WGM0_A::PWM_PHASE,
65            2 => WGM0_A::CTC,
66            3 => WGM0_A::PWM_FAST,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `NORMAL_TOP`"]
71    #[inline(always)]
72    pub fn is_normal_top(&self) -> bool {
73        *self == WGM0_A::NORMAL_TOP
74    }
75    #[doc = "Checks if the value of the field is `PWM_PHASE`"]
76    #[inline(always)]
77    pub fn is_pwm_phase(&self) -> bool {
78        *self == WGM0_A::PWM_PHASE
79    }
80    #[doc = "Checks if the value of the field is `CTC`"]
81    #[inline(always)]
82    pub fn is_ctc(&self) -> bool {
83        *self == WGM0_A::CTC
84    }
85    #[doc = "Checks if the value of the field is `PWM_FAST`"]
86    #[inline(always)]
87    pub fn is_pwm_fast(&self) -> bool {
88        *self == WGM0_A::PWM_FAST
89    }
90}
91#[doc = "Field `WGM0` writer - Waveform Generation Mode"]
92pub type WGM0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, TCCR0A_SPEC, u8, WGM0_A, 2, O>;
93impl<'a, const O: u8> WGM0_W<'a, O> {
94    #[doc = "Normal, Top: `0xff`, Update: *Immediate*, Flag: *MAX*"]
95    #[inline(always)]
96    pub fn normal_top(self) -> &'a mut W {
97        self.variant(WGM0_A::NORMAL_TOP)
98    }
99    #[doc = "Phase Correct PWM, Top: `0xff`, Update: *TOP*, Flag: *BOTTOM*"]
100    #[inline(always)]
101    pub fn pwm_phase(self) -> &'a mut W {
102        self.variant(WGM0_A::PWM_PHASE)
103    }
104    #[doc = "CTC, Top: *OCRA*, Update: *Immediate*, Flag: *MAX*"]
105    #[inline(always)]
106    pub fn ctc(self) -> &'a mut W {
107        self.variant(WGM0_A::CTC)
108    }
109    #[doc = "Fast PWM, Top: `0xff`, Update: *BOTTOM*, Flag: *TOP*"]
110    #[inline(always)]
111    pub fn pwm_fast(self) -> &'a mut W {
112        self.variant(WGM0_A::PWM_FAST)
113    }
114}
115#[doc = "Field `COM0B` reader - Compare Output B Mode"]
116pub type COM0B_R = crate::FieldReader<u8, COM0B_A>;
117#[doc = "Compare Output B Mode\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119#[repr(u8)]
120pub enum COM0B_A {
121    #[doc = "0: Normal port operation, OCix disconnected"]
122    DISCONNECTED = 0,
123    #[doc = "1: Toggle OCix on Compare Match (Might depend on WGM)"]
124    MATCH_TOGGLE = 1,
125    #[doc = "2: Clear OCix on Compare Match (If PWM is enabled, OCix is set at BOTTOM)"]
126    MATCH_CLEAR = 2,
127    #[doc = "3: Set OCix on Compare Match (If PWM is enabled, OCix is cleared at BOTTOM)"]
128    MATCH_SET = 3,
129}
130impl From<COM0B_A> for u8 {
131    #[inline(always)]
132    fn from(variant: COM0B_A) -> Self {
133        variant as _
134    }
135}
136impl COM0B_R {
137    #[doc = "Get enumerated values variant"]
138    #[inline(always)]
139    pub fn variant(&self) -> COM0B_A {
140        match self.bits {
141            0 => COM0B_A::DISCONNECTED,
142            1 => COM0B_A::MATCH_TOGGLE,
143            2 => COM0B_A::MATCH_CLEAR,
144            3 => COM0B_A::MATCH_SET,
145            _ => unreachable!(),
146        }
147    }
148    #[doc = "Checks if the value of the field is `DISCONNECTED`"]
149    #[inline(always)]
150    pub fn is_disconnected(&self) -> bool {
151        *self == COM0B_A::DISCONNECTED
152    }
153    #[doc = "Checks if the value of the field is `MATCH_TOGGLE`"]
154    #[inline(always)]
155    pub fn is_match_toggle(&self) -> bool {
156        *self == COM0B_A::MATCH_TOGGLE
157    }
158    #[doc = "Checks if the value of the field is `MATCH_CLEAR`"]
159    #[inline(always)]
160    pub fn is_match_clear(&self) -> bool {
161        *self == COM0B_A::MATCH_CLEAR
162    }
163    #[doc = "Checks if the value of the field is `MATCH_SET`"]
164    #[inline(always)]
165    pub fn is_match_set(&self) -> bool {
166        *self == COM0B_A::MATCH_SET
167    }
168}
169#[doc = "Field `COM0B` writer - Compare Output B Mode"]
170pub type COM0B_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, TCCR0A_SPEC, u8, COM0B_A, 2, O>;
171impl<'a, const O: u8> COM0B_W<'a, O> {
172    #[doc = "Normal port operation, OCix disconnected"]
173    #[inline(always)]
174    pub fn disconnected(self) -> &'a mut W {
175        self.variant(COM0B_A::DISCONNECTED)
176    }
177    #[doc = "Toggle OCix on Compare Match (Might depend on WGM)"]
178    #[inline(always)]
179    pub fn match_toggle(self) -> &'a mut W {
180        self.variant(COM0B_A::MATCH_TOGGLE)
181    }
182    #[doc = "Clear OCix on Compare Match (If PWM is enabled, OCix is set at BOTTOM)"]
183    #[inline(always)]
184    pub fn match_clear(self) -> &'a mut W {
185        self.variant(COM0B_A::MATCH_CLEAR)
186    }
187    #[doc = "Set OCix on Compare Match (If PWM is enabled, OCix is cleared at BOTTOM)"]
188    #[inline(always)]
189    pub fn match_set(self) -> &'a mut W {
190        self.variant(COM0B_A::MATCH_SET)
191    }
192}
193#[doc = "Field `COM0A` reader - Compare Output A Mode"]
194pub use COM0B_R as COM0A_R;
195#[doc = "Field `COM0A` writer - Compare Output A Mode"]
196pub use COM0B_W as COM0A_W;
197impl R {
198    #[doc = "Bits 0:1 - Waveform Generation Mode"]
199    #[inline(always)]
200    pub fn wgm0(&self) -> WGM0_R {
201        WGM0_R::new(self.bits & 3)
202    }
203    #[doc = "Bits 4:5 - Compare Output B Mode"]
204    #[inline(always)]
205    pub fn com0b(&self) -> COM0B_R {
206        COM0B_R::new((self.bits >> 4) & 3)
207    }
208    #[doc = "Bits 6:7 - Compare Output A Mode"]
209    #[inline(always)]
210    pub fn com0a(&self) -> COM0A_R {
211        COM0A_R::new((self.bits >> 6) & 3)
212    }
213}
214impl W {
215    #[doc = "Bits 0:1 - Waveform Generation Mode"]
216    #[inline(always)]
217    #[must_use]
218    pub fn wgm0(&mut self) -> WGM0_W<0> {
219        WGM0_W::new(self)
220    }
221    #[doc = "Bits 4:5 - Compare Output B Mode"]
222    #[inline(always)]
223    #[must_use]
224    pub fn com0b(&mut self) -> COM0B_W<4> {
225        COM0B_W::new(self)
226    }
227    #[doc = "Bits 6:7 - Compare Output A Mode"]
228    #[inline(always)]
229    #[must_use]
230    pub fn com0a(&mut self) -> COM0A_W<6> {
231        COM0A_W::new(self)
232    }
233    #[doc = "Writes raw bits to the register."]
234    #[inline(always)]
235    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
236        self.0.bits(bits);
237        self
238    }
239}
240#[doc = "Timer/Counter Control Register A\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tccr0a](index.html) module"]
241pub struct TCCR0A_SPEC;
242impl crate::RegisterSpec for TCCR0A_SPEC {
243    type Ux = u8;
244}
245#[doc = "`read()` method returns [tccr0a::R](R) reader structure"]
246impl crate::Readable for TCCR0A_SPEC {
247    type Reader = R;
248}
249#[doc = "`write(|w| ..)` method takes [tccr0a::W](W) writer structure"]
250impl crate::Writable for TCCR0A_SPEC {
251    type Writer = W;
252    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
253    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
254}
255#[doc = "`reset()` method sets TCCR0A to value 0"]
256impl crate::Resettable for TCCR0A_SPEC {
257    const RESET_VALUE: Self::Ux = 0;
258}
avr_device/devices/attiny85/tc0/tccr0a.rs

avr_device/devices/attiny85/tc0/
tccr0a.rs
