avr_device/devices/attiny85/usi/
usisr.rs

1#[doc = "Register `USISR` reader"]
2pub struct R(crate::R<USISR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<USISR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<USISR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<USISR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `USISR` writer"]
17pub struct W(crate::W<USISR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<USISR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<USISR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<USISR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `USICNT` reader - USI Counter Value Bits"]
38pub type USICNT_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `USICNT` writer - USI Counter Value Bits"]
40pub type USICNT_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, USISR_SPEC, u8, u8, 4, O>;
41#[doc = "Field `USIDC` reader - Data Output Collision"]
42pub type USIDC_R = crate::BitReader<bool>;
43#[doc = "Field `USIPF` reader - Stop Condition Flag"]
44pub type USIPF_R = crate::BitReader<bool>;
45#[doc = "Field `USIPF` writer - Stop Condition Flag"]
46pub type USIPF_W<'a, const O: u8> = crate::BitWriter<'a, u8, USISR_SPEC, bool, O>;
47#[doc = "Field `USIOIF` reader - Counter Overflow Interrupt Flag"]
48pub type USIOIF_R = crate::BitReader<bool>;
49#[doc = "Field `USIOIF` writer - Counter Overflow Interrupt Flag"]
50pub type USIOIF_W<'a, const O: u8> = crate::BitWriter<'a, u8, USISR_SPEC, bool, O>;
51#[doc = "Field `USISIF` reader - Start Condition Interrupt Flag"]
52pub type USISIF_R = crate::BitReader<bool>;
53#[doc = "Field `USISIF` writer - Start Condition Interrupt Flag"]
54pub type USISIF_W<'a, const O: u8> = crate::BitWriter<'a, u8, USISR_SPEC, bool, O>;
55impl R {
56    #[doc = "Bits 0:3 - USI Counter Value Bits"]
57    #[inline(always)]
58    pub fn usicnt(&self) -> USICNT_R {
59        USICNT_R::new(self.bits & 0x0f)
60    }
61    #[doc = "Bit 4 - Data Output Collision"]
62    #[inline(always)]
63    pub fn usidc(&self) -> USIDC_R {
64        USIDC_R::new(((self.bits >> 4) & 1) != 0)
65    }
66    #[doc = "Bit 5 - Stop Condition Flag"]
67    #[inline(always)]
68    pub fn usipf(&self) -> USIPF_R {
69        USIPF_R::new(((self.bits >> 5) & 1) != 0)
70    }
71    #[doc = "Bit 6 - Counter Overflow Interrupt Flag"]
72    #[inline(always)]
73    pub fn usioif(&self) -> USIOIF_R {
74        USIOIF_R::new(((self.bits >> 6) & 1) != 0)
75    }
76    #[doc = "Bit 7 - Start Condition Interrupt Flag"]
77    #[inline(always)]
78    pub fn usisif(&self) -> USISIF_R {
79        USISIF_R::new(((self.bits >> 7) & 1) != 0)
80    }
81}
82impl W {
83    #[doc = "Bits 0:3 - USI Counter Value Bits"]
84    #[inline(always)]
85    #[must_use]
86    pub fn usicnt(&mut self) -> USICNT_W<0> {
87        USICNT_W::new(self)
88    }
89    #[doc = "Bit 5 - Stop Condition Flag"]
90    #[inline(always)]
91    #[must_use]
92    pub fn usipf(&mut self) -> USIPF_W<5> {
93        USIPF_W::new(self)
94    }
95    #[doc = "Bit 6 - Counter Overflow Interrupt Flag"]
96    #[inline(always)]
97    #[must_use]
98    pub fn usioif(&mut self) -> USIOIF_W<6> {
99        USIOIF_W::new(self)
100    }
101    #[doc = "Bit 7 - Start Condition Interrupt Flag"]
102    #[inline(always)]
103    #[must_use]
104    pub fn usisif(&mut self) -> USISIF_W<7> {
105        USISIF_W::new(self)
106    }
107    #[doc = "Writes raw bits to the register."]
108    #[inline(always)]
109    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
110        self.0.bits(bits);
111        self
112    }
113}
114#[doc = "USI Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usisr](index.html) module"]
115pub struct USISR_SPEC;
116impl crate::RegisterSpec for USISR_SPEC {
117    type Ux = u8;
118}
119#[doc = "`read()` method returns [usisr::R](R) reader structure"]
120impl crate::Readable for USISR_SPEC {
121    type Reader = R;
122}
123#[doc = "`write(|w| ..)` method takes [usisr::W](W) writer structure"]
124impl crate::Writable for USISR_SPEC {
125    type Writer = W;
126    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
127    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
128}
129#[doc = "`reset()` method sets USISR to value 0"]
130impl crate::Resettable for USISR_SPEC {
131    const RESET_VALUE: Self::Ux = 0;
132}
avr_device/devices/attiny85/usi/usisr.rs

avr_device/devices/attiny85/usi/
usisr.rs
