avr_device/devices/atmega32u4/cpu/
smcr.rs

1#[doc = "Register `SMCR` reader"]
2pub struct R(crate::R<SMCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SMCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SMCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SMCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SMCR` writer"]
17pub struct W(crate::W<SMCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SMCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SMCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SMCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SE` reader - Sleep Enable"]
38pub type SE_R = crate::BitReader<bool>;
39#[doc = "Field `SE` writer - Sleep Enable"]
40pub type SE_W<'a, const O: u8> = crate::BitWriter<'a, u8, SMCR_SPEC, bool, O>;
41#[doc = "Field `SM` reader - Sleep Mode Select bits"]
42pub type SM_R = crate::FieldReader<u8, SM_A>;
43#[doc = "Sleep Mode Select bits\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum SM_A {
47    #[doc = "0: Idle"]
48    IDLE = 0,
49    #[doc = "1: ADC Noise Reduction (If Available)"]
50    ADC = 1,
51    #[doc = "2: Power Down"]
52    PDOWN = 2,
53    #[doc = "3: Power Save"]
54    PSAVE = 3,
55    #[doc = "4: Reserved"]
56    VAL_0X04 = 4,
57    #[doc = "5: Reserved"]
58    VAL_0X05 = 5,
59    #[doc = "6: Standby"]
60    STDBY = 6,
61    #[doc = "7: Extended Standby"]
62    ESTDBY = 7,
63}
64impl From<SM_A> for u8 {
65    #[inline(always)]
66    fn from(variant: SM_A) -> Self {
67        variant as _
68    }
69}
70impl SM_R {
71    #[doc = "Get enumerated values variant"]
72    #[inline(always)]
73    pub fn variant(&self) -> SM_A {
74        match self.bits {
75            0 => SM_A::IDLE,
76            1 => SM_A::ADC,
77            2 => SM_A::PDOWN,
78            3 => SM_A::PSAVE,
79            4 => SM_A::VAL_0X04,
80            5 => SM_A::VAL_0X05,
81            6 => SM_A::STDBY,
82            7 => SM_A::ESTDBY,
83            _ => unreachable!(),
84        }
85    }
86    #[doc = "Checks if the value of the field is `IDLE`"]
87    #[inline(always)]
88    pub fn is_idle(&self) -> bool {
89        *self == SM_A::IDLE
90    }
91    #[doc = "Checks if the value of the field is `ADC`"]
92    #[inline(always)]
93    pub fn is_adc(&self) -> bool {
94        *self == SM_A::ADC
95    }
96    #[doc = "Checks if the value of the field is `PDOWN`"]
97    #[inline(always)]
98    pub fn is_pdown(&self) -> bool {
99        *self == SM_A::PDOWN
100    }
101    #[doc = "Checks if the value of the field is `PSAVE`"]
102    #[inline(always)]
103    pub fn is_psave(&self) -> bool {
104        *self == SM_A::PSAVE
105    }
106    #[doc = "Checks if the value of the field is `VAL_0X04`"]
107    #[inline(always)]
108    pub fn is_val_0x04(&self) -> bool {
109        *self == SM_A::VAL_0X04
110    }
111    #[doc = "Checks if the value of the field is `VAL_0X05`"]
112    #[inline(always)]
113    pub fn is_val_0x05(&self) -> bool {
114        *self == SM_A::VAL_0X05
115    }
116    #[doc = "Checks if the value of the field is `STDBY`"]
117    #[inline(always)]
118    pub fn is_stdby(&self) -> bool {
119        *self == SM_A::STDBY
120    }
121    #[doc = "Checks if the value of the field is `ESTDBY`"]
122    #[inline(always)]
123    pub fn is_estdby(&self) -> bool {
124        *self == SM_A::ESTDBY
125    }
126}
127#[doc = "Field `SM` writer - Sleep Mode Select bits"]
128pub type SM_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, SMCR_SPEC, u8, SM_A, 3, O>;
129impl<'a, const O: u8> SM_W<'a, O> {
130    #[doc = "Idle"]
131    #[inline(always)]
132    pub fn idle(self) -> &'a mut W {
133        self.variant(SM_A::IDLE)
134    }
135    #[doc = "ADC Noise Reduction (If Available)"]
136    #[inline(always)]
137    pub fn adc(self) -> &'a mut W {
138        self.variant(SM_A::ADC)
139    }
140    #[doc = "Power Down"]
141    #[inline(always)]
142    pub fn pdown(self) -> &'a mut W {
143        self.variant(SM_A::PDOWN)
144    }
145    #[doc = "Power Save"]
146    #[inline(always)]
147    pub fn psave(self) -> &'a mut W {
148        self.variant(SM_A::PSAVE)
149    }
150    #[doc = "Reserved"]
151    #[inline(always)]
152    pub fn val_0x04(self) -> &'a mut W {
153        self.variant(SM_A::VAL_0X04)
154    }
155    #[doc = "Reserved"]
156    #[inline(always)]
157    pub fn val_0x05(self) -> &'a mut W {
158        self.variant(SM_A::VAL_0X05)
159    }
160    #[doc = "Standby"]
161    #[inline(always)]
162    pub fn stdby(self) -> &'a mut W {
163        self.variant(SM_A::STDBY)
164    }
165    #[doc = "Extended Standby"]
166    #[inline(always)]
167    pub fn estdby(self) -> &'a mut W {
168        self.variant(SM_A::ESTDBY)
169    }
170}
171impl R {
172    #[doc = "Bit 0 - Sleep Enable"]
173    #[inline(always)]
174    pub fn se(&self) -> SE_R {
175        SE_R::new((self.bits & 1) != 0)
176    }
177    #[doc = "Bits 1:3 - Sleep Mode Select bits"]
178    #[inline(always)]
179    pub fn sm(&self) -> SM_R {
180        SM_R::new((self.bits >> 1) & 7)
181    }
182}
183impl W {
184    #[doc = "Bit 0 - Sleep Enable"]
185    #[inline(always)]
186    #[must_use]
187    pub fn se(&mut self) -> SE_W<0> {
188        SE_W::new(self)
189    }
190    #[doc = "Bits 1:3 - Sleep Mode Select bits"]
191    #[inline(always)]
192    #[must_use]
193    pub fn sm(&mut self) -> SM_W<1> {
194        SM_W::new(self)
195    }
196    #[doc = "Writes raw bits to the register."]
197    #[inline(always)]
198    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
199        self.0.bits(bits);
200        self
201    }
202}
203#[doc = "Sleep Mode Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcr](index.html) module"]
204pub struct SMCR_SPEC;
205impl crate::RegisterSpec for SMCR_SPEC {
206    type Ux = u8;
207}
208#[doc = "`read()` method returns [smcr::R](R) reader structure"]
209impl crate::Readable for SMCR_SPEC {
210    type Reader = R;
211}
212#[doc = "`write(|w| ..)` method takes [smcr::W](W) writer structure"]
213impl crate::Writable for SMCR_SPEC {
214    type Writer = W;
215    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
216    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
217}
218#[doc = "`reset()` method sets SMCR to value 0"]
219impl crate::Resettable for SMCR_SPEC {
220    const RESET_VALUE: Self::Ux = 0;
221}
avr_device/devices/atmega32u4/cpu/smcr.rs

avr_device/devices/atmega32u4/cpu/
smcr.rs
