avr_device/devices/atmega4809/fuse/
syscfg0.rs

1#[doc = "Register `SYSCFG0` reader"]
2pub struct R(crate::R<SYSCFG0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYSCFG0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYSCFG0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYSCFG0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYSCFG0` writer"]
17pub struct W(crate::W<SYSCFG0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYSCFG0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYSCFG0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYSCFG0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EESAVE` reader - EEPROM Save"]
38pub type EESAVE_R = crate::BitReader<bool>;
39#[doc = "Field `EESAVE` writer - EEPROM Save"]
40pub type EESAVE_W<'a, const O: u8> = crate::BitWriter<'a, u8, SYSCFG0_SPEC, bool, O>;
41#[doc = "Field `RSTPINCFG` reader - Reset Pin Configuration"]
42pub type RSTPINCFG_R = crate::BitReader<RSTPINCFG_A>;
43#[doc = "Reset Pin Configuration\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45pub enum RSTPINCFG_A {
46    #[doc = "0: GPIO mode"]
47    GPIO = 0,
48    #[doc = "1: Reset mode"]
49    RST = 1,
50}
51impl From<RSTPINCFG_A> for bool {
52    #[inline(always)]
53    fn from(variant: RSTPINCFG_A) -> Self {
54        variant as u8 != 0
55    }
56}
57impl RSTPINCFG_R {
58    #[doc = "Get enumerated values variant"]
59    #[inline(always)]
60    pub fn variant(&self) -> RSTPINCFG_A {
61        match self.bits {
62            false => RSTPINCFG_A::GPIO,
63            true => RSTPINCFG_A::RST,
64        }
65    }
66    #[doc = "Checks if the value of the field is `GPIO`"]
67    #[inline(always)]
68    pub fn is_gpio(&self) -> bool {
69        *self == RSTPINCFG_A::GPIO
70    }
71    #[doc = "Checks if the value of the field is `RST`"]
72    #[inline(always)]
73    pub fn is_rst(&self) -> bool {
74        *self == RSTPINCFG_A::RST
75    }
76}
77#[doc = "Field `RSTPINCFG` writer - Reset Pin Configuration"]
78pub type RSTPINCFG_W<'a, const O: u8> = crate::BitWriter<'a, u8, SYSCFG0_SPEC, RSTPINCFG_A, O>;
79impl<'a, const O: u8> RSTPINCFG_W<'a, O> {
80    #[doc = "GPIO mode"]
81    #[inline(always)]
82    pub fn gpio(self) -> &'a mut W {
83        self.variant(RSTPINCFG_A::GPIO)
84    }
85    #[doc = "Reset mode"]
86    #[inline(always)]
87    pub fn rst(self) -> &'a mut W {
88        self.variant(RSTPINCFG_A::RST)
89    }
90}
91#[doc = "Field `CRCSRC` reader - CRC Source"]
92pub type CRCSRC_R = crate::FieldReader<u8, CRCSRC_A>;
93#[doc = "CRC Source\n\nValue on reset: 0"]
94#[derive(Clone, Copy, Debug, PartialEq, Eq)]
95#[repr(u8)]
96pub enum CRCSRC_A {
97    #[doc = "0: The CRC is performed on the entire Flash (boot, application code and application data section)."]
98    FLASH = 0,
99    #[doc = "1: The CRC is performed on the boot section of Flash"]
100    BOOT = 1,
101    #[doc = "2: The CRC is performed on the boot and application code section of Flash"]
102    BOOTAPP = 2,
103    #[doc = "3: Disable CRC."]
104    NOCRC = 3,
105}
106impl From<CRCSRC_A> for u8 {
107    #[inline(always)]
108    fn from(variant: CRCSRC_A) -> Self {
109        variant as _
110    }
111}
112impl CRCSRC_R {
113    #[doc = "Get enumerated values variant"]
114    #[inline(always)]
115    pub fn variant(&self) -> CRCSRC_A {
116        match self.bits {
117            0 => CRCSRC_A::FLASH,
118            1 => CRCSRC_A::BOOT,
119            2 => CRCSRC_A::BOOTAPP,
120            3 => CRCSRC_A::NOCRC,
121            _ => unreachable!(),
122        }
123    }
124    #[doc = "Checks if the value of the field is `FLASH`"]
125    #[inline(always)]
126    pub fn is_flash(&self) -> bool {
127        *self == CRCSRC_A::FLASH
128    }
129    #[doc = "Checks if the value of the field is `BOOT`"]
130    #[inline(always)]
131    pub fn is_boot(&self) -> bool {
132        *self == CRCSRC_A::BOOT
133    }
134    #[doc = "Checks if the value of the field is `BOOTAPP`"]
135    #[inline(always)]
136    pub fn is_bootapp(&self) -> bool {
137        *self == CRCSRC_A::BOOTAPP
138    }
139    #[doc = "Checks if the value of the field is `NOCRC`"]
140    #[inline(always)]
141    pub fn is_nocrc(&self) -> bool {
142        *self == CRCSRC_A::NOCRC
143    }
144}
145#[doc = "Field `CRCSRC` writer - CRC Source"]
146pub type CRCSRC_W<'a, const O: u8> =
147    crate::FieldWriterSafe<'a, u8, SYSCFG0_SPEC, u8, CRCSRC_A, 2, O>;
148impl<'a, const O: u8> CRCSRC_W<'a, O> {
149    #[doc = "The CRC is performed on the entire Flash (boot, application code and application data section)."]
150    #[inline(always)]
151    pub fn flash(self) -> &'a mut W {
152        self.variant(CRCSRC_A::FLASH)
153    }
154    #[doc = "The CRC is performed on the boot section of Flash"]
155    #[inline(always)]
156    pub fn boot(self) -> &'a mut W {
157        self.variant(CRCSRC_A::BOOT)
158    }
159    #[doc = "The CRC is performed on the boot and application code section of Flash"]
160    #[inline(always)]
161    pub fn bootapp(self) -> &'a mut W {
162        self.variant(CRCSRC_A::BOOTAPP)
163    }
164    #[doc = "Disable CRC."]
165    #[inline(always)]
166    pub fn nocrc(self) -> &'a mut W {
167        self.variant(CRCSRC_A::NOCRC)
168    }
169}
170impl R {
171    #[doc = "Bit 0 - EEPROM Save"]
172    #[inline(always)]
173    pub fn eesave(&self) -> EESAVE_R {
174        EESAVE_R::new((self.bits & 1) != 0)
175    }
176    #[doc = "Bit 3 - Reset Pin Configuration"]
177    #[inline(always)]
178    pub fn rstpincfg(&self) -> RSTPINCFG_R {
179        RSTPINCFG_R::new(((self.bits >> 3) & 1) != 0)
180    }
181    #[doc = "Bits 6:7 - CRC Source"]
182    #[inline(always)]
183    pub fn crcsrc(&self) -> CRCSRC_R {
184        CRCSRC_R::new((self.bits >> 6) & 3)
185    }
186}
187impl W {
188    #[doc = "Bit 0 - EEPROM Save"]
189    #[inline(always)]
190    #[must_use]
191    pub fn eesave(&mut self) -> EESAVE_W<0> {
192        EESAVE_W::new(self)
193    }
194    #[doc = "Bit 3 - Reset Pin Configuration"]
195    #[inline(always)]
196    #[must_use]
197    pub fn rstpincfg(&mut self) -> RSTPINCFG_W<3> {
198        RSTPINCFG_W::new(self)
199    }
200    #[doc = "Bits 6:7 - CRC Source"]
201    #[inline(always)]
202    #[must_use]
203    pub fn crcsrc(&mut self) -> CRCSRC_W<6> {
204        CRCSRC_W::new(self)
205    }
206    #[doc = "Writes raw bits to the register."]
207    #[inline(always)]
208    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
209        self.0.bits(bits);
210        self
211    }
212}
213#[doc = "System Configuration 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [syscfg0](index.html) module"]
214pub struct SYSCFG0_SPEC;
215impl crate::RegisterSpec for SYSCFG0_SPEC {
216    type Ux = u8;
217}
218#[doc = "`read()` method returns [syscfg0::R](R) reader structure"]
219impl crate::Readable for SYSCFG0_SPEC {
220    type Reader = R;
221}
222#[doc = "`write(|w| ..)` method takes [syscfg0::W](W) writer structure"]
223impl crate::Writable for SYSCFG0_SPEC {
224    type Writer = W;
225    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
226    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
227}
228#[doc = "`reset()` method sets SYSCFG0 to value 0"]
229impl crate::Resettable for SYSCFG0_SPEC {
230    const RESET_VALUE: Self::Ux = 0;
231}
avr_device/devices/atmega4809/fuse/syscfg0.rs

avr_device/devices/atmega4809/fuse/
syscfg0.rs
