avr_device/devices/atmega4809/tcb0/
ctrlb.rs1#[doc = "Register `CTRLB` reader"]
2pub struct R(crate::R<CTRLB_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CTRLB_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CTRLB_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CTRLB` writer"]
17pub struct W(crate::W<CTRLB_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CTRLB_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CTRLB_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CNTMODE` reader - Timer Mode"]
38pub type CNTMODE_R = crate::FieldReader<u8, CNTMODE_A>;
39#[doc = "Timer Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CNTMODE_A {
43 #[doc = "0: Periodic Interrupt"]
44 INT = 0,
45 #[doc = "1: Periodic Timeout"]
46 TIMEOUT = 1,
47 #[doc = "2: Input Capture Event"]
48 CAPT = 2,
49 #[doc = "3: Input Capture Frequency measurement"]
50 FRQ = 3,
51 #[doc = "4: Input Capture Pulse-Width measurement"]
52 PW = 4,
53 #[doc = "5: Input Capture Frequency and Pulse-Width measurement"]
54 FRQPW = 5,
55 #[doc = "6: Single Shot"]
56 SINGLE = 6,
57 #[doc = "7: 8-bit PWM"]
58 PWM8 = 7,
59}
60impl From<CNTMODE_A> for u8 {
61 #[inline(always)]
62 fn from(variant: CNTMODE_A) -> Self {
63 variant as _
64 }
65}
66impl CNTMODE_R {
67 #[doc = "Get enumerated values variant"]
68 #[inline(always)]
69 pub fn variant(&self) -> CNTMODE_A {
70 match self.bits {
71 0 => CNTMODE_A::INT,
72 1 => CNTMODE_A::TIMEOUT,
73 2 => CNTMODE_A::CAPT,
74 3 => CNTMODE_A::FRQ,
75 4 => CNTMODE_A::PW,
76 5 => CNTMODE_A::FRQPW,
77 6 => CNTMODE_A::SINGLE,
78 7 => CNTMODE_A::PWM8,
79 _ => unreachable!(),
80 }
81 }
82 #[doc = "Checks if the value of the field is `INT`"]
83 #[inline(always)]
84 pub fn is_int(&self) -> bool {
85 *self == CNTMODE_A::INT
86 }
87 #[doc = "Checks if the value of the field is `TIMEOUT`"]
88 #[inline(always)]
89 pub fn is_timeout(&self) -> bool {
90 *self == CNTMODE_A::TIMEOUT
91 }
92 #[doc = "Checks if the value of the field is `CAPT`"]
93 #[inline(always)]
94 pub fn is_capt(&self) -> bool {
95 *self == CNTMODE_A::CAPT
96 }
97 #[doc = "Checks if the value of the field is `FRQ`"]
98 #[inline(always)]
99 pub fn is_frq(&self) -> bool {
100 *self == CNTMODE_A::FRQ
101 }
102 #[doc = "Checks if the value of the field is `PW`"]
103 #[inline(always)]
104 pub fn is_pw(&self) -> bool {
105 *self == CNTMODE_A::PW
106 }
107 #[doc = "Checks if the value of the field is `FRQPW`"]
108 #[inline(always)]
109 pub fn is_frqpw(&self) -> bool {
110 *self == CNTMODE_A::FRQPW
111 }
112 #[doc = "Checks if the value of the field is `SINGLE`"]
113 #[inline(always)]
114 pub fn is_single(&self) -> bool {
115 *self == CNTMODE_A::SINGLE
116 }
117 #[doc = "Checks if the value of the field is `PWM8`"]
118 #[inline(always)]
119 pub fn is_pwm8(&self) -> bool {
120 *self == CNTMODE_A::PWM8
121 }
122}
123#[doc = "Field `CNTMODE` writer - Timer Mode"]
124pub type CNTMODE_W<'a, const O: u8> =
125 crate::FieldWriterSafe<'a, u8, CTRLB_SPEC, u8, CNTMODE_A, 3, O>;
126impl<'a, const O: u8> CNTMODE_W<'a, O> {
127 #[doc = "Periodic Interrupt"]
128 #[inline(always)]
129 pub fn int(self) -> &'a mut W {
130 self.variant(CNTMODE_A::INT)
131 }
132 #[doc = "Periodic Timeout"]
133 #[inline(always)]
134 pub fn timeout(self) -> &'a mut W {
135 self.variant(CNTMODE_A::TIMEOUT)
136 }
137 #[doc = "Input Capture Event"]
138 #[inline(always)]
139 pub fn capt(self) -> &'a mut W {
140 self.variant(CNTMODE_A::CAPT)
141 }
142 #[doc = "Input Capture Frequency measurement"]
143 #[inline(always)]
144 pub fn frq(self) -> &'a mut W {
145 self.variant(CNTMODE_A::FRQ)
146 }
147 #[doc = "Input Capture Pulse-Width measurement"]
148 #[inline(always)]
149 pub fn pw(self) -> &'a mut W {
150 self.variant(CNTMODE_A::PW)
151 }
152 #[doc = "Input Capture Frequency and Pulse-Width measurement"]
153 #[inline(always)]
154 pub fn frqpw(self) -> &'a mut W {
155 self.variant(CNTMODE_A::FRQPW)
156 }
157 #[doc = "Single Shot"]
158 #[inline(always)]
159 pub fn single(self) -> &'a mut W {
160 self.variant(CNTMODE_A::SINGLE)
161 }
162 #[doc = "8-bit PWM"]
163 #[inline(always)]
164 pub fn pwm8(self) -> &'a mut W {
165 self.variant(CNTMODE_A::PWM8)
166 }
167}
168#[doc = "Field `CCMPEN` reader - Pin Output Enable"]
169pub type CCMPEN_R = crate::BitReader<bool>;
170#[doc = "Field `CCMPEN` writer - Pin Output Enable"]
171pub type CCMPEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
172#[doc = "Field `CCMPINIT` reader - Pin Initial State"]
173pub type CCMPINIT_R = crate::BitReader<bool>;
174#[doc = "Field `CCMPINIT` writer - Pin Initial State"]
175pub type CCMPINIT_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
176#[doc = "Field `ASYNC` reader - Asynchronous Enable"]
177pub type ASYNC_R = crate::BitReader<bool>;
178#[doc = "Field `ASYNC` writer - Asynchronous Enable"]
179pub type ASYNC_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
180impl R {
181 #[doc = "Bits 0:2 - Timer Mode"]
182 #[inline(always)]
183 pub fn cntmode(&self) -> CNTMODE_R {
184 CNTMODE_R::new(self.bits & 7)
185 }
186 #[doc = "Bit 4 - Pin Output Enable"]
187 #[inline(always)]
188 pub fn ccmpen(&self) -> CCMPEN_R {
189 CCMPEN_R::new(((self.bits >> 4) & 1) != 0)
190 }
191 #[doc = "Bit 5 - Pin Initial State"]
192 #[inline(always)]
193 pub fn ccmpinit(&self) -> CCMPINIT_R {
194 CCMPINIT_R::new(((self.bits >> 5) & 1) != 0)
195 }
196 #[doc = "Bit 6 - Asynchronous Enable"]
197 #[inline(always)]
198 pub fn async_(&self) -> ASYNC_R {
199 ASYNC_R::new(((self.bits >> 6) & 1) != 0)
200 }
201}
202impl W {
203 #[doc = "Bits 0:2 - Timer Mode"]
204 #[inline(always)]
205 #[must_use]
206 pub fn cntmode(&mut self) -> CNTMODE_W<0> {
207 CNTMODE_W::new(self)
208 }
209 #[doc = "Bit 4 - Pin Output Enable"]
210 #[inline(always)]
211 #[must_use]
212 pub fn ccmpen(&mut self) -> CCMPEN_W<4> {
213 CCMPEN_W::new(self)
214 }
215 #[doc = "Bit 5 - Pin Initial State"]
216 #[inline(always)]
217 #[must_use]
218 pub fn ccmpinit(&mut self) -> CCMPINIT_W<5> {
219 CCMPINIT_W::new(self)
220 }
221 #[doc = "Bit 6 - Asynchronous Enable"]
222 #[inline(always)]
223 #[must_use]
224 pub fn async_(&mut self) -> ASYNC_W<6> {
225 ASYNC_W::new(self)
226 }
227 #[doc = "Writes raw bits to the register."]
228 #[inline(always)]
229 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
230 self.0.bits(bits);
231 self
232 }
233}
234#[doc = "Control Register B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
235pub struct CTRLB_SPEC;
236impl crate::RegisterSpec for CTRLB_SPEC {
237 type Ux = u8;
238}
239#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
240impl crate::Readable for CTRLB_SPEC {
241 type Reader = R;
242}
243#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
244impl crate::Writable for CTRLB_SPEC {
245 type Writer = W;
246 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
247 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
248}
249#[doc = "`reset()` method sets CTRLB to value 0"]
250impl crate::Resettable for CTRLB_SPEC {
251 const RESET_VALUE: Self::Ux = 0;
252}