avr_device/devices/atmega4809/usart1/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `STATUS` writer"]
17pub struct W(crate::W<STATUS_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<STATUS_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<STATUS_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<STATUS_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WFB` reader - Wait For Break"]
38pub type WFB_R = crate::BitReader<bool>;
39#[doc = "Field `WFB` writer - Wait For Break"]
40pub type WFB_W<'a, const O: u8> = crate::BitWriter<'a, u8, STATUS_SPEC, bool, O>;
41#[doc = "Field `BDF` reader - Break Detected Flag"]
42pub type BDF_R = crate::BitReader<bool>;
43#[doc = "Field `BDF` writer - Break Detected Flag"]
44pub type BDF_W<'a, const O: u8> = crate::BitWriter<'a, u8, STATUS_SPEC, bool, O>;
45#[doc = "Field `ISFIF` reader - Inconsistent Sync Field Interrupt Flag"]
46pub type ISFIF_R = crate::BitReader<bool>;
47#[doc = "Field `ISFIF` writer - Inconsistent Sync Field Interrupt Flag"]
48pub type ISFIF_W<'a, const O: u8> = crate::BitWriter<'a, u8, STATUS_SPEC, bool, O>;
49#[doc = "Field `RXSIF` reader - Receive Start Interrupt"]
50pub type RXSIF_R = crate::BitReader<bool>;
51#[doc = "Field `DREIF` reader - Data Register Empty Flag"]
52pub type DREIF_R = crate::BitReader<bool>;
53#[doc = "Field `TXCIF` reader - Transmit Interrupt Flag"]
54pub type TXCIF_R = crate::BitReader<bool>;
55#[doc = "Field `TXCIF` writer - Transmit Interrupt Flag"]
56pub type TXCIF_W<'a, const O: u8> = crate::BitWriter<'a, u8, STATUS_SPEC, bool, O>;
57#[doc = "Field `RXCIF` reader - Receive Complete Interrupt Flag"]
58pub type RXCIF_R = crate::BitReader<bool>;
59impl R {
60    #[doc = "Bit 0 - Wait For Break"]
61    #[inline(always)]
62    pub fn wfb(&self) -> WFB_R {
63        WFB_R::new((self.bits & 1) != 0)
64    }
65    #[doc = "Bit 1 - Break Detected Flag"]
66    #[inline(always)]
67    pub fn bdf(&self) -> BDF_R {
68        BDF_R::new(((self.bits >> 1) & 1) != 0)
69    }
70    #[doc = "Bit 3 - Inconsistent Sync Field Interrupt Flag"]
71    #[inline(always)]
72    pub fn isfif(&self) -> ISFIF_R {
73        ISFIF_R::new(((self.bits >> 3) & 1) != 0)
74    }
75    #[doc = "Bit 4 - Receive Start Interrupt"]
76    #[inline(always)]
77    pub fn rxsif(&self) -> RXSIF_R {
78        RXSIF_R::new(((self.bits >> 4) & 1) != 0)
79    }
80    #[doc = "Bit 5 - Data Register Empty Flag"]
81    #[inline(always)]
82    pub fn dreif(&self) -> DREIF_R {
83        DREIF_R::new(((self.bits >> 5) & 1) != 0)
84    }
85    #[doc = "Bit 6 - Transmit Interrupt Flag"]
86    #[inline(always)]
87    pub fn txcif(&self) -> TXCIF_R {
88        TXCIF_R::new(((self.bits >> 6) & 1) != 0)
89    }
90    #[doc = "Bit 7 - Receive Complete Interrupt Flag"]
91    #[inline(always)]
92    pub fn rxcif(&self) -> RXCIF_R {
93        RXCIF_R::new(((self.bits >> 7) & 1) != 0)
94    }
95}
96impl W {
97    #[doc = "Bit 0 - Wait For Break"]
98    #[inline(always)]
99    #[must_use]
100    pub fn wfb(&mut self) -> WFB_W<0> {
101        WFB_W::new(self)
102    }
103    #[doc = "Bit 1 - Break Detected Flag"]
104    #[inline(always)]
105    #[must_use]
106    pub fn bdf(&mut self) -> BDF_W<1> {
107        BDF_W::new(self)
108    }
109    #[doc = "Bit 3 - Inconsistent Sync Field Interrupt Flag"]
110    #[inline(always)]
111    #[must_use]
112    pub fn isfif(&mut self) -> ISFIF_W<3> {
113        ISFIF_W::new(self)
114    }
115    #[doc = "Bit 6 - Transmit Interrupt Flag"]
116    #[inline(always)]
117    #[must_use]
118    pub fn txcif(&mut self) -> TXCIF_W<6> {
119        TXCIF_W::new(self)
120    }
121    #[doc = "Writes raw bits to the register."]
122    #[inline(always)]
123    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
124        self.0.bits(bits);
125        self
126    }
127}
128#[doc = "Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
129pub struct STATUS_SPEC;
130impl crate::RegisterSpec for STATUS_SPEC {
131    type Ux = u8;
132}
133#[doc = "`read()` method returns [status::R](R) reader structure"]
134impl crate::Readable for STATUS_SPEC {
135    type Reader = R;
136}
137#[doc = "`write(|w| ..)` method takes [status::W](W) writer structure"]
138impl crate::Writable for STATUS_SPEC {
139    type Writer = W;
140    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
141    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
142}
143#[doc = "`reset()` method sets STATUS to value 0"]
144impl crate::Resettable for STATUS_SPEC {
145    const RESET_VALUE: Self::Ux = 0;
146}
avr_device/devices/atmega4809/usart1/status.rs

avr_device/devices/atmega4809/usart1/
status.rs
