avr_device/devices/atmega4809/usart3/
ctrlb.rs

1#[doc = "Register `CTRLB` reader"]
2pub struct R(crate::R<CTRLB_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLB_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLB_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLB_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLB` writer"]
17pub struct W(crate::W<CTRLB_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLB_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLB_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLB_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MPCM` reader - Multi-processor Communication Mode"]
38pub type MPCM_R = crate::BitReader<bool>;
39#[doc = "Field `MPCM` writer - Multi-processor Communication Mode"]
40pub type MPCM_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
41#[doc = "Field `RXMODE` reader - Receiver Mode"]
42pub type RXMODE_R = crate::FieldReader<u8, RXMODE_A>;
43#[doc = "Receiver Mode\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum RXMODE_A {
47    #[doc = "0: Normal mode"]
48    NORMAL = 0,
49    #[doc = "1: CLK2x mode"]
50    CLK2X = 1,
51    #[doc = "2: Generic autobaud mode"]
52    GENAUTO = 2,
53    #[doc = "3: LIN constrained autobaud mode"]
54    LINAUTO = 3,
55}
56impl From<RXMODE_A> for u8 {
57    #[inline(always)]
58    fn from(variant: RXMODE_A) -> Self {
59        variant as _
60    }
61}
62impl RXMODE_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> RXMODE_A {
66        match self.bits {
67            0 => RXMODE_A::NORMAL,
68            1 => RXMODE_A::CLK2X,
69            2 => RXMODE_A::GENAUTO,
70            3 => RXMODE_A::LINAUTO,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `NORMAL`"]
75    #[inline(always)]
76    pub fn is_normal(&self) -> bool {
77        *self == RXMODE_A::NORMAL
78    }
79    #[doc = "Checks if the value of the field is `CLK2X`"]
80    #[inline(always)]
81    pub fn is_clk2x(&self) -> bool {
82        *self == RXMODE_A::CLK2X
83    }
84    #[doc = "Checks if the value of the field is `GENAUTO`"]
85    #[inline(always)]
86    pub fn is_genauto(&self) -> bool {
87        *self == RXMODE_A::GENAUTO
88    }
89    #[doc = "Checks if the value of the field is `LINAUTO`"]
90    #[inline(always)]
91    pub fn is_linauto(&self) -> bool {
92        *self == RXMODE_A::LINAUTO
93    }
94}
95#[doc = "Field `RXMODE` writer - Receiver Mode"]
96pub type RXMODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, CTRLB_SPEC, u8, RXMODE_A, 2, O>;
97impl<'a, const O: u8> RXMODE_W<'a, O> {
98    #[doc = "Normal mode"]
99    #[inline(always)]
100    pub fn normal(self) -> &'a mut W {
101        self.variant(RXMODE_A::NORMAL)
102    }
103    #[doc = "CLK2x mode"]
104    #[inline(always)]
105    pub fn clk2x(self) -> &'a mut W {
106        self.variant(RXMODE_A::CLK2X)
107    }
108    #[doc = "Generic autobaud mode"]
109    #[inline(always)]
110    pub fn genauto(self) -> &'a mut W {
111        self.variant(RXMODE_A::GENAUTO)
112    }
113    #[doc = "LIN constrained autobaud mode"]
114    #[inline(always)]
115    pub fn linauto(self) -> &'a mut W {
116        self.variant(RXMODE_A::LINAUTO)
117    }
118}
119#[doc = "Field `ODME` reader - Open Drain Mode Enable"]
120pub type ODME_R = crate::BitReader<bool>;
121#[doc = "Field `ODME` writer - Open Drain Mode Enable"]
122pub type ODME_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
123#[doc = "Field `SFDEN` reader - Start Frame Detection Enable"]
124pub type SFDEN_R = crate::BitReader<bool>;
125#[doc = "Field `SFDEN` writer - Start Frame Detection Enable"]
126pub type SFDEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
127#[doc = "Field `TXEN` reader - Transmitter Enable"]
128pub type TXEN_R = crate::BitReader<bool>;
129#[doc = "Field `TXEN` writer - Transmitter Enable"]
130pub type TXEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
131#[doc = "Field `RXEN` reader - Reciever enable"]
132pub type RXEN_R = crate::BitReader<bool>;
133#[doc = "Field `RXEN` writer - Reciever enable"]
134pub type RXEN_W<'a, const O: u8> = crate::BitWriter<'a, u8, CTRLB_SPEC, bool, O>;
135impl R {
136    #[doc = "Bit 0 - Multi-processor Communication Mode"]
137    #[inline(always)]
138    pub fn mpcm(&self) -> MPCM_R {
139        MPCM_R::new((self.bits & 1) != 0)
140    }
141    #[doc = "Bits 1:2 - Receiver Mode"]
142    #[inline(always)]
143    pub fn rxmode(&self) -> RXMODE_R {
144        RXMODE_R::new((self.bits >> 1) & 3)
145    }
146    #[doc = "Bit 3 - Open Drain Mode Enable"]
147    #[inline(always)]
148    pub fn odme(&self) -> ODME_R {
149        ODME_R::new(((self.bits >> 3) & 1) != 0)
150    }
151    #[doc = "Bit 4 - Start Frame Detection Enable"]
152    #[inline(always)]
153    pub fn sfden(&self) -> SFDEN_R {
154        SFDEN_R::new(((self.bits >> 4) & 1) != 0)
155    }
156    #[doc = "Bit 6 - Transmitter Enable"]
157    #[inline(always)]
158    pub fn txen(&self) -> TXEN_R {
159        TXEN_R::new(((self.bits >> 6) & 1) != 0)
160    }
161    #[doc = "Bit 7 - Reciever enable"]
162    #[inline(always)]
163    pub fn rxen(&self) -> RXEN_R {
164        RXEN_R::new(((self.bits >> 7) & 1) != 0)
165    }
166}
167impl W {
168    #[doc = "Bit 0 - Multi-processor Communication Mode"]
169    #[inline(always)]
170    #[must_use]
171    pub fn mpcm(&mut self) -> MPCM_W<0> {
172        MPCM_W::new(self)
173    }
174    #[doc = "Bits 1:2 - Receiver Mode"]
175    #[inline(always)]
176    #[must_use]
177    pub fn rxmode(&mut self) -> RXMODE_W<1> {
178        RXMODE_W::new(self)
179    }
180    #[doc = "Bit 3 - Open Drain Mode Enable"]
181    #[inline(always)]
182    #[must_use]
183    pub fn odme(&mut self) -> ODME_W<3> {
184        ODME_W::new(self)
185    }
186    #[doc = "Bit 4 - Start Frame Detection Enable"]
187    #[inline(always)]
188    #[must_use]
189    pub fn sfden(&mut self) -> SFDEN_W<4> {
190        SFDEN_W::new(self)
191    }
192    #[doc = "Bit 6 - Transmitter Enable"]
193    #[inline(always)]
194    #[must_use]
195    pub fn txen(&mut self) -> TXEN_W<6> {
196        TXEN_W::new(self)
197    }
198    #[doc = "Bit 7 - Reciever enable"]
199    #[inline(always)]
200    #[must_use]
201    pub fn rxen(&mut self) -> RXEN_W<7> {
202        RXEN_W::new(self)
203    }
204    #[doc = "Writes raw bits to the register."]
205    #[inline(always)]
206    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
207        self.0.bits(bits);
208        self
209    }
210}
211#[doc = "Control B\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlb](index.html) module"]
212pub struct CTRLB_SPEC;
213impl crate::RegisterSpec for CTRLB_SPEC {
214    type Ux = u8;
215}
216#[doc = "`read()` method returns [ctrlb::R](R) reader structure"]
217impl crate::Readable for CTRLB_SPEC {
218    type Reader = R;
219}
220#[doc = "`write(|w| ..)` method takes [ctrlb::W](W) writer structure"]
221impl crate::Writable for CTRLB_SPEC {
222    type Writer = W;
223    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
224    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
225}
226#[doc = "`reset()` method sets CTRLB to value 0"]
227impl crate::Resettable for CTRLB_SPEC {
228    const RESET_VALUE: Self::Ux = 0;
229}
avr_device/devices/atmega4809/usart3/ctrlb.rs

avr_device/devices/atmega4809/usart3/
ctrlb.rs
