avr_device/devices/attiny85/exint/
mcucr.rs

1#[doc = "Register `MCUCR` reader"]
2pub struct R(crate::R<MCUCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MCUCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MCUCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MCUCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MCUCR` writer"]
17pub struct W(crate::W<MCUCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MCUCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MCUCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MCUCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `ISC0` reader - Interrupt Sense Control 0 bits"]
38pub type ISC0_R = crate::FieldReader<u8, ISC0_A>;
39#[doc = "Interrupt Sense Control 0 bits\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum ISC0_A {
43    #[doc = "0: The low level of INTx generates an interrupt request"]
44    LOW = 0,
45    #[doc = "1: Any logical change on INTx generates an interrupt request"]
46    TOGGLE = 1,
47    #[doc = "2: The falling edge of INTx generates an interrupt request"]
48    FALLING = 2,
49    #[doc = "3: The rising edge of INTx generates an interrupt request"]
50    RISING = 3,
51}
52impl From<ISC0_A> for u8 {
53    #[inline(always)]
54    fn from(variant: ISC0_A) -> Self {
55        variant as _
56    }
57}
58impl ISC0_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> ISC0_A {
62        match self.bits {
63            0 => ISC0_A::LOW,
64            1 => ISC0_A::TOGGLE,
65            2 => ISC0_A::FALLING,
66            3 => ISC0_A::RISING,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `LOW`"]
71    #[inline(always)]
72    pub fn is_low(&self) -> bool {
73        *self == ISC0_A::LOW
74    }
75    #[doc = "Checks if the value of the field is `TOGGLE`"]
76    #[inline(always)]
77    pub fn is_toggle(&self) -> bool {
78        *self == ISC0_A::TOGGLE
79    }
80    #[doc = "Checks if the value of the field is `FALLING`"]
81    #[inline(always)]
82    pub fn is_falling(&self) -> bool {
83        *self == ISC0_A::FALLING
84    }
85    #[doc = "Checks if the value of the field is `RISING`"]
86    #[inline(always)]
87    pub fn is_rising(&self) -> bool {
88        *self == ISC0_A::RISING
89    }
90}
91#[doc = "Field `ISC0` writer - Interrupt Sense Control 0 bits"]
92pub type ISC0_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u8, MCUCR_SPEC, u8, ISC0_A, 2, O>;
93impl<'a, const O: u8> ISC0_W<'a, O> {
94    #[doc = "The low level of INTx generates an interrupt request"]
95    #[inline(always)]
96    pub fn low(self) -> &'a mut W {
97        self.variant(ISC0_A::LOW)
98    }
99    #[doc = "Any logical change on INTx generates an interrupt request"]
100    #[inline(always)]
101    pub fn toggle(self) -> &'a mut W {
102        self.variant(ISC0_A::TOGGLE)
103    }
104    #[doc = "The falling edge of INTx generates an interrupt request"]
105    #[inline(always)]
106    pub fn falling(self) -> &'a mut W {
107        self.variant(ISC0_A::FALLING)
108    }
109    #[doc = "The rising edge of INTx generates an interrupt request"]
110    #[inline(always)]
111    pub fn rising(self) -> &'a mut W {
112        self.variant(ISC0_A::RISING)
113    }
114}
115impl R {
116    #[doc = "Bits 0:1 - Interrupt Sense Control 0 bits"]
117    #[inline(always)]
118    pub fn isc0(&self) -> ISC0_R {
119        ISC0_R::new(self.bits & 3)
120    }
121}
122impl W {
123    #[doc = "Bits 0:1 - Interrupt Sense Control 0 bits"]
124    #[inline(always)]
125    #[must_use]
126    pub fn isc0(&mut self) -> ISC0_W<0> {
127        ISC0_W::new(self)
128    }
129    #[doc = "Writes raw bits to the register."]
130    #[inline(always)]
131    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
132        self.0.bits(bits);
133        self
134    }
135}
136#[doc = "MCU Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcucr](index.html) module"]
137pub struct MCUCR_SPEC;
138impl crate::RegisterSpec for MCUCR_SPEC {
139    type Ux = u8;
140}
141#[doc = "`read()` method returns [mcucr::R](R) reader structure"]
142impl crate::Readable for MCUCR_SPEC {
143    type Reader = R;
144}
145#[doc = "`write(|w| ..)` method takes [mcucr::W](W) writer structure"]
146impl crate::Writable for MCUCR_SPEC {
147    type Writer = W;
148    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
149    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150}
151#[doc = "`reset()` method sets MCUCR to value 0"]
152impl crate::Resettable for MCUCR_SPEC {
153    const RESET_VALUE: Self::Ux = 0;
154}
avr_device/devices/attiny85/exint/mcucr.rs

avr_device/devices/attiny85/exint/
mcucr.rs
