avr_device/devices/atmega4809/
interrupt.rs1#[doc = r"Enumeration of all the interrupts."]
2#[derive(Copy, Clone, Debug, PartialEq, Eq)]
3#[repr(u16)]
4pub enum Interrupt {
5 #[doc = "1 - No Description."]
6 CRCSCAN_NMI = 1,
7 #[doc = "2 - No Description."]
8 BOD_VLM = 2,
9 #[doc = "3 - No Description."]
10 RTC_CNT = 3,
11 #[doc = "4 - No Description."]
12 RTC_PIT = 4,
13 #[doc = "5 - No Description."]
14 CCL_CCL = 5,
15 #[doc = "6 - No Description."]
16 PORTA_PORT = 6,
17 #[doc = "7 - No Description."]
18 TCA0_LUNF_OVF = 7,
19 #[doc = "8 - No Description."]
20 TCA0_HUNF = 8,
21 #[doc = "9 - No Description."]
22 TCA0_CMP0_LCMP0 = 9,
23 #[doc = "10 - No Description."]
24 TCA0_CMP1_LCMP1 = 10,
25 #[doc = "11 - No Description."]
26 TCA0_CMP2_LCMP2 = 11,
27 #[doc = "12 - No Description."]
28 TCB0_INT = 12,
29 #[doc = "13 - No Description."]
30 TCB1_INT = 13,
31 #[doc = "14 - No Description."]
32 TWI0_TWIS = 14,
33 #[doc = "15 - No Description."]
34 TWI0_TWIM = 15,
35 #[doc = "16 - No Description."]
36 SPI0_INT = 16,
37 #[doc = "17 - No Description."]
38 USART0_RXC = 17,
39 #[doc = "18 - No Description."]
40 USART0_DRE = 18,
41 #[doc = "19 - No Description."]
42 USART0_TXC = 19,
43 #[doc = "20 - No Description."]
44 PORTD_PORT = 20,
45 #[doc = "21 - No Description."]
46 AC0_AC = 21,
47 #[doc = "22 - No Description."]
48 ADC0_RESRDY = 22,
49 #[doc = "23 - No Description."]
50 ADC0_WCOMP = 23,
51 #[doc = "24 - No Description."]
52 PORTC_PORT = 24,
53 #[doc = "25 - No Description."]
54 TCB2_INT = 25,
55 #[doc = "26 - No Description."]
56 USART1_RXC = 26,
57 #[doc = "27 - No Description."]
58 USART1_DRE = 27,
59 #[doc = "28 - No Description."]
60 USART1_TXC = 28,
61 #[doc = "29 - No Description."]
62 PORTF_PORT = 29,
63 #[doc = "30 - No Description."]
64 NVMCTRL_EE = 30,
65 #[doc = "31 - No Description."]
66 USART2_RXC = 31,
67 #[doc = "32 - No Description."]
68 USART2_DRE = 32,
69 #[doc = "33 - No Description."]
70 USART2_TXC = 33,
71 #[doc = "34 - No Description."]
72 PORTB_PORT = 34,
73 #[doc = "35 - No Description."]
74 PORTE_PORT = 35,
75 #[doc = "36 - No Description."]
76 TCB3_INT = 36,
77 #[doc = "37 - No Description."]
78 USART3_RXC = 37,
79 #[doc = "38 - No Description."]
80 USART3_DRE = 38,
81 #[doc = "39 - No Description."]
82 USART3_TXC = 39,
83}
84#[doc = r" TryFromInterruptError"]
85#[derive(Debug, Copy, Clone)]
86pub struct TryFromInterruptError(());
87impl Interrupt {
88 #[doc = r" Attempt to convert a given value into an `Interrupt`"]
89 #[inline]
90 pub fn try_from(value: u8) -> Result<Self, TryFromInterruptError> {
91 match value {
92 1 => Ok(Interrupt::CRCSCAN_NMI),
93 2 => Ok(Interrupt::BOD_VLM),
94 3 => Ok(Interrupt::RTC_CNT),
95 4 => Ok(Interrupt::RTC_PIT),
96 5 => Ok(Interrupt::CCL_CCL),
97 6 => Ok(Interrupt::PORTA_PORT),
98 7 => Ok(Interrupt::TCA0_LUNF_OVF),
99 8 => Ok(Interrupt::TCA0_HUNF),
100 9 => Ok(Interrupt::TCA0_CMP0_LCMP0),
101 10 => Ok(Interrupt::TCA0_CMP1_LCMP1),
102 11 => Ok(Interrupt::TCA0_CMP2_LCMP2),
103 12 => Ok(Interrupt::TCB0_INT),
104 13 => Ok(Interrupt::TCB1_INT),
105 14 => Ok(Interrupt::TWI0_TWIS),
106 15 => Ok(Interrupt::TWI0_TWIM),
107 16 => Ok(Interrupt::SPI0_INT),
108 17 => Ok(Interrupt::USART0_RXC),
109 18 => Ok(Interrupt::USART0_DRE),
110 19 => Ok(Interrupt::USART0_TXC),
111 20 => Ok(Interrupt::PORTD_PORT),
112 21 => Ok(Interrupt::AC0_AC),
113 22 => Ok(Interrupt::ADC0_RESRDY),
114 23 => Ok(Interrupt::ADC0_WCOMP),
115 24 => Ok(Interrupt::PORTC_PORT),
116 25 => Ok(Interrupt::TCB2_INT),
117 26 => Ok(Interrupt::USART1_RXC),
118 27 => Ok(Interrupt::USART1_DRE),
119 28 => Ok(Interrupt::USART1_TXC),
120 29 => Ok(Interrupt::PORTF_PORT),
121 30 => Ok(Interrupt::NVMCTRL_EE),
122 31 => Ok(Interrupt::USART2_RXC),
123 32 => Ok(Interrupt::USART2_DRE),
124 33 => Ok(Interrupt::USART2_TXC),
125 34 => Ok(Interrupt::PORTB_PORT),
126 35 => Ok(Interrupt::PORTE_PORT),
127 36 => Ok(Interrupt::TCB3_INT),
128 37 => Ok(Interrupt::USART3_RXC),
129 38 => Ok(Interrupt::USART3_DRE),
130 39 => Ok(Interrupt::USART3_TXC),
131 _ => Err(TryFromInterruptError(())),
132 }
133 }
134}