Module auadc

Source
Expand description

Analog-to-Digital or Pulse-Density audio input

Modules§

analog_0
Analog signal configuration 0
analog_1
Analog signal configuration 1
clock
Peripheral clock control register
command
Analog-to-Digital Converter commands
fifo_control
Controls audio input FIFO
fifo_data
Reads data from audio input FIFO
fifo_state
Gets states of audio input FIFO
finite_impulse
Finite Impulse Response control
high_pass
High-Pass Filter control register
interface_0
Interface control register 0
interface_1
Interface control register 1
pulse_width
Pulse-Width Modulator control
sample_data
Analog-to-Digital Converter sample output
volume
Volume control register

Structs§

RegisterBlock
Register block

Type Aliases§

ANALOG_0
analog_0 (rw) register accessor: Analog signal configuration 0
ANALOG_1
analog_1 (rw) register accessor: Analog signal configuration 1
CLOCK
clock (rw) register accessor: Peripheral clock control register
COMMAND
command (rw) register accessor: Analog-to-Digital Converter commands
FIFO_CONTROL
fifo_control (rw) register accessor: Controls audio input FIFO
FIFO_DATA
fifo_data (rw) register accessor: Reads data from audio input FIFO
FIFO_STATE
fifo_state (rw) register accessor: Gets states of audio input FIFO
FINITE_IMPULSE
finite_impulse (rw) register accessor: Finite Impulse Response control
HIGH_PASS
high_pass (rw) register accessor: High-Pass Filter control register
INTERFACE_0
interface_0 (rw) register accessor: Interface control register 0
INTERFACE_1
interface_1 (rw) register accessor: Interface control register 1
PULSE_WIDTH
pulse_width (rw) register accessor: Pulse-Width Modulator control
SAMPLE_DATA
sample_data (rw) register accessor: Analog-to-Digital Converter sample output
VOLUME
volume (rw) register accessor: Volume control register