Expand description
Pulse-Width or Digital-to-Analog audio output
Modules§
- clock
- Clock control register
- config
- Delta-Sigma and mixer control
- fifo_
control - Controls audio output FIFO
- fifo_
data - Writes data into audio output FIFO
- fifo_
state - Gets states of audio output FIFO
- state
- Peripheral state register
- volume_
0 - Volume control register 0
- volume_
1 - Volume control register 1
- zero_
signal - Zero signal detection
Structs§
- Register
Block - Register block
Type Aliases§
- CLOCK
- clock (rw) register accessor: Clock control register
- CONFIG
- config (rw) register accessor: Delta-Sigma and mixer control
- FIFO_
CONTROL - fifo_control (rw) register accessor: Controls audio output FIFO
- FIFO_
DATA - fifo_data (rw) register accessor: Writes data into audio output FIFO
- FIFO_
STATE - fifo_state (rw) register accessor: Gets states of audio output FIFO
- STATE
- state (rw) register accessor: Peripheral state register
- VOLUME_
0 - volume_0 (rw) register accessor: Volume control register 0
- VOLUME_
1 - volume_1 (rw) register accessor: Volume control register 1
- ZERO_
SIGNAL - zero_signal (rw) register accessor: Zero signal detection