Module fifo_config_0

FIFO configuration register 0

Re-exports

pub use RECEIVE_DMA_R as TRANSMIT_DMA_R;

pub use RECEIVE_DMA_W as TRANSMIT_DMA_W;

pub use RECEIVE_CLEAR_W as TRANSMIT_CLEAR_W;

pub use RECEIVE_OVERFLOW_R as TRANSMIT_OVERFLOW_R;

pub use RECEIVE_UNDERFLOW_R as TRANSMIT_UNDERFLOW_R;

Structs

FIFO_CONFIG_0_SPEC

FIFO configuration register 0

Enums

DMA_ENABLE_A

Enable signal of receive DMA interface

FLAG_CLEAR_AW

Clears receive FIFO overflow and underflow flags

HAS_OVERFLOW_A

Receive FIFO overflow flag

HAS_UNDERFLOW_A

Receive FIFO underflow flag

Type Aliases

R

Register fifo_config_0 reader

RECEIVE_CLEAR_W

Field receive_clear writer - Clears receive FIFO overflow and underflow flags

RECEIVE_DMA_R

Field receive_dma reader - Enable signal of receive DMA interface

RECEIVE_DMA_W

Field receive_dma writer - Enable signal of receive DMA interface

RECEIVE_OVERFLOW_R

Field receive_overflow reader - Receive FIFO overflow flag

RECEIVE_UNDERFLOW_R

Field receive_underflow reader - Receive FIFO underflow flag

W

Register fifo_config_0 writer