bl61x_pac/glb/
wifi_pll_config_0.rs

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
#[doc = "Register `wifi_pll_config_0` reader"]
pub type R = crate::R<WIFI_PLL_CONFIG_0_SPEC>;
#[doc = "Register `wifi_pll_config_0` writer"]
pub type W = crate::W<WIFI_PLL_CONFIG_0_SPEC>;
#[doc = "Field `wifipll_sdm_rstb` reader - "]
pub type WIFIPLL_SDM_RSTB_R = crate::BitReader;
#[doc = "Field `wifipll_sdm_rstb` writer - "]
pub type WIFIPLL_SDM_RSTB_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `wifipll_postdiv_rstb` reader - "]
pub type WIFIPLL_POSTDIV_RSTB_R = crate::BitReader;
#[doc = "Field `wifipll_postdiv_rstb` writer - "]
pub type WIFIPLL_POSTDIV_RSTB_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `wifipll_fbdv_rstb` reader - "]
pub type WIFIPLL_FBDV_RSTB_R = crate::BitReader;
#[doc = "Field `wifipll_fbdv_rstb` writer - "]
pub type WIFIPLL_FBDV_RSTB_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `wifipll_refdiv_rstb` reader - "]
pub type WIFIPLL_REFDIV_RSTB_R = crate::BitReader;
#[doc = "Field `wifipll_refdiv_rstb` writer - "]
pub type WIFIPLL_REFDIV_RSTB_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_clktree` reader - "]
pub type PU_WIFIPLL_CLKTREE_R = crate::BitReader;
#[doc = "Field `pu_wifipll_clktree` writer - "]
pub type PU_WIFIPLL_CLKTREE_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_postdiv` reader - "]
pub type PU_WIFIPLL_POSTDIV_R = crate::BitReader;
#[doc = "Field `pu_wifipll_postdiv` writer - "]
pub type PU_WIFIPLL_POSTDIV_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_fbdv` reader - "]
pub type PU_WIFIPLL_FBDV_R = crate::BitReader;
#[doc = "Field `pu_wifipll_fbdv` writer - "]
pub type PU_WIFIPLL_FBDV_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_clamp_op` reader - "]
pub type PU_WIFIPLL_CLAMP_OP_R = crate::BitReader;
#[doc = "Field `pu_wifipll_clamp_op` writer - "]
pub type PU_WIFIPLL_CLAMP_OP_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_pfd` reader - "]
pub type PU_WIFIPLL_PFD_R = crate::BitReader;
#[doc = "Field `pu_wifipll_pfd` writer - "]
pub type PU_WIFIPLL_PFD_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_cp` reader - "]
pub type PU_WIFIPLL_CP_R = crate::BitReader;
#[doc = "Field `pu_wifipll_cp` writer - "]
pub type PU_WIFIPLL_CP_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll_sfreg` reader - "]
pub type PU_WIFIPLL_SFREG_R = crate::BitReader;
#[doc = "Field `pu_wifipll_sfreg` writer - "]
pub type PU_WIFIPLL_SFREG_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `pu_wifipll` reader - "]
pub type PU_WIFIPLL_R = crate::BitReader;
#[doc = "Field `pu_wifipll` writer - "]
pub type PU_WIFIPLL_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 0"]
    #[inline(always)]
    pub fn wifipll_sdm_rstb(&self) -> WIFIPLL_SDM_RSTB_R {
        WIFIPLL_SDM_RSTB_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1"]
    #[inline(always)]
    pub fn wifipll_postdiv_rstb(&self) -> WIFIPLL_POSTDIV_RSTB_R {
        WIFIPLL_POSTDIV_RSTB_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2"]
    #[inline(always)]
    pub fn wifipll_fbdv_rstb(&self) -> WIFIPLL_FBDV_RSTB_R {
        WIFIPLL_FBDV_RSTB_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3"]
    #[inline(always)]
    pub fn wifipll_refdiv_rstb(&self) -> WIFIPLL_REFDIV_RSTB_R {
        WIFIPLL_REFDIV_RSTB_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4"]
    #[inline(always)]
    pub fn pu_wifipll_clktree(&self) -> PU_WIFIPLL_CLKTREE_R {
        PU_WIFIPLL_CLKTREE_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5"]
    #[inline(always)]
    pub fn pu_wifipll_postdiv(&self) -> PU_WIFIPLL_POSTDIV_R {
        PU_WIFIPLL_POSTDIV_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6"]
    #[inline(always)]
    pub fn pu_wifipll_fbdv(&self) -> PU_WIFIPLL_FBDV_R {
        PU_WIFIPLL_FBDV_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7"]
    #[inline(always)]
    pub fn pu_wifipll_clamp_op(&self) -> PU_WIFIPLL_CLAMP_OP_R {
        PU_WIFIPLL_CLAMP_OP_R::new(((self.bits >> 7) & 1) != 0)
    }
    #[doc = "Bit 8"]
    #[inline(always)]
    pub fn pu_wifipll_pfd(&self) -> PU_WIFIPLL_PFD_R {
        PU_WIFIPLL_PFD_R::new(((self.bits >> 8) & 1) != 0)
    }
    #[doc = "Bit 9"]
    #[inline(always)]
    pub fn pu_wifipll_cp(&self) -> PU_WIFIPLL_CP_R {
        PU_WIFIPLL_CP_R::new(((self.bits >> 9) & 1) != 0)
    }
    #[doc = "Bit 10"]
    #[inline(always)]
    pub fn pu_wifipll_sfreg(&self) -> PU_WIFIPLL_SFREG_R {
        PU_WIFIPLL_SFREG_R::new(((self.bits >> 10) & 1) != 0)
    }
    #[doc = "Bit 11"]
    #[inline(always)]
    pub fn pu_wifipll(&self) -> PU_WIFIPLL_R {
        PU_WIFIPLL_R::new(((self.bits >> 11) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0"]
    #[inline(always)]
    #[must_use]
    pub fn wifipll_sdm_rstb(&mut self) -> WIFIPLL_SDM_RSTB_W<WIFI_PLL_CONFIG_0_SPEC> {
        WIFIPLL_SDM_RSTB_W::new(self, 0)
    }
    #[doc = "Bit 1"]
    #[inline(always)]
    #[must_use]
    pub fn wifipll_postdiv_rstb(&mut self) -> WIFIPLL_POSTDIV_RSTB_W<WIFI_PLL_CONFIG_0_SPEC> {
        WIFIPLL_POSTDIV_RSTB_W::new(self, 1)
    }
    #[doc = "Bit 2"]
    #[inline(always)]
    #[must_use]
    pub fn wifipll_fbdv_rstb(&mut self) -> WIFIPLL_FBDV_RSTB_W<WIFI_PLL_CONFIG_0_SPEC> {
        WIFIPLL_FBDV_RSTB_W::new(self, 2)
    }
    #[doc = "Bit 3"]
    #[inline(always)]
    #[must_use]
    pub fn wifipll_refdiv_rstb(&mut self) -> WIFIPLL_REFDIV_RSTB_W<WIFI_PLL_CONFIG_0_SPEC> {
        WIFIPLL_REFDIV_RSTB_W::new(self, 3)
    }
    #[doc = "Bit 4"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_clktree(&mut self) -> PU_WIFIPLL_CLKTREE_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_CLKTREE_W::new(self, 4)
    }
    #[doc = "Bit 5"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_postdiv(&mut self) -> PU_WIFIPLL_POSTDIV_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_POSTDIV_W::new(self, 5)
    }
    #[doc = "Bit 6"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_fbdv(&mut self) -> PU_WIFIPLL_FBDV_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_FBDV_W::new(self, 6)
    }
    #[doc = "Bit 7"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_clamp_op(&mut self) -> PU_WIFIPLL_CLAMP_OP_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_CLAMP_OP_W::new(self, 7)
    }
    #[doc = "Bit 8"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_pfd(&mut self) -> PU_WIFIPLL_PFD_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_PFD_W::new(self, 8)
    }
    #[doc = "Bit 9"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_cp(&mut self) -> PU_WIFIPLL_CP_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_CP_W::new(self, 9)
    }
    #[doc = "Bit 10"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll_sfreg(&mut self) -> PU_WIFIPLL_SFREG_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_SFREG_W::new(self, 10)
    }
    #[doc = "Bit 11"]
    #[inline(always)]
    #[must_use]
    pub fn pu_wifipll(&mut self) -> PU_WIFIPLL_W<WIFI_PLL_CONFIG_0_SPEC> {
        PU_WIFIPLL_W::new(self, 11)
    }
    #[doc = r" Writes raw bits to the register."]
    #[doc = r""]
    #[doc = r" # Safety"]
    #[doc = r""]
    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
}
#[doc = "Wireless Fidelity Phase-Locked Loop configuration 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wifi_pll_config_0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wifi_pll_config_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct WIFI_PLL_CONFIG_0_SPEC;
impl crate::RegisterSpec for WIFI_PLL_CONFIG_0_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`wifi_pll_config_0::R`](R) reader structure"]
impl crate::Readable for WIFI_PLL_CONFIG_0_SPEC {}
#[doc = "`write(|w| ..)` method takes [`wifi_pll_config_0::W`](W) writer structure"]
impl crate::Writable for WIFI_PLL_CONFIG_0_SPEC {
    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets wifi_pll_config_0 to value 0"]
impl crate::Resettable for WIFI_PLL_CONFIG_0_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}