bl61x_pac/glb/
swrst_cfg0.rs#[doc = "Register `swrst_cfg0` reader"]
pub type R = crate::R<SWRST_CFG0_SPEC>;
#[doc = "Register `swrst_cfg0` writer"]
pub type W = crate::W<SWRST_CFG0_SPEC>;
#[doc = "Field `swrst_s00` reader - "]
pub type SWRST_S00_R = crate::BitReader;
#[doc = "Field `swrst_s00` writer - "]
pub type SWRST_S00_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s01` reader - "]
pub type SWRST_S01_R = crate::BitReader;
#[doc = "Field `swrst_s01` writer - "]
pub type SWRST_S01_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s20` reader - "]
pub type SWRST_S20_R = crate::BitReader;
#[doc = "Field `swrst_s20` writer - "]
pub type SWRST_S20_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s30` reader - "]
pub type SWRST_S30_R = crate::BitReader;
#[doc = "Field `swrst_s30` writer - "]
pub type SWRST_S30_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s31` reader - "]
pub type SWRST_S31_R = crate::BitReader;
#[doc = "Field `swrst_s31` writer - "]
pub type SWRST_S31_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s32` reader - "]
pub type SWRST_S32_R = crate::BitReader;
#[doc = "Field `swrst_s32` writer - "]
pub type SWRST_S32_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s33` reader - "]
pub type SWRST_S33_R = crate::BitReader;
#[doc = "Field `swrst_s33` writer - "]
pub type SWRST_S33_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_emi_misc` reader - "]
pub type SWRST_S1_EXT_EMI_MISC_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_emi_misc` writer - "]
pub type SWRST_S1_EXT_EMI_MISC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_psram0_ctrl` reader - "]
pub type SWRST_S1_EXT_PSRAM0_CTRL_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_psram0_ctrl` writer - "]
pub type SWRST_S1_EXT_PSRAM0_CTRL_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_psram1_ctrl` reader - "]
pub type SWRST_S1_EXT_PSRAM1_CTRL_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_psram1_ctrl` writer - "]
pub type SWRST_S1_EXT_PSRAM1_CTRL_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_usb` reader - "]
pub type SWRST_S1_EXT_USB_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_usb` writer - "]
pub type SWRST_S1_EXT_USB_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_mix2` reader - "]
pub type SWRST_S1_EXT_MIX2_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_mix2` writer - "]
pub type SWRST_S1_EXT_MIX2_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_audio` reader - "]
pub type SWRST_S1_EXT_AUDIO_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_audio` writer - "]
pub type SWRST_S1_EXT_AUDIO_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_sdh` reader - "]
pub type SWRST_S1_EXT_SDH_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_sdh` writer - "]
pub type SWRST_S1_EXT_SDH_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_emac` reader - "]
pub type SWRST_S1_EXT_EMAC_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_emac` writer - "]
pub type SWRST_S1_EXT_EMAC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_dma2` reader - "]
pub type SWRST_S1_EXT_DMA2_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_dma2` writer - "]
pub type SWRST_S1_EXT_DMA2_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_d2xA` reader - "]
pub type SWRST_D2X_A_R = crate::BitReader;
#[doc = "Field `swrst_d2xA` writer - "]
pub type SWRST_D2X_A_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_d2xB` reader - "]
pub type SWRST_D2X_B_R = crate::BitReader;
#[doc = "Field `swrst_d2xB` writer - "]
pub type SWRST_D2X_B_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_jenc` reader - "]
pub type SWRST_JENC_R = crate::BitReader;
#[doc = "Field `swrst_jenc` writer - "]
pub type SWRST_JENC_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `swrst_s1_ext_pio` reader - "]
pub type SWRST_S1_EXT_PIO_R = crate::BitReader;
#[doc = "Field `swrst_s1_ext_pio` writer - "]
pub type SWRST_S1_EXT_PIO_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0"]
#[inline(always)]
pub fn swrst_s00(&self) -> SWRST_S00_R {
SWRST_S00_R::new((self.bits & 1) != 0)
}
#[doc = "Bit 1"]
#[inline(always)]
pub fn swrst_s01(&self) -> SWRST_S01_R {
SWRST_S01_R::new(((self.bits >> 1) & 1) != 0)
}
#[doc = "Bit 4"]
#[inline(always)]
pub fn swrst_s20(&self) -> SWRST_S20_R {
SWRST_S20_R::new(((self.bits >> 4) & 1) != 0)
}
#[doc = "Bit 8"]
#[inline(always)]
pub fn swrst_s30(&self) -> SWRST_S30_R {
SWRST_S30_R::new(((self.bits >> 8) & 1) != 0)
}
#[doc = "Bit 9"]
#[inline(always)]
pub fn swrst_s31(&self) -> SWRST_S31_R {
SWRST_S31_R::new(((self.bits >> 9) & 1) != 0)
}
#[doc = "Bit 10"]
#[inline(always)]
pub fn swrst_s32(&self) -> SWRST_S32_R {
SWRST_S32_R::new(((self.bits >> 10) & 1) != 0)
}
#[doc = "Bit 11"]
#[inline(always)]
pub fn swrst_s33(&self) -> SWRST_S33_R {
SWRST_S33_R::new(((self.bits >> 11) & 1) != 0)
}
#[doc = "Bit 16"]
#[inline(always)]
pub fn swrst_s1_ext_emi_misc(&self) -> SWRST_S1_EXT_EMI_MISC_R {
SWRST_S1_EXT_EMI_MISC_R::new(((self.bits >> 16) & 1) != 0)
}
#[doc = "Bit 17"]
#[inline(always)]
pub fn swrst_s1_ext_psram0_ctrl(&self) -> SWRST_S1_EXT_PSRAM0_CTRL_R {
SWRST_S1_EXT_PSRAM0_CTRL_R::new(((self.bits >> 17) & 1) != 0)
}
#[doc = "Bit 18"]
#[inline(always)]
pub fn swrst_s1_ext_psram1_ctrl(&self) -> SWRST_S1_EXT_PSRAM1_CTRL_R {
SWRST_S1_EXT_PSRAM1_CTRL_R::new(((self.bits >> 18) & 1) != 0)
}
#[doc = "Bit 19"]
#[inline(always)]
pub fn swrst_s1_ext_usb(&self) -> SWRST_S1_EXT_USB_R {
SWRST_S1_EXT_USB_R::new(((self.bits >> 19) & 1) != 0)
}
#[doc = "Bit 20"]
#[inline(always)]
pub fn swrst_s1_ext_mix2(&self) -> SWRST_S1_EXT_MIX2_R {
SWRST_S1_EXT_MIX2_R::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bit 21"]
#[inline(always)]
pub fn swrst_s1_ext_audio(&self) -> SWRST_S1_EXT_AUDIO_R {
SWRST_S1_EXT_AUDIO_R::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 22"]
#[inline(always)]
pub fn swrst_s1_ext_sdh(&self) -> SWRST_S1_EXT_SDH_R {
SWRST_S1_EXT_SDH_R::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 23"]
#[inline(always)]
pub fn swrst_s1_ext_emac(&self) -> SWRST_S1_EXT_EMAC_R {
SWRST_S1_EXT_EMAC_R::new(((self.bits >> 23) & 1) != 0)
}
#[doc = "Bit 24"]
#[inline(always)]
pub fn swrst_s1_ext_dma2(&self) -> SWRST_S1_EXT_DMA2_R {
SWRST_S1_EXT_DMA2_R::new(((self.bits >> 24) & 1) != 0)
}
#[doc = "Bit 25"]
#[inline(always)]
pub fn swrst_d2x_a(&self) -> SWRST_D2X_A_R {
SWRST_D2X_A_R::new(((self.bits >> 25) & 1) != 0)
}
#[doc = "Bit 26"]
#[inline(always)]
pub fn swrst_d2x_b(&self) -> SWRST_D2X_B_R {
SWRST_D2X_B_R::new(((self.bits >> 26) & 1) != 0)
}
#[doc = "Bit 27"]
#[inline(always)]
pub fn swrst_jenc(&self) -> SWRST_JENC_R {
SWRST_JENC_R::new(((self.bits >> 27) & 1) != 0)
}
#[doc = "Bit 28"]
#[inline(always)]
pub fn swrst_s1_ext_pio(&self) -> SWRST_S1_EXT_PIO_R {
SWRST_S1_EXT_PIO_R::new(((self.bits >> 28) & 1) != 0)
}
}
impl W {
#[doc = "Bit 0"]
#[inline(always)]
#[must_use]
pub fn swrst_s00(&mut self) -> SWRST_S00_W<SWRST_CFG0_SPEC> {
SWRST_S00_W::new(self, 0)
}
#[doc = "Bit 1"]
#[inline(always)]
#[must_use]
pub fn swrst_s01(&mut self) -> SWRST_S01_W<SWRST_CFG0_SPEC> {
SWRST_S01_W::new(self, 1)
}
#[doc = "Bit 4"]
#[inline(always)]
#[must_use]
pub fn swrst_s20(&mut self) -> SWRST_S20_W<SWRST_CFG0_SPEC> {
SWRST_S20_W::new(self, 4)
}
#[doc = "Bit 8"]
#[inline(always)]
#[must_use]
pub fn swrst_s30(&mut self) -> SWRST_S30_W<SWRST_CFG0_SPEC> {
SWRST_S30_W::new(self, 8)
}
#[doc = "Bit 9"]
#[inline(always)]
#[must_use]
pub fn swrst_s31(&mut self) -> SWRST_S31_W<SWRST_CFG0_SPEC> {
SWRST_S31_W::new(self, 9)
}
#[doc = "Bit 10"]
#[inline(always)]
#[must_use]
pub fn swrst_s32(&mut self) -> SWRST_S32_W<SWRST_CFG0_SPEC> {
SWRST_S32_W::new(self, 10)
}
#[doc = "Bit 11"]
#[inline(always)]
#[must_use]
pub fn swrst_s33(&mut self) -> SWRST_S33_W<SWRST_CFG0_SPEC> {
SWRST_S33_W::new(self, 11)
}
#[doc = "Bit 16"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_emi_misc(&mut self) -> SWRST_S1_EXT_EMI_MISC_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_EMI_MISC_W::new(self, 16)
}
#[doc = "Bit 17"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_psram0_ctrl(&mut self) -> SWRST_S1_EXT_PSRAM0_CTRL_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_PSRAM0_CTRL_W::new(self, 17)
}
#[doc = "Bit 18"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_psram1_ctrl(&mut self) -> SWRST_S1_EXT_PSRAM1_CTRL_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_PSRAM1_CTRL_W::new(self, 18)
}
#[doc = "Bit 19"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_usb(&mut self) -> SWRST_S1_EXT_USB_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_USB_W::new(self, 19)
}
#[doc = "Bit 20"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_mix2(&mut self) -> SWRST_S1_EXT_MIX2_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_MIX2_W::new(self, 20)
}
#[doc = "Bit 21"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_audio(&mut self) -> SWRST_S1_EXT_AUDIO_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_AUDIO_W::new(self, 21)
}
#[doc = "Bit 22"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_sdh(&mut self) -> SWRST_S1_EXT_SDH_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_SDH_W::new(self, 22)
}
#[doc = "Bit 23"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_emac(&mut self) -> SWRST_S1_EXT_EMAC_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_EMAC_W::new(self, 23)
}
#[doc = "Bit 24"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_dma2(&mut self) -> SWRST_S1_EXT_DMA2_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_DMA2_W::new(self, 24)
}
#[doc = "Bit 25"]
#[inline(always)]
#[must_use]
pub fn swrst_d2x_a(&mut self) -> SWRST_D2X_A_W<SWRST_CFG0_SPEC> {
SWRST_D2X_A_W::new(self, 25)
}
#[doc = "Bit 26"]
#[inline(always)]
#[must_use]
pub fn swrst_d2x_b(&mut self) -> SWRST_D2X_B_W<SWRST_CFG0_SPEC> {
SWRST_D2X_B_W::new(self, 26)
}
#[doc = "Bit 27"]
#[inline(always)]
#[must_use]
pub fn swrst_jenc(&mut self) -> SWRST_JENC_W<SWRST_CFG0_SPEC> {
SWRST_JENC_W::new(self, 27)
}
#[doc = "Bit 28"]
#[inline(always)]
#[must_use]
pub fn swrst_s1_ext_pio(&mut self) -> SWRST_S1_EXT_PIO_W<SWRST_CFG0_SPEC> {
SWRST_S1_EXT_PIO_W::new(self, 28)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
#[doc = r" # Safety"]
#[doc = r""]
#[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
}
#[doc = "swrst_s1_ext + swrst_s3 + swrst_s2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`swrst_cfg0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`swrst_cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct SWRST_CFG0_SPEC;
impl crate::RegisterSpec for SWRST_CFG0_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [`swrst_cfg0::R`](R) reader structure"]
impl crate::Readable for SWRST_CFG0_SPEC {}
#[doc = "`write(|w| ..)` method takes [`swrst_cfg0::W`](W) writer structure"]
impl crate::Writable for SWRST_CFG0_SPEC {
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
}
#[doc = "`reset()` method sets swrst_cfg0 to value 0"]
impl crate::Resettable for SWRST_CFG0_SPEC {
const RESET_VALUE: Self::Ux = 0;
}