Constants§
- ARM_
REG_ APSR - ARM_
REG_ APSR_ NZCV - ARM_
REG_ CPSR - ARM_
REG_ D0 - ARM_
REG_ D1 - ARM_
REG_ D2 - ARM_
REG_ D3 - ARM_
REG_ D4 - ARM_
REG_ D5 - ARM_
REG_ D6 - ARM_
REG_ D7 - ARM_
REG_ D8 - ARM_
REG_ D9 - ARM_
REG_ D10 - ARM_
REG_ D11 - ARM_
REG_ D12 - ARM_
REG_ D13 - ARM_
REG_ D14 - ARM_
REG_ D15 - ARM_
REG_ D16 - ARM_
REG_ D17 - ARM_
REG_ D18 - ARM_
REG_ D19 - ARM_
REG_ D20 - ARM_
REG_ D21 - ARM_
REG_ D22 - ARM_
REG_ D23 - ARM_
REG_ D24 - ARM_
REG_ D25 - ARM_
REG_ D26 - ARM_
REG_ D27 - ARM_
REG_ D28 - ARM_
REG_ D29 - ARM_
REG_ D30 - ARM_
REG_ D31 - ARM_
REG_ ENDING - ARM_
REG_ FP - ARM_
REG_ FPEXC - ARM_
REG_ FPINST - ARM_
REG_ FPINS T2 - ARM_
REG_ FPSCR - ARM_
REG_ FPSCR_ NZCV - ARM_
REG_ FPSID - ARM_
REG_ INVALID - ARM_
REG_ IP - ARM_
REG_ ITSTATE - ARM_
REG_ LR - ARM_
REG_ MVFR0 - ARM_
REG_ MVFR1 - ARM_
REG_ MVFR2 - ARM_
REG_ PC - ARM_
REG_ Q0 - ARM_
REG_ Q1 - ARM_
REG_ Q2 - ARM_
REG_ Q3 - ARM_
REG_ Q4 - ARM_
REG_ Q5 - ARM_
REG_ Q6 - ARM_
REG_ Q7 - ARM_
REG_ Q8 - ARM_
REG_ Q9 - ARM_
REG_ Q10 - ARM_
REG_ Q11 - ARM_
REG_ Q12 - ARM_
REG_ Q13 - ARM_
REG_ Q14 - ARM_
REG_ Q15 - ARM_
REG_ R0 - ARM_
REG_ R1 - ARM_
REG_ R2 - ARM_
REG_ R3 - ARM_
REG_ R4 - ARM_
REG_ R5 - ARM_
REG_ R6 - ARM_
REG_ R7 - ARM_
REG_ R8 - ARM_
REG_ R9 - ARM_
REG_ R10 - ARM_
REG_ R11 - ARM_
REG_ R12 - ARM_
REG_ R13 - ARM_
REG_ R14 - ARM_
REG_ R15 - ARM_
REG_ S0 - ARM_
REG_ S1 - ARM_
REG_ S2 - ARM_
REG_ S3 - ARM_
REG_ S4 - ARM_
REG_ S5 - ARM_
REG_ S6 - ARM_
REG_ S7 - ARM_
REG_ S8 - ARM_
REG_ S9 - ARM_
REG_ S10 - ARM_
REG_ S11 - ARM_
REG_ S12 - ARM_
REG_ S13 - ARM_
REG_ S14 - ARM_
REG_ S15 - ARM_
REG_ S16 - ARM_
REG_ S17 - ARM_
REG_ S18 - ARM_
REG_ S19 - ARM_
REG_ S20 - ARM_
REG_ S21 - ARM_
REG_ S22 - ARM_
REG_ S23 - ARM_
REG_ S24 - ARM_
REG_ S25 - ARM_
REG_ S26 - ARM_
REG_ S27 - ARM_
REG_ S28 - ARM_
REG_ S29 - ARM_
REG_ S30 - ARM_
REG_ S31 - ARM_
REG_ SB - ARM_
REG_ SL - ARM_
REG_ SP - ARM_
REG_ SPSR
Type Aliases§
- Type
- ARM registers