Available on crate feature
arm64 only.Expand description
AArch64 ISA definitions: instruction arguments.
Structs§
- Shift
OpAnd Amt - A shift operator with an amount, guaranteed to be within range.
- Shift
OpShift Imm - A shift operator amount.
Enums§
- Branch
Target - A branch target. Either unresolved (basic-block index) or resolved (offset from end of current instruction).
- Cond
- Condition for conditional branches.
- Cond
BrKind - The kind of conditional branch: the common-case-optimized “reg-is-zero” / “reg-is-nonzero” variants, or the generic one that tests the machine condition codes.
- Extend
Op - An extend operator for a register.
- MemLabel
- A reference to some memory address.
- Operand
Size - Type used to communicate the operand size of a machine instruction, as AArch64 has 32- and 64-bit variants of many instructions (and integer registers).
- PairA
Mode - Internal type PairAMode: defined at src/isa/aarch64/inst.isle line 1242.
- Scalar
Size - Type used to communicate the size of a scalar SIMD & FP operand.
- ShiftOp
- A shift operator for a register or immediate.
- Test
BitAnd Branch Kind - Internal type TestBitAndBranchKind: defined at src/isa/aarch64/inst.isle line 1266.
- Vector
Size - Type used to communicate the size of a vector operand.