cranelift_codegen/isa/aarch64/
mod.rs

1//! ARM 64-bit Instruction Set Architecture.
2
3use crate::dominator_tree::DominatorTree;
4use crate::ir::{self, Function, Type};
5use crate::isa::aarch64::settings as aarch64_settings;
6#[cfg(feature = "unwind")]
7use crate::isa::unwind::systemv;
8use crate::isa::{Builder as IsaBuilder, FunctionAlignment, TargetIsa};
9use crate::machinst::{
10    compile, CompiledCode, CompiledCodeStencil, MachInst, MachTextSectionBuilder, Reg, SigSet,
11    TextSectionBuilder, VCode,
12};
13use crate::result::CodegenResult;
14use crate::settings as shared_settings;
15use alloc::{boxed::Box, vec::Vec};
16use core::fmt;
17use cranelift_control::ControlPlane;
18use std::string::String;
19use target_lexicon::{Aarch64Architecture, Architecture, OperatingSystem, Triple};
20
21// New backend:
22mod abi;
23pub mod inst;
24mod lower;
25mod pcc;
26pub mod settings;
27
28use self::inst::EmitInfo;
29
30/// An AArch64 backend.
31pub struct AArch64Backend {
32    triple: Triple,
33    flags: shared_settings::Flags,
34    isa_flags: aarch64_settings::Flags,
35}
36
37impl AArch64Backend {
38    /// Create a new AArch64 backend with the given (shared) flags.
39    pub fn new_with_flags(
40        triple: Triple,
41        flags: shared_settings::Flags,
42        isa_flags: aarch64_settings::Flags,
43    ) -> AArch64Backend {
44        AArch64Backend {
45            triple,
46            flags,
47            isa_flags,
48        }
49    }
50
51    /// This performs lowering to VCode, register-allocates the code, computes block layout and
52    /// finalizes branches. The result is ready for binary emission.
53    fn compile_vcode(
54        &self,
55        func: &Function,
56        domtree: &DominatorTree,
57        ctrl_plane: &mut ControlPlane,
58    ) -> CodegenResult<(VCode<inst::Inst>, regalloc2::Output)> {
59        let emit_info = EmitInfo::new(self.flags.clone());
60        let sigs = SigSet::new::<abi::AArch64MachineDeps>(func, &self.flags)?;
61        let abi = abi::AArch64Callee::new(func, self, &self.isa_flags, &sigs)?;
62        compile::compile::<AArch64Backend>(func, domtree, self, abi, emit_info, sigs, ctrl_plane)
63    }
64}
65
66impl TargetIsa for AArch64Backend {
67    fn compile_function(
68        &self,
69        func: &Function,
70        domtree: &DominatorTree,
71        want_disasm: bool,
72        ctrl_plane: &mut ControlPlane,
73    ) -> CodegenResult<CompiledCodeStencil> {
74        let (vcode, regalloc_result) = self.compile_vcode(func, domtree, ctrl_plane)?;
75
76        let emit_result = vcode.emit(&regalloc_result, want_disasm, &self.flags, ctrl_plane);
77        let frame_size = emit_result.frame_size;
78        let value_labels_ranges = emit_result.value_labels_ranges;
79        let buffer = emit_result.buffer;
80        let sized_stackslot_offsets = emit_result.sized_stackslot_offsets;
81        let dynamic_stackslot_offsets = emit_result.dynamic_stackslot_offsets;
82
83        if let Some(disasm) = emit_result.disasm.as_ref() {
84            log::debug!("disassembly:\n{}", disasm);
85        }
86
87        Ok(CompiledCodeStencil {
88            buffer,
89            frame_size,
90            vcode: emit_result.disasm,
91            value_labels_ranges,
92            sized_stackslot_offsets,
93            dynamic_stackslot_offsets,
94            bb_starts: emit_result.bb_offsets,
95            bb_edges: emit_result.bb_edges,
96        })
97    }
98
99    fn name(&self) -> &'static str {
100        "aarch64"
101    }
102
103    fn triple(&self) -> &Triple {
104        &self.triple
105    }
106
107    fn flags(&self) -> &shared_settings::Flags {
108        &self.flags
109    }
110
111    fn isa_flags(&self) -> Vec<shared_settings::Value> {
112        self.isa_flags.iter().collect()
113    }
114
115    fn is_branch_protection_enabled(&self) -> bool {
116        self.isa_flags.use_bti()
117    }
118
119    fn dynamic_vector_bytes(&self, _dyn_ty: Type) -> u32 {
120        16
121    }
122
123    #[cfg(feature = "unwind")]
124    fn emit_unwind_info(
125        &self,
126        result: &CompiledCode,
127        kind: crate::isa::unwind::UnwindInfoKind,
128    ) -> CodegenResult<Option<crate::isa::unwind::UnwindInfo>> {
129        use crate::isa::unwind::UnwindInfo;
130        use crate::isa::unwind::UnwindInfoKind;
131        Ok(match kind {
132            UnwindInfoKind::SystemV => {
133                let mapper = self::inst::unwind::systemv::RegisterMapper;
134                Some(UnwindInfo::SystemV(
135                    crate::isa::unwind::systemv::create_unwind_info_from_insts(
136                        &result.buffer.unwind_info[..],
137                        result.buffer.data().len(),
138                        &mapper,
139                    )?,
140                ))
141            }
142            UnwindInfoKind::Windows => Some(UnwindInfo::WindowsArm64(
143                crate::isa::unwind::winarm64::create_unwind_info_from_insts(
144                    &result.buffer.unwind_info[..],
145                )?,
146            )),
147            _ => None,
148        })
149    }
150
151    #[cfg(feature = "unwind")]
152    fn create_systemv_cie(&self) -> Option<gimli::write::CommonInformationEntry> {
153        let is_apple_os = match self.triple.operating_system {
154            OperatingSystem::Darwin(_)
155            | OperatingSystem::IOS(_)
156            | OperatingSystem::MacOSX { .. }
157            | OperatingSystem::TvOS(_) => true,
158            _ => false,
159        };
160
161        if self.isa_flags.sign_return_address()
162            && self.isa_flags.sign_return_address_with_bkey()
163            && !is_apple_os
164        {
165            unimplemented!("Specifying that the B key is used with pointer authentication instructions in the CIE is not implemented.");
166        }
167
168        Some(inst::unwind::systemv::create_cie())
169    }
170
171    fn text_section_builder(&self, num_funcs: usize) -> Box<dyn TextSectionBuilder> {
172        Box::new(MachTextSectionBuilder::<inst::Inst>::new(num_funcs))
173    }
174
175    #[cfg(feature = "unwind")]
176    fn map_regalloc_reg_to_dwarf(&self, reg: Reg) -> Result<u16, systemv::RegisterMappingError> {
177        inst::unwind::systemv::map_reg(reg).map(|reg| reg.0)
178    }
179
180    fn function_alignment(&self) -> FunctionAlignment {
181        inst::Inst::function_alignment()
182    }
183
184    fn page_size_align_log2(&self) -> u8 {
185        use target_lexicon::*;
186        match self.triple().operating_system {
187            OperatingSystem::MacOSX { .. }
188            | OperatingSystem::Darwin(_)
189            | OperatingSystem::IOS(_)
190            | OperatingSystem::TvOS(_) => {
191                debug_assert_eq!(1 << 14, 0x4000);
192                14
193            }
194            _ => {
195                debug_assert_eq!(1 << 16, 0x10000);
196                16
197            }
198        }
199    }
200
201    #[cfg(feature = "disas")]
202    fn to_capstone(&self) -> Result<capstone::Capstone, capstone::Error> {
203        use capstone::prelude::*;
204        let mut cs = Capstone::new()
205            .arm64()
206            .mode(arch::arm64::ArchMode::Arm)
207            .detail(true)
208            .build()?;
209        // AArch64 uses inline constants rather than a separate constant pool right now.
210        // Without this option, Capstone will stop disassembling as soon as it sees
211        // an inline constant that is not also a valid instruction. With this option,
212        // Capstone will print a `.byte` directive with the bytes of the inline constant
213        // and continue to the next instruction.
214        cs.set_skipdata(true)?;
215        Ok(cs)
216    }
217
218    fn pretty_print_reg(&self, reg: Reg, _size: u8) -> String {
219        inst::regs::pretty_print_reg(reg)
220    }
221
222    fn has_native_fma(&self) -> bool {
223        true
224    }
225
226    fn has_x86_blendv_lowering(&self, _: Type) -> bool {
227        false
228    }
229
230    fn has_x86_pshufb_lowering(&self) -> bool {
231        false
232    }
233
234    fn has_x86_pmulhrsw_lowering(&self) -> bool {
235        false
236    }
237
238    fn has_x86_pmaddubsw_lowering(&self) -> bool {
239        false
240    }
241
242    fn default_argument_extension(&self) -> ir::ArgumentExtension {
243        // This is copied/carried over from a historical piece of code in
244        // Wasmtime:
245        //
246        // https://github.com/bytecodealliance/wasmtime/blob/a018a5a9addb77d5998021a0150192aa955c71bf/crates/cranelift/src/lib.rs#L366-L374
247        //
248        // Whether or not it is still applicable here is unsure, but it's left
249        // the same as-is for now to reduce the likelihood of problems arising.
250        ir::ArgumentExtension::Uext
251    }
252}
253
254impl fmt::Display for AArch64Backend {
255    fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
256        f.debug_struct("MachBackend")
257            .field("name", &self.name())
258            .field("triple", &self.triple())
259            .field("flags", &format!("{}", self.flags()))
260            .finish()
261    }
262}
263
264/// Create a new `isa::Builder`.
265pub fn isa_builder(triple: Triple) -> IsaBuilder {
266    assert!(triple.architecture == Architecture::Aarch64(Aarch64Architecture::Aarch64));
267    IsaBuilder {
268        triple,
269        setup: aarch64_settings::builder(),
270        constructor: |triple, shared_flags, builder| {
271            let isa_flags = aarch64_settings::Flags::new(&shared_flags, builder);
272            let backend = AArch64Backend::new_with_flags(triple, shared_flags, isa_flags);
273            Ok(backend.wrapped())
274        },
275    }
276}
cranelift_codegen/isa/aarch64/mod.rs

cranelift_codegen/isa/aarch64/
mod.rs
