Module etk_ops::london

source ·
Expand description

Instructions available in the London hard fork.

Structs

  • Representation of the add instruction.
  • Representation of the addmod instruction.
  • Representation of the address instruction.
  • Representation of the and instruction.
  • Representation of the balance instruction.
  • Representation of the basefee instruction.
  • Representation of the blockhash instruction.
  • Representation of the byte instruction.
  • Representation of the call instruction.
  • Representation of the callcode instruction.
  • Representation of the calldatacopy instruction.
  • Representation of the calldataload instruction.
  • Representation of the calldatasize instruction.
  • Representation of the callvalue instruction.
  • Representation of the caller instruction.
  • Representation of the chainid instruction.
  • Representation of the codecopy instruction.
  • Representation of the codesize instruction.
  • Representation of the coinbase instruction.
  • Representation of the create instruction.
  • Representation of the create2 instruction.
  • Representation of the delegatecall instruction.
  • Representation of the difficulty instruction.
  • Representation of the div instruction.
  • Representation of the dup1 instruction.
  • Representation of the dup2 instruction.
  • Representation of the dup3 instruction.
  • Representation of the dup4 instruction.
  • Representation of the dup5 instruction.
  • Representation of the dup6 instruction.
  • Representation of the dup7 instruction.
  • Representation of the dup8 instruction.
  • Representation of the dup9 instruction.
  • Representation of the dup10 instruction.
  • Representation of the dup11 instruction.
  • Representation of the dup12 instruction.
  • Representation of the dup13 instruction.
  • Representation of the dup14 instruction.
  • Representation of the dup15 instruction.
  • Representation of the dup16 instruction.
  • Representation of the eq instruction.
  • Representation of the exp instruction.
  • Representation of the extcodecopy instruction.
  • Representation of the extcodehash instruction.
  • Representation of the extcodesize instruction.
  • Representation of the gas instruction.
  • Representation of the gaslimit instruction.
  • Representation of the gasprice instruction.
  • Representation of the pc instruction.
  • Representation of the gt instruction.
  • Representation of the invalid instruction.
  • Representation of the invalid_0c instruction.
  • Representation of the invalid_0d instruction.
  • Representation of the invalid_0e instruction.
  • Representation of the invalid_0f instruction.
  • Representation of the invalid_1e instruction.
  • Representation of the invalid_1f instruction.
  • Representation of the invalid_2a instruction.
  • Representation of the invalid_2b instruction.
  • Representation of the invalid_2c instruction.
  • Representation of the invalid_2d instruction.
  • Representation of the invalid_2e instruction.
  • Representation of the invalid_2f instruction.
  • Representation of the invalid_4a instruction.
  • Representation of the invalid_4b instruction.
  • Representation of the invalid_4c instruction.
  • Representation of the invalid_4d instruction.
  • Representation of the invalid_4e instruction.
  • Representation of the invalid_4f instruction.
  • Representation of the invalid_5c instruction.
  • Representation of the invalid_5d instruction.
  • Representation of the invalid_5e instruction.
  • Representation of the invalid_5f instruction.
  • Representation of the invalid_21 instruction.
  • Representation of the invalid_22 instruction.
  • Representation of the invalid_23 instruction.
  • Representation of the invalid_24 instruction.
  • Representation of the invalid_25 instruction.
  • Representation of the invalid_26 instruction.
  • Representation of the invalid_27 instruction.
  • Representation of the invalid_28 instruction.
  • Representation of the invalid_29 instruction.
  • Representation of the invalid_49 instruction.
  • Representation of the invalid_a5 instruction.
  • Representation of the invalid_a6 instruction.
  • Representation of the invalid_a7 instruction.
  • Representation of the invalid_a8 instruction.
  • Representation of the invalid_a9 instruction.
  • Representation of the invalid_aa instruction.
  • Representation of the invalid_ab instruction.
  • Representation of the invalid_ac instruction.
  • Representation of the invalid_ad instruction.
  • Representation of the invalid_ae instruction.
  • Representation of the invalid_af instruction.
  • Representation of the invalid_b0 instruction.
  • Representation of the invalid_b1 instruction.
  • Representation of the invalid_b2 instruction.
  • Representation of the invalid_b3 instruction.
  • Representation of the invalid_b4 instruction.
  • Representation of the invalid_b5 instruction.
  • Representation of the invalid_b6 instruction.
  • Representation of the invalid_b7 instruction.
  • Representation of the invalid_b8 instruction.
  • Representation of the invalid_b9 instruction.
  • Representation of the invalid_ba instruction.
  • Representation of the invalid_bb instruction.
  • Representation of the invalid_bc instruction.
  • Representation of the invalid_bd instruction.
  • Representation of the invalid_be instruction.
  • Representation of the invalid_bf instruction.
  • Representation of the invalid_c0 instruction.
  • Representation of the invalid_c1 instruction.
  • Representation of the invalid_c2 instruction.
  • Representation of the invalid_c3 instruction.
  • Representation of the invalid_c4 instruction.
  • Representation of the invalid_c5 instruction.
  • Representation of the invalid_c6 instruction.
  • Representation of the invalid_c7 instruction.
  • Representation of the invalid_c8 instruction.
  • Representation of the invalid_c9 instruction.
  • Representation of the invalid_ca instruction.
  • Representation of the invalid_cb instruction.
  • Representation of the invalid_cc instruction.
  • Representation of the invalid_cd instruction.
  • Representation of the invalid_ce instruction.
  • Representation of the invalid_cf instruction.
  • Representation of the invalid_d0 instruction.
  • Representation of the invalid_d1 instruction.
  • Representation of the invalid_d2 instruction.
  • Representation of the invalid_d3 instruction.
  • Representation of the invalid_d4 instruction.
  • Representation of the invalid_d5 instruction.
  • Representation of the invalid_d6 instruction.
  • Representation of the invalid_d7 instruction.
  • Representation of the invalid_d8 instruction.
  • Representation of the invalid_d9 instruction.
  • Representation of the invalid_da instruction.
  • Representation of the invalid_db instruction.
  • Representation of the invalid_dc instruction.
  • Representation of the invalid_dd instruction.
  • Representation of the invalid_de instruction.
  • Representation of the invalid_df instruction.
  • Representation of the invalid_e0 instruction.
  • Representation of the invalid_e1 instruction.
  • Representation of the invalid_e2 instruction.
  • Representation of the invalid_e3 instruction.
  • Representation of the invalid_e4 instruction.
  • Representation of the invalid_e5 instruction.
  • Representation of the invalid_e6 instruction.
  • Representation of the invalid_e7 instruction.
  • Representation of the invalid_e8 instruction.
  • Representation of the invalid_e9 instruction.
  • Representation of the invalid_ea instruction.
  • Representation of the invalid_eb instruction.
  • Representation of the invalid_ec instruction.
  • Representation of the invalid_ed instruction.
  • Representation of the invalid_ee instruction.
  • Representation of the invalid_ef instruction.
  • Representation of the invalid_f6 instruction.
  • Representation of the invalid_f7 instruction.
  • Representation of the invalid_f8 instruction.
  • Representation of the invalid_f9 instruction.
  • Representation of the invalid_fb instruction.
  • Representation of the invalid_fc instruction.
  • Representation of the iszero instruction.
  • Representation of the jump instruction.
  • Representation of the jumpdest instruction.
  • Representation of the jumpi instruction.
  • Representation of the keccak256 instruction.
  • Representation of the log0 instruction.
  • Representation of the log1 instruction.
  • Representation of the log2 instruction.
  • Representation of the log3 instruction.
  • Representation of the log4 instruction.
  • Representation of the lt instruction.
  • Representation of the mload instruction.
  • Representation of the msize instruction.
  • Representation of the mstore instruction.
  • Representation of the mstore8 instruction.
  • Representation of the mod instruction.
  • Representation of the mul instruction.
  • Representation of the mulmod instruction.
  • Representation of the not instruction.
  • Representation of the number instruction.
  • Representation of the or instruction.
  • Representation of the origin instruction.
  • Representation of the pop instruction.
  • Representation of the push1 instruction.
  • Representation of the push2 instruction.
  • Representation of the push3 instruction.
  • Representation of the push4 instruction.
  • Representation of the push5 instruction.
  • Representation of the push6 instruction.
  • Representation of the push7 instruction.
  • Representation of the push8 instruction.
  • Representation of the push9 instruction.
  • Representation of the push10 instruction.
  • Representation of the push11 instruction.
  • Representation of the push12 instruction.
  • Representation of the push13 instruction.
  • Representation of the push14 instruction.
  • Representation of the push15 instruction.
  • Representation of the push16 instruction.
  • Representation of the push17 instruction.
  • Representation of the push18 instruction.
  • Representation of the push19 instruction.
  • Representation of the push20 instruction.
  • Representation of the push21 instruction.
  • Representation of the push22 instruction.
  • Representation of the push23 instruction.
  • Representation of the push24 instruction.
  • Representation of the push25 instruction.
  • Representation of the push26 instruction.
  • Representation of the push27 instruction.
  • Representation of the push28 instruction.
  • Representation of the push29 instruction.
  • Representation of the push30 instruction.
  • Representation of the push31 instruction.
  • Representation of the push32 instruction.
  • Representation of the return instruction.
  • Representation of the returndatacopy instruction.
  • Representation of the returndatasize instruction.
  • Representation of the revert instruction.
  • Representation of the sdiv instruction.
  • Representation of the sgt instruction.
  • Representation of the sload instruction.
  • Representation of the slt instruction.
  • Representation of the smod instruction.
  • Representation of the sstore instruction.
  • Representation of the sar instruction.
  • Representation of the selfbalance instruction.
  • Representation of the selfdestruct instruction.
  • Representation of the shl instruction.
  • Representation of the shr instruction.
  • Representation of the signextend instruction.
  • Representation of the staticcall instruction.
  • Representation of the stop instruction.
  • Representation of the sub instruction.
  • Representation of the swap1 instruction.
  • Representation of the swap2 instruction.
  • Representation of the swap3 instruction.
  • Representation of the swap4 instruction.
  • Representation of the swap5 instruction.
  • Representation of the swap6 instruction.
  • Representation of the swap7 instruction.
  • Representation of the swap8 instruction.
  • Representation of the swap9 instruction.
  • Representation of the swap10 instruction.
  • Representation of the swap11 instruction.
  • Representation of the swap12 instruction.
  • Representation of the swap13 instruction.
  • Representation of the swap14 instruction.
  • Representation of the swap15 instruction.
  • Representation of the swap16 instruction.
  • Representation of the timestamp instruction.
  • Representation of the xor instruction.

Enums

  • All instructions in the london fork.

Traits

  • Trait for types that represent an EVM instruction.