iced_x86/
code.rs

1// SPDX-License-Identifier: MIT
2// Copyright (C) 2018-present iced project and contributors
3
4use crate::iced_constants::IcedConstants;
5use crate::iced_error::IcedError;
6#[cfg(feature = "instr_info")]
7use crate::info::enums::*;
8use crate::mnemonics;
9use crate::*;
10use core::iter::{ExactSizeIterator, FusedIterator, Iterator};
11use core::{fmt, mem};
12
13// GENERATOR-BEGIN: Code
14// ⚠️This was generated by GENERATOR!🦹‍♂️
15/// x86 instruction code
16#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd, Hash)]
17#[cfg_attr(not(feature = "exhaustive_enums"), non_exhaustive)]
18#[allow(non_camel_case_types)]
19pub enum Code {
20	/// It's an invalid instruction, eg. it's a new unknown instruction, garbage or there's not enough bytes to decode the instruction etc.
21	INVALID = 0,
22	/// A `db`/`.byte` asm directive that can store 1-16 bytes
23	DeclareByte = 1,
24	/// A `dw`/`.word` asm directive that can store 1-8 words
25	DeclareWord = 2,
26	/// A `dd`/`.int` asm directive that can store 1-4 dwords
27	DeclareDword = 3,
28	/// A `dq`/`.quad` asm directive that can store 1-2 qwords
29	DeclareQword = 4,
30	/// `ADD r/m8, r8`
31	///
32	/// `00 /r`
33	///
34	/// `8086+`
35	///
36	/// `16/32/64-bit`
37	Add_rm8_r8 = 5,
38	/// `ADD r/m16, r16`
39	///
40	/// `o16 01 /r`
41	///
42	/// `8086+`
43	///
44	/// `16/32/64-bit`
45	Add_rm16_r16 = 6,
46	/// `ADD r/m32, r32`
47	///
48	/// `o32 01 /r`
49	///
50	/// `386+`
51	///
52	/// `16/32/64-bit`
53	Add_rm32_r32 = 7,
54	/// `ADD r/m64, r64`
55	///
56	/// `o64 01 /r`
57	///
58	/// `X64`
59	///
60	/// `64-bit`
61	Add_rm64_r64 = 8,
62	/// `ADD r8, r/m8`
63	///
64	/// `02 /r`
65	///
66	/// `8086+`
67	///
68	/// `16/32/64-bit`
69	Add_r8_rm8 = 9,
70	/// `ADD r16, r/m16`
71	///
72	/// `o16 03 /r`
73	///
74	/// `8086+`
75	///
76	/// `16/32/64-bit`
77	Add_r16_rm16 = 10,
78	/// `ADD r32, r/m32`
79	///
80	/// `o32 03 /r`
81	///
82	/// `386+`
83	///
84	/// `16/32/64-bit`
85	Add_r32_rm32 = 11,
86	/// `ADD r64, r/m64`
87	///
88	/// `o64 03 /r`
89	///
90	/// `X64`
91	///
92	/// `64-bit`
93	Add_r64_rm64 = 12,
94	/// `ADD AL, imm8`
95	///
96	/// `04 ib`
97	///
98	/// `8086+`
99	///
100	/// `16/32/64-bit`
101	Add_AL_imm8 = 13,
102	/// `ADD AX, imm16`
103	///
104	/// `o16 05 iw`
105	///
106	/// `8086+`
107	///
108	/// `16/32/64-bit`
109	Add_AX_imm16 = 14,
110	/// `ADD EAX, imm32`
111	///
112	/// `o32 05 id`
113	///
114	/// `386+`
115	///
116	/// `16/32/64-bit`
117	Add_EAX_imm32 = 15,
118	/// `ADD RAX, imm32`
119	///
120	/// `o64 05 id`
121	///
122	/// `X64`
123	///
124	/// `64-bit`
125	Add_RAX_imm32 = 16,
126	/// `PUSH ES`
127	///
128	/// `o16 06`
129	///
130	/// `8086+`
131	///
132	/// `16/32-bit`
133	Pushw_ES = 17,
134	/// `PUSH ES`
135	///
136	/// `o32 06`
137	///
138	/// `386+`
139	///
140	/// `16/32-bit`
141	Pushd_ES = 18,
142	/// `POP ES`
143	///
144	/// `o16 07`
145	///
146	/// `8086+`
147	///
148	/// `16/32-bit`
149	Popw_ES = 19,
150	/// `POP ES`
151	///
152	/// `o32 07`
153	///
154	/// `386+`
155	///
156	/// `16/32-bit`
157	Popd_ES = 20,
158	/// `OR r/m8, r8`
159	///
160	/// `08 /r`
161	///
162	/// `8086+`
163	///
164	/// `16/32/64-bit`
165	Or_rm8_r8 = 21,
166	/// `OR r/m16, r16`
167	///
168	/// `o16 09 /r`
169	///
170	/// `8086+`
171	///
172	/// `16/32/64-bit`
173	Or_rm16_r16 = 22,
174	/// `OR r/m32, r32`
175	///
176	/// `o32 09 /r`
177	///
178	/// `386+`
179	///
180	/// `16/32/64-bit`
181	Or_rm32_r32 = 23,
182	/// `OR r/m64, r64`
183	///
184	/// `o64 09 /r`
185	///
186	/// `X64`
187	///
188	/// `64-bit`
189	Or_rm64_r64 = 24,
190	/// `OR r8, r/m8`
191	///
192	/// `0A /r`
193	///
194	/// `8086+`
195	///
196	/// `16/32/64-bit`
197	Or_r8_rm8 = 25,
198	/// `OR r16, r/m16`
199	///
200	/// `o16 0B /r`
201	///
202	/// `8086+`
203	///
204	/// `16/32/64-bit`
205	Or_r16_rm16 = 26,
206	/// `OR r32, r/m32`
207	///
208	/// `o32 0B /r`
209	///
210	/// `386+`
211	///
212	/// `16/32/64-bit`
213	Or_r32_rm32 = 27,
214	/// `OR r64, r/m64`
215	///
216	/// `o64 0B /r`
217	///
218	/// `X64`
219	///
220	/// `64-bit`
221	Or_r64_rm64 = 28,
222	/// `OR AL, imm8`
223	///
224	/// `0C ib`
225	///
226	/// `8086+`
227	///
228	/// `16/32/64-bit`
229	Or_AL_imm8 = 29,
230	/// `OR AX, imm16`
231	///
232	/// `o16 0D iw`
233	///
234	/// `8086+`
235	///
236	/// `16/32/64-bit`
237	Or_AX_imm16 = 30,
238	/// `OR EAX, imm32`
239	///
240	/// `o32 0D id`
241	///
242	/// `386+`
243	///
244	/// `16/32/64-bit`
245	Or_EAX_imm32 = 31,
246	/// `OR RAX, imm32`
247	///
248	/// `o64 0D id`
249	///
250	/// `X64`
251	///
252	/// `64-bit`
253	Or_RAX_imm32 = 32,
254	/// `PUSH CS`
255	///
256	/// `o16 0E`
257	///
258	/// `8086+`
259	///
260	/// `16/32-bit`
261	Pushw_CS = 33,
262	/// `PUSH CS`
263	///
264	/// `o32 0E`
265	///
266	/// `386+`
267	///
268	/// `16/32-bit`
269	Pushd_CS = 34,
270	/// `POP CS`
271	///
272	/// `o16 0F`
273	///
274	/// `8086`
275	///
276	/// `16-bit`
277	Popw_CS = 35,
278	/// `ADC r/m8, r8`
279	///
280	/// `10 /r`
281	///
282	/// `8086+`
283	///
284	/// `16/32/64-bit`
285	Adc_rm8_r8 = 36,
286	/// `ADC r/m16, r16`
287	///
288	/// `o16 11 /r`
289	///
290	/// `8086+`
291	///
292	/// `16/32/64-bit`
293	Adc_rm16_r16 = 37,
294	/// `ADC r/m32, r32`
295	///
296	/// `o32 11 /r`
297	///
298	/// `386+`
299	///
300	/// `16/32/64-bit`
301	Adc_rm32_r32 = 38,
302	/// `ADC r/m64, r64`
303	///
304	/// `o64 11 /r`
305	///
306	/// `X64`
307	///
308	/// `64-bit`
309	Adc_rm64_r64 = 39,
310	/// `ADC r8, r/m8`
311	///
312	/// `12 /r`
313	///
314	/// `8086+`
315	///
316	/// `16/32/64-bit`
317	Adc_r8_rm8 = 40,
318	/// `ADC r16, r/m16`
319	///
320	/// `o16 13 /r`
321	///
322	/// `8086+`
323	///
324	/// `16/32/64-bit`
325	Adc_r16_rm16 = 41,
326	/// `ADC r32, r/m32`
327	///
328	/// `o32 13 /r`
329	///
330	/// `386+`
331	///
332	/// `16/32/64-bit`
333	Adc_r32_rm32 = 42,
334	/// `ADC r64, r/m64`
335	///
336	/// `o64 13 /r`
337	///
338	/// `X64`
339	///
340	/// `64-bit`
341	Adc_r64_rm64 = 43,
342	/// `ADC AL, imm8`
343	///
344	/// `14 ib`
345	///
346	/// `8086+`
347	///
348	/// `16/32/64-bit`
349	Adc_AL_imm8 = 44,
350	/// `ADC AX, imm16`
351	///
352	/// `o16 15 iw`
353	///
354	/// `8086+`
355	///
356	/// `16/32/64-bit`
357	Adc_AX_imm16 = 45,
358	/// `ADC EAX, imm32`
359	///
360	/// `o32 15 id`
361	///
362	/// `386+`
363	///
364	/// `16/32/64-bit`
365	Adc_EAX_imm32 = 46,
366	/// `ADC RAX, imm32`
367	///
368	/// `o64 15 id`
369	///
370	/// `X64`
371	///
372	/// `64-bit`
373	Adc_RAX_imm32 = 47,
374	/// `PUSH SS`
375	///
376	/// `o16 16`
377	///
378	/// `8086+`
379	///
380	/// `16/32-bit`
381	Pushw_SS = 48,
382	/// `PUSH SS`
383	///
384	/// `o32 16`
385	///
386	/// `386+`
387	///
388	/// `16/32-bit`
389	Pushd_SS = 49,
390	/// `POP SS`
391	///
392	/// `o16 17`
393	///
394	/// `8086+`
395	///
396	/// `16/32-bit`
397	Popw_SS = 50,
398	/// `POP SS`
399	///
400	/// `o32 17`
401	///
402	/// `386+`
403	///
404	/// `16/32-bit`
405	Popd_SS = 51,
406	/// `SBB r/m8, r8`
407	///
408	/// `18 /r`
409	///
410	/// `8086+`
411	///
412	/// `16/32/64-bit`
413	Sbb_rm8_r8 = 52,
414	/// `SBB r/m16, r16`
415	///
416	/// `o16 19 /r`
417	///
418	/// `8086+`
419	///
420	/// `16/32/64-bit`
421	Sbb_rm16_r16 = 53,
422	/// `SBB r/m32, r32`
423	///
424	/// `o32 19 /r`
425	///
426	/// `386+`
427	///
428	/// `16/32/64-bit`
429	Sbb_rm32_r32 = 54,
430	/// `SBB r/m64, r64`
431	///
432	/// `o64 19 /r`
433	///
434	/// `X64`
435	///
436	/// `64-bit`
437	Sbb_rm64_r64 = 55,
438	/// `SBB r8, r/m8`
439	///
440	/// `1A /r`
441	///
442	/// `8086+`
443	///
444	/// `16/32/64-bit`
445	Sbb_r8_rm8 = 56,
446	/// `SBB r16, r/m16`
447	///
448	/// `o16 1B /r`
449	///
450	/// `8086+`
451	///
452	/// `16/32/64-bit`
453	Sbb_r16_rm16 = 57,
454	/// `SBB r32, r/m32`
455	///
456	/// `o32 1B /r`
457	///
458	/// `386+`
459	///
460	/// `16/32/64-bit`
461	Sbb_r32_rm32 = 58,
462	/// `SBB r64, r/m64`
463	///
464	/// `o64 1B /r`
465	///
466	/// `X64`
467	///
468	/// `64-bit`
469	Sbb_r64_rm64 = 59,
470	/// `SBB AL, imm8`
471	///
472	/// `1C ib`
473	///
474	/// `8086+`
475	///
476	/// `16/32/64-bit`
477	Sbb_AL_imm8 = 60,
478	/// `SBB AX, imm16`
479	///
480	/// `o16 1D iw`
481	///
482	/// `8086+`
483	///
484	/// `16/32/64-bit`
485	Sbb_AX_imm16 = 61,
486	/// `SBB EAX, imm32`
487	///
488	/// `o32 1D id`
489	///
490	/// `386+`
491	///
492	/// `16/32/64-bit`
493	Sbb_EAX_imm32 = 62,
494	/// `SBB RAX, imm32`
495	///
496	/// `o64 1D id`
497	///
498	/// `X64`
499	///
500	/// `64-bit`
501	Sbb_RAX_imm32 = 63,
502	/// `PUSH DS`
503	///
504	/// `o16 1E`
505	///
506	/// `8086+`
507	///
508	/// `16/32-bit`
509	Pushw_DS = 64,
510	/// `PUSH DS`
511	///
512	/// `o32 1E`
513	///
514	/// `386+`
515	///
516	/// `16/32-bit`
517	Pushd_DS = 65,
518	/// `POP DS`
519	///
520	/// `o16 1F`
521	///
522	/// `8086+`
523	///
524	/// `16/32-bit`
525	Popw_DS = 66,
526	/// `POP DS`
527	///
528	/// `o32 1F`
529	///
530	/// `386+`
531	///
532	/// `16/32-bit`
533	Popd_DS = 67,
534	/// `AND r/m8, r8`
535	///
536	/// `20 /r`
537	///
538	/// `8086+`
539	///
540	/// `16/32/64-bit`
541	And_rm8_r8 = 68,
542	/// `AND r/m16, r16`
543	///
544	/// `o16 21 /r`
545	///
546	/// `8086+`
547	///
548	/// `16/32/64-bit`
549	And_rm16_r16 = 69,
550	/// `AND r/m32, r32`
551	///
552	/// `o32 21 /r`
553	///
554	/// `386+`
555	///
556	/// `16/32/64-bit`
557	And_rm32_r32 = 70,
558	/// `AND r/m64, r64`
559	///
560	/// `o64 21 /r`
561	///
562	/// `X64`
563	///
564	/// `64-bit`
565	And_rm64_r64 = 71,
566	/// `AND r8, r/m8`
567	///
568	/// `22 /r`
569	///
570	/// `8086+`
571	///
572	/// `16/32/64-bit`
573	And_r8_rm8 = 72,
574	/// `AND r16, r/m16`
575	///
576	/// `o16 23 /r`
577	///
578	/// `8086+`
579	///
580	/// `16/32/64-bit`
581	And_r16_rm16 = 73,
582	/// `AND r32, r/m32`
583	///
584	/// `o32 23 /r`
585	///
586	/// `386+`
587	///
588	/// `16/32/64-bit`
589	And_r32_rm32 = 74,
590	/// `AND r64, r/m64`
591	///
592	/// `o64 23 /r`
593	///
594	/// `X64`
595	///
596	/// `64-bit`
597	And_r64_rm64 = 75,
598	/// `AND AL, imm8`
599	///
600	/// `24 ib`
601	///
602	/// `8086+`
603	///
604	/// `16/32/64-bit`
605	And_AL_imm8 = 76,
606	/// `AND AX, imm16`
607	///
608	/// `o16 25 iw`
609	///
610	/// `8086+`
611	///
612	/// `16/32/64-bit`
613	And_AX_imm16 = 77,
614	/// `AND EAX, imm32`
615	///
616	/// `o32 25 id`
617	///
618	/// `386+`
619	///
620	/// `16/32/64-bit`
621	And_EAX_imm32 = 78,
622	/// `AND RAX, imm32`
623	///
624	/// `o64 25 id`
625	///
626	/// `X64`
627	///
628	/// `64-bit`
629	And_RAX_imm32 = 79,
630	/// `DAA`
631	///
632	/// `27`
633	///
634	/// `8086+`
635	///
636	/// `16/32-bit`
637	Daa = 80,
638	/// `SUB r/m8, r8`
639	///
640	/// `28 /r`
641	///
642	/// `8086+`
643	///
644	/// `16/32/64-bit`
645	Sub_rm8_r8 = 81,
646	/// `SUB r/m16, r16`
647	///
648	/// `o16 29 /r`
649	///
650	/// `8086+`
651	///
652	/// `16/32/64-bit`
653	Sub_rm16_r16 = 82,
654	/// `SUB r/m32, r32`
655	///
656	/// `o32 29 /r`
657	///
658	/// `386+`
659	///
660	/// `16/32/64-bit`
661	Sub_rm32_r32 = 83,
662	/// `SUB r/m64, r64`
663	///
664	/// `o64 29 /r`
665	///
666	/// `X64`
667	///
668	/// `64-bit`
669	Sub_rm64_r64 = 84,
670	/// `SUB r8, r/m8`
671	///
672	/// `2A /r`
673	///
674	/// `8086+`
675	///
676	/// `16/32/64-bit`
677	Sub_r8_rm8 = 85,
678	/// `SUB r16, r/m16`
679	///
680	/// `o16 2B /r`
681	///
682	/// `8086+`
683	///
684	/// `16/32/64-bit`
685	Sub_r16_rm16 = 86,
686	/// `SUB r32, r/m32`
687	///
688	/// `o32 2B /r`
689	///
690	/// `386+`
691	///
692	/// `16/32/64-bit`
693	Sub_r32_rm32 = 87,
694	/// `SUB r64, r/m64`
695	///
696	/// `o64 2B /r`
697	///
698	/// `X64`
699	///
700	/// `64-bit`
701	Sub_r64_rm64 = 88,
702	/// `SUB AL, imm8`
703	///
704	/// `2C ib`
705	///
706	/// `8086+`
707	///
708	/// `16/32/64-bit`
709	Sub_AL_imm8 = 89,
710	/// `SUB AX, imm16`
711	///
712	/// `o16 2D iw`
713	///
714	/// `8086+`
715	///
716	/// `16/32/64-bit`
717	Sub_AX_imm16 = 90,
718	/// `SUB EAX, imm32`
719	///
720	/// `o32 2D id`
721	///
722	/// `386+`
723	///
724	/// `16/32/64-bit`
725	Sub_EAX_imm32 = 91,
726	/// `SUB RAX, imm32`
727	///
728	/// `o64 2D id`
729	///
730	/// `X64`
731	///
732	/// `64-bit`
733	Sub_RAX_imm32 = 92,
734	/// `DAS`
735	///
736	/// `2F`
737	///
738	/// `8086+`
739	///
740	/// `16/32-bit`
741	Das = 93,
742	/// `XOR r/m8, r8`
743	///
744	/// `30 /r`
745	///
746	/// `8086+`
747	///
748	/// `16/32/64-bit`
749	Xor_rm8_r8 = 94,
750	/// `XOR r/m16, r16`
751	///
752	/// `o16 31 /r`
753	///
754	/// `8086+`
755	///
756	/// `16/32/64-bit`
757	Xor_rm16_r16 = 95,
758	/// `XOR r/m32, r32`
759	///
760	/// `o32 31 /r`
761	///
762	/// `386+`
763	///
764	/// `16/32/64-bit`
765	Xor_rm32_r32 = 96,
766	/// `XOR r/m64, r64`
767	///
768	/// `o64 31 /r`
769	///
770	/// `X64`
771	///
772	/// `64-bit`
773	Xor_rm64_r64 = 97,
774	/// `XOR r8, r/m8`
775	///
776	/// `32 /r`
777	///
778	/// `8086+`
779	///
780	/// `16/32/64-bit`
781	Xor_r8_rm8 = 98,
782	/// `XOR r16, r/m16`
783	///
784	/// `o16 33 /r`
785	///
786	/// `8086+`
787	///
788	/// `16/32/64-bit`
789	Xor_r16_rm16 = 99,
790	/// `XOR r32, r/m32`
791	///
792	/// `o32 33 /r`
793	///
794	/// `386+`
795	///
796	/// `16/32/64-bit`
797	Xor_r32_rm32 = 100,
798	/// `XOR r64, r/m64`
799	///
800	/// `o64 33 /r`
801	///
802	/// `X64`
803	///
804	/// `64-bit`
805	Xor_r64_rm64 = 101,
806	/// `XOR AL, imm8`
807	///
808	/// `34 ib`
809	///
810	/// `8086+`
811	///
812	/// `16/32/64-bit`
813	Xor_AL_imm8 = 102,
814	/// `XOR AX, imm16`
815	///
816	/// `o16 35 iw`
817	///
818	/// `8086+`
819	///
820	/// `16/32/64-bit`
821	Xor_AX_imm16 = 103,
822	/// `XOR EAX, imm32`
823	///
824	/// `o32 35 id`
825	///
826	/// `386+`
827	///
828	/// `16/32/64-bit`
829	Xor_EAX_imm32 = 104,
830	/// `XOR RAX, imm32`
831	///
832	/// `o64 35 id`
833	///
834	/// `X64`
835	///
836	/// `64-bit`
837	Xor_RAX_imm32 = 105,
838	/// `AAA`
839	///
840	/// `37`
841	///
842	/// `8086+`
843	///
844	/// `16/32-bit`
845	Aaa = 106,
846	/// `CMP r/m8, r8`
847	///
848	/// `38 /r`
849	///
850	/// `8086+`
851	///
852	/// `16/32/64-bit`
853	Cmp_rm8_r8 = 107,
854	/// `CMP r/m16, r16`
855	///
856	/// `o16 39 /r`
857	///
858	/// `8086+`
859	///
860	/// `16/32/64-bit`
861	Cmp_rm16_r16 = 108,
862	/// `CMP r/m32, r32`
863	///
864	/// `o32 39 /r`
865	///
866	/// `386+`
867	///
868	/// `16/32/64-bit`
869	Cmp_rm32_r32 = 109,
870	/// `CMP r/m64, r64`
871	///
872	/// `o64 39 /r`
873	///
874	/// `X64`
875	///
876	/// `64-bit`
877	Cmp_rm64_r64 = 110,
878	/// `CMP r8, r/m8`
879	///
880	/// `3A /r`
881	///
882	/// `8086+`
883	///
884	/// `16/32/64-bit`
885	Cmp_r8_rm8 = 111,
886	/// `CMP r16, r/m16`
887	///
888	/// `o16 3B /r`
889	///
890	/// `8086+`
891	///
892	/// `16/32/64-bit`
893	Cmp_r16_rm16 = 112,
894	/// `CMP r32, r/m32`
895	///
896	/// `o32 3B /r`
897	///
898	/// `386+`
899	///
900	/// `16/32/64-bit`
901	Cmp_r32_rm32 = 113,
902	/// `CMP r64, r/m64`
903	///
904	/// `o64 3B /r`
905	///
906	/// `X64`
907	///
908	/// `64-bit`
909	Cmp_r64_rm64 = 114,
910	/// `CMP AL, imm8`
911	///
912	/// `3C ib`
913	///
914	/// `8086+`
915	///
916	/// `16/32/64-bit`
917	Cmp_AL_imm8 = 115,
918	/// `CMP AX, imm16`
919	///
920	/// `o16 3D iw`
921	///
922	/// `8086+`
923	///
924	/// `16/32/64-bit`
925	Cmp_AX_imm16 = 116,
926	/// `CMP EAX, imm32`
927	///
928	/// `o32 3D id`
929	///
930	/// `386+`
931	///
932	/// `16/32/64-bit`
933	Cmp_EAX_imm32 = 117,
934	/// `CMP RAX, imm32`
935	///
936	/// `o64 3D id`
937	///
938	/// `X64`
939	///
940	/// `64-bit`
941	Cmp_RAX_imm32 = 118,
942	/// `AAS`
943	///
944	/// `3F`
945	///
946	/// `8086+`
947	///
948	/// `16/32-bit`
949	Aas = 119,
950	/// `INC r16`
951	///
952	/// `o16 40+rw`
953	///
954	/// `8086+`
955	///
956	/// `16/32-bit`
957	Inc_r16 = 120,
958	/// `INC r32`
959	///
960	/// `o32 40+rd`
961	///
962	/// `386+`
963	///
964	/// `16/32-bit`
965	Inc_r32 = 121,
966	/// `DEC r16`
967	///
968	/// `o16 48+rw`
969	///
970	/// `8086+`
971	///
972	/// `16/32-bit`
973	Dec_r16 = 122,
974	/// `DEC r32`
975	///
976	/// `o32 48+rd`
977	///
978	/// `386+`
979	///
980	/// `16/32-bit`
981	Dec_r32 = 123,
982	/// `PUSH r16`
983	///
984	/// `o16 50+rw`
985	///
986	/// `8086+`
987	///
988	/// `16/32/64-bit`
989	Push_r16 = 124,
990	/// `PUSH r32`
991	///
992	/// `o32 50+rd`
993	///
994	/// `386+`
995	///
996	/// `16/32-bit`
997	Push_r32 = 125,
998	/// `PUSH r64`
999	///
1000	/// `o64 50+ro`
1001	///
1002	/// `X64`
1003	///
1004	/// `64-bit`
1005	Push_r64 = 126,
1006	/// `POP r16`
1007	///
1008	/// `o16 58+rw`
1009	///
1010	/// `8086+`
1011	///
1012	/// `16/32/64-bit`
1013	Pop_r16 = 127,
1014	/// `POP r32`
1015	///
1016	/// `o32 58+rd`
1017	///
1018	/// `386+`
1019	///
1020	/// `16/32-bit`
1021	Pop_r32 = 128,
1022	/// `POP r64`
1023	///
1024	/// `o64 58+ro`
1025	///
1026	/// `X64`
1027	///
1028	/// `64-bit`
1029	Pop_r64 = 129,
1030	/// `PUSHA`
1031	///
1032	/// `o16 60`
1033	///
1034	/// `186+`
1035	///
1036	/// `16/32-bit`
1037	Pushaw = 130,
1038	/// `PUSHAD`
1039	///
1040	/// `o32 60`
1041	///
1042	/// `386+`
1043	///
1044	/// `16/32-bit`
1045	Pushad = 131,
1046	/// `POPA`
1047	///
1048	/// `o16 61`
1049	///
1050	/// `186+`
1051	///
1052	/// `16/32-bit`
1053	Popaw = 132,
1054	/// `POPAD`
1055	///
1056	/// `o32 61`
1057	///
1058	/// `386+`
1059	///
1060	/// `16/32-bit`
1061	Popad = 133,
1062	/// `BOUND r16, m16&16`
1063	///
1064	/// `o16 62 /r`
1065	///
1066	/// `186+`
1067	///
1068	/// `16/32-bit`
1069	Bound_r16_m1616 = 134,
1070	/// `BOUND r32, m32&32`
1071	///
1072	/// `o32 62 /r`
1073	///
1074	/// `386+`
1075	///
1076	/// `16/32-bit`
1077	Bound_r32_m3232 = 135,
1078	/// `ARPL r/m16, r16`
1079	///
1080	/// `o16 63 /r`
1081	///
1082	/// `286+`
1083	///
1084	/// `16/32-bit`
1085	Arpl_rm16_r16 = 136,
1086	/// `ARPL r32/m16, r32`
1087	///
1088	/// `o32 63 /r`
1089	///
1090	/// `386+`
1091	///
1092	/// `16/32-bit`
1093	Arpl_r32m16_r32 = 137,
1094	/// `MOVSXD r16, r/m16`
1095	///
1096	/// `o16 63 /r`
1097	///
1098	/// `X64`
1099	///
1100	/// `64-bit`
1101	Movsxd_r16_rm16 = 138,
1102	/// `MOVSXD r32, r/m32`
1103	///
1104	/// `o32 63 /r`
1105	///
1106	/// `X64`
1107	///
1108	/// `64-bit`
1109	Movsxd_r32_rm32 = 139,
1110	/// `MOVSXD r64, r/m32`
1111	///
1112	/// `o64 63 /r`
1113	///
1114	/// `X64`
1115	///
1116	/// `64-bit`
1117	Movsxd_r64_rm32 = 140,
1118	/// `PUSH imm16`
1119	///
1120	/// `o16 68 iw`
1121	///
1122	/// `186+`
1123	///
1124	/// `16/32/64-bit`
1125	Push_imm16 = 141,
1126	/// `PUSH imm32`
1127	///
1128	/// `o32 68 id`
1129	///
1130	/// `386+`
1131	///
1132	/// `16/32-bit`
1133	Pushd_imm32 = 142,
1134	/// `PUSH imm32`
1135	///
1136	/// `o64 68 id`
1137	///
1138	/// `X64`
1139	///
1140	/// `64-bit`
1141	Pushq_imm32 = 143,
1142	/// `IMUL r16, r/m16, imm16`
1143	///
1144	/// `o16 69 /r iw`
1145	///
1146	/// `186+`
1147	///
1148	/// `16/32/64-bit`
1149	Imul_r16_rm16_imm16 = 144,
1150	/// `IMUL r32, r/m32, imm32`
1151	///
1152	/// `o32 69 /r id`
1153	///
1154	/// `386+`
1155	///
1156	/// `16/32/64-bit`
1157	Imul_r32_rm32_imm32 = 145,
1158	/// `IMUL r64, r/m64, imm32`
1159	///
1160	/// `o64 69 /r id`
1161	///
1162	/// `X64`
1163	///
1164	/// `64-bit`
1165	Imul_r64_rm64_imm32 = 146,
1166	/// `PUSH imm8`
1167	///
1168	/// `o16 6A ib`
1169	///
1170	/// `186+`
1171	///
1172	/// `16/32/64-bit`
1173	Pushw_imm8 = 147,
1174	/// `PUSH imm8`
1175	///
1176	/// `o32 6A ib`
1177	///
1178	/// `386+`
1179	///
1180	/// `16/32-bit`
1181	Pushd_imm8 = 148,
1182	/// `PUSH imm8`
1183	///
1184	/// `o64 6A ib`
1185	///
1186	/// `X64`
1187	///
1188	/// `64-bit`
1189	Pushq_imm8 = 149,
1190	/// `IMUL r16, r/m16, imm8`
1191	///
1192	/// `o16 6B /r ib`
1193	///
1194	/// `186+`
1195	///
1196	/// `16/32/64-bit`
1197	Imul_r16_rm16_imm8 = 150,
1198	/// `IMUL r32, r/m32, imm8`
1199	///
1200	/// `o32 6B /r ib`
1201	///
1202	/// `386+`
1203	///
1204	/// `16/32/64-bit`
1205	Imul_r32_rm32_imm8 = 151,
1206	/// `IMUL r64, r/m64, imm8`
1207	///
1208	/// `o64 6B /r ib`
1209	///
1210	/// `X64`
1211	///
1212	/// `64-bit`
1213	Imul_r64_rm64_imm8 = 152,
1214	/// `INSB`
1215	///
1216	/// `6C`
1217	///
1218	/// `186+`
1219	///
1220	/// `16/32/64-bit`
1221	Insb_m8_DX = 153,
1222	/// `INSW`
1223	///
1224	/// `o16 6D`
1225	///
1226	/// `186+`
1227	///
1228	/// `16/32/64-bit`
1229	Insw_m16_DX = 154,
1230	/// `INSD`
1231	///
1232	/// `o32 6D`
1233	///
1234	/// `386+`
1235	///
1236	/// `16/32/64-bit`
1237	Insd_m32_DX = 155,
1238	/// `OUTSB`
1239	///
1240	/// `6E`
1241	///
1242	/// `186+`
1243	///
1244	/// `16/32/64-bit`
1245	Outsb_DX_m8 = 156,
1246	/// `OUTSW`
1247	///
1248	/// `o16 6F`
1249	///
1250	/// `186+`
1251	///
1252	/// `16/32/64-bit`
1253	Outsw_DX_m16 = 157,
1254	/// `OUTSD`
1255	///
1256	/// `o32 6F`
1257	///
1258	/// `386+`
1259	///
1260	/// `16/32/64-bit`
1261	Outsd_DX_m32 = 158,
1262	/// `JO rel8`
1263	///
1264	/// `o16 70 cb`
1265	///
1266	/// `8086+`
1267	///
1268	/// `16/32/64-bit`
1269	Jo_rel8_16 = 159,
1270	/// `JO rel8`
1271	///
1272	/// `o32 70 cb`
1273	///
1274	/// `386+`
1275	///
1276	/// `16/32-bit`
1277	Jo_rel8_32 = 160,
1278	/// `JO rel8`
1279	///
1280	/// `o64 70 cb`
1281	///
1282	/// `X64`
1283	///
1284	/// `64-bit`
1285	Jo_rel8_64 = 161,
1286	/// `JNO rel8`
1287	///
1288	/// `o16 71 cb`
1289	///
1290	/// `8086+`
1291	///
1292	/// `16/32/64-bit`
1293	Jno_rel8_16 = 162,
1294	/// `JNO rel8`
1295	///
1296	/// `o32 71 cb`
1297	///
1298	/// `386+`
1299	///
1300	/// `16/32-bit`
1301	Jno_rel8_32 = 163,
1302	/// `JNO rel8`
1303	///
1304	/// `o64 71 cb`
1305	///
1306	/// `X64`
1307	///
1308	/// `64-bit`
1309	Jno_rel8_64 = 164,
1310	/// `JB rel8`
1311	///
1312	/// `o16 72 cb`
1313	///
1314	/// `8086+`
1315	///
1316	/// `16/32/64-bit`
1317	Jb_rel8_16 = 165,
1318	/// `JB rel8`
1319	///
1320	/// `o32 72 cb`
1321	///
1322	/// `386+`
1323	///
1324	/// `16/32-bit`
1325	Jb_rel8_32 = 166,
1326	/// `JB rel8`
1327	///
1328	/// `o64 72 cb`
1329	///
1330	/// `X64`
1331	///
1332	/// `64-bit`
1333	Jb_rel8_64 = 167,
1334	/// `JAE rel8`
1335	///
1336	/// `o16 73 cb`
1337	///
1338	/// `8086+`
1339	///
1340	/// `16/32/64-bit`
1341	Jae_rel8_16 = 168,
1342	/// `JAE rel8`
1343	///
1344	/// `o32 73 cb`
1345	///
1346	/// `386+`
1347	///
1348	/// `16/32-bit`
1349	Jae_rel8_32 = 169,
1350	/// `JAE rel8`
1351	///
1352	/// `o64 73 cb`
1353	///
1354	/// `X64`
1355	///
1356	/// `64-bit`
1357	Jae_rel8_64 = 170,
1358	/// `JE rel8`
1359	///
1360	/// `o16 74 cb`
1361	///
1362	/// `8086+`
1363	///
1364	/// `16/32/64-bit`
1365	Je_rel8_16 = 171,
1366	/// `JE rel8`
1367	///
1368	/// `o32 74 cb`
1369	///
1370	/// `386+`
1371	///
1372	/// `16/32-bit`
1373	Je_rel8_32 = 172,
1374	/// `JE rel8`
1375	///
1376	/// `o64 74 cb`
1377	///
1378	/// `X64`
1379	///
1380	/// `64-bit`
1381	Je_rel8_64 = 173,
1382	/// `JNE rel8`
1383	///
1384	/// `o16 75 cb`
1385	///
1386	/// `8086+`
1387	///
1388	/// `16/32/64-bit`
1389	Jne_rel8_16 = 174,
1390	/// `JNE rel8`
1391	///
1392	/// `o32 75 cb`
1393	///
1394	/// `386+`
1395	///
1396	/// `16/32-bit`
1397	Jne_rel8_32 = 175,
1398	/// `JNE rel8`
1399	///
1400	/// `o64 75 cb`
1401	///
1402	/// `X64`
1403	///
1404	/// `64-bit`
1405	Jne_rel8_64 = 176,
1406	/// `JBE rel8`
1407	///
1408	/// `o16 76 cb`
1409	///
1410	/// `8086+`
1411	///
1412	/// `16/32/64-bit`
1413	Jbe_rel8_16 = 177,
1414	/// `JBE rel8`
1415	///
1416	/// `o32 76 cb`
1417	///
1418	/// `386+`
1419	///
1420	/// `16/32-bit`
1421	Jbe_rel8_32 = 178,
1422	/// `JBE rel8`
1423	///
1424	/// `o64 76 cb`
1425	///
1426	/// `X64`
1427	///
1428	/// `64-bit`
1429	Jbe_rel8_64 = 179,
1430	/// `JA rel8`
1431	///
1432	/// `o16 77 cb`
1433	///
1434	/// `8086+`
1435	///
1436	/// `16/32/64-bit`
1437	Ja_rel8_16 = 180,
1438	/// `JA rel8`
1439	///
1440	/// `o32 77 cb`
1441	///
1442	/// `386+`
1443	///
1444	/// `16/32-bit`
1445	Ja_rel8_32 = 181,
1446	/// `JA rel8`
1447	///
1448	/// `o64 77 cb`
1449	///
1450	/// `X64`
1451	///
1452	/// `64-bit`
1453	Ja_rel8_64 = 182,
1454	/// `JS rel8`
1455	///
1456	/// `o16 78 cb`
1457	///
1458	/// `8086+`
1459	///
1460	/// `16/32/64-bit`
1461	Js_rel8_16 = 183,
1462	/// `JS rel8`
1463	///
1464	/// `o32 78 cb`
1465	///
1466	/// `386+`
1467	///
1468	/// `16/32-bit`
1469	Js_rel8_32 = 184,
1470	/// `JS rel8`
1471	///
1472	/// `o64 78 cb`
1473	///
1474	/// `X64`
1475	///
1476	/// `64-bit`
1477	Js_rel8_64 = 185,
1478	/// `JNS rel8`
1479	///
1480	/// `o16 79 cb`
1481	///
1482	/// `8086+`
1483	///
1484	/// `16/32/64-bit`
1485	Jns_rel8_16 = 186,
1486	/// `JNS rel8`
1487	///
1488	/// `o32 79 cb`
1489	///
1490	/// `386+`
1491	///
1492	/// `16/32-bit`
1493	Jns_rel8_32 = 187,
1494	/// `JNS rel8`
1495	///
1496	/// `o64 79 cb`
1497	///
1498	/// `X64`
1499	///
1500	/// `64-bit`
1501	Jns_rel8_64 = 188,
1502	/// `JP rel8`
1503	///
1504	/// `o16 7A cb`
1505	///
1506	/// `8086+`
1507	///
1508	/// `16/32/64-bit`
1509	Jp_rel8_16 = 189,
1510	/// `JP rel8`
1511	///
1512	/// `o32 7A cb`
1513	///
1514	/// `386+`
1515	///
1516	/// `16/32-bit`
1517	Jp_rel8_32 = 190,
1518	/// `JP rel8`
1519	///
1520	/// `o64 7A cb`
1521	///
1522	/// `X64`
1523	///
1524	/// `64-bit`
1525	Jp_rel8_64 = 191,
1526	/// `JNP rel8`
1527	///
1528	/// `o16 7B cb`
1529	///
1530	/// `8086+`
1531	///
1532	/// `16/32/64-bit`
1533	Jnp_rel8_16 = 192,
1534	/// `JNP rel8`
1535	///
1536	/// `o32 7B cb`
1537	///
1538	/// `386+`
1539	///
1540	/// `16/32-bit`
1541	Jnp_rel8_32 = 193,
1542	/// `JNP rel8`
1543	///
1544	/// `o64 7B cb`
1545	///
1546	/// `X64`
1547	///
1548	/// `64-bit`
1549	Jnp_rel8_64 = 194,
1550	/// `JL rel8`
1551	///
1552	/// `o16 7C cb`
1553	///
1554	/// `8086+`
1555	///
1556	/// `16/32/64-bit`
1557	Jl_rel8_16 = 195,
1558	/// `JL rel8`
1559	///
1560	/// `o32 7C cb`
1561	///
1562	/// `386+`
1563	///
1564	/// `16/32-bit`
1565	Jl_rel8_32 = 196,
1566	/// `JL rel8`
1567	///
1568	/// `o64 7C cb`
1569	///
1570	/// `X64`
1571	///
1572	/// `64-bit`
1573	Jl_rel8_64 = 197,
1574	/// `JGE rel8`
1575	///
1576	/// `o16 7D cb`
1577	///
1578	/// `8086+`
1579	///
1580	/// `16/32/64-bit`
1581	Jge_rel8_16 = 198,
1582	/// `JGE rel8`
1583	///
1584	/// `o32 7D cb`
1585	///
1586	/// `386+`
1587	///
1588	/// `16/32-bit`
1589	Jge_rel8_32 = 199,
1590	/// `JGE rel8`
1591	///
1592	/// `o64 7D cb`
1593	///
1594	/// `X64`
1595	///
1596	/// `64-bit`
1597	Jge_rel8_64 = 200,
1598	/// `JLE rel8`
1599	///
1600	/// `o16 7E cb`
1601	///
1602	/// `8086+`
1603	///
1604	/// `16/32/64-bit`
1605	Jle_rel8_16 = 201,
1606	/// `JLE rel8`
1607	///
1608	/// `o32 7E cb`
1609	///
1610	/// `386+`
1611	///
1612	/// `16/32-bit`
1613	Jle_rel8_32 = 202,
1614	/// `JLE rel8`
1615	///
1616	/// `o64 7E cb`
1617	///
1618	/// `X64`
1619	///
1620	/// `64-bit`
1621	Jle_rel8_64 = 203,
1622	/// `JG rel8`
1623	///
1624	/// `o16 7F cb`
1625	///
1626	/// `8086+`
1627	///
1628	/// `16/32/64-bit`
1629	Jg_rel8_16 = 204,
1630	/// `JG rel8`
1631	///
1632	/// `o32 7F cb`
1633	///
1634	/// `386+`
1635	///
1636	/// `16/32-bit`
1637	Jg_rel8_32 = 205,
1638	/// `JG rel8`
1639	///
1640	/// `o64 7F cb`
1641	///
1642	/// `X64`
1643	///
1644	/// `64-bit`
1645	Jg_rel8_64 = 206,
1646	/// `ADD r/m8, imm8`
1647	///
1648	/// `80 /0 ib`
1649	///
1650	/// `8086+`
1651	///
1652	/// `16/32/64-bit`
1653	Add_rm8_imm8 = 207,
1654	/// `OR r/m8, imm8`
1655	///
1656	/// `80 /1 ib`
1657	///
1658	/// `8086+`
1659	///
1660	/// `16/32/64-bit`
1661	Or_rm8_imm8 = 208,
1662	/// `ADC r/m8, imm8`
1663	///
1664	/// `80 /2 ib`
1665	///
1666	/// `8086+`
1667	///
1668	/// `16/32/64-bit`
1669	Adc_rm8_imm8 = 209,
1670	/// `SBB r/m8, imm8`
1671	///
1672	/// `80 /3 ib`
1673	///
1674	/// `8086+`
1675	///
1676	/// `16/32/64-bit`
1677	Sbb_rm8_imm8 = 210,
1678	/// `AND r/m8, imm8`
1679	///
1680	/// `80 /4 ib`
1681	///
1682	/// `8086+`
1683	///
1684	/// `16/32/64-bit`
1685	And_rm8_imm8 = 211,
1686	/// `SUB r/m8, imm8`
1687	///
1688	/// `80 /5 ib`
1689	///
1690	/// `8086+`
1691	///
1692	/// `16/32/64-bit`
1693	Sub_rm8_imm8 = 212,
1694	/// `XOR r/m8, imm8`
1695	///
1696	/// `80 /6 ib`
1697	///
1698	/// `8086+`
1699	///
1700	/// `16/32/64-bit`
1701	Xor_rm8_imm8 = 213,
1702	/// `CMP r/m8, imm8`
1703	///
1704	/// `80 /7 ib`
1705	///
1706	/// `8086+`
1707	///
1708	/// `16/32/64-bit`
1709	Cmp_rm8_imm8 = 214,
1710	/// `ADD r/m16, imm16`
1711	///
1712	/// `o16 81 /0 iw`
1713	///
1714	/// `8086+`
1715	///
1716	/// `16/32/64-bit`
1717	Add_rm16_imm16 = 215,
1718	/// `ADD r/m32, imm32`
1719	///
1720	/// `o32 81 /0 id`
1721	///
1722	/// `386+`
1723	///
1724	/// `16/32/64-bit`
1725	Add_rm32_imm32 = 216,
1726	/// `ADD r/m64, imm32`
1727	///
1728	/// `o64 81 /0 id`
1729	///
1730	/// `X64`
1731	///
1732	/// `64-bit`
1733	Add_rm64_imm32 = 217,
1734	/// `OR r/m16, imm16`
1735	///
1736	/// `o16 81 /1 iw`
1737	///
1738	/// `8086+`
1739	///
1740	/// `16/32/64-bit`
1741	Or_rm16_imm16 = 218,
1742	/// `OR r/m32, imm32`
1743	///
1744	/// `o32 81 /1 id`
1745	///
1746	/// `386+`
1747	///
1748	/// `16/32/64-bit`
1749	Or_rm32_imm32 = 219,
1750	/// `OR r/m64, imm32`
1751	///
1752	/// `o64 81 /1 id`
1753	///
1754	/// `X64`
1755	///
1756	/// `64-bit`
1757	Or_rm64_imm32 = 220,
1758	/// `ADC r/m16, imm16`
1759	///
1760	/// `o16 81 /2 iw`
1761	///
1762	/// `8086+`
1763	///
1764	/// `16/32/64-bit`
1765	Adc_rm16_imm16 = 221,
1766	/// `ADC r/m32, imm32`
1767	///
1768	/// `o32 81 /2 id`
1769	///
1770	/// `386+`
1771	///
1772	/// `16/32/64-bit`
1773	Adc_rm32_imm32 = 222,
1774	/// `ADC r/m64, imm32`
1775	///
1776	/// `o64 81 /2 id`
1777	///
1778	/// `X64`
1779	///
1780	/// `64-bit`
1781	Adc_rm64_imm32 = 223,
1782	/// `SBB r/m16, imm16`
1783	///
1784	/// `o16 81 /3 iw`
1785	///
1786	/// `8086+`
1787	///
1788	/// `16/32/64-bit`
1789	Sbb_rm16_imm16 = 224,
1790	/// `SBB r/m32, imm32`
1791	///
1792	/// `o32 81 /3 id`
1793	///
1794	/// `386+`
1795	///
1796	/// `16/32/64-bit`
1797	Sbb_rm32_imm32 = 225,
1798	/// `SBB r/m64, imm32`
1799	///
1800	/// `o64 81 /3 id`
1801	///
1802	/// `X64`
1803	///
1804	/// `64-bit`
1805	Sbb_rm64_imm32 = 226,
1806	/// `AND r/m16, imm16`
1807	///
1808	/// `o16 81 /4 iw`
1809	///
1810	/// `8086+`
1811	///
1812	/// `16/32/64-bit`
1813	And_rm16_imm16 = 227,
1814	/// `AND r/m32, imm32`
1815	///
1816	/// `o32 81 /4 id`
1817	///
1818	/// `386+`
1819	///
1820	/// `16/32/64-bit`
1821	And_rm32_imm32 = 228,
1822	/// `AND r/m64, imm32`
1823	///
1824	/// `o64 81 /4 id`
1825	///
1826	/// `X64`
1827	///
1828	/// `64-bit`
1829	And_rm64_imm32 = 229,
1830	/// `SUB r/m16, imm16`
1831	///
1832	/// `o16 81 /5 iw`
1833	///
1834	/// `8086+`
1835	///
1836	/// `16/32/64-bit`
1837	Sub_rm16_imm16 = 230,
1838	/// `SUB r/m32, imm32`
1839	///
1840	/// `o32 81 /5 id`
1841	///
1842	/// `386+`
1843	///
1844	/// `16/32/64-bit`
1845	Sub_rm32_imm32 = 231,
1846	/// `SUB r/m64, imm32`
1847	///
1848	/// `o64 81 /5 id`
1849	///
1850	/// `X64`
1851	///
1852	/// `64-bit`
1853	Sub_rm64_imm32 = 232,
1854	/// `XOR r/m16, imm16`
1855	///
1856	/// `o16 81 /6 iw`
1857	///
1858	/// `8086+`
1859	///
1860	/// `16/32/64-bit`
1861	Xor_rm16_imm16 = 233,
1862	/// `XOR r/m32, imm32`
1863	///
1864	/// `o32 81 /6 id`
1865	///
1866	/// `386+`
1867	///
1868	/// `16/32/64-bit`
1869	Xor_rm32_imm32 = 234,
1870	/// `XOR r/m64, imm32`
1871	///
1872	/// `o64 81 /6 id`
1873	///
1874	/// `X64`
1875	///
1876	/// `64-bit`
1877	Xor_rm64_imm32 = 235,
1878	/// `CMP r/m16, imm16`
1879	///
1880	/// `o16 81 /7 iw`
1881	///
1882	/// `8086+`
1883	///
1884	/// `16/32/64-bit`
1885	Cmp_rm16_imm16 = 236,
1886	/// `CMP r/m32, imm32`
1887	///
1888	/// `o32 81 /7 id`
1889	///
1890	/// `386+`
1891	///
1892	/// `16/32/64-bit`
1893	Cmp_rm32_imm32 = 237,
1894	/// `CMP r/m64, imm32`
1895	///
1896	/// `o64 81 /7 id`
1897	///
1898	/// `X64`
1899	///
1900	/// `64-bit`
1901	Cmp_rm64_imm32 = 238,
1902	/// `ADD r/m8, imm8`
1903	///
1904	/// `82 /0 ib`
1905	///
1906	/// `8086+`
1907	///
1908	/// `16/32-bit`
1909	Add_rm8_imm8_82 = 239,
1910	/// `OR r/m8, imm8`
1911	///
1912	/// `82 /1 ib`
1913	///
1914	/// `8086+`
1915	///
1916	/// `16/32-bit`
1917	Or_rm8_imm8_82 = 240,
1918	/// `ADC r/m8, imm8`
1919	///
1920	/// `82 /2 ib`
1921	///
1922	/// `8086+`
1923	///
1924	/// `16/32-bit`
1925	Adc_rm8_imm8_82 = 241,
1926	/// `SBB r/m8, imm8`
1927	///
1928	/// `82 /3 ib`
1929	///
1930	/// `8086+`
1931	///
1932	/// `16/32-bit`
1933	Sbb_rm8_imm8_82 = 242,
1934	/// `AND r/m8, imm8`
1935	///
1936	/// `82 /4 ib`
1937	///
1938	/// `8086+`
1939	///
1940	/// `16/32-bit`
1941	And_rm8_imm8_82 = 243,
1942	/// `SUB r/m8, imm8`
1943	///
1944	/// `82 /5 ib`
1945	///
1946	/// `8086+`
1947	///
1948	/// `16/32-bit`
1949	Sub_rm8_imm8_82 = 244,
1950	/// `XOR r/m8, imm8`
1951	///
1952	/// `82 /6 ib`
1953	///
1954	/// `8086+`
1955	///
1956	/// `16/32-bit`
1957	Xor_rm8_imm8_82 = 245,
1958	/// `CMP r/m8, imm8`
1959	///
1960	/// `82 /7 ib`
1961	///
1962	/// `8086+`
1963	///
1964	/// `16/32-bit`
1965	Cmp_rm8_imm8_82 = 246,
1966	/// `ADD r/m16, imm8`
1967	///
1968	/// `o16 83 /0 ib`
1969	///
1970	/// `8086+`
1971	///
1972	/// `16/32/64-bit`
1973	Add_rm16_imm8 = 247,
1974	/// `ADD r/m32, imm8`
1975	///
1976	/// `o32 83 /0 ib`
1977	///
1978	/// `386+`
1979	///
1980	/// `16/32/64-bit`
1981	Add_rm32_imm8 = 248,
1982	/// `ADD r/m64, imm8`
1983	///
1984	/// `o64 83 /0 ib`
1985	///
1986	/// `X64`
1987	///
1988	/// `64-bit`
1989	Add_rm64_imm8 = 249,
1990	/// `OR r/m16, imm8`
1991	///
1992	/// `o16 83 /1 ib`
1993	///
1994	/// `8086+`
1995	///
1996	/// `16/32/64-bit`
1997	Or_rm16_imm8 = 250,
1998	/// `OR r/m32, imm8`
1999	///
2000	/// `o32 83 /1 ib`
2001	///
2002	/// `386+`
2003	///
2004	/// `16/32/64-bit`
2005	Or_rm32_imm8 = 251,
2006	/// `OR r/m64, imm8`
2007	///
2008	/// `o64 83 /1 ib`
2009	///
2010	/// `X64`
2011	///
2012	/// `64-bit`
2013	Or_rm64_imm8 = 252,
2014	/// `ADC r/m16, imm8`
2015	///
2016	/// `o16 83 /2 ib`
2017	///
2018	/// `8086+`
2019	///
2020	/// `16/32/64-bit`
2021	Adc_rm16_imm8 = 253,
2022	/// `ADC r/m32, imm8`
2023	///
2024	/// `o32 83 /2 ib`
2025	///
2026	/// `386+`
2027	///
2028	/// `16/32/64-bit`
2029	Adc_rm32_imm8 = 254,
2030	/// `ADC r/m64, imm8`
2031	///
2032	/// `o64 83 /2 ib`
2033	///
2034	/// `X64`
2035	///
2036	/// `64-bit`
2037	Adc_rm64_imm8 = 255,
2038	/// `SBB r/m16, imm8`
2039	///
2040	/// `o16 83 /3 ib`
2041	///
2042	/// `8086+`
2043	///
2044	/// `16/32/64-bit`
2045	Sbb_rm16_imm8 = 256,
2046	/// `SBB r/m32, imm8`
2047	///
2048	/// `o32 83 /3 ib`
2049	///
2050	/// `386+`
2051	///
2052	/// `16/32/64-bit`
2053	Sbb_rm32_imm8 = 257,
2054	/// `SBB r/m64, imm8`
2055	///
2056	/// `o64 83 /3 ib`
2057	///
2058	/// `X64`
2059	///
2060	/// `64-bit`
2061	Sbb_rm64_imm8 = 258,
2062	/// `AND r/m16, imm8`
2063	///
2064	/// `o16 83 /4 ib`
2065	///
2066	/// `8086+`
2067	///
2068	/// `16/32/64-bit`
2069	And_rm16_imm8 = 259,
2070	/// `AND r/m32, imm8`
2071	///
2072	/// `o32 83 /4 ib`
2073	///
2074	/// `386+`
2075	///
2076	/// `16/32/64-bit`
2077	And_rm32_imm8 = 260,
2078	/// `AND r/m64, imm8`
2079	///
2080	/// `o64 83 /4 ib`
2081	///
2082	/// `X64`
2083	///
2084	/// `64-bit`
2085	And_rm64_imm8 = 261,
2086	/// `SUB r/m16, imm8`
2087	///
2088	/// `o16 83 /5 ib`
2089	///
2090	/// `8086+`
2091	///
2092	/// `16/32/64-bit`
2093	Sub_rm16_imm8 = 262,
2094	/// `SUB r/m32, imm8`
2095	///
2096	/// `o32 83 /5 ib`
2097	///
2098	/// `386+`
2099	///
2100	/// `16/32/64-bit`
2101	Sub_rm32_imm8 = 263,
2102	/// `SUB r/m64, imm8`
2103	///
2104	/// `o64 83 /5 ib`
2105	///
2106	/// `X64`
2107	///
2108	/// `64-bit`
2109	Sub_rm64_imm8 = 264,
2110	/// `XOR r/m16, imm8`
2111	///
2112	/// `o16 83 /6 ib`
2113	///
2114	/// `8086+`
2115	///
2116	/// `16/32/64-bit`
2117	Xor_rm16_imm8 = 265,
2118	/// `XOR r/m32, imm8`
2119	///
2120	/// `o32 83 /6 ib`
2121	///
2122	/// `386+`
2123	///
2124	/// `16/32/64-bit`
2125	Xor_rm32_imm8 = 266,
2126	/// `XOR r/m64, imm8`
2127	///
2128	/// `o64 83 /6 ib`
2129	///
2130	/// `X64`
2131	///
2132	/// `64-bit`
2133	Xor_rm64_imm8 = 267,
2134	/// `CMP r/m16, imm8`
2135	///
2136	/// `o16 83 /7 ib`
2137	///
2138	/// `8086+`
2139	///
2140	/// `16/32/64-bit`
2141	Cmp_rm16_imm8 = 268,
2142	/// `CMP r/m32, imm8`
2143	///
2144	/// `o32 83 /7 ib`
2145	///
2146	/// `386+`
2147	///
2148	/// `16/32/64-bit`
2149	Cmp_rm32_imm8 = 269,
2150	/// `CMP r/m64, imm8`
2151	///
2152	/// `o64 83 /7 ib`
2153	///
2154	/// `X64`
2155	///
2156	/// `64-bit`
2157	Cmp_rm64_imm8 = 270,
2158	/// `TEST r/m8, r8`
2159	///
2160	/// `84 /r`
2161	///
2162	/// `8086+`
2163	///
2164	/// `16/32/64-bit`
2165	Test_rm8_r8 = 271,
2166	/// `TEST r/m16, r16`
2167	///
2168	/// `o16 85 /r`
2169	///
2170	/// `8086+`
2171	///
2172	/// `16/32/64-bit`
2173	Test_rm16_r16 = 272,
2174	/// `TEST r/m32, r32`
2175	///
2176	/// `o32 85 /r`
2177	///
2178	/// `386+`
2179	///
2180	/// `16/32/64-bit`
2181	Test_rm32_r32 = 273,
2182	/// `TEST r/m64, r64`
2183	///
2184	/// `o64 85 /r`
2185	///
2186	/// `X64`
2187	///
2188	/// `64-bit`
2189	Test_rm64_r64 = 274,
2190	/// `XCHG r/m8, r8`
2191	///
2192	/// `86 /r`
2193	///
2194	/// `8086+`
2195	///
2196	/// `16/32/64-bit`
2197	Xchg_rm8_r8 = 275,
2198	/// `XCHG r/m16, r16`
2199	///
2200	/// `o16 87 /r`
2201	///
2202	/// `8086+`
2203	///
2204	/// `16/32/64-bit`
2205	Xchg_rm16_r16 = 276,
2206	/// `XCHG r/m32, r32`
2207	///
2208	/// `o32 87 /r`
2209	///
2210	/// `386+`
2211	///
2212	/// `16/32/64-bit`
2213	Xchg_rm32_r32 = 277,
2214	/// `XCHG r/m64, r64`
2215	///
2216	/// `o64 87 /r`
2217	///
2218	/// `X64`
2219	///
2220	/// `64-bit`
2221	Xchg_rm64_r64 = 278,
2222	/// `MOV r/m8, r8`
2223	///
2224	/// `88 /r`
2225	///
2226	/// `8086+`
2227	///
2228	/// `16/32/64-bit`
2229	Mov_rm8_r8 = 279,
2230	/// `MOV r/m16, r16`
2231	///
2232	/// `o16 89 /r`
2233	///
2234	/// `8086+`
2235	///
2236	/// `16/32/64-bit`
2237	Mov_rm16_r16 = 280,
2238	/// `MOV r/m32, r32`
2239	///
2240	/// `o32 89 /r`
2241	///
2242	/// `386+`
2243	///
2244	/// `16/32/64-bit`
2245	Mov_rm32_r32 = 281,
2246	/// `MOV r/m64, r64`
2247	///
2248	/// `o64 89 /r`
2249	///
2250	/// `X64`
2251	///
2252	/// `64-bit`
2253	Mov_rm64_r64 = 282,
2254	/// `MOV r8, r/m8`
2255	///
2256	/// `8A /r`
2257	///
2258	/// `8086+`
2259	///
2260	/// `16/32/64-bit`
2261	Mov_r8_rm8 = 283,
2262	/// `MOV r16, r/m16`
2263	///
2264	/// `o16 8B /r`
2265	///
2266	/// `8086+`
2267	///
2268	/// `16/32/64-bit`
2269	Mov_r16_rm16 = 284,
2270	/// `MOV r32, r/m32`
2271	///
2272	/// `o32 8B /r`
2273	///
2274	/// `386+`
2275	///
2276	/// `16/32/64-bit`
2277	Mov_r32_rm32 = 285,
2278	/// `MOV r64, r/m64`
2279	///
2280	/// `o64 8B /r`
2281	///
2282	/// `X64`
2283	///
2284	/// `64-bit`
2285	Mov_r64_rm64 = 286,
2286	/// `MOV r/m16, Sreg`
2287	///
2288	/// `o16 8C /r`
2289	///
2290	/// `8086+`
2291	///
2292	/// `16/32/64-bit`
2293	Mov_rm16_Sreg = 287,
2294	/// `MOV r32/m16, Sreg`
2295	///
2296	/// `o32 8C /r`
2297	///
2298	/// `386+`
2299	///
2300	/// `16/32/64-bit`
2301	Mov_r32m16_Sreg = 288,
2302	/// `MOV r64/m16, Sreg`
2303	///
2304	/// `o64 8C /r`
2305	///
2306	/// `X64`
2307	///
2308	/// `64-bit`
2309	Mov_r64m16_Sreg = 289,
2310	/// `LEA r16, m`
2311	///
2312	/// `o16 8D /r`
2313	///
2314	/// `8086+`
2315	///
2316	/// `16/32/64-bit`
2317	Lea_r16_m = 290,
2318	/// `LEA r32, m`
2319	///
2320	/// `o32 8D /r`
2321	///
2322	/// `386+`
2323	///
2324	/// `16/32/64-bit`
2325	Lea_r32_m = 291,
2326	/// `LEA r64, m`
2327	///
2328	/// `o64 8D /r`
2329	///
2330	/// `X64`
2331	///
2332	/// `64-bit`
2333	Lea_r64_m = 292,
2334	/// `MOV Sreg, r/m16`
2335	///
2336	/// `o16 8E /r`
2337	///
2338	/// `8086+`
2339	///
2340	/// `16/32/64-bit`
2341	Mov_Sreg_rm16 = 293,
2342	/// `MOV Sreg, r32/m16`
2343	///
2344	/// `o32 8E /r`
2345	///
2346	/// `386+`
2347	///
2348	/// `16/32/64-bit`
2349	Mov_Sreg_r32m16 = 294,
2350	/// `MOV Sreg, r64/m16`
2351	///
2352	/// `o64 8E /r`
2353	///
2354	/// `X64`
2355	///
2356	/// `64-bit`
2357	Mov_Sreg_r64m16 = 295,
2358	/// `POP r/m16`
2359	///
2360	/// `o16 8F /0`
2361	///
2362	/// `8086+`
2363	///
2364	/// `16/32/64-bit`
2365	Pop_rm16 = 296,
2366	/// `POP r/m32`
2367	///
2368	/// `o32 8F /0`
2369	///
2370	/// `386+`
2371	///
2372	/// `16/32-bit`
2373	Pop_rm32 = 297,
2374	/// `POP r/m64`
2375	///
2376	/// `o64 8F /0`
2377	///
2378	/// `X64`
2379	///
2380	/// `64-bit`
2381	Pop_rm64 = 298,
2382	/// `NOP`
2383	///
2384	/// `o16 90`
2385	///
2386	/// `8086+`
2387	///
2388	/// `16/32/64-bit`
2389	Nopw = 299,
2390	/// `NOP`
2391	///
2392	/// `o32 90`
2393	///
2394	/// `8086+`
2395	///
2396	/// `16/32/64-bit`
2397	Nopd = 300,
2398	/// `NOP`
2399	///
2400	/// `o64 90`
2401	///
2402	/// `8086+`
2403	///
2404	/// `64-bit`
2405	Nopq = 301,
2406	/// `XCHG r16, AX`
2407	///
2408	/// `o16 90+rw`
2409	///
2410	/// `8086+`
2411	///
2412	/// `16/32/64-bit`
2413	Xchg_r16_AX = 302,
2414	/// `XCHG r32, EAX`
2415	///
2416	/// `o32 90+rd`
2417	///
2418	/// `386+`
2419	///
2420	/// `16/32/64-bit`
2421	Xchg_r32_EAX = 303,
2422	/// `XCHG r64, RAX`
2423	///
2424	/// `o64 90+ro`
2425	///
2426	/// `X64`
2427	///
2428	/// `64-bit`
2429	Xchg_r64_RAX = 304,
2430	/// `PAUSE`
2431	///
2432	/// `F3 90`
2433	///
2434	/// `Pentium 4 or later`
2435	///
2436	/// `16/32/64-bit`
2437	Pause = 305,
2438	/// `CBW`
2439	///
2440	/// `o16 98`
2441	///
2442	/// `8086+`
2443	///
2444	/// `16/32/64-bit`
2445	Cbw = 306,
2446	/// `CWDE`
2447	///
2448	/// `o32 98`
2449	///
2450	/// `386+`
2451	///
2452	/// `16/32/64-bit`
2453	Cwde = 307,
2454	/// `CDQE`
2455	///
2456	/// `o64 98`
2457	///
2458	/// `X64`
2459	///
2460	/// `64-bit`
2461	Cdqe = 308,
2462	/// `CWD`
2463	///
2464	/// `o16 99`
2465	///
2466	/// `8086+`
2467	///
2468	/// `16/32/64-bit`
2469	Cwd = 309,
2470	/// `CDQ`
2471	///
2472	/// `o32 99`
2473	///
2474	/// `386+`
2475	///
2476	/// `16/32/64-bit`
2477	Cdq = 310,
2478	/// `CQO`
2479	///
2480	/// `o64 99`
2481	///
2482	/// `X64`
2483	///
2484	/// `64-bit`
2485	Cqo = 311,
2486	/// `CALL ptr16:16`
2487	///
2488	/// `o16 9A cd`
2489	///
2490	/// `8086+`
2491	///
2492	/// `16/32-bit`
2493	Call_ptr1616 = 312,
2494	/// `CALL ptr16:32`
2495	///
2496	/// `o32 9A cp`
2497	///
2498	/// `386+`
2499	///
2500	/// `16/32-bit`
2501	Call_ptr1632 = 313,
2502	/// `WAIT`
2503	///
2504	/// `9B`
2505	///
2506	/// `8086+`
2507	///
2508	/// `16/32/64-bit`
2509	Wait = 314,
2510	/// `PUSHF`
2511	///
2512	/// `o16 9C`
2513	///
2514	/// `8086+`
2515	///
2516	/// `16/32/64-bit`
2517	Pushfw = 315,
2518	/// `PUSHFD`
2519	///
2520	/// `o32 9C`
2521	///
2522	/// `386+`
2523	///
2524	/// `16/32-bit`
2525	Pushfd = 316,
2526	/// `PUSHFQ`
2527	///
2528	/// `o64 9C`
2529	///
2530	/// `X64`
2531	///
2532	/// `64-bit`
2533	Pushfq = 317,
2534	/// `POPF`
2535	///
2536	/// `o16 9D`
2537	///
2538	/// `8086+`
2539	///
2540	/// `16/32/64-bit`
2541	Popfw = 318,
2542	/// `POPFD`
2543	///
2544	/// `o32 9D`
2545	///
2546	/// `386+`
2547	///
2548	/// `16/32-bit`
2549	Popfd = 319,
2550	/// `POPFQ`
2551	///
2552	/// `o64 9D`
2553	///
2554	/// `X64`
2555	///
2556	/// `64-bit`
2557	Popfq = 320,
2558	/// `SAHF`
2559	///
2560	/// `9E`
2561	///
2562	/// `8086+`
2563	///
2564	/// `16/32/64-bit`
2565	Sahf = 321,
2566	/// `LAHF`
2567	///
2568	/// `9F`
2569	///
2570	/// `8086+`
2571	///
2572	/// `16/32/64-bit`
2573	Lahf = 322,
2574	/// `MOV AL, moffs8`
2575	///
2576	/// `A0 mo`
2577	///
2578	/// `8086+`
2579	///
2580	/// `16/32/64-bit`
2581	Mov_AL_moffs8 = 323,
2582	/// `MOV AX, moffs16`
2583	///
2584	/// `o16 A1 mo`
2585	///
2586	/// `8086+`
2587	///
2588	/// `16/32/64-bit`
2589	Mov_AX_moffs16 = 324,
2590	/// `MOV EAX, moffs32`
2591	///
2592	/// `o32 A1 mo`
2593	///
2594	/// `386+`
2595	///
2596	/// `16/32/64-bit`
2597	Mov_EAX_moffs32 = 325,
2598	/// `MOV RAX, moffs64`
2599	///
2600	/// `o64 A1 mo`
2601	///
2602	/// `X64`
2603	///
2604	/// `64-bit`
2605	Mov_RAX_moffs64 = 326,
2606	/// `MOV moffs8, AL`
2607	///
2608	/// `A2 mo`
2609	///
2610	/// `8086+`
2611	///
2612	/// `16/32/64-bit`
2613	Mov_moffs8_AL = 327,
2614	/// `MOV moffs16, AX`
2615	///
2616	/// `o16 A3 mo`
2617	///
2618	/// `8086+`
2619	///
2620	/// `16/32/64-bit`
2621	Mov_moffs16_AX = 328,
2622	/// `MOV moffs32, EAX`
2623	///
2624	/// `o32 A3 mo`
2625	///
2626	/// `386+`
2627	///
2628	/// `16/32/64-bit`
2629	Mov_moffs32_EAX = 329,
2630	/// `MOV moffs64, RAX`
2631	///
2632	/// `o64 A3 mo`
2633	///
2634	/// `X64`
2635	///
2636	/// `64-bit`
2637	Mov_moffs64_RAX = 330,
2638	/// `MOVSB`
2639	///
2640	/// `A4`
2641	///
2642	/// `8086+`
2643	///
2644	/// `16/32/64-bit`
2645	Movsb_m8_m8 = 331,
2646	/// `MOVSW`
2647	///
2648	/// `o16 A5`
2649	///
2650	/// `8086+`
2651	///
2652	/// `16/32/64-bit`
2653	Movsw_m16_m16 = 332,
2654	/// `MOVSD`
2655	///
2656	/// `o32 A5`
2657	///
2658	/// `386+`
2659	///
2660	/// `16/32/64-bit`
2661	Movsd_m32_m32 = 333,
2662	/// `MOVSQ`
2663	///
2664	/// `o64 A5`
2665	///
2666	/// `X64`
2667	///
2668	/// `64-bit`
2669	Movsq_m64_m64 = 334,
2670	/// `CMPSB`
2671	///
2672	/// `A6`
2673	///
2674	/// `8086+`
2675	///
2676	/// `16/32/64-bit`
2677	Cmpsb_m8_m8 = 335,
2678	/// `CMPSW`
2679	///
2680	/// `o16 A7`
2681	///
2682	/// `8086+`
2683	///
2684	/// `16/32/64-bit`
2685	Cmpsw_m16_m16 = 336,
2686	/// `CMPSD`
2687	///
2688	/// `o32 A7`
2689	///
2690	/// `386+`
2691	///
2692	/// `16/32/64-bit`
2693	Cmpsd_m32_m32 = 337,
2694	/// `CMPSQ`
2695	///
2696	/// `o64 A7`
2697	///
2698	/// `X64`
2699	///
2700	/// `64-bit`
2701	Cmpsq_m64_m64 = 338,
2702	/// `TEST AL, imm8`
2703	///
2704	/// `A8 ib`
2705	///
2706	/// `8086+`
2707	///
2708	/// `16/32/64-bit`
2709	Test_AL_imm8 = 339,
2710	/// `TEST AX, imm16`
2711	///
2712	/// `o16 A9 iw`
2713	///
2714	/// `8086+`
2715	///
2716	/// `16/32/64-bit`
2717	Test_AX_imm16 = 340,
2718	/// `TEST EAX, imm32`
2719	///
2720	/// `o32 A9 id`
2721	///
2722	/// `386+`
2723	///
2724	/// `16/32/64-bit`
2725	Test_EAX_imm32 = 341,
2726	/// `TEST RAX, imm32`
2727	///
2728	/// `o64 A9 id`
2729	///
2730	/// `X64`
2731	///
2732	/// `64-bit`
2733	Test_RAX_imm32 = 342,
2734	/// `STOSB`
2735	///
2736	/// `AA`
2737	///
2738	/// `8086+`
2739	///
2740	/// `16/32/64-bit`
2741	Stosb_m8_AL = 343,
2742	/// `STOSW`
2743	///
2744	/// `o16 AB`
2745	///
2746	/// `8086+`
2747	///
2748	/// `16/32/64-bit`
2749	Stosw_m16_AX = 344,
2750	/// `STOSD`
2751	///
2752	/// `o32 AB`
2753	///
2754	/// `386+`
2755	///
2756	/// `16/32/64-bit`
2757	Stosd_m32_EAX = 345,
2758	/// `STOSQ`
2759	///
2760	/// `o64 AB`
2761	///
2762	/// `X64`
2763	///
2764	/// `64-bit`
2765	Stosq_m64_RAX = 346,
2766	/// `LODSB`
2767	///
2768	/// `AC`
2769	///
2770	/// `8086+`
2771	///
2772	/// `16/32/64-bit`
2773	Lodsb_AL_m8 = 347,
2774	/// `LODSW`
2775	///
2776	/// `o16 AD`
2777	///
2778	/// `8086+`
2779	///
2780	/// `16/32/64-bit`
2781	Lodsw_AX_m16 = 348,
2782	/// `LODSD`
2783	///
2784	/// `o32 AD`
2785	///
2786	/// `386+`
2787	///
2788	/// `16/32/64-bit`
2789	Lodsd_EAX_m32 = 349,
2790	/// `LODSQ`
2791	///
2792	/// `o64 AD`
2793	///
2794	/// `X64`
2795	///
2796	/// `64-bit`
2797	Lodsq_RAX_m64 = 350,
2798	/// `SCASB`
2799	///
2800	/// `AE`
2801	///
2802	/// `8086+`
2803	///
2804	/// `16/32/64-bit`
2805	Scasb_AL_m8 = 351,
2806	/// `SCASW`
2807	///
2808	/// `o16 AF`
2809	///
2810	/// `8086+`
2811	///
2812	/// `16/32/64-bit`
2813	Scasw_AX_m16 = 352,
2814	/// `SCASD`
2815	///
2816	/// `o32 AF`
2817	///
2818	/// `386+`
2819	///
2820	/// `16/32/64-bit`
2821	Scasd_EAX_m32 = 353,
2822	/// `SCASQ`
2823	///
2824	/// `o64 AF`
2825	///
2826	/// `X64`
2827	///
2828	/// `64-bit`
2829	Scasq_RAX_m64 = 354,
2830	/// `MOV r8, imm8`
2831	///
2832	/// `B0+rb ib`
2833	///
2834	/// `8086+`
2835	///
2836	/// `16/32/64-bit`
2837	Mov_r8_imm8 = 355,
2838	/// `MOV r16, imm16`
2839	///
2840	/// `o16 B8+rw iw`
2841	///
2842	/// `8086+`
2843	///
2844	/// `16/32/64-bit`
2845	Mov_r16_imm16 = 356,
2846	/// `MOV r32, imm32`
2847	///
2848	/// `o32 B8+rd id`
2849	///
2850	/// `386+`
2851	///
2852	/// `16/32/64-bit`
2853	Mov_r32_imm32 = 357,
2854	/// `MOV r64, imm64`
2855	///
2856	/// `o64 B8+ro io`
2857	///
2858	/// `X64`
2859	///
2860	/// `64-bit`
2861	Mov_r64_imm64 = 358,
2862	/// `ROL r/m8, imm8`
2863	///
2864	/// `C0 /0 ib`
2865	///
2866	/// `186+`
2867	///
2868	/// `16/32/64-bit`
2869	Rol_rm8_imm8 = 359,
2870	/// `ROR r/m8, imm8`
2871	///
2872	/// `C0 /1 ib`
2873	///
2874	/// `186+`
2875	///
2876	/// `16/32/64-bit`
2877	Ror_rm8_imm8 = 360,
2878	/// `RCL r/m8, imm8`
2879	///
2880	/// `C0 /2 ib`
2881	///
2882	/// `186+`
2883	///
2884	/// `16/32/64-bit`
2885	Rcl_rm8_imm8 = 361,
2886	/// `RCR r/m8, imm8`
2887	///
2888	/// `C0 /3 ib`
2889	///
2890	/// `186+`
2891	///
2892	/// `16/32/64-bit`
2893	Rcr_rm8_imm8 = 362,
2894	/// `SHL r/m8, imm8`
2895	///
2896	/// `C0 /4 ib`
2897	///
2898	/// `186+`
2899	///
2900	/// `16/32/64-bit`
2901	Shl_rm8_imm8 = 363,
2902	/// `SHR r/m8, imm8`
2903	///
2904	/// `C0 /5 ib`
2905	///
2906	/// `186+`
2907	///
2908	/// `16/32/64-bit`
2909	Shr_rm8_imm8 = 364,
2910	/// `SAL r/m8, imm8`
2911	///
2912	/// `C0 /6 ib`
2913	///
2914	/// `186+`
2915	///
2916	/// `16/32/64-bit`
2917	Sal_rm8_imm8 = 365,
2918	/// `SAR r/m8, imm8`
2919	///
2920	/// `C0 /7 ib`
2921	///
2922	/// `186+`
2923	///
2924	/// `16/32/64-bit`
2925	Sar_rm8_imm8 = 366,
2926	/// `ROL r/m16, imm8`
2927	///
2928	/// `o16 C1 /0 ib`
2929	///
2930	/// `186+`
2931	///
2932	/// `16/32/64-bit`
2933	Rol_rm16_imm8 = 367,
2934	/// `ROL r/m32, imm8`
2935	///
2936	/// `o32 C1 /0 ib`
2937	///
2938	/// `386+`
2939	///
2940	/// `16/32/64-bit`
2941	Rol_rm32_imm8 = 368,
2942	/// `ROL r/m64, imm8`
2943	///
2944	/// `o64 C1 /0 ib`
2945	///
2946	/// `X64`
2947	///
2948	/// `64-bit`
2949	Rol_rm64_imm8 = 369,
2950	/// `ROR r/m16, imm8`
2951	///
2952	/// `o16 C1 /1 ib`
2953	///
2954	/// `186+`
2955	///
2956	/// `16/32/64-bit`
2957	Ror_rm16_imm8 = 370,
2958	/// `ROR r/m32, imm8`
2959	///
2960	/// `o32 C1 /1 ib`
2961	///
2962	/// `386+`
2963	///
2964	/// `16/32/64-bit`
2965	Ror_rm32_imm8 = 371,
2966	/// `ROR r/m64, imm8`
2967	///
2968	/// `o64 C1 /1 ib`
2969	///
2970	/// `X64`
2971	///
2972	/// `64-bit`
2973	Ror_rm64_imm8 = 372,
2974	/// `RCL r/m16, imm8`
2975	///
2976	/// `o16 C1 /2 ib`
2977	///
2978	/// `186+`
2979	///
2980	/// `16/32/64-bit`
2981	Rcl_rm16_imm8 = 373,
2982	/// `RCL r/m32, imm8`
2983	///
2984	/// `o32 C1 /2 ib`
2985	///
2986	/// `386+`
2987	///
2988	/// `16/32/64-bit`
2989	Rcl_rm32_imm8 = 374,
2990	/// `RCL r/m64, imm8`
2991	///
2992	/// `o64 C1 /2 ib`
2993	///
2994	/// `X64`
2995	///
2996	/// `64-bit`
2997	Rcl_rm64_imm8 = 375,
2998	/// `RCR r/m16, imm8`
2999	///
3000	/// `o16 C1 /3 ib`
3001	///
3002	/// `186+`
3003	///
3004	/// `16/32/64-bit`
3005	Rcr_rm16_imm8 = 376,
3006	/// `RCR r/m32, imm8`
3007	///
3008	/// `o32 C1 /3 ib`
3009	///
3010	/// `386+`
3011	///
3012	/// `16/32/64-bit`
3013	Rcr_rm32_imm8 = 377,
3014	/// `RCR r/m64, imm8`
3015	///
3016	/// `o64 C1 /3 ib`
3017	///
3018	/// `X64`
3019	///
3020	/// `64-bit`
3021	Rcr_rm64_imm8 = 378,
3022	/// `SHL r/m16, imm8`
3023	///
3024	/// `o16 C1 /4 ib`
3025	///
3026	/// `186+`
3027	///
3028	/// `16/32/64-bit`
3029	Shl_rm16_imm8 = 379,
3030	/// `SHL r/m32, imm8`
3031	///
3032	/// `o32 C1 /4 ib`
3033	///
3034	/// `386+`
3035	///
3036	/// `16/32/64-bit`
3037	Shl_rm32_imm8 = 380,
3038	/// `SHL r/m64, imm8`
3039	///
3040	/// `o64 C1 /4 ib`
3041	///
3042	/// `X64`
3043	///
3044	/// `64-bit`
3045	Shl_rm64_imm8 = 381,
3046	/// `SHR r/m16, imm8`
3047	///
3048	/// `o16 C1 /5 ib`
3049	///
3050	/// `186+`
3051	///
3052	/// `16/32/64-bit`
3053	Shr_rm16_imm8 = 382,
3054	/// `SHR r/m32, imm8`
3055	///
3056	/// `o32 C1 /5 ib`
3057	///
3058	/// `386+`
3059	///
3060	/// `16/32/64-bit`
3061	Shr_rm32_imm8 = 383,
3062	/// `SHR r/m64, imm8`
3063	///
3064	/// `o64 C1 /5 ib`
3065	///
3066	/// `X64`
3067	///
3068	/// `64-bit`
3069	Shr_rm64_imm8 = 384,
3070	/// `SAL r/m16, imm8`
3071	///
3072	/// `o16 C1 /6 ib`
3073	///
3074	/// `186+`
3075	///
3076	/// `16/32/64-bit`
3077	Sal_rm16_imm8 = 385,
3078	/// `SAL r/m32, imm8`
3079	///
3080	/// `o32 C1 /6 ib`
3081	///
3082	/// `386+`
3083	///
3084	/// `16/32/64-bit`
3085	Sal_rm32_imm8 = 386,
3086	/// `SAL r/m64, imm8`
3087	///
3088	/// `o64 C1 /6 ib`
3089	///
3090	/// `X64`
3091	///
3092	/// `64-bit`
3093	Sal_rm64_imm8 = 387,
3094	/// `SAR r/m16, imm8`
3095	///
3096	/// `o16 C1 /7 ib`
3097	///
3098	/// `186+`
3099	///
3100	/// `16/32/64-bit`
3101	Sar_rm16_imm8 = 388,
3102	/// `SAR r/m32, imm8`
3103	///
3104	/// `o32 C1 /7 ib`
3105	///
3106	/// `386+`
3107	///
3108	/// `16/32/64-bit`
3109	Sar_rm32_imm8 = 389,
3110	/// `SAR r/m64, imm8`
3111	///
3112	/// `o64 C1 /7 ib`
3113	///
3114	/// `X64`
3115	///
3116	/// `64-bit`
3117	Sar_rm64_imm8 = 390,
3118	/// `RET imm16`
3119	///
3120	/// `o16 C2 iw`
3121	///
3122	/// `8086+`
3123	///
3124	/// `16/32/64-bit`
3125	Retnw_imm16 = 391,
3126	/// `RET imm16`
3127	///
3128	/// `o32 C2 iw`
3129	///
3130	/// `386+`
3131	///
3132	/// `16/32-bit`
3133	Retnd_imm16 = 392,
3134	/// `RET imm16`
3135	///
3136	/// `o64 C2 iw`
3137	///
3138	/// `X64`
3139	///
3140	/// `64-bit`
3141	Retnq_imm16 = 393,
3142	/// `RET`
3143	///
3144	/// `o16 C3`
3145	///
3146	/// `8086+`
3147	///
3148	/// `16/32/64-bit`
3149	Retnw = 394,
3150	/// `RET`
3151	///
3152	/// `o32 C3`
3153	///
3154	/// `386+`
3155	///
3156	/// `16/32-bit`
3157	Retnd = 395,
3158	/// `RET`
3159	///
3160	/// `o64 C3`
3161	///
3162	/// `X64`
3163	///
3164	/// `64-bit`
3165	Retnq = 396,
3166	/// `LES r16, m16:16`
3167	///
3168	/// `o16 C4 /r`
3169	///
3170	/// `8086+`
3171	///
3172	/// `16/32-bit`
3173	Les_r16_m1616 = 397,
3174	/// `LES r32, m16:32`
3175	///
3176	/// `o32 C4 /r`
3177	///
3178	/// `386+`
3179	///
3180	/// `16/32-bit`
3181	Les_r32_m1632 = 398,
3182	/// `LDS r16, m16:16`
3183	///
3184	/// `o16 C5 /r`
3185	///
3186	/// `8086+`
3187	///
3188	/// `16/32-bit`
3189	Lds_r16_m1616 = 399,
3190	/// `LDS r32, m16:32`
3191	///
3192	/// `o32 C5 /r`
3193	///
3194	/// `386+`
3195	///
3196	/// `16/32-bit`
3197	Lds_r32_m1632 = 400,
3198	/// `MOV r/m8, imm8`
3199	///
3200	/// `C6 /0 ib`
3201	///
3202	/// `8086+`
3203	///
3204	/// `16/32/64-bit`
3205	Mov_rm8_imm8 = 401,
3206	/// `XABORT imm8`
3207	///
3208	/// `C6 F8 ib`
3209	///
3210	/// `RTM`
3211	///
3212	/// `16/32/64-bit`
3213	Xabort_imm8 = 402,
3214	/// `MOV r/m16, imm16`
3215	///
3216	/// `o16 C7 /0 iw`
3217	///
3218	/// `8086+`
3219	///
3220	/// `16/32/64-bit`
3221	Mov_rm16_imm16 = 403,
3222	/// `MOV r/m32, imm32`
3223	///
3224	/// `o32 C7 /0 id`
3225	///
3226	/// `386+`
3227	///
3228	/// `16/32/64-bit`
3229	Mov_rm32_imm32 = 404,
3230	/// `MOV r/m64, imm32`
3231	///
3232	/// `o64 C7 /0 id`
3233	///
3234	/// `X64`
3235	///
3236	/// `64-bit`
3237	Mov_rm64_imm32 = 405,
3238	/// `XBEGIN rel16`
3239	///
3240	/// `o16 C7 F8 cw`
3241	///
3242	/// `RTM`
3243	///
3244	/// `16/32/64-bit`
3245	Xbegin_rel16 = 406,
3246	/// `XBEGIN rel32`
3247	///
3248	/// `o32 C7 F8 cd`
3249	///
3250	/// `RTM`
3251	///
3252	/// `16/32/64-bit`
3253	Xbegin_rel32 = 407,
3254	/// `ENTER imm16, imm8`
3255	///
3256	/// `o16 C8 iw ib`
3257	///
3258	/// `186+`
3259	///
3260	/// `16/32/64-bit`
3261	Enterw_imm16_imm8 = 408,
3262	/// `ENTER imm16, imm8`
3263	///
3264	/// `o32 C8 iw ib`
3265	///
3266	/// `386+`
3267	///
3268	/// `16/32-bit`
3269	Enterd_imm16_imm8 = 409,
3270	/// `ENTER imm16, imm8`
3271	///
3272	/// `o64 C8 iw ib`
3273	///
3274	/// `X64`
3275	///
3276	/// `64-bit`
3277	Enterq_imm16_imm8 = 410,
3278	/// `LEAVE`
3279	///
3280	/// `o16 C9`
3281	///
3282	/// `186+`
3283	///
3284	/// `16/32/64-bit`
3285	Leavew = 411,
3286	/// `LEAVE`
3287	///
3288	/// `o32 C9`
3289	///
3290	/// `386+`
3291	///
3292	/// `16/32-bit`
3293	Leaved = 412,
3294	/// `LEAVE`
3295	///
3296	/// `o64 C9`
3297	///
3298	/// `X64`
3299	///
3300	/// `64-bit`
3301	Leaveq = 413,
3302	/// `RETF imm16`
3303	///
3304	/// `o16 CA iw`
3305	///
3306	/// `8086+`
3307	///
3308	/// `16/32/64-bit`
3309	Retfw_imm16 = 414,
3310	/// `RETF imm16`
3311	///
3312	/// `o32 CA iw`
3313	///
3314	/// `386+`
3315	///
3316	/// `16/32/64-bit`
3317	Retfd_imm16 = 415,
3318	/// `RETF imm16`
3319	///
3320	/// `o64 CA iw`
3321	///
3322	/// `X64`
3323	///
3324	/// `64-bit`
3325	Retfq_imm16 = 416,
3326	/// `RETF`
3327	///
3328	/// `o16 CB`
3329	///
3330	/// `8086+`
3331	///
3332	/// `16/32/64-bit`
3333	Retfw = 417,
3334	/// `RETF`
3335	///
3336	/// `o32 CB`
3337	///
3338	/// `386+`
3339	///
3340	/// `16/32/64-bit`
3341	Retfd = 418,
3342	/// `RETF`
3343	///
3344	/// `o64 CB`
3345	///
3346	/// `X64`
3347	///
3348	/// `64-bit`
3349	Retfq = 419,
3350	/// `INT3`
3351	///
3352	/// `CC`
3353	///
3354	/// `8086+`
3355	///
3356	/// `16/32/64-bit`
3357	Int3 = 420,
3358	/// `INT imm8`
3359	///
3360	/// `CD ib`
3361	///
3362	/// `8086+`
3363	///
3364	/// `16/32/64-bit`
3365	Int_imm8 = 421,
3366	/// `INTO`
3367	///
3368	/// `CE`
3369	///
3370	/// `8086+`
3371	///
3372	/// `16/32-bit`
3373	Into = 422,
3374	/// `IRET`
3375	///
3376	/// `o16 CF`
3377	///
3378	/// `8086+`
3379	///
3380	/// `16/32/64-bit`
3381	Iretw = 423,
3382	/// `IRETD`
3383	///
3384	/// `o32 CF`
3385	///
3386	/// `386+`
3387	///
3388	/// `16/32/64-bit`
3389	Iretd = 424,
3390	/// `IRETQ`
3391	///
3392	/// `o64 CF`
3393	///
3394	/// `X64`
3395	///
3396	/// `64-bit`
3397	Iretq = 425,
3398	/// `ROL r/m8, 1`
3399	///
3400	/// `D0 /0`
3401	///
3402	/// `8086+`
3403	///
3404	/// `16/32/64-bit`
3405	Rol_rm8_1 = 426,
3406	/// `ROR r/m8, 1`
3407	///
3408	/// `D0 /1`
3409	///
3410	/// `8086+`
3411	///
3412	/// `16/32/64-bit`
3413	Ror_rm8_1 = 427,
3414	/// `RCL r/m8, 1`
3415	///
3416	/// `D0 /2`
3417	///
3418	/// `8086+`
3419	///
3420	/// `16/32/64-bit`
3421	Rcl_rm8_1 = 428,
3422	/// `RCR r/m8, 1`
3423	///
3424	/// `D0 /3`
3425	///
3426	/// `8086+`
3427	///
3428	/// `16/32/64-bit`
3429	Rcr_rm8_1 = 429,
3430	/// `SHL r/m8, 1`
3431	///
3432	/// `D0 /4`
3433	///
3434	/// `8086+`
3435	///
3436	/// `16/32/64-bit`
3437	Shl_rm8_1 = 430,
3438	/// `SHR r/m8, 1`
3439	///
3440	/// `D0 /5`
3441	///
3442	/// `8086+`
3443	///
3444	/// `16/32/64-bit`
3445	Shr_rm8_1 = 431,
3446	/// `SAL r/m8, 1`
3447	///
3448	/// `D0 /6`
3449	///
3450	/// `8086+`
3451	///
3452	/// `16/32/64-bit`
3453	Sal_rm8_1 = 432,
3454	/// `SAR r/m8, 1`
3455	///
3456	/// `D0 /7`
3457	///
3458	/// `8086+`
3459	///
3460	/// `16/32/64-bit`
3461	Sar_rm8_1 = 433,
3462	/// `ROL r/m16, 1`
3463	///
3464	/// `o16 D1 /0`
3465	///
3466	/// `8086+`
3467	///
3468	/// `16/32/64-bit`
3469	Rol_rm16_1 = 434,
3470	/// `ROL r/m32, 1`
3471	///
3472	/// `o32 D1 /0`
3473	///
3474	/// `386+`
3475	///
3476	/// `16/32/64-bit`
3477	Rol_rm32_1 = 435,
3478	/// `ROL r/m64, 1`
3479	///
3480	/// `o64 D1 /0`
3481	///
3482	/// `X64`
3483	///
3484	/// `64-bit`
3485	Rol_rm64_1 = 436,
3486	/// `ROR r/m16, 1`
3487	///
3488	/// `o16 D1 /1`
3489	///
3490	/// `8086+`
3491	///
3492	/// `16/32/64-bit`
3493	Ror_rm16_1 = 437,
3494	/// `ROR r/m32, 1`
3495	///
3496	/// `o32 D1 /1`
3497	///
3498	/// `386+`
3499	///
3500	/// `16/32/64-bit`
3501	Ror_rm32_1 = 438,
3502	/// `ROR r/m64, 1`
3503	///
3504	/// `o64 D1 /1`
3505	///
3506	/// `X64`
3507	///
3508	/// `64-bit`
3509	Ror_rm64_1 = 439,
3510	/// `RCL r/m16, 1`
3511	///
3512	/// `o16 D1 /2`
3513	///
3514	/// `8086+`
3515	///
3516	/// `16/32/64-bit`
3517	Rcl_rm16_1 = 440,
3518	/// `RCL r/m32, 1`
3519	///
3520	/// `o32 D1 /2`
3521	///
3522	/// `386+`
3523	///
3524	/// `16/32/64-bit`
3525	Rcl_rm32_1 = 441,
3526	/// `RCL r/m64, 1`
3527	///
3528	/// `o64 D1 /2`
3529	///
3530	/// `X64`
3531	///
3532	/// `64-bit`
3533	Rcl_rm64_1 = 442,
3534	/// `RCR r/m16, 1`
3535	///
3536	/// `o16 D1 /3`
3537	///
3538	/// `8086+`
3539	///
3540	/// `16/32/64-bit`
3541	Rcr_rm16_1 = 443,
3542	/// `RCR r/m32, 1`
3543	///
3544	/// `o32 D1 /3`
3545	///
3546	/// `386+`
3547	///
3548	/// `16/32/64-bit`
3549	Rcr_rm32_1 = 444,
3550	/// `RCR r/m64, 1`
3551	///
3552	/// `o64 D1 /3`
3553	///
3554	/// `X64`
3555	///
3556	/// `64-bit`
3557	Rcr_rm64_1 = 445,
3558	/// `SHL r/m16, 1`
3559	///
3560	/// `o16 D1 /4`
3561	///
3562	/// `8086+`
3563	///
3564	/// `16/32/64-bit`
3565	Shl_rm16_1 = 446,
3566	/// `SHL r/m32, 1`
3567	///
3568	/// `o32 D1 /4`
3569	///
3570	/// `386+`
3571	///
3572	/// `16/32/64-bit`
3573	Shl_rm32_1 = 447,
3574	/// `SHL r/m64, 1`
3575	///
3576	/// `o64 D1 /4`
3577	///
3578	/// `X64`
3579	///
3580	/// `64-bit`
3581	Shl_rm64_1 = 448,
3582	/// `SHR r/m16, 1`
3583	///
3584	/// `o16 D1 /5`
3585	///
3586	/// `8086+`
3587	///
3588	/// `16/32/64-bit`
3589	Shr_rm16_1 = 449,
3590	/// `SHR r/m32, 1`
3591	///
3592	/// `o32 D1 /5`
3593	///
3594	/// `386+`
3595	///
3596	/// `16/32/64-bit`
3597	Shr_rm32_1 = 450,
3598	/// `SHR r/m64, 1`
3599	///
3600	/// `o64 D1 /5`
3601	///
3602	/// `X64`
3603	///
3604	/// `64-bit`
3605	Shr_rm64_1 = 451,
3606	/// `SAL r/m16, 1`
3607	///
3608	/// `o16 D1 /6`
3609	///
3610	/// `8086+`
3611	///
3612	/// `16/32/64-bit`
3613	Sal_rm16_1 = 452,
3614	/// `SAL r/m32, 1`
3615	///
3616	/// `o32 D1 /6`
3617	///
3618	/// `386+`
3619	///
3620	/// `16/32/64-bit`
3621	Sal_rm32_1 = 453,
3622	/// `SAL r/m64, 1`
3623	///
3624	/// `o64 D1 /6`
3625	///
3626	/// `X64`
3627	///
3628	/// `64-bit`
3629	Sal_rm64_1 = 454,
3630	/// `SAR r/m16, 1`
3631	///
3632	/// `o16 D1 /7`
3633	///
3634	/// `8086+`
3635	///
3636	/// `16/32/64-bit`
3637	Sar_rm16_1 = 455,
3638	/// `SAR r/m32, 1`
3639	///
3640	/// `o32 D1 /7`
3641	///
3642	/// `386+`
3643	///
3644	/// `16/32/64-bit`
3645	Sar_rm32_1 = 456,
3646	/// `SAR r/m64, 1`
3647	///
3648	/// `o64 D1 /7`
3649	///
3650	/// `X64`
3651	///
3652	/// `64-bit`
3653	Sar_rm64_1 = 457,
3654	/// `ROL r/m8, CL`
3655	///
3656	/// `D2 /0`
3657	///
3658	/// `8086+`
3659	///
3660	/// `16/32/64-bit`
3661	Rol_rm8_CL = 458,
3662	/// `ROR r/m8, CL`
3663	///
3664	/// `D2 /1`
3665	///
3666	/// `8086+`
3667	///
3668	/// `16/32/64-bit`
3669	Ror_rm8_CL = 459,
3670	/// `RCL r/m8, CL`
3671	///
3672	/// `D2 /2`
3673	///
3674	/// `8086+`
3675	///
3676	/// `16/32/64-bit`
3677	Rcl_rm8_CL = 460,
3678	/// `RCR r/m8, CL`
3679	///
3680	/// `D2 /3`
3681	///
3682	/// `8086+`
3683	///
3684	/// `16/32/64-bit`
3685	Rcr_rm8_CL = 461,
3686	/// `SHL r/m8, CL`
3687	///
3688	/// `D2 /4`
3689	///
3690	/// `8086+`
3691	///
3692	/// `16/32/64-bit`
3693	Shl_rm8_CL = 462,
3694	/// `SHR r/m8, CL`
3695	///
3696	/// `D2 /5`
3697	///
3698	/// `8086+`
3699	///
3700	/// `16/32/64-bit`
3701	Shr_rm8_CL = 463,
3702	/// `SAL r/m8, CL`
3703	///
3704	/// `D2 /6`
3705	///
3706	/// `8086+`
3707	///
3708	/// `16/32/64-bit`
3709	Sal_rm8_CL = 464,
3710	/// `SAR r/m8, CL`
3711	///
3712	/// `D2 /7`
3713	///
3714	/// `8086+`
3715	///
3716	/// `16/32/64-bit`
3717	Sar_rm8_CL = 465,
3718	/// `ROL r/m16, CL`
3719	///
3720	/// `o16 D3 /0`
3721	///
3722	/// `8086+`
3723	///
3724	/// `16/32/64-bit`
3725	Rol_rm16_CL = 466,
3726	/// `ROL r/m32, CL`
3727	///
3728	/// `o32 D3 /0`
3729	///
3730	/// `386+`
3731	///
3732	/// `16/32/64-bit`
3733	Rol_rm32_CL = 467,
3734	/// `ROL r/m64, CL`
3735	///
3736	/// `o64 D3 /0`
3737	///
3738	/// `X64`
3739	///
3740	/// `64-bit`
3741	Rol_rm64_CL = 468,
3742	/// `ROR r/m16, CL`
3743	///
3744	/// `o16 D3 /1`
3745	///
3746	/// `8086+`
3747	///
3748	/// `16/32/64-bit`
3749	Ror_rm16_CL = 469,
3750	/// `ROR r/m32, CL`
3751	///
3752	/// `o32 D3 /1`
3753	///
3754	/// `386+`
3755	///
3756	/// `16/32/64-bit`
3757	Ror_rm32_CL = 470,
3758	/// `ROR r/m64, CL`
3759	///
3760	/// `o64 D3 /1`
3761	///
3762	/// `X64`
3763	///
3764	/// `64-bit`
3765	Ror_rm64_CL = 471,
3766	/// `RCL r/m16, CL`
3767	///
3768	/// `o16 D3 /2`
3769	///
3770	/// `8086+`
3771	///
3772	/// `16/32/64-bit`
3773	Rcl_rm16_CL = 472,
3774	/// `RCL r/m32, CL`
3775	///
3776	/// `o32 D3 /2`
3777	///
3778	/// `386+`
3779	///
3780	/// `16/32/64-bit`
3781	Rcl_rm32_CL = 473,
3782	/// `RCL r/m64, CL`
3783	///
3784	/// `o64 D3 /2`
3785	///
3786	/// `X64`
3787	///
3788	/// `64-bit`
3789	Rcl_rm64_CL = 474,
3790	/// `RCR r/m16, CL`
3791	///
3792	/// `o16 D3 /3`
3793	///
3794	/// `8086+`
3795	///
3796	/// `16/32/64-bit`
3797	Rcr_rm16_CL = 475,
3798	/// `RCR r/m32, CL`
3799	///
3800	/// `o32 D3 /3`
3801	///
3802	/// `386+`
3803	///
3804	/// `16/32/64-bit`
3805	Rcr_rm32_CL = 476,
3806	/// `RCR r/m64, CL`
3807	///
3808	/// `o64 D3 /3`
3809	///
3810	/// `X64`
3811	///
3812	/// `64-bit`
3813	Rcr_rm64_CL = 477,
3814	/// `SHL r/m16, CL`
3815	///
3816	/// `o16 D3 /4`
3817	///
3818	/// `8086+`
3819	///
3820	/// `16/32/64-bit`
3821	Shl_rm16_CL = 478,
3822	/// `SHL r/m32, CL`
3823	///
3824	/// `o32 D3 /4`
3825	///
3826	/// `386+`
3827	///
3828	/// `16/32/64-bit`
3829	Shl_rm32_CL = 479,
3830	/// `SHL r/m64, CL`
3831	///
3832	/// `o64 D3 /4`
3833	///
3834	/// `X64`
3835	///
3836	/// `64-bit`
3837	Shl_rm64_CL = 480,
3838	/// `SHR r/m16, CL`
3839	///
3840	/// `o16 D3 /5`
3841	///
3842	/// `8086+`
3843	///
3844	/// `16/32/64-bit`
3845	Shr_rm16_CL = 481,
3846	/// `SHR r/m32, CL`
3847	///
3848	/// `o32 D3 /5`
3849	///
3850	/// `386+`
3851	///
3852	/// `16/32/64-bit`
3853	Shr_rm32_CL = 482,
3854	/// `SHR r/m64, CL`
3855	///
3856	/// `o64 D3 /5`
3857	///
3858	/// `X64`
3859	///
3860	/// `64-bit`
3861	Shr_rm64_CL = 483,
3862	/// `SAL r/m16, CL`
3863	///
3864	/// `o16 D3 /6`
3865	///
3866	/// `8086+`
3867	///
3868	/// `16/32/64-bit`
3869	Sal_rm16_CL = 484,
3870	/// `SAL r/m32, CL`
3871	///
3872	/// `o32 D3 /6`
3873	///
3874	/// `386+`
3875	///
3876	/// `16/32/64-bit`
3877	Sal_rm32_CL = 485,
3878	/// `SAL r/m64, CL`
3879	///
3880	/// `o64 D3 /6`
3881	///
3882	/// `X64`
3883	///
3884	/// `64-bit`
3885	Sal_rm64_CL = 486,
3886	/// `SAR r/m16, CL`
3887	///
3888	/// `o16 D3 /7`
3889	///
3890	/// `8086+`
3891	///
3892	/// `16/32/64-bit`
3893	Sar_rm16_CL = 487,
3894	/// `SAR r/m32, CL`
3895	///
3896	/// `o32 D3 /7`
3897	///
3898	/// `386+`
3899	///
3900	/// `16/32/64-bit`
3901	Sar_rm32_CL = 488,
3902	/// `SAR r/m64, CL`
3903	///
3904	/// `o64 D3 /7`
3905	///
3906	/// `X64`
3907	///
3908	/// `64-bit`
3909	Sar_rm64_CL = 489,
3910	/// `AAM imm8`
3911	///
3912	/// `D4 ib`
3913	///
3914	/// `8086+`
3915	///
3916	/// `16/32-bit`
3917	Aam_imm8 = 490,
3918	/// `AAD imm8`
3919	///
3920	/// `D5 ib`
3921	///
3922	/// `8086+`
3923	///
3924	/// `16/32-bit`
3925	Aad_imm8 = 491,
3926	/// `SALC`
3927	///
3928	/// `D6`
3929	///
3930	/// `8086+`
3931	///
3932	/// `16/32-bit`
3933	Salc = 492,
3934	/// `XLATB`
3935	///
3936	/// `D7`
3937	///
3938	/// `8086+`
3939	///
3940	/// `16/32/64-bit`
3941	Xlat_m8 = 493,
3942	/// `FADD m32fp`
3943	///
3944	/// `D8 /0`
3945	///
3946	/// `8087+`
3947	///
3948	/// `16/32/64-bit`
3949	Fadd_m32fp = 494,
3950	/// `FMUL m32fp`
3951	///
3952	/// `D8 /1`
3953	///
3954	/// `8087+`
3955	///
3956	/// `16/32/64-bit`
3957	Fmul_m32fp = 495,
3958	/// `FCOM m32fp`
3959	///
3960	/// `D8 /2`
3961	///
3962	/// `8087+`
3963	///
3964	/// `16/32/64-bit`
3965	Fcom_m32fp = 496,
3966	/// `FCOMP m32fp`
3967	///
3968	/// `D8 /3`
3969	///
3970	/// `8087+`
3971	///
3972	/// `16/32/64-bit`
3973	Fcomp_m32fp = 497,
3974	/// `FSUB m32fp`
3975	///
3976	/// `D8 /4`
3977	///
3978	/// `8087+`
3979	///
3980	/// `16/32/64-bit`
3981	Fsub_m32fp = 498,
3982	/// `FSUBR m32fp`
3983	///
3984	/// `D8 /5`
3985	///
3986	/// `8087+`
3987	///
3988	/// `16/32/64-bit`
3989	Fsubr_m32fp = 499,
3990	/// `FDIV m32fp`
3991	///
3992	/// `D8 /6`
3993	///
3994	/// `8087+`
3995	///
3996	/// `16/32/64-bit`
3997	Fdiv_m32fp = 500,
3998	/// `FDIVR m32fp`
3999	///
4000	/// `D8 /7`
4001	///
4002	/// `8087+`
4003	///
4004	/// `16/32/64-bit`
4005	Fdivr_m32fp = 501,
4006	/// `FADD ST(0), ST(i)`
4007	///
4008	/// `D8 C0+i`
4009	///
4010	/// `8087+`
4011	///
4012	/// `16/32/64-bit`
4013	Fadd_st0_sti = 502,
4014	/// `FMUL ST(0), ST(i)`
4015	///
4016	/// `D8 C8+i`
4017	///
4018	/// `8087+`
4019	///
4020	/// `16/32/64-bit`
4021	Fmul_st0_sti = 503,
4022	/// `FCOM ST(i)`
4023	///
4024	/// `D8 D0+i`
4025	///
4026	/// `8087+`
4027	///
4028	/// `16/32/64-bit`
4029	Fcom_st0_sti = 504,
4030	/// `FCOMP ST(i)`
4031	///
4032	/// `D8 D8+i`
4033	///
4034	/// `8087+`
4035	///
4036	/// `16/32/64-bit`
4037	Fcomp_st0_sti = 505,
4038	/// `FSUB ST(0), ST(i)`
4039	///
4040	/// `D8 E0+i`
4041	///
4042	/// `8087+`
4043	///
4044	/// `16/32/64-bit`
4045	Fsub_st0_sti = 506,
4046	/// `FSUBR ST(0), ST(i)`
4047	///
4048	/// `D8 E8+i`
4049	///
4050	/// `8087+`
4051	///
4052	/// `16/32/64-bit`
4053	Fsubr_st0_sti = 507,
4054	/// `FDIV ST(0), ST(i)`
4055	///
4056	/// `D8 F0+i`
4057	///
4058	/// `8087+`
4059	///
4060	/// `16/32/64-bit`
4061	Fdiv_st0_sti = 508,
4062	/// `FDIVR ST(0), ST(i)`
4063	///
4064	/// `D8 F8+i`
4065	///
4066	/// `8087+`
4067	///
4068	/// `16/32/64-bit`
4069	Fdivr_st0_sti = 509,
4070	/// `FLD m32fp`
4071	///
4072	/// `D9 /0`
4073	///
4074	/// `8087+`
4075	///
4076	/// `16/32/64-bit`
4077	Fld_m32fp = 510,
4078	/// `FST m32fp`
4079	///
4080	/// `D9 /2`
4081	///
4082	/// `8087+`
4083	///
4084	/// `16/32/64-bit`
4085	Fst_m32fp = 511,
4086	/// `FSTP m32fp`
4087	///
4088	/// `D9 /3`
4089	///
4090	/// `8087+`
4091	///
4092	/// `16/32/64-bit`
4093	Fstp_m32fp = 512,
4094	/// `FLDENV m14byte`
4095	///
4096	/// `o16 D9 /4`
4097	///
4098	/// `8087+`
4099	///
4100	/// `16/32/64-bit`
4101	Fldenv_m14byte = 513,
4102	/// `FLDENV m28byte`
4103	///
4104	/// `o32 D9 /4`
4105	///
4106	/// `387+`
4107	///
4108	/// `16/32/64-bit`
4109	Fldenv_m28byte = 514,
4110	/// `FLDCW m2byte`
4111	///
4112	/// `D9 /5`
4113	///
4114	/// `8087+`
4115	///
4116	/// `16/32/64-bit`
4117	Fldcw_m2byte = 515,
4118	/// `FNSTENV m14byte`
4119	///
4120	/// `o16 D9 /6`
4121	///
4122	/// `8087+`
4123	///
4124	/// `16/32/64-bit`
4125	Fnstenv_m14byte = 516,
4126	/// `FSTENV m14byte`
4127	///
4128	/// `9B o16 D9 /6`
4129	///
4130	/// `8087+`
4131	///
4132	/// `16/32/64-bit`
4133	Fstenv_m14byte = 517,
4134	/// `FNSTENV m28byte`
4135	///
4136	/// `o32 D9 /6`
4137	///
4138	/// `387+`
4139	///
4140	/// `16/32/64-bit`
4141	Fnstenv_m28byte = 518,
4142	/// `FSTENV m28byte`
4143	///
4144	/// `9B o32 D9 /6`
4145	///
4146	/// `387+`
4147	///
4148	/// `16/32/64-bit`
4149	Fstenv_m28byte = 519,
4150	/// `FNSTCW m2byte`
4151	///
4152	/// `D9 /7`
4153	///
4154	/// `8087+`
4155	///
4156	/// `16/32/64-bit`
4157	Fnstcw_m2byte = 520,
4158	/// `FSTCW m2byte`
4159	///
4160	/// `9B D9 /7`
4161	///
4162	/// `8087+`
4163	///
4164	/// `16/32/64-bit`
4165	Fstcw_m2byte = 521,
4166	/// `FLD ST(i)`
4167	///
4168	/// `D9 C0+i`
4169	///
4170	/// `8087+`
4171	///
4172	/// `16/32/64-bit`
4173	Fld_sti = 522,
4174	/// `FXCH ST(i)`
4175	///
4176	/// `D9 C8+i`
4177	///
4178	/// `8087+`
4179	///
4180	/// `16/32/64-bit`
4181	Fxch_st0_sti = 523,
4182	/// `FNOP`
4183	///
4184	/// `D9 D0`
4185	///
4186	/// `8087+`
4187	///
4188	/// `16/32/64-bit`
4189	Fnop = 524,
4190	/// `FSTPNCE ST(i)`
4191	///
4192	/// `D9 D8+i`
4193	///
4194	/// `8087+`
4195	///
4196	/// `16/32/64-bit`
4197	Fstpnce_sti = 525,
4198	/// `FCHS`
4199	///
4200	/// `D9 E0`
4201	///
4202	/// `8087+`
4203	///
4204	/// `16/32/64-bit`
4205	Fchs = 526,
4206	/// `FABS`
4207	///
4208	/// `D9 E1`
4209	///
4210	/// `8087+`
4211	///
4212	/// `16/32/64-bit`
4213	Fabs = 527,
4214	/// `FTST`
4215	///
4216	/// `D9 E4`
4217	///
4218	/// `8087+`
4219	///
4220	/// `16/32/64-bit`
4221	Ftst = 528,
4222	/// `FXAM`
4223	///
4224	/// `D9 E5`
4225	///
4226	/// `8087+`
4227	///
4228	/// `16/32/64-bit`
4229	Fxam = 529,
4230	/// `FLD1`
4231	///
4232	/// `D9 E8`
4233	///
4234	/// `8087+`
4235	///
4236	/// `16/32/64-bit`
4237	Fld1 = 530,
4238	/// `FLDL2T`
4239	///
4240	/// `D9 E9`
4241	///
4242	/// `8087+`
4243	///
4244	/// `16/32/64-bit`
4245	Fldl2t = 531,
4246	/// `FLDL2E`
4247	///
4248	/// `D9 EA`
4249	///
4250	/// `8087+`
4251	///
4252	/// `16/32/64-bit`
4253	Fldl2e = 532,
4254	/// `FLDPI`
4255	///
4256	/// `D9 EB`
4257	///
4258	/// `8087+`
4259	///
4260	/// `16/32/64-bit`
4261	Fldpi = 533,
4262	/// `FLDLG2`
4263	///
4264	/// `D9 EC`
4265	///
4266	/// `8087+`
4267	///
4268	/// `16/32/64-bit`
4269	Fldlg2 = 534,
4270	/// `FLDLN2`
4271	///
4272	/// `D9 ED`
4273	///
4274	/// `8087+`
4275	///
4276	/// `16/32/64-bit`
4277	Fldln2 = 535,
4278	/// `FLDZ`
4279	///
4280	/// `D9 EE`
4281	///
4282	/// `8087+`
4283	///
4284	/// `16/32/64-bit`
4285	Fldz = 536,
4286	/// `F2XM1`
4287	///
4288	/// `D9 F0`
4289	///
4290	/// `8087+`
4291	///
4292	/// `16/32/64-bit`
4293	F2xm1 = 537,
4294	/// `FYL2X`
4295	///
4296	/// `D9 F1`
4297	///
4298	/// `8087+`
4299	///
4300	/// `16/32/64-bit`
4301	Fyl2x = 538,
4302	/// `FPTAN`
4303	///
4304	/// `D9 F2`
4305	///
4306	/// `8087+`
4307	///
4308	/// `16/32/64-bit`
4309	Fptan = 539,
4310	/// `FPATAN`
4311	///
4312	/// `D9 F3`
4313	///
4314	/// `8087+`
4315	///
4316	/// `16/32/64-bit`
4317	Fpatan = 540,
4318	/// `FXTRACT`
4319	///
4320	/// `D9 F4`
4321	///
4322	/// `8087+`
4323	///
4324	/// `16/32/64-bit`
4325	Fxtract = 541,
4326	/// `FPREM1`
4327	///
4328	/// `D9 F5`
4329	///
4330	/// `387+`
4331	///
4332	/// `16/32/64-bit`
4333	Fprem1 = 542,
4334	/// `FDECSTP`
4335	///
4336	/// `D9 F6`
4337	///
4338	/// `8087+`
4339	///
4340	/// `16/32/64-bit`
4341	Fdecstp = 543,
4342	/// `FINCSTP`
4343	///
4344	/// `D9 F7`
4345	///
4346	/// `8087+`
4347	///
4348	/// `16/32/64-bit`
4349	Fincstp = 544,
4350	/// `FPREM`
4351	///
4352	/// `D9 F8`
4353	///
4354	/// `8087+`
4355	///
4356	/// `16/32/64-bit`
4357	Fprem = 545,
4358	/// `FYL2XP1`
4359	///
4360	/// `D9 F9`
4361	///
4362	/// `8087+`
4363	///
4364	/// `16/32/64-bit`
4365	Fyl2xp1 = 546,
4366	/// `FSQRT`
4367	///
4368	/// `D9 FA`
4369	///
4370	/// `8087+`
4371	///
4372	/// `16/32/64-bit`
4373	Fsqrt = 547,
4374	/// `FSINCOS`
4375	///
4376	/// `D9 FB`
4377	///
4378	/// `387+`
4379	///
4380	/// `16/32/64-bit`
4381	Fsincos = 548,
4382	/// `FRNDINT`
4383	///
4384	/// `D9 FC`
4385	///
4386	/// `8087+`
4387	///
4388	/// `16/32/64-bit`
4389	Frndint = 549,
4390	/// `FSCALE`
4391	///
4392	/// `D9 FD`
4393	///
4394	/// `8087+`
4395	///
4396	/// `16/32/64-bit`
4397	Fscale = 550,
4398	/// `FSIN`
4399	///
4400	/// `D9 FE`
4401	///
4402	/// `387+`
4403	///
4404	/// `16/32/64-bit`
4405	Fsin = 551,
4406	/// `FCOS`
4407	///
4408	/// `D9 FF`
4409	///
4410	/// `387+`
4411	///
4412	/// `16/32/64-bit`
4413	Fcos = 552,
4414	/// `FIADD m32int`
4415	///
4416	/// `DA /0`
4417	///
4418	/// `8087+`
4419	///
4420	/// `16/32/64-bit`
4421	Fiadd_m32int = 553,
4422	/// `FIMUL m32int`
4423	///
4424	/// `DA /1`
4425	///
4426	/// `8087+`
4427	///
4428	/// `16/32/64-bit`
4429	Fimul_m32int = 554,
4430	/// `FICOM m32int`
4431	///
4432	/// `DA /2`
4433	///
4434	/// `8087+`
4435	///
4436	/// `16/32/64-bit`
4437	Ficom_m32int = 555,
4438	/// `FICOMP m32int`
4439	///
4440	/// `DA /3`
4441	///
4442	/// `8087+`
4443	///
4444	/// `16/32/64-bit`
4445	Ficomp_m32int = 556,
4446	/// `FISUB m32int`
4447	///
4448	/// `DA /4`
4449	///
4450	/// `8087+`
4451	///
4452	/// `16/32/64-bit`
4453	Fisub_m32int = 557,
4454	/// `FISUBR m32int`
4455	///
4456	/// `DA /5`
4457	///
4458	/// `8087+`
4459	///
4460	/// `16/32/64-bit`
4461	Fisubr_m32int = 558,
4462	/// `FIDIV m32int`
4463	///
4464	/// `DA /6`
4465	///
4466	/// `8087+`
4467	///
4468	/// `16/32/64-bit`
4469	Fidiv_m32int = 559,
4470	/// `FIDIVR m32int`
4471	///
4472	/// `DA /7`
4473	///
4474	/// `8087+`
4475	///
4476	/// `16/32/64-bit`
4477	Fidivr_m32int = 560,
4478	/// `FCMOVB ST(0), ST(i)`
4479	///
4480	/// `DA C0+i`
4481	///
4482	/// `8087+ and CMOV`
4483	///
4484	/// `16/32/64-bit`
4485	Fcmovb_st0_sti = 561,
4486	/// `FCMOVE ST(0), ST(i)`
4487	///
4488	/// `DA C8+i`
4489	///
4490	/// `8087+ and CMOV`
4491	///
4492	/// `16/32/64-bit`
4493	Fcmove_st0_sti = 562,
4494	/// `FCMOVBE ST(0), ST(i)`
4495	///
4496	/// `DA D0+i`
4497	///
4498	/// `8087+ and CMOV`
4499	///
4500	/// `16/32/64-bit`
4501	Fcmovbe_st0_sti = 563,
4502	/// `FCMOVU ST(0), ST(i)`
4503	///
4504	/// `DA D8+i`
4505	///
4506	/// `8087+ and CMOV`
4507	///
4508	/// `16/32/64-bit`
4509	Fcmovu_st0_sti = 564,
4510	/// `FUCOMPP`
4511	///
4512	/// `DA E9`
4513	///
4514	/// `387+`
4515	///
4516	/// `16/32/64-bit`
4517	Fucompp = 565,
4518	/// `FILD m32int`
4519	///
4520	/// `DB /0`
4521	///
4522	/// `8087+`
4523	///
4524	/// `16/32/64-bit`
4525	Fild_m32int = 566,
4526	/// `FISTTP m32int`
4527	///
4528	/// `DB /1`
4529	///
4530	/// `8087+ and SSE3`
4531	///
4532	/// `16/32/64-bit`
4533	Fisttp_m32int = 567,
4534	/// `FIST m32int`
4535	///
4536	/// `DB /2`
4537	///
4538	/// `8087+`
4539	///
4540	/// `16/32/64-bit`
4541	Fist_m32int = 568,
4542	/// `FISTP m32int`
4543	///
4544	/// `DB /3`
4545	///
4546	/// `8087+`
4547	///
4548	/// `16/32/64-bit`
4549	Fistp_m32int = 569,
4550	/// `FLD m80fp`
4551	///
4552	/// `DB /5`
4553	///
4554	/// `8087+`
4555	///
4556	/// `16/32/64-bit`
4557	Fld_m80fp = 570,
4558	/// `FSTP m80fp`
4559	///
4560	/// `DB /7`
4561	///
4562	/// `8087+`
4563	///
4564	/// `16/32/64-bit`
4565	Fstp_m80fp = 571,
4566	/// `FCMOVNB ST(0), ST(i)`
4567	///
4568	/// `DB C0+i`
4569	///
4570	/// `8087+ and CMOV`
4571	///
4572	/// `16/32/64-bit`
4573	Fcmovnb_st0_sti = 572,
4574	/// `FCMOVNE ST(0), ST(i)`
4575	///
4576	/// `DB C8+i`
4577	///
4578	/// `8087+ and CMOV`
4579	///
4580	/// `16/32/64-bit`
4581	Fcmovne_st0_sti = 573,
4582	/// `FCMOVNBE ST(0), ST(i)`
4583	///
4584	/// `DB D0+i`
4585	///
4586	/// `8087+ and CMOV`
4587	///
4588	/// `16/32/64-bit`
4589	Fcmovnbe_st0_sti = 574,
4590	/// `FCMOVNU ST(0), ST(i)`
4591	///
4592	/// `DB D8+i`
4593	///
4594	/// `8087+ and CMOV`
4595	///
4596	/// `16/32/64-bit`
4597	Fcmovnu_st0_sti = 575,
4598	/// `FNENI`
4599	///
4600	/// `DB E0`
4601	///
4602	/// `8087+`
4603	///
4604	/// `16/32/64-bit`
4605	Fneni = 576,
4606	/// `FENI`
4607	///
4608	/// `9B DB E0`
4609	///
4610	/// `8087+`
4611	///
4612	/// `16/32/64-bit`
4613	Feni = 577,
4614	/// `FNDISI`
4615	///
4616	/// `DB E1`
4617	///
4618	/// `8087+`
4619	///
4620	/// `16/32/64-bit`
4621	Fndisi = 578,
4622	/// `FDISI`
4623	///
4624	/// `9B DB E1`
4625	///
4626	/// `8087+`
4627	///
4628	/// `16/32/64-bit`
4629	Fdisi = 579,
4630	/// `FNCLEX`
4631	///
4632	/// `DB E2`
4633	///
4634	/// `8087+`
4635	///
4636	/// `16/32/64-bit`
4637	Fnclex = 580,
4638	/// `FCLEX`
4639	///
4640	/// `9B DB E2`
4641	///
4642	/// `8087+`
4643	///
4644	/// `16/32/64-bit`
4645	Fclex = 581,
4646	/// `FNINIT`
4647	///
4648	/// `DB E3`
4649	///
4650	/// `8087+`
4651	///
4652	/// `16/32/64-bit`
4653	Fninit = 582,
4654	/// `FINIT`
4655	///
4656	/// `9B DB E3`
4657	///
4658	/// `8087+`
4659	///
4660	/// `16/32/64-bit`
4661	Finit = 583,
4662	/// `FNSETPM`
4663	///
4664	/// `DB E4`
4665	///
4666	/// `287+`
4667	///
4668	/// `16/32/64-bit`
4669	Fnsetpm = 584,
4670	/// `FSETPM`
4671	///
4672	/// `9B DB E4`
4673	///
4674	/// `287+`
4675	///
4676	/// `16/32/64-bit`
4677	Fsetpm = 585,
4678	/// `FRSTPM`
4679	///
4680	/// `DB E5`
4681	///
4682	/// `287 XL`
4683	///
4684	/// `16/32-bit`
4685	Frstpm = 586,
4686	/// `FUCOMI ST, ST(i)`
4687	///
4688	/// `DB E8+i`
4689	///
4690	/// `8087+ and CMOV`
4691	///
4692	/// `16/32/64-bit`
4693	Fucomi_st0_sti = 587,
4694	/// `FCOMI ST, ST(i)`
4695	///
4696	/// `DB F0+i`
4697	///
4698	/// `8087+ and CMOV`
4699	///
4700	/// `16/32/64-bit`
4701	Fcomi_st0_sti = 588,
4702	/// `FADD m64fp`
4703	///
4704	/// `DC /0`
4705	///
4706	/// `8087+`
4707	///
4708	/// `16/32/64-bit`
4709	Fadd_m64fp = 589,
4710	/// `FMUL m64fp`
4711	///
4712	/// `DC /1`
4713	///
4714	/// `8087+`
4715	///
4716	/// `16/32/64-bit`
4717	Fmul_m64fp = 590,
4718	/// `FCOM m64fp`
4719	///
4720	/// `DC /2`
4721	///
4722	/// `8087+`
4723	///
4724	/// `16/32/64-bit`
4725	Fcom_m64fp = 591,
4726	/// `FCOMP m64fp`
4727	///
4728	/// `DC /3`
4729	///
4730	/// `8087+`
4731	///
4732	/// `16/32/64-bit`
4733	Fcomp_m64fp = 592,
4734	/// `FSUB m64fp`
4735	///
4736	/// `DC /4`
4737	///
4738	/// `8087+`
4739	///
4740	/// `16/32/64-bit`
4741	Fsub_m64fp = 593,
4742	/// `FSUBR m64fp`
4743	///
4744	/// `DC /5`
4745	///
4746	/// `8087+`
4747	///
4748	/// `16/32/64-bit`
4749	Fsubr_m64fp = 594,
4750	/// `FDIV m64fp`
4751	///
4752	/// `DC /6`
4753	///
4754	/// `8087+`
4755	///
4756	/// `16/32/64-bit`
4757	Fdiv_m64fp = 595,
4758	/// `FDIVR m64fp`
4759	///
4760	/// `DC /7`
4761	///
4762	/// `8087+`
4763	///
4764	/// `16/32/64-bit`
4765	Fdivr_m64fp = 596,
4766	/// `FADD ST(i), ST(0)`
4767	///
4768	/// `DC C0+i`
4769	///
4770	/// `8087+`
4771	///
4772	/// `16/32/64-bit`
4773	Fadd_sti_st0 = 597,
4774	/// `FMUL ST(i), ST(0)`
4775	///
4776	/// `DC C8+i`
4777	///
4778	/// `8087+`
4779	///
4780	/// `16/32/64-bit`
4781	Fmul_sti_st0 = 598,
4782	/// `FCOM ST(i)`
4783	///
4784	/// `DC D0+i`
4785	///
4786	/// `8087+`
4787	///
4788	/// `16/32/64-bit`
4789	Fcom_st0_sti_DCD0 = 599,
4790	/// `FCOMP ST(i)`
4791	///
4792	/// `DC D8+i`
4793	///
4794	/// `8087+`
4795	///
4796	/// `16/32/64-bit`
4797	Fcomp_st0_sti_DCD8 = 600,
4798	/// `FSUBR ST(i), ST(0)`
4799	///
4800	/// `DC E0+i`
4801	///
4802	/// `8087+`
4803	///
4804	/// `16/32/64-bit`
4805	Fsubr_sti_st0 = 601,
4806	/// `FSUB ST(i), ST(0)`
4807	///
4808	/// `DC E8+i`
4809	///
4810	/// `8087+`
4811	///
4812	/// `16/32/64-bit`
4813	Fsub_sti_st0 = 602,
4814	/// `FDIVR ST(i), ST(0)`
4815	///
4816	/// `DC F0+i`
4817	///
4818	/// `8087+`
4819	///
4820	/// `16/32/64-bit`
4821	Fdivr_sti_st0 = 603,
4822	/// `FDIV ST(i), ST(0)`
4823	///
4824	/// `DC F8+i`
4825	///
4826	/// `8087+`
4827	///
4828	/// `16/32/64-bit`
4829	Fdiv_sti_st0 = 604,
4830	/// `FLD m64fp`
4831	///
4832	/// `DD /0`
4833	///
4834	/// `8087+`
4835	///
4836	/// `16/32/64-bit`
4837	Fld_m64fp = 605,
4838	/// `FISTTP m64int`
4839	///
4840	/// `DD /1`
4841	///
4842	/// `8087+ and SSE3`
4843	///
4844	/// `16/32/64-bit`
4845	Fisttp_m64int = 606,
4846	/// `FST m64fp`
4847	///
4848	/// `DD /2`
4849	///
4850	/// `8087+`
4851	///
4852	/// `16/32/64-bit`
4853	Fst_m64fp = 607,
4854	/// `FSTP m64fp`
4855	///
4856	/// `DD /3`
4857	///
4858	/// `8087+`
4859	///
4860	/// `16/32/64-bit`
4861	Fstp_m64fp = 608,
4862	/// `FRSTOR m94byte`
4863	///
4864	/// `o16 DD /4`
4865	///
4866	/// `8087+`
4867	///
4868	/// `16/32/64-bit`
4869	Frstor_m94byte = 609,
4870	/// `FRSTOR m108byte`
4871	///
4872	/// `o32 DD /4`
4873	///
4874	/// `387+`
4875	///
4876	/// `16/32/64-bit`
4877	Frstor_m108byte = 610,
4878	/// `FNSAVE m94byte`
4879	///
4880	/// `o16 DD /6`
4881	///
4882	/// `8087+`
4883	///
4884	/// `16/32/64-bit`
4885	Fnsave_m94byte = 611,
4886	/// `FSAVE m94byte`
4887	///
4888	/// `9B o16 DD /6`
4889	///
4890	/// `8087+`
4891	///
4892	/// `16/32/64-bit`
4893	Fsave_m94byte = 612,
4894	/// `FNSAVE m108byte`
4895	///
4896	/// `o32 DD /6`
4897	///
4898	/// `387+`
4899	///
4900	/// `16/32/64-bit`
4901	Fnsave_m108byte = 613,
4902	/// `FSAVE m108byte`
4903	///
4904	/// `9B o32 DD /6`
4905	///
4906	/// `387+`
4907	///
4908	/// `16/32/64-bit`
4909	Fsave_m108byte = 614,
4910	/// `FNSTSW m2byte`
4911	///
4912	/// `DD /7`
4913	///
4914	/// `8087+`
4915	///
4916	/// `16/32/64-bit`
4917	Fnstsw_m2byte = 615,
4918	/// `FSTSW m2byte`
4919	///
4920	/// `9B DD /7`
4921	///
4922	/// `8087+`
4923	///
4924	/// `16/32/64-bit`
4925	Fstsw_m2byte = 616,
4926	/// `FFREE ST(i)`
4927	///
4928	/// `DD C0+i`
4929	///
4930	/// `8087+`
4931	///
4932	/// `16/32/64-bit`
4933	Ffree_sti = 617,
4934	/// `FXCH ST(i)`
4935	///
4936	/// `DD C8+i`
4937	///
4938	/// `8087+`
4939	///
4940	/// `16/32/64-bit`
4941	Fxch_st0_sti_DDC8 = 618,
4942	/// `FST ST(i)`
4943	///
4944	/// `DD D0+i`
4945	///
4946	/// `8087+`
4947	///
4948	/// `16/32/64-bit`
4949	Fst_sti = 619,
4950	/// `FSTP ST(i)`
4951	///
4952	/// `DD D8+i`
4953	///
4954	/// `8087+`
4955	///
4956	/// `16/32/64-bit`
4957	Fstp_sti = 620,
4958	/// `FUCOM ST(i)`
4959	///
4960	/// `DD E0+i`
4961	///
4962	/// `8087+`
4963	///
4964	/// `16/32/64-bit`
4965	Fucom_st0_sti = 621,
4966	/// `FUCOMP ST(i)`
4967	///
4968	/// `DD E8+i`
4969	///
4970	/// `8087+`
4971	///
4972	/// `16/32/64-bit`
4973	Fucomp_st0_sti = 622,
4974	/// `FIADD m16int`
4975	///
4976	/// `DE /0`
4977	///
4978	/// `8087+`
4979	///
4980	/// `16/32/64-bit`
4981	Fiadd_m16int = 623,
4982	/// `FIMUL m16int`
4983	///
4984	/// `DE /1`
4985	///
4986	/// `8087+`
4987	///
4988	/// `16/32/64-bit`
4989	Fimul_m16int = 624,
4990	/// `FICOM m16int`
4991	///
4992	/// `DE /2`
4993	///
4994	/// `8087+`
4995	///
4996	/// `16/32/64-bit`
4997	Ficom_m16int = 625,
4998	/// `FICOMP m16int`
4999	///
5000	/// `DE /3`
5001	///
5002	/// `8087+`
5003	///
5004	/// `16/32/64-bit`
5005	Ficomp_m16int = 626,
5006	/// `FISUB m16int`
5007	///
5008	/// `DE /4`
5009	///
5010	/// `8087+`
5011	///
5012	/// `16/32/64-bit`
5013	Fisub_m16int = 627,
5014	/// `FISUBR m16int`
5015	///
5016	/// `DE /5`
5017	///
5018	/// `8087+`
5019	///
5020	/// `16/32/64-bit`
5021	Fisubr_m16int = 628,
5022	/// `FIDIV m16int`
5023	///
5024	/// `DE /6`
5025	///
5026	/// `8087+`
5027	///
5028	/// `16/32/64-bit`
5029	Fidiv_m16int = 629,
5030	/// `FIDIVR m16int`
5031	///
5032	/// `DE /7`
5033	///
5034	/// `8087+`
5035	///
5036	/// `16/32/64-bit`
5037	Fidivr_m16int = 630,
5038	/// `FADDP ST(i), ST(0)`
5039	///
5040	/// `DE C0+i`
5041	///
5042	/// `8087+`
5043	///
5044	/// `16/32/64-bit`
5045	Faddp_sti_st0 = 631,
5046	/// `FMULP ST(i), ST(0)`
5047	///
5048	/// `DE C8+i`
5049	///
5050	/// `8087+`
5051	///
5052	/// `16/32/64-bit`
5053	Fmulp_sti_st0 = 632,
5054	/// `FCOMP ST(i)`
5055	///
5056	/// `DE D0+i`
5057	///
5058	/// `8087+`
5059	///
5060	/// `16/32/64-bit`
5061	Fcomp_st0_sti_DED0 = 633,
5062	/// `FCOMPP`
5063	///
5064	/// `DE D9`
5065	///
5066	/// `8087+`
5067	///
5068	/// `16/32/64-bit`
5069	Fcompp = 634,
5070	/// `FSUBRP ST(i), ST(0)`
5071	///
5072	/// `DE E0+i`
5073	///
5074	/// `8087+`
5075	///
5076	/// `16/32/64-bit`
5077	Fsubrp_sti_st0 = 635,
5078	/// `FSUBP ST(i), ST(0)`
5079	///
5080	/// `DE E8+i`
5081	///
5082	/// `8087+`
5083	///
5084	/// `16/32/64-bit`
5085	Fsubp_sti_st0 = 636,
5086	/// `FDIVRP ST(i), ST(0)`
5087	///
5088	/// `DE F0+i`
5089	///
5090	/// `8087+`
5091	///
5092	/// `16/32/64-bit`
5093	Fdivrp_sti_st0 = 637,
5094	/// `FDIVP ST(i), ST(0)`
5095	///
5096	/// `DE F8+i`
5097	///
5098	/// `8087+`
5099	///
5100	/// `16/32/64-bit`
5101	Fdivp_sti_st0 = 638,
5102	/// `FILD m16int`
5103	///
5104	/// `DF /0`
5105	///
5106	/// `8087+`
5107	///
5108	/// `16/32/64-bit`
5109	Fild_m16int = 639,
5110	/// `FISTTP m16int`
5111	///
5112	/// `DF /1`
5113	///
5114	/// `8087+ and SSE3`
5115	///
5116	/// `16/32/64-bit`
5117	Fisttp_m16int = 640,
5118	/// `FIST m16int`
5119	///
5120	/// `DF /2`
5121	///
5122	/// `8087+`
5123	///
5124	/// `16/32/64-bit`
5125	Fist_m16int = 641,
5126	/// `FISTP m16int`
5127	///
5128	/// `DF /3`
5129	///
5130	/// `8087+`
5131	///
5132	/// `16/32/64-bit`
5133	Fistp_m16int = 642,
5134	/// `FBLD m80bcd`
5135	///
5136	/// `DF /4`
5137	///
5138	/// `8087+`
5139	///
5140	/// `16/32/64-bit`
5141	Fbld_m80bcd = 643,
5142	/// `FILD m64int`
5143	///
5144	/// `DF /5`
5145	///
5146	/// `8087+`
5147	///
5148	/// `16/32/64-bit`
5149	Fild_m64int = 644,
5150	/// `FBSTP m80bcd`
5151	///
5152	/// `DF /6`
5153	///
5154	/// `8087+`
5155	///
5156	/// `16/32/64-bit`
5157	Fbstp_m80bcd = 645,
5158	/// `FISTP m64int`
5159	///
5160	/// `DF /7`
5161	///
5162	/// `8087+`
5163	///
5164	/// `16/32/64-bit`
5165	Fistp_m64int = 646,
5166	/// `FFREEP ST(i)`
5167	///
5168	/// `DF C0+i`
5169	///
5170	/// `8087+`
5171	///
5172	/// `16/32/64-bit`
5173	Ffreep_sti = 647,
5174	/// `FXCH ST(i)`
5175	///
5176	/// `DF C8+i`
5177	///
5178	/// `8087+`
5179	///
5180	/// `16/32/64-bit`
5181	Fxch_st0_sti_DFC8 = 648,
5182	/// `FSTP ST(i)`
5183	///
5184	/// `DF D0+i`
5185	///
5186	/// `8087+`
5187	///
5188	/// `16/32/64-bit`
5189	Fstp_sti_DFD0 = 649,
5190	/// `FSTP ST(i)`
5191	///
5192	/// `DF D8+i`
5193	///
5194	/// `8087+`
5195	///
5196	/// `16/32/64-bit`
5197	Fstp_sti_DFD8 = 650,
5198	/// `FNSTSW AX`
5199	///
5200	/// `DF E0`
5201	///
5202	/// `287+`
5203	///
5204	/// `16/32/64-bit`
5205	Fnstsw_AX = 651,
5206	/// `FSTSW AX`
5207	///
5208	/// `9B DF E0`
5209	///
5210	/// `287+`
5211	///
5212	/// `16/32/64-bit`
5213	Fstsw_AX = 652,
5214	/// `FSTDW AX`
5215	///
5216	/// `9B DF E1`
5217	///
5218	/// `387 SL`
5219	///
5220	/// `16/32-bit`
5221	Fstdw_AX = 653,
5222	/// `FSTSG AX`
5223	///
5224	/// `9B DF E2`
5225	///
5226	/// `387 SL`
5227	///
5228	/// `16/32-bit`
5229	Fstsg_AX = 654,
5230	/// `FUCOMIP ST, ST(i)`
5231	///
5232	/// `DF E8+i`
5233	///
5234	/// `8087+ and CMOV`
5235	///
5236	/// `16/32/64-bit`
5237	Fucomip_st0_sti = 655,
5238	/// `FCOMIP ST, ST(i)`
5239	///
5240	/// `DF F0+i`
5241	///
5242	/// `8087+ and CMOV`
5243	///
5244	/// `16/32/64-bit`
5245	Fcomip_st0_sti = 656,
5246	/// `LOOPNE rel8`
5247	///
5248	/// `a16 o16 E0 cb`
5249	///
5250	/// `8086+`
5251	///
5252	/// `16/32-bit`
5253	Loopne_rel8_16_CX = 657,
5254	/// `LOOPNE rel8`
5255	///
5256	/// `a16 o32 E0 cb`
5257	///
5258	/// `386+`
5259	///
5260	/// `16/32-bit`
5261	Loopne_rel8_32_CX = 658,
5262	/// `LOOPNE rel8`
5263	///
5264	/// `a32 o16 E0 cb`
5265	///
5266	/// `386+`
5267	///
5268	/// `16/32/64-bit`
5269	Loopne_rel8_16_ECX = 659,
5270	/// `LOOPNE rel8`
5271	///
5272	/// `a32 o32 E0 cb`
5273	///
5274	/// `386+`
5275	///
5276	/// `16/32-bit`
5277	Loopne_rel8_32_ECX = 660,
5278	/// `LOOPNE rel8`
5279	///
5280	/// `a32 o64 E0 cb`
5281	///
5282	/// `X64`
5283	///
5284	/// `64-bit`
5285	Loopne_rel8_64_ECX = 661,
5286	/// `LOOPNE rel8`
5287	///
5288	/// `a64 o16 E0 cb`
5289	///
5290	/// `X64`
5291	///
5292	/// `64-bit`
5293	Loopne_rel8_16_RCX = 662,
5294	/// `LOOPNE rel8`
5295	///
5296	/// `a64 o64 E0 cb`
5297	///
5298	/// `X64`
5299	///
5300	/// `64-bit`
5301	Loopne_rel8_64_RCX = 663,
5302	/// `LOOPE rel8`
5303	///
5304	/// `a16 o16 E1 cb`
5305	///
5306	/// `8086+`
5307	///
5308	/// `16/32-bit`
5309	Loope_rel8_16_CX = 664,
5310	/// `LOOPE rel8`
5311	///
5312	/// `a16 o32 E1 cb`
5313	///
5314	/// `386+`
5315	///
5316	/// `16/32-bit`
5317	Loope_rel8_32_CX = 665,
5318	/// `LOOPE rel8`
5319	///
5320	/// `a32 o16 E1 cb`
5321	///
5322	/// `386+`
5323	///
5324	/// `16/32/64-bit`
5325	Loope_rel8_16_ECX = 666,
5326	/// `LOOPE rel8`
5327	///
5328	/// `a32 o32 E1 cb`
5329	///
5330	/// `386+`
5331	///
5332	/// `16/32-bit`
5333	Loope_rel8_32_ECX = 667,
5334	/// `LOOPE rel8`
5335	///
5336	/// `a32 o64 E1 cb`
5337	///
5338	/// `X64`
5339	///
5340	/// `64-bit`
5341	Loope_rel8_64_ECX = 668,
5342	/// `LOOPE rel8`
5343	///
5344	/// `a64 o16 E1 cb`
5345	///
5346	/// `X64`
5347	///
5348	/// `64-bit`
5349	Loope_rel8_16_RCX = 669,
5350	/// `LOOPE rel8`
5351	///
5352	/// `a64 o64 E1 cb`
5353	///
5354	/// `X64`
5355	///
5356	/// `64-bit`
5357	Loope_rel8_64_RCX = 670,
5358	/// `LOOP rel8`
5359	///
5360	/// `a16 o16 E2 cb`
5361	///
5362	/// `8086+`
5363	///
5364	/// `16/32-bit`
5365	Loop_rel8_16_CX = 671,
5366	/// `LOOP rel8`
5367	///
5368	/// `a16 o32 E2 cb`
5369	///
5370	/// `386+`
5371	///
5372	/// `16/32-bit`
5373	Loop_rel8_32_CX = 672,
5374	/// `LOOP rel8`
5375	///
5376	/// `a32 o16 E2 cb`
5377	///
5378	/// `386+`
5379	///
5380	/// `16/32/64-bit`
5381	Loop_rel8_16_ECX = 673,
5382	/// `LOOP rel8`
5383	///
5384	/// `a32 o32 E2 cb`
5385	///
5386	/// `386+`
5387	///
5388	/// `16/32-bit`
5389	Loop_rel8_32_ECX = 674,
5390	/// `LOOP rel8`
5391	///
5392	/// `a32 o64 E2 cb`
5393	///
5394	/// `X64`
5395	///
5396	/// `64-bit`
5397	Loop_rel8_64_ECX = 675,
5398	/// `LOOP rel8`
5399	///
5400	/// `a64 o16 E2 cb`
5401	///
5402	/// `X64`
5403	///
5404	/// `64-bit`
5405	Loop_rel8_16_RCX = 676,
5406	/// `LOOP rel8`
5407	///
5408	/// `a64 o64 E2 cb`
5409	///
5410	/// `X64`
5411	///
5412	/// `64-bit`
5413	Loop_rel8_64_RCX = 677,
5414	/// `JCXZ rel8`
5415	///
5416	/// `a16 o16 E3 cb`
5417	///
5418	/// `8086+`
5419	///
5420	/// `16/32-bit`
5421	Jcxz_rel8_16 = 678,
5422	/// `JCXZ rel8`
5423	///
5424	/// `a16 o32 E3 cb`
5425	///
5426	/// `386+`
5427	///
5428	/// `16/32-bit`
5429	Jcxz_rel8_32 = 679,
5430	/// `JECXZ rel8`
5431	///
5432	/// `a32 o16 E3 cb`
5433	///
5434	/// `386+`
5435	///
5436	/// `16/32/64-bit`
5437	Jecxz_rel8_16 = 680,
5438	/// `JECXZ rel8`
5439	///
5440	/// `a32 o32 E3 cb`
5441	///
5442	/// `386+`
5443	///
5444	/// `16/32-bit`
5445	Jecxz_rel8_32 = 681,
5446	/// `JECXZ rel8`
5447	///
5448	/// `a32 o64 E3 cb`
5449	///
5450	/// `X64`
5451	///
5452	/// `64-bit`
5453	Jecxz_rel8_64 = 682,
5454	/// `JRCXZ rel8`
5455	///
5456	/// `a64 o16 E3 cb`
5457	///
5458	/// `X64`
5459	///
5460	/// `64-bit`
5461	Jrcxz_rel8_16 = 683,
5462	/// `JRCXZ rel8`
5463	///
5464	/// `a64 o64 E3 cb`
5465	///
5466	/// `X64`
5467	///
5468	/// `64-bit`
5469	Jrcxz_rel8_64 = 684,
5470	/// `IN AL, imm8`
5471	///
5472	/// `E4 ib`
5473	///
5474	/// `8086+`
5475	///
5476	/// `16/32/64-bit`
5477	In_AL_imm8 = 685,
5478	/// `IN AX, imm8`
5479	///
5480	/// `o16 E5 ib`
5481	///
5482	/// `8086+`
5483	///
5484	/// `16/32/64-bit`
5485	In_AX_imm8 = 686,
5486	/// `IN EAX, imm8`
5487	///
5488	/// `o32 E5 ib`
5489	///
5490	/// `386+`
5491	///
5492	/// `16/32/64-bit`
5493	In_EAX_imm8 = 687,
5494	/// `OUT imm8, AL`
5495	///
5496	/// `E6 ib`
5497	///
5498	/// `8086+`
5499	///
5500	/// `16/32/64-bit`
5501	Out_imm8_AL = 688,
5502	/// `OUT imm8, AX`
5503	///
5504	/// `o16 E7 ib`
5505	///
5506	/// `8086+`
5507	///
5508	/// `16/32/64-bit`
5509	Out_imm8_AX = 689,
5510	/// `OUT imm8, EAX`
5511	///
5512	/// `o32 E7 ib`
5513	///
5514	/// `386+`
5515	///
5516	/// `16/32/64-bit`
5517	Out_imm8_EAX = 690,
5518	/// `CALL rel16`
5519	///
5520	/// `o16 E8 cw`
5521	///
5522	/// `8086+`
5523	///
5524	/// `16/32/64-bit`
5525	Call_rel16 = 691,
5526	/// `CALL rel32`
5527	///
5528	/// `o32 E8 cd`
5529	///
5530	/// `386+`
5531	///
5532	/// `16/32-bit`
5533	Call_rel32_32 = 692,
5534	/// `CALL rel32`
5535	///
5536	/// `o64 E8 cd`
5537	///
5538	/// `X64`
5539	///
5540	/// `64-bit`
5541	Call_rel32_64 = 693,
5542	/// `JMP rel16`
5543	///
5544	/// `o16 E9 cw`
5545	///
5546	/// `8086+`
5547	///
5548	/// `16/32/64-bit`
5549	Jmp_rel16 = 694,
5550	/// `JMP rel32`
5551	///
5552	/// `o32 E9 cd`
5553	///
5554	/// `386+`
5555	///
5556	/// `16/32-bit`
5557	Jmp_rel32_32 = 695,
5558	/// `JMP rel32`
5559	///
5560	/// `o64 E9 cd`
5561	///
5562	/// `X64`
5563	///
5564	/// `64-bit`
5565	Jmp_rel32_64 = 696,
5566	/// `JMP ptr16:16`
5567	///
5568	/// `o16 EA cd`
5569	///
5570	/// `8086+`
5571	///
5572	/// `16/32-bit`
5573	Jmp_ptr1616 = 697,
5574	/// `JMP ptr16:32`
5575	///
5576	/// `o32 EA cp`
5577	///
5578	/// `386+`
5579	///
5580	/// `16/32-bit`
5581	Jmp_ptr1632 = 698,
5582	/// `JMP rel8`
5583	///
5584	/// `o16 EB cb`
5585	///
5586	/// `8086+`
5587	///
5588	/// `16/32/64-bit`
5589	Jmp_rel8_16 = 699,
5590	/// `JMP rel8`
5591	///
5592	/// `o32 EB cb`
5593	///
5594	/// `386+`
5595	///
5596	/// `16/32-bit`
5597	Jmp_rel8_32 = 700,
5598	/// `JMP rel8`
5599	///
5600	/// `o64 EB cb`
5601	///
5602	/// `X64`
5603	///
5604	/// `64-bit`
5605	Jmp_rel8_64 = 701,
5606	/// `IN AL, DX`
5607	///
5608	/// `EC`
5609	///
5610	/// `8086+`
5611	///
5612	/// `16/32/64-bit`
5613	In_AL_DX = 702,
5614	/// `IN AX, DX`
5615	///
5616	/// `o16 ED`
5617	///
5618	/// `8086+`
5619	///
5620	/// `16/32/64-bit`
5621	In_AX_DX = 703,
5622	/// `IN EAX, DX`
5623	///
5624	/// `o32 ED`
5625	///
5626	/// `386+`
5627	///
5628	/// `16/32/64-bit`
5629	In_EAX_DX = 704,
5630	/// `OUT DX, AL`
5631	///
5632	/// `EE`
5633	///
5634	/// `8086+`
5635	///
5636	/// `16/32/64-bit`
5637	Out_DX_AL = 705,
5638	/// `OUT DX, AX`
5639	///
5640	/// `o16 EF`
5641	///
5642	/// `8086+`
5643	///
5644	/// `16/32/64-bit`
5645	Out_DX_AX = 706,
5646	/// `OUT DX, EAX`
5647	///
5648	/// `o32 EF`
5649	///
5650	/// `386+`
5651	///
5652	/// `16/32/64-bit`
5653	Out_DX_EAX = 707,
5654	/// `INT1`
5655	///
5656	/// `F1`
5657	///
5658	/// `386+`
5659	///
5660	/// `16/32/64-bit`
5661	Int1 = 708,
5662	/// `HLT`
5663	///
5664	/// `F4`
5665	///
5666	/// `8086+`
5667	///
5668	/// `16/32/64-bit`
5669	Hlt = 709,
5670	/// `CMC`
5671	///
5672	/// `F5`
5673	///
5674	/// `8086+`
5675	///
5676	/// `16/32/64-bit`
5677	Cmc = 710,
5678	/// `TEST r/m8, imm8`
5679	///
5680	/// `F6 /0 ib`
5681	///
5682	/// `8086+`
5683	///
5684	/// `16/32/64-bit`
5685	Test_rm8_imm8 = 711,
5686	/// `TEST r/m8, imm8`
5687	///
5688	/// `F6 /1 ib`
5689	///
5690	/// `8086+`
5691	///
5692	/// `16/32/64-bit`
5693	Test_rm8_imm8_F6r1 = 712,
5694	/// `NOT r/m8`
5695	///
5696	/// `F6 /2`
5697	///
5698	/// `8086+`
5699	///
5700	/// `16/32/64-bit`
5701	Not_rm8 = 713,
5702	/// `NEG r/m8`
5703	///
5704	/// `F6 /3`
5705	///
5706	/// `8086+`
5707	///
5708	/// `16/32/64-bit`
5709	Neg_rm8 = 714,
5710	/// `MUL r/m8`
5711	///
5712	/// `F6 /4`
5713	///
5714	/// `8086+`
5715	///
5716	/// `16/32/64-bit`
5717	Mul_rm8 = 715,
5718	/// `IMUL r/m8`
5719	///
5720	/// `F6 /5`
5721	///
5722	/// `8086+`
5723	///
5724	/// `16/32/64-bit`
5725	Imul_rm8 = 716,
5726	/// `DIV r/m8`
5727	///
5728	/// `F6 /6`
5729	///
5730	/// `8086+`
5731	///
5732	/// `16/32/64-bit`
5733	Div_rm8 = 717,
5734	/// `IDIV r/m8`
5735	///
5736	/// `F6 /7`
5737	///
5738	/// `8086+`
5739	///
5740	/// `16/32/64-bit`
5741	Idiv_rm8 = 718,
5742	/// `TEST r/m16, imm16`
5743	///
5744	/// `o16 F7 /0 iw`
5745	///
5746	/// `8086+`
5747	///
5748	/// `16/32/64-bit`
5749	Test_rm16_imm16 = 719,
5750	/// `TEST r/m32, imm32`
5751	///
5752	/// `o32 F7 /0 id`
5753	///
5754	/// `386+`
5755	///
5756	/// `16/32/64-bit`
5757	Test_rm32_imm32 = 720,
5758	/// `TEST r/m64, imm32`
5759	///
5760	/// `o64 F7 /0 id`
5761	///
5762	/// `X64`
5763	///
5764	/// `64-bit`
5765	Test_rm64_imm32 = 721,
5766	/// `TEST r/m16, imm16`
5767	///
5768	/// `o16 F7 /1 iw`
5769	///
5770	/// `8086+`
5771	///
5772	/// `16/32/64-bit`
5773	Test_rm16_imm16_F7r1 = 722,
5774	/// `TEST r/m32, imm32`
5775	///
5776	/// `o32 F7 /1 id`
5777	///
5778	/// `386+`
5779	///
5780	/// `16/32/64-bit`
5781	Test_rm32_imm32_F7r1 = 723,
5782	/// `TEST r/m64, imm32`
5783	///
5784	/// `o64 F7 /1 id`
5785	///
5786	/// `X64`
5787	///
5788	/// `64-bit`
5789	Test_rm64_imm32_F7r1 = 724,
5790	/// `NOT r/m16`
5791	///
5792	/// `o16 F7 /2`
5793	///
5794	/// `8086+`
5795	///
5796	/// `16/32/64-bit`
5797	Not_rm16 = 725,
5798	/// `NOT r/m32`
5799	///
5800	/// `o32 F7 /2`
5801	///
5802	/// `386+`
5803	///
5804	/// `16/32/64-bit`
5805	Not_rm32 = 726,
5806	/// `NOT r/m64`
5807	///
5808	/// `o64 F7 /2`
5809	///
5810	/// `X64`
5811	///
5812	/// `64-bit`
5813	Not_rm64 = 727,
5814	/// `NEG r/m16`
5815	///
5816	/// `o16 F7 /3`
5817	///
5818	/// `8086+`
5819	///
5820	/// `16/32/64-bit`
5821	Neg_rm16 = 728,
5822	/// `NEG r/m32`
5823	///
5824	/// `o32 F7 /3`
5825	///
5826	/// `386+`
5827	///
5828	/// `16/32/64-bit`
5829	Neg_rm32 = 729,
5830	/// `NEG r/m64`
5831	///
5832	/// `o64 F7 /3`
5833	///
5834	/// `X64`
5835	///
5836	/// `64-bit`
5837	Neg_rm64 = 730,
5838	/// `MUL r/m16`
5839	///
5840	/// `o16 F7 /4`
5841	///
5842	/// `8086+`
5843	///
5844	/// `16/32/64-bit`
5845	Mul_rm16 = 731,
5846	/// `MUL r/m32`
5847	///
5848	/// `o32 F7 /4`
5849	///
5850	/// `386+`
5851	///
5852	/// `16/32/64-bit`
5853	Mul_rm32 = 732,
5854	/// `MUL r/m64`
5855	///
5856	/// `o64 F7 /4`
5857	///
5858	/// `X64`
5859	///
5860	/// `64-bit`
5861	Mul_rm64 = 733,
5862	/// `IMUL r/m16`
5863	///
5864	/// `o16 F7 /5`
5865	///
5866	/// `8086+`
5867	///
5868	/// `16/32/64-bit`
5869	Imul_rm16 = 734,
5870	/// `IMUL r/m32`
5871	///
5872	/// `o32 F7 /5`
5873	///
5874	/// `386+`
5875	///
5876	/// `16/32/64-bit`
5877	Imul_rm32 = 735,
5878	/// `IMUL r/m64`
5879	///
5880	/// `o64 F7 /5`
5881	///
5882	/// `X64`
5883	///
5884	/// `64-bit`
5885	Imul_rm64 = 736,
5886	/// `DIV r/m16`
5887	///
5888	/// `o16 F7 /6`
5889	///
5890	/// `8086+`
5891	///
5892	/// `16/32/64-bit`
5893	Div_rm16 = 737,
5894	/// `DIV r/m32`
5895	///
5896	/// `o32 F7 /6`
5897	///
5898	/// `386+`
5899	///
5900	/// `16/32/64-bit`
5901	Div_rm32 = 738,
5902	/// `DIV r/m64`
5903	///
5904	/// `o64 F7 /6`
5905	///
5906	/// `X64`
5907	///
5908	/// `64-bit`
5909	Div_rm64 = 739,
5910	/// `IDIV r/m16`
5911	///
5912	/// `o16 F7 /7`
5913	///
5914	/// `8086+`
5915	///
5916	/// `16/32/64-bit`
5917	Idiv_rm16 = 740,
5918	/// `IDIV r/m32`
5919	///
5920	/// `o32 F7 /7`
5921	///
5922	/// `386+`
5923	///
5924	/// `16/32/64-bit`
5925	Idiv_rm32 = 741,
5926	/// `IDIV r/m64`
5927	///
5928	/// `o64 F7 /7`
5929	///
5930	/// `X64`
5931	///
5932	/// `64-bit`
5933	Idiv_rm64 = 742,
5934	/// `CLC`
5935	///
5936	/// `F8`
5937	///
5938	/// `8086+`
5939	///
5940	/// `16/32/64-bit`
5941	Clc = 743,
5942	/// `STC`
5943	///
5944	/// `F9`
5945	///
5946	/// `8086+`
5947	///
5948	/// `16/32/64-bit`
5949	Stc = 744,
5950	/// `CLI`
5951	///
5952	/// `FA`
5953	///
5954	/// `8086+`
5955	///
5956	/// `16/32/64-bit`
5957	Cli = 745,
5958	/// `STI`
5959	///
5960	/// `FB`
5961	///
5962	/// `8086+`
5963	///
5964	/// `16/32/64-bit`
5965	Sti = 746,
5966	/// `CLD`
5967	///
5968	/// `FC`
5969	///
5970	/// `8086+`
5971	///
5972	/// `16/32/64-bit`
5973	Cld = 747,
5974	/// `STD`
5975	///
5976	/// `FD`
5977	///
5978	/// `8086+`
5979	///
5980	/// `16/32/64-bit`
5981	Std = 748,
5982	/// `INC r/m8`
5983	///
5984	/// `FE /0`
5985	///
5986	/// `8086+`
5987	///
5988	/// `16/32/64-bit`
5989	Inc_rm8 = 749,
5990	/// `DEC r/m8`
5991	///
5992	/// `FE /1`
5993	///
5994	/// `8086+`
5995	///
5996	/// `16/32/64-bit`
5997	Dec_rm8 = 750,
5998	/// `INC r/m16`
5999	///
6000	/// `o16 FF /0`
6001	///
6002	/// `8086+`
6003	///
6004	/// `16/32/64-bit`
6005	Inc_rm16 = 751,
6006	/// `INC r/m32`
6007	///
6008	/// `o32 FF /0`
6009	///
6010	/// `386+`
6011	///
6012	/// `16/32/64-bit`
6013	Inc_rm32 = 752,
6014	/// `INC r/m64`
6015	///
6016	/// `o64 FF /0`
6017	///
6018	/// `X64`
6019	///
6020	/// `64-bit`
6021	Inc_rm64 = 753,
6022	/// `DEC r/m16`
6023	///
6024	/// `o16 FF /1`
6025	///
6026	/// `8086+`
6027	///
6028	/// `16/32/64-bit`
6029	Dec_rm16 = 754,
6030	/// `DEC r/m32`
6031	///
6032	/// `o32 FF /1`
6033	///
6034	/// `386+`
6035	///
6036	/// `16/32/64-bit`
6037	Dec_rm32 = 755,
6038	/// `DEC r/m64`
6039	///
6040	/// `o64 FF /1`
6041	///
6042	/// `X64`
6043	///
6044	/// `64-bit`
6045	Dec_rm64 = 756,
6046	/// `CALL r/m16`
6047	///
6048	/// `o16 FF /2`
6049	///
6050	/// `8086+`
6051	///
6052	/// `16/32/64-bit`
6053	Call_rm16 = 757,
6054	/// `CALL r/m32`
6055	///
6056	/// `o32 FF /2`
6057	///
6058	/// `386+`
6059	///
6060	/// `16/32-bit`
6061	Call_rm32 = 758,
6062	/// `CALL r/m64`
6063	///
6064	/// `o64 FF /2`
6065	///
6066	/// `X64`
6067	///
6068	/// `64-bit`
6069	Call_rm64 = 759,
6070	/// `CALL m16:16`
6071	///
6072	/// `o16 FF /3`
6073	///
6074	/// `8086+`
6075	///
6076	/// `16/32/64-bit`
6077	Call_m1616 = 760,
6078	/// `CALL m16:32`
6079	///
6080	/// `o32 FF /3`
6081	///
6082	/// `386+`
6083	///
6084	/// `16/32/64-bit`
6085	Call_m1632 = 761,
6086	/// `CALL m16:64`
6087	///
6088	/// `o64 FF /3`
6089	///
6090	/// `X64`
6091	///
6092	/// `64-bit`
6093	Call_m1664 = 762,
6094	/// `JMP r/m16`
6095	///
6096	/// `o16 FF /4`
6097	///
6098	/// `8086+`
6099	///
6100	/// `16/32/64-bit`
6101	Jmp_rm16 = 763,
6102	/// `JMP r/m32`
6103	///
6104	/// `o32 FF /4`
6105	///
6106	/// `386+`
6107	///
6108	/// `16/32-bit`
6109	Jmp_rm32 = 764,
6110	/// `JMP r/m64`
6111	///
6112	/// `o64 FF /4`
6113	///
6114	/// `X64`
6115	///
6116	/// `64-bit`
6117	Jmp_rm64 = 765,
6118	/// `JMP m16:16`
6119	///
6120	/// `o16 FF /5`
6121	///
6122	/// `8086+`
6123	///
6124	/// `16/32/64-bit`
6125	Jmp_m1616 = 766,
6126	/// `JMP m16:32`
6127	///
6128	/// `o32 FF /5`
6129	///
6130	/// `386+`
6131	///
6132	/// `16/32/64-bit`
6133	Jmp_m1632 = 767,
6134	/// `JMP m16:64`
6135	///
6136	/// `o64 FF /5`
6137	///
6138	/// `X64`
6139	///
6140	/// `64-bit`
6141	Jmp_m1664 = 768,
6142	/// `PUSH r/m16`
6143	///
6144	/// `o16 FF /6`
6145	///
6146	/// `8086+`
6147	///
6148	/// `16/32/64-bit`
6149	Push_rm16 = 769,
6150	/// `PUSH r/m32`
6151	///
6152	/// `o32 FF /6`
6153	///
6154	/// `386+`
6155	///
6156	/// `16/32-bit`
6157	Push_rm32 = 770,
6158	/// `PUSH r/m64`
6159	///
6160	/// `o64 FF /6`
6161	///
6162	/// `X64`
6163	///
6164	/// `64-bit`
6165	Push_rm64 = 771,
6166	/// `SLDT r/m16`
6167	///
6168	/// `o16 0F 00 /0`
6169	///
6170	/// `286+`
6171	///
6172	/// `16/32/64-bit`
6173	Sldt_rm16 = 772,
6174	/// `SLDT r32/m16`
6175	///
6176	/// `o32 0F 00 /0`
6177	///
6178	/// `386+`
6179	///
6180	/// `16/32/64-bit`
6181	Sldt_r32m16 = 773,
6182	/// `SLDT r64/m16`
6183	///
6184	/// `o64 0F 00 /0`
6185	///
6186	/// `X64`
6187	///
6188	/// `64-bit`
6189	Sldt_r64m16 = 774,
6190	/// `STR r/m16`
6191	///
6192	/// `o16 0F 00 /1`
6193	///
6194	/// `286+`
6195	///
6196	/// `16/32/64-bit`
6197	Str_rm16 = 775,
6198	/// `STR r32/m16`
6199	///
6200	/// `o32 0F 00 /1`
6201	///
6202	/// `386+`
6203	///
6204	/// `16/32/64-bit`
6205	Str_r32m16 = 776,
6206	/// `STR r64/m16`
6207	///
6208	/// `o64 0F 00 /1`
6209	///
6210	/// `X64`
6211	///
6212	/// `64-bit`
6213	Str_r64m16 = 777,
6214	/// `LLDT r/m16`
6215	///
6216	/// `o16 0F 00 /2`
6217	///
6218	/// `286+`
6219	///
6220	/// `16/32/64-bit`
6221	Lldt_rm16 = 778,
6222	/// `LLDT r32/m16`
6223	///
6224	/// `o32 0F 00 /2`
6225	///
6226	/// `386+`
6227	///
6228	/// `16/32/64-bit`
6229	Lldt_r32m16 = 779,
6230	/// `LLDT r64/m16`
6231	///
6232	/// `o64 0F 00 /2`
6233	///
6234	/// `X64`
6235	///
6236	/// `64-bit`
6237	Lldt_r64m16 = 780,
6238	/// `LTR r/m16`
6239	///
6240	/// `o16 0F 00 /3`
6241	///
6242	/// `286+`
6243	///
6244	/// `16/32/64-bit`
6245	Ltr_rm16 = 781,
6246	/// `LTR r32/m16`
6247	///
6248	/// `o32 0F 00 /3`
6249	///
6250	/// `386+`
6251	///
6252	/// `16/32/64-bit`
6253	Ltr_r32m16 = 782,
6254	/// `LTR r64/m16`
6255	///
6256	/// `o64 0F 00 /3`
6257	///
6258	/// `X64`
6259	///
6260	/// `64-bit`
6261	Ltr_r64m16 = 783,
6262	/// `VERR r/m16`
6263	///
6264	/// `o16 0F 00 /4`
6265	///
6266	/// `286+`
6267	///
6268	/// `16/32/64-bit`
6269	Verr_rm16 = 784,
6270	/// `VERR r32/m16`
6271	///
6272	/// `o32 0F 00 /4`
6273	///
6274	/// `386+`
6275	///
6276	/// `16/32/64-bit`
6277	Verr_r32m16 = 785,
6278	/// `VERR r64/m16`
6279	///
6280	/// `o64 0F 00 /4`
6281	///
6282	/// `X64`
6283	///
6284	/// `64-bit`
6285	Verr_r64m16 = 786,
6286	/// `VERW r/m16`
6287	///
6288	/// `o16 0F 00 /5`
6289	///
6290	/// `286+`
6291	///
6292	/// `16/32/64-bit`
6293	Verw_rm16 = 787,
6294	/// `VERW r32/m16`
6295	///
6296	/// `o32 0F 00 /5`
6297	///
6298	/// `386+`
6299	///
6300	/// `16/32/64-bit`
6301	Verw_r32m16 = 788,
6302	/// `VERW r64/m16`
6303	///
6304	/// `o64 0F 00 /5`
6305	///
6306	/// `X64`
6307	///
6308	/// `64-bit`
6309	Verw_r64m16 = 789,
6310	/// `JMPE r/m16`
6311	///
6312	/// `o16 0F 00 /6`
6313	///
6314	/// `IA-64`
6315	///
6316	/// `16/32-bit`
6317	Jmpe_rm16 = 790,
6318	/// `JMPE r/m32`
6319	///
6320	/// `o32 0F 00 /6`
6321	///
6322	/// `IA-64`
6323	///
6324	/// `16/32-bit`
6325	Jmpe_rm32 = 791,
6326	/// `SGDT m`
6327	///
6328	/// `o16 0F 01 /0`
6329	///
6330	/// `286+`
6331	///
6332	/// `16/32-bit`
6333	Sgdt_m1632_16 = 792,
6334	/// `SGDT m`
6335	///
6336	/// `o32 0F 01 /0`
6337	///
6338	/// `386+`
6339	///
6340	/// `16/32-bit`
6341	Sgdt_m1632 = 793,
6342	/// `SGDT m`
6343	///
6344	/// `0F 01 /0`
6345	///
6346	/// `X64`
6347	///
6348	/// `64-bit`
6349	Sgdt_m1664 = 794,
6350	/// `SIDT m`
6351	///
6352	/// `o16 0F 01 /1`
6353	///
6354	/// `286+`
6355	///
6356	/// `16/32-bit`
6357	Sidt_m1632_16 = 795,
6358	/// `SIDT m`
6359	///
6360	/// `o32 0F 01 /1`
6361	///
6362	/// `386+`
6363	///
6364	/// `16/32-bit`
6365	Sidt_m1632 = 796,
6366	/// `SIDT m`
6367	///
6368	/// `0F 01 /1`
6369	///
6370	/// `X64`
6371	///
6372	/// `64-bit`
6373	Sidt_m1664 = 797,
6374	/// `LGDT m16&32`
6375	///
6376	/// `o16 0F 01 /2`
6377	///
6378	/// `286+`
6379	///
6380	/// `16/32-bit`
6381	Lgdt_m1632_16 = 798,
6382	/// `LGDT m16&32`
6383	///
6384	/// `o32 0F 01 /2`
6385	///
6386	/// `386+`
6387	///
6388	/// `16/32-bit`
6389	Lgdt_m1632 = 799,
6390	/// `LGDT m16&64`
6391	///
6392	/// `0F 01 /2`
6393	///
6394	/// `X64`
6395	///
6396	/// `64-bit`
6397	Lgdt_m1664 = 800,
6398	/// `LIDT m16&32`
6399	///
6400	/// `o16 0F 01 /3`
6401	///
6402	/// `286+`
6403	///
6404	/// `16/32-bit`
6405	Lidt_m1632_16 = 801,
6406	/// `LIDT m16&32`
6407	///
6408	/// `o32 0F 01 /3`
6409	///
6410	/// `386+`
6411	///
6412	/// `16/32-bit`
6413	Lidt_m1632 = 802,
6414	/// `LIDT m16&64`
6415	///
6416	/// `0F 01 /3`
6417	///
6418	/// `X64`
6419	///
6420	/// `64-bit`
6421	Lidt_m1664 = 803,
6422	/// `SMSW r/m16`
6423	///
6424	/// `o16 0F 01 /4`
6425	///
6426	/// `286+`
6427	///
6428	/// `16/32/64-bit`
6429	Smsw_rm16 = 804,
6430	/// `SMSW r32/m16`
6431	///
6432	/// `o32 0F 01 /4`
6433	///
6434	/// `386+`
6435	///
6436	/// `16/32/64-bit`
6437	Smsw_r32m16 = 805,
6438	/// `SMSW r64/m16`
6439	///
6440	/// `o64 0F 01 /4`
6441	///
6442	/// `X64`
6443	///
6444	/// `64-bit`
6445	Smsw_r64m16 = 806,
6446	/// `RSTORSSP m64`
6447	///
6448	/// `F3 0F 01 /5`
6449	///
6450	/// `CET_SS`
6451	///
6452	/// `16/32/64-bit`
6453	Rstorssp_m64 = 807,
6454	/// `LMSW r/m16`
6455	///
6456	/// `o16 0F 01 /6`
6457	///
6458	/// `286+`
6459	///
6460	/// `16/32/64-bit`
6461	Lmsw_rm16 = 808,
6462	/// `LMSW r32/m16`
6463	///
6464	/// `o32 0F 01 /6`
6465	///
6466	/// `386+`
6467	///
6468	/// `16/32/64-bit`
6469	Lmsw_r32m16 = 809,
6470	/// `LMSW r64/m16`
6471	///
6472	/// `o64 0F 01 /6`
6473	///
6474	/// `X64`
6475	///
6476	/// `64-bit`
6477	Lmsw_r64m16 = 810,
6478	/// `INVLPG m`
6479	///
6480	/// `0F 01 /7`
6481	///
6482	/// `486+`
6483	///
6484	/// `16/32/64-bit`
6485	Invlpg_m = 811,
6486	/// `ENCLV`
6487	///
6488	/// `NP 0F 01 C0`
6489	///
6490	/// `OSS`
6491	///
6492	/// `16/32/64-bit`
6493	Enclv = 812,
6494	/// `VMCALL`
6495	///
6496	/// `NP 0F 01 C1`
6497	///
6498	/// `VMX`
6499	///
6500	/// `16/32/64-bit`
6501	Vmcall = 813,
6502	/// `VMLAUNCH`
6503	///
6504	/// `NP 0F 01 C2`
6505	///
6506	/// `VMX`
6507	///
6508	/// `16/32/64-bit`
6509	Vmlaunch = 814,
6510	/// `VMRESUME`
6511	///
6512	/// `NP 0F 01 C3`
6513	///
6514	/// `VMX`
6515	///
6516	/// `16/32/64-bit`
6517	Vmresume = 815,
6518	/// `VMXOFF`
6519	///
6520	/// `NP 0F 01 C4`
6521	///
6522	/// `VMX`
6523	///
6524	/// `16/32/64-bit`
6525	Vmxoff = 816,
6526	/// `PCONFIG`
6527	///
6528	/// `NP 0F 01 C5`
6529	///
6530	/// `PCONFIG`
6531	///
6532	/// `16/32/64-bit`
6533	Pconfig = 817,
6534	/// `MONITOR`
6535	///
6536	/// `a16 NP 0F 01 C8`
6537	///
6538	/// `MONITOR`
6539	///
6540	/// `16/32-bit`
6541	Monitorw = 818,
6542	/// `MONITOR`
6543	///
6544	/// `a32 NP 0F 01 C8`
6545	///
6546	/// `MONITOR`
6547	///
6548	/// `16/32/64-bit`
6549	Monitord = 819,
6550	/// `MONITOR`
6551	///
6552	/// `a64 NP 0F 01 C8`
6553	///
6554	/// `MONITOR`
6555	///
6556	/// `64-bit`
6557	Monitorq = 820,
6558	/// `MWAIT`
6559	///
6560	/// `NP 0F 01 C9`
6561	///
6562	/// `MONITOR`
6563	///
6564	/// `16/32/64-bit`
6565	Mwait = 821,
6566	/// `CLAC`
6567	///
6568	/// `NP 0F 01 CA`
6569	///
6570	/// `SMAP`
6571	///
6572	/// `16/32/64-bit`
6573	Clac = 822,
6574	/// `STAC`
6575	///
6576	/// `NP 0F 01 CB`
6577	///
6578	/// `SMAP`
6579	///
6580	/// `16/32/64-bit`
6581	Stac = 823,
6582	/// `ENCLS`
6583	///
6584	/// `NP 0F 01 CF`
6585	///
6586	/// `SGX1`
6587	///
6588	/// `16/32/64-bit`
6589	Encls = 824,
6590	/// `XGETBV`
6591	///
6592	/// `NP 0F 01 D0`
6593	///
6594	/// `XSAVE`
6595	///
6596	/// `16/32/64-bit`
6597	Xgetbv = 825,
6598	/// `XSETBV`
6599	///
6600	/// `NP 0F 01 D1`
6601	///
6602	/// `XSAVE`
6603	///
6604	/// `16/32/64-bit`
6605	Xsetbv = 826,
6606	/// `VMFUNC`
6607	///
6608	/// `NP 0F 01 D4`
6609	///
6610	/// `VMX`
6611	///
6612	/// `16/32/64-bit`
6613	Vmfunc = 827,
6614	/// `XEND`
6615	///
6616	/// `NP 0F 01 D5`
6617	///
6618	/// `RTM`
6619	///
6620	/// `16/32/64-bit`
6621	Xend = 828,
6622	/// `XTEST`
6623	///
6624	/// `NP 0F 01 D6`
6625	///
6626	/// `HLE or RTM`
6627	///
6628	/// `16/32/64-bit`
6629	Xtest = 829,
6630	/// `ENCLU`
6631	///
6632	/// `NP 0F 01 D7`
6633	///
6634	/// `SGX1`
6635	///
6636	/// `16/32/64-bit`
6637	Enclu = 830,
6638	/// `VMRUN`
6639	///
6640	/// `a16 0F 01 D8`
6641	///
6642	/// `SVM`
6643	///
6644	/// `16/32-bit`
6645	Vmrunw = 831,
6646	/// `VMRUN`
6647	///
6648	/// `a32 0F 01 D8`
6649	///
6650	/// `SVM`
6651	///
6652	/// `16/32/64-bit`
6653	Vmrund = 832,
6654	/// `VMRUN`
6655	///
6656	/// `a64 0F 01 D8`
6657	///
6658	/// `SVM`
6659	///
6660	/// `64-bit`
6661	Vmrunq = 833,
6662	/// `VMMCALL`
6663	///
6664	/// `0F 01 D9`
6665	///
6666	/// `SVM`
6667	///
6668	/// `16/32/64-bit`
6669	Vmmcall = 834,
6670	/// `VMLOAD`
6671	///
6672	/// `a16 0F 01 DA`
6673	///
6674	/// `SVM`
6675	///
6676	/// `16/32-bit`
6677	Vmloadw = 835,
6678	/// `VMLOAD`
6679	///
6680	/// `a32 0F 01 DA`
6681	///
6682	/// `SVM`
6683	///
6684	/// `16/32/64-bit`
6685	Vmloadd = 836,
6686	/// `VMLOAD`
6687	///
6688	/// `a64 0F 01 DA`
6689	///
6690	/// `SVM`
6691	///
6692	/// `64-bit`
6693	Vmloadq = 837,
6694	/// `VMSAVE`
6695	///
6696	/// `a16 0F 01 DB`
6697	///
6698	/// `SVM`
6699	///
6700	/// `16/32-bit`
6701	Vmsavew = 838,
6702	/// `VMSAVE`
6703	///
6704	/// `a32 0F 01 DB`
6705	///
6706	/// `SVM`
6707	///
6708	/// `16/32/64-bit`
6709	Vmsaved = 839,
6710	/// `VMSAVE`
6711	///
6712	/// `a64 0F 01 DB`
6713	///
6714	/// `SVM`
6715	///
6716	/// `64-bit`
6717	Vmsaveq = 840,
6718	/// `STGI`
6719	///
6720	/// `0F 01 DC`
6721	///
6722	/// `SKINIT or SVM`
6723	///
6724	/// `16/32/64-bit`
6725	Stgi = 841,
6726	/// `CLGI`
6727	///
6728	/// `0F 01 DD`
6729	///
6730	/// `SVM`
6731	///
6732	/// `16/32/64-bit`
6733	Clgi = 842,
6734	/// `SKINIT`
6735	///
6736	/// `0F 01 DE`
6737	///
6738	/// `SKINIT or SVM`
6739	///
6740	/// `16/32/64-bit`
6741	Skinit = 843,
6742	/// `INVLPGA`
6743	///
6744	/// `a16 0F 01 DF`
6745	///
6746	/// `SVM`
6747	///
6748	/// `16/32-bit`
6749	Invlpgaw = 844,
6750	/// `INVLPGA`
6751	///
6752	/// `a32 0F 01 DF`
6753	///
6754	/// `SVM`
6755	///
6756	/// `16/32/64-bit`
6757	Invlpgad = 845,
6758	/// `INVLPGA`
6759	///
6760	/// `a64 0F 01 DF`
6761	///
6762	/// `SVM`
6763	///
6764	/// `64-bit`
6765	Invlpgaq = 846,
6766	/// `SETSSBSY`
6767	///
6768	/// `F3 0F 01 E8`
6769	///
6770	/// `CET_SS`
6771	///
6772	/// `16/32/64-bit`
6773	Setssbsy = 847,
6774	/// `SAVEPREVSSP`
6775	///
6776	/// `F3 0F 01 EA`
6777	///
6778	/// `CET_SS`
6779	///
6780	/// `16/32/64-bit`
6781	Saveprevssp = 848,
6782	/// `RDPKRU`
6783	///
6784	/// `NP 0F 01 EE`
6785	///
6786	/// `PKU`
6787	///
6788	/// `16/32/64-bit`
6789	Rdpkru = 849,
6790	/// `WRPKRU`
6791	///
6792	/// `NP 0F 01 EF`
6793	///
6794	/// `PKU`
6795	///
6796	/// `16/32/64-bit`
6797	Wrpkru = 850,
6798	/// `SWAPGS`
6799	///
6800	/// `0F 01 F8`
6801	///
6802	/// `X64`
6803	///
6804	/// `64-bit`
6805	Swapgs = 851,
6806	/// `RDTSCP`
6807	///
6808	/// `0F 01 F9`
6809	///
6810	/// `RDTSCP`
6811	///
6812	/// `16/32/64-bit`
6813	Rdtscp = 852,
6814	/// `MONITORX`
6815	///
6816	/// `a16 NP 0F 01 FA`
6817	///
6818	/// `MONITORX`
6819	///
6820	/// `16/32-bit`
6821	Monitorxw = 853,
6822	/// `MONITORX`
6823	///
6824	/// `a32 NP 0F 01 FA`
6825	///
6826	/// `MONITORX`
6827	///
6828	/// `16/32/64-bit`
6829	Monitorxd = 854,
6830	/// `MONITORX`
6831	///
6832	/// `a64 NP 0F 01 FA`
6833	///
6834	/// `MONITORX`
6835	///
6836	/// `64-bit`
6837	Monitorxq = 855,
6838	/// `MCOMMIT`
6839	///
6840	/// `F3 0F 01 FA`
6841	///
6842	/// `MCOMMIT`
6843	///
6844	/// `16/32/64-bit`
6845	Mcommit = 856,
6846	/// `MWAITX`
6847	///
6848	/// `NP 0F 01 FB`
6849	///
6850	/// `MONITORX`
6851	///
6852	/// `16/32/64-bit`
6853	Mwaitx = 857,
6854	/// `CLZERO`
6855	///
6856	/// `a16 0F 01 FC`
6857	///
6858	/// `CLZERO`
6859	///
6860	/// `16/32-bit`
6861	Clzerow = 858,
6862	/// `CLZERO`
6863	///
6864	/// `a32 0F 01 FC`
6865	///
6866	/// `CLZERO`
6867	///
6868	/// `16/32/64-bit`
6869	Clzerod = 859,
6870	/// `CLZERO`
6871	///
6872	/// `a64 0F 01 FC`
6873	///
6874	/// `CLZERO`
6875	///
6876	/// `64-bit`
6877	Clzeroq = 860,
6878	/// `RDPRU`
6879	///
6880	/// `NP 0F 01 FD`
6881	///
6882	/// `RDPRU`
6883	///
6884	/// `16/32/64-bit`
6885	Rdpru = 861,
6886	/// `LAR r16, r/m16`
6887	///
6888	/// `o16 0F 02 /r`
6889	///
6890	/// `286+`
6891	///
6892	/// `16/32/64-bit`
6893	Lar_r16_rm16 = 862,
6894	/// `LAR r32, r32/m16`
6895	///
6896	/// `o32 0F 02 /r`
6897	///
6898	/// `386+`
6899	///
6900	/// `16/32/64-bit`
6901	Lar_r32_r32m16 = 863,
6902	/// `LAR r64, r64/m16`
6903	///
6904	/// `o64 0F 02 /r`
6905	///
6906	/// `X64`
6907	///
6908	/// `64-bit`
6909	Lar_r64_r64m16 = 864,
6910	/// `LSL r16, r/m16`
6911	///
6912	/// `o16 0F 03 /r`
6913	///
6914	/// `286+`
6915	///
6916	/// `16/32/64-bit`
6917	Lsl_r16_rm16 = 865,
6918	/// `LSL r32, r32/m16`
6919	///
6920	/// `o32 0F 03 /r`
6921	///
6922	/// `386+`
6923	///
6924	/// `16/32/64-bit`
6925	Lsl_r32_r32m16 = 866,
6926	/// `LSL r64, r64/m16`
6927	///
6928	/// `o64 0F 03 /r`
6929	///
6930	/// `X64`
6931	///
6932	/// `64-bit`
6933	Lsl_r64_r64m16 = 867,
6934	/// `STOREALL`
6935	///
6936	/// `0F 04`
6937	///
6938	/// `286`
6939	///
6940	/// `16/32-bit`
6941	Storeall = 868,
6942	/// `LOADALL`
6943	///
6944	/// `0F 05`
6945	///
6946	/// `286`
6947	///
6948	/// `16/32-bit`
6949	Loadall286 = 869,
6950	/// `SYSCALL`
6951	///
6952	/// `0F 05`
6953	///
6954	/// `SYSCALL`
6955	///
6956	/// `16/32/64-bit`
6957	Syscall = 870,
6958	/// `CLTS`
6959	///
6960	/// `0F 06`
6961	///
6962	/// `286+`
6963	///
6964	/// `16/32/64-bit`
6965	Clts = 871,
6966	/// `LOADALL`
6967	///
6968	/// `0F 07`
6969	///
6970	/// `386`
6971	///
6972	/// `16/32-bit`
6973	Loadall386 = 872,
6974	/// `SYSRET`
6975	///
6976	/// `0F 07`
6977	///
6978	/// `SYSCALL`
6979	///
6980	/// `16/32/64-bit`
6981	Sysretd = 873,
6982	/// `SYSRETQ`
6983	///
6984	/// `o64 0F 07`
6985	///
6986	/// `SYSCALL`
6987	///
6988	/// `64-bit`
6989	Sysretq = 874,
6990	/// `INVD`
6991	///
6992	/// `0F 08`
6993	///
6994	/// `486+`
6995	///
6996	/// `16/32/64-bit`
6997	Invd = 875,
6998	/// `WBINVD`
6999	///
7000	/// `0F 09`
7001	///
7002	/// `486+`
7003	///
7004	/// `16/32/64-bit`
7005	Wbinvd = 876,
7006	/// `WBNOINVD`
7007	///
7008	/// `F3 0F 09`
7009	///
7010	/// `WBNOINVD`
7011	///
7012	/// `16/32/64-bit`
7013	Wbnoinvd = 877,
7014	/// `CL1INVMB`
7015	///
7016	/// `0F 0A`
7017	///
7018	/// `CL1INVMB`
7019	///
7020	/// `16/32-bit`
7021	Cl1invmb = 878,
7022	/// `UD2`
7023	///
7024	/// `0F 0B`
7025	///
7026	/// `286+`
7027	///
7028	/// `16/32/64-bit`
7029	Ud2 = 879,
7030	/// `RESERVEDNOP r/m16, r16`
7031	///
7032	/// `o16 0F 0D /r`
7033	///
7034	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
7035	///
7036	/// `16/32/64-bit`
7037	Reservednop_rm16_r16_0F0D = 880,
7038	/// `RESERVEDNOP r/m32, r32`
7039	///
7040	/// `o32 0F 0D /r`
7041	///
7042	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
7043	///
7044	/// `16/32/64-bit`
7045	Reservednop_rm32_r32_0F0D = 881,
7046	/// `RESERVEDNOP r/m64, r64`
7047	///
7048	/// `o64 0F 0D /r`
7049	///
7050	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
7051	///
7052	/// `64-bit`
7053	Reservednop_rm64_r64_0F0D = 882,
7054	/// `PREFETCH m8`
7055	///
7056	/// `0F 0D /0`
7057	///
7058	/// `PREFETCHW`
7059	///
7060	/// `16/32/64-bit`
7061	Prefetch_m8 = 883,
7062	/// `PREFETCHW m8`
7063	///
7064	/// `0F 0D /1`
7065	///
7066	/// `PREFETCHW`
7067	///
7068	/// `16/32/64-bit`
7069	Prefetchw_m8 = 884,
7070	/// `PREFETCHWT1 m8`
7071	///
7072	/// `0F 0D /2`
7073	///
7074	/// `PREFETCHWT1`
7075	///
7076	/// `16/32/64-bit`
7077	Prefetchwt1_m8 = 885,
7078	/// `FEMMS`
7079	///
7080	/// `0F 0E`
7081	///
7082	/// `3DNOW`
7083	///
7084	/// `16/32/64-bit`
7085	Femms = 886,
7086	/// `UMOV r/m8, r8`
7087	///
7088	/// `0F 10 /r`
7089	///
7090	/// `386/486`
7091	///
7092	/// `16/32-bit`
7093	Umov_rm8_r8 = 887,
7094	/// `UMOV r/m16, r16`
7095	///
7096	/// `o16 0F 11 /r`
7097	///
7098	/// `386/486`
7099	///
7100	/// `16/32-bit`
7101	Umov_rm16_r16 = 888,
7102	/// `UMOV r/m32, r32`
7103	///
7104	/// `o32 0F 11 /r`
7105	///
7106	/// `386/486`
7107	///
7108	/// `16/32-bit`
7109	Umov_rm32_r32 = 889,
7110	/// `UMOV r8, r/m8`
7111	///
7112	/// `0F 12 /r`
7113	///
7114	/// `386/486`
7115	///
7116	/// `16/32-bit`
7117	Umov_r8_rm8 = 890,
7118	/// `UMOV r16, r/m16`
7119	///
7120	/// `o16 0F 13 /r`
7121	///
7122	/// `386/486`
7123	///
7124	/// `16/32-bit`
7125	Umov_r16_rm16 = 891,
7126	/// `UMOV r32, r/m32`
7127	///
7128	/// `o32 0F 13 /r`
7129	///
7130	/// `386/486`
7131	///
7132	/// `16/32-bit`
7133	Umov_r32_rm32 = 892,
7134	/// `MOVUPS xmm1, xmm2/m128`
7135	///
7136	/// `NP 0F 10 /r`
7137	///
7138	/// `SSE`
7139	///
7140	/// `16/32/64-bit`
7141	Movups_xmm_xmmm128 = 893,
7142	/// `VMOVUPS xmm1, xmm2/m128`
7143	///
7144	/// `VEX.128.0F.WIG 10 /r`
7145	///
7146	/// `AVX`
7147	///
7148	/// `16/32/64-bit`
7149	VEX_Vmovups_xmm_xmmm128 = 894,
7150	/// `VMOVUPS ymm1, ymm2/m256`
7151	///
7152	/// `VEX.256.0F.WIG 10 /r`
7153	///
7154	/// `AVX`
7155	///
7156	/// `16/32/64-bit`
7157	VEX_Vmovups_ymm_ymmm256 = 895,
7158	/// `VMOVUPS xmm1 {k1}{z}, xmm2/m128`
7159	///
7160	/// `EVEX.128.0F.W0 10 /r`
7161	///
7162	/// `AVX512VL and AVX512F`
7163	///
7164	/// `16/32/64-bit`
7165	EVEX_Vmovups_xmm_k1z_xmmm128 = 896,
7166	/// `VMOVUPS ymm1 {k1}{z}, ymm2/m256`
7167	///
7168	/// `EVEX.256.0F.W0 10 /r`
7169	///
7170	/// `AVX512VL and AVX512F`
7171	///
7172	/// `16/32/64-bit`
7173	EVEX_Vmovups_ymm_k1z_ymmm256 = 897,
7174	/// `VMOVUPS zmm1 {k1}{z}, zmm2/m512`
7175	///
7176	/// `EVEX.512.0F.W0 10 /r`
7177	///
7178	/// `AVX512F`
7179	///
7180	/// `16/32/64-bit`
7181	EVEX_Vmovups_zmm_k1z_zmmm512 = 898,
7182	/// `MOVUPD xmm1, xmm2/m128`
7183	///
7184	/// `66 0F 10 /r`
7185	///
7186	/// `SSE2`
7187	///
7188	/// `16/32/64-bit`
7189	Movupd_xmm_xmmm128 = 899,
7190	/// `VMOVUPD xmm1, xmm2/m128`
7191	///
7192	/// `VEX.128.66.0F.WIG 10 /r`
7193	///
7194	/// `AVX`
7195	///
7196	/// `16/32/64-bit`
7197	VEX_Vmovupd_xmm_xmmm128 = 900,
7198	/// `VMOVUPD ymm1, ymm2/m256`
7199	///
7200	/// `VEX.256.66.0F.WIG 10 /r`
7201	///
7202	/// `AVX`
7203	///
7204	/// `16/32/64-bit`
7205	VEX_Vmovupd_ymm_ymmm256 = 901,
7206	/// `VMOVUPD xmm1 {k1}{z}, xmm2/m128`
7207	///
7208	/// `EVEX.128.66.0F.W1 10 /r`
7209	///
7210	/// `AVX512VL and AVX512F`
7211	///
7212	/// `16/32/64-bit`
7213	EVEX_Vmovupd_xmm_k1z_xmmm128 = 902,
7214	/// `VMOVUPD ymm1 {k1}{z}, ymm2/m256`
7215	///
7216	/// `EVEX.256.66.0F.W1 10 /r`
7217	///
7218	/// `AVX512VL and AVX512F`
7219	///
7220	/// `16/32/64-bit`
7221	EVEX_Vmovupd_ymm_k1z_ymmm256 = 903,
7222	/// `VMOVUPD zmm1 {k1}{z}, zmm2/m512`
7223	///
7224	/// `EVEX.512.66.0F.W1 10 /r`
7225	///
7226	/// `AVX512F`
7227	///
7228	/// `16/32/64-bit`
7229	EVEX_Vmovupd_zmm_k1z_zmmm512 = 904,
7230	/// `MOVSS xmm1, xmm2/m32`
7231	///
7232	/// `F3 0F 10 /r`
7233	///
7234	/// `SSE`
7235	///
7236	/// `16/32/64-bit`
7237	Movss_xmm_xmmm32 = 905,
7238	/// `VMOVSS xmm1, xmm2, xmm3`
7239	///
7240	/// `VEX.LIG.F3.0F.WIG 10 /r`
7241	///
7242	/// `AVX`
7243	///
7244	/// `16/32/64-bit`
7245	VEX_Vmovss_xmm_xmm_xmm = 906,
7246	/// `VMOVSS xmm1, m32`
7247	///
7248	/// `VEX.LIG.F3.0F.WIG 10 /r`
7249	///
7250	/// `AVX`
7251	///
7252	/// `16/32/64-bit`
7253	VEX_Vmovss_xmm_m32 = 907,
7254	/// `VMOVSS xmm1 {k1}{z}, xmm2, xmm3`
7255	///
7256	/// `EVEX.LIG.F3.0F.W0 10 /r`
7257	///
7258	/// `AVX512F`
7259	///
7260	/// `16/32/64-bit`
7261	EVEX_Vmovss_xmm_k1z_xmm_xmm = 908,
7262	/// `VMOVSS xmm1 {k1}{z}, m32`
7263	///
7264	/// `EVEX.LIG.F3.0F.W0 10 /r`
7265	///
7266	/// `AVX512F`
7267	///
7268	/// `16/32/64-bit`
7269	EVEX_Vmovss_xmm_k1z_m32 = 909,
7270	/// `MOVSD xmm1, xmm2/m64`
7271	///
7272	/// `F2 0F 10 /r`
7273	///
7274	/// `SSE2`
7275	///
7276	/// `16/32/64-bit`
7277	Movsd_xmm_xmmm64 = 910,
7278	/// `VMOVSD xmm1, xmm2, xmm3`
7279	///
7280	/// `VEX.LIG.F2.0F.WIG 10 /r`
7281	///
7282	/// `AVX`
7283	///
7284	/// `16/32/64-bit`
7285	VEX_Vmovsd_xmm_xmm_xmm = 911,
7286	/// `VMOVSD xmm1, m64`
7287	///
7288	/// `VEX.LIG.F2.0F.WIG 10 /r`
7289	///
7290	/// `AVX`
7291	///
7292	/// `16/32/64-bit`
7293	VEX_Vmovsd_xmm_m64 = 912,
7294	/// `VMOVSD xmm1 {k1}{z}, xmm2, xmm3`
7295	///
7296	/// `EVEX.LIG.F2.0F.W1 10 /r`
7297	///
7298	/// `AVX512F`
7299	///
7300	/// `16/32/64-bit`
7301	EVEX_Vmovsd_xmm_k1z_xmm_xmm = 913,
7302	/// `VMOVSD xmm1 {k1}{z}, m64`
7303	///
7304	/// `EVEX.LIG.F2.0F.W1 10 /r`
7305	///
7306	/// `AVX512F`
7307	///
7308	/// `16/32/64-bit`
7309	EVEX_Vmovsd_xmm_k1z_m64 = 914,
7310	/// `MOVUPS xmm2/m128, xmm1`
7311	///
7312	/// `NP 0F 11 /r`
7313	///
7314	/// `SSE`
7315	///
7316	/// `16/32/64-bit`
7317	Movups_xmmm128_xmm = 915,
7318	/// `VMOVUPS xmm2/m128, xmm1`
7319	///
7320	/// `VEX.128.0F.WIG 11 /r`
7321	///
7322	/// `AVX`
7323	///
7324	/// `16/32/64-bit`
7325	VEX_Vmovups_xmmm128_xmm = 916,
7326	/// `VMOVUPS ymm2/m256, ymm1`
7327	///
7328	/// `VEX.256.0F.WIG 11 /r`
7329	///
7330	/// `AVX`
7331	///
7332	/// `16/32/64-bit`
7333	VEX_Vmovups_ymmm256_ymm = 917,
7334	/// `VMOVUPS xmm2/m128 {k1}{z}, xmm1`
7335	///
7336	/// `EVEX.128.0F.W0 11 /r`
7337	///
7338	/// `AVX512VL and AVX512F`
7339	///
7340	/// `16/32/64-bit`
7341	EVEX_Vmovups_xmmm128_k1z_xmm = 918,
7342	/// `VMOVUPS ymm2/m256 {k1}{z}, ymm1`
7343	///
7344	/// `EVEX.256.0F.W0 11 /r`
7345	///
7346	/// `AVX512VL and AVX512F`
7347	///
7348	/// `16/32/64-bit`
7349	EVEX_Vmovups_ymmm256_k1z_ymm = 919,
7350	/// `VMOVUPS zmm2/m512 {k1}{z}, zmm1`
7351	///
7352	/// `EVEX.512.0F.W0 11 /r`
7353	///
7354	/// `AVX512F`
7355	///
7356	/// `16/32/64-bit`
7357	EVEX_Vmovups_zmmm512_k1z_zmm = 920,
7358	/// `MOVUPD xmm2/m128, xmm1`
7359	///
7360	/// `66 0F 11 /r`
7361	///
7362	/// `SSE2`
7363	///
7364	/// `16/32/64-bit`
7365	Movupd_xmmm128_xmm = 921,
7366	/// `VMOVUPD xmm2/m128, xmm1`
7367	///
7368	/// `VEX.128.66.0F.WIG 11 /r`
7369	///
7370	/// `AVX`
7371	///
7372	/// `16/32/64-bit`
7373	VEX_Vmovupd_xmmm128_xmm = 922,
7374	/// `VMOVUPD ymm2/m256, ymm1`
7375	///
7376	/// `VEX.256.66.0F.WIG 11 /r`
7377	///
7378	/// `AVX`
7379	///
7380	/// `16/32/64-bit`
7381	VEX_Vmovupd_ymmm256_ymm = 923,
7382	/// `VMOVUPD xmm2/m128 {k1}{z}, xmm1`
7383	///
7384	/// `EVEX.128.66.0F.W1 11 /r`
7385	///
7386	/// `AVX512VL and AVX512F`
7387	///
7388	/// `16/32/64-bit`
7389	EVEX_Vmovupd_xmmm128_k1z_xmm = 924,
7390	/// `VMOVUPD ymm2/m256 {k1}{z}, ymm1`
7391	///
7392	/// `EVEX.256.66.0F.W1 11 /r`
7393	///
7394	/// `AVX512VL and AVX512F`
7395	///
7396	/// `16/32/64-bit`
7397	EVEX_Vmovupd_ymmm256_k1z_ymm = 925,
7398	/// `VMOVUPD zmm2/m512 {k1}{z}, zmm1`
7399	///
7400	/// `EVEX.512.66.0F.W1 11 /r`
7401	///
7402	/// `AVX512F`
7403	///
7404	/// `16/32/64-bit`
7405	EVEX_Vmovupd_zmmm512_k1z_zmm = 926,
7406	/// `MOVSS xmm2/m32, xmm1`
7407	///
7408	/// `F3 0F 11 /r`
7409	///
7410	/// `SSE`
7411	///
7412	/// `16/32/64-bit`
7413	Movss_xmmm32_xmm = 927,
7414	/// `VMOVSS xmm1, xmm2, xmm3`
7415	///
7416	/// `VEX.LIG.F3.0F.WIG 11 /r`
7417	///
7418	/// `AVX`
7419	///
7420	/// `16/32/64-bit`
7421	VEX_Vmovss_xmm_xmm_xmm_0F11 = 928,
7422	/// `VMOVSS m32, xmm1`
7423	///
7424	/// `VEX.LIG.F3.0F.WIG 11 /r`
7425	///
7426	/// `AVX`
7427	///
7428	/// `16/32/64-bit`
7429	VEX_Vmovss_m32_xmm = 929,
7430	/// `VMOVSS xmm1 {k1}{z}, xmm2, xmm3`
7431	///
7432	/// `EVEX.LIG.F3.0F.W0 11 /r`
7433	///
7434	/// `AVX512F`
7435	///
7436	/// `16/32/64-bit`
7437	EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11 = 930,
7438	/// `VMOVSS m32 {k1}, xmm1`
7439	///
7440	/// `EVEX.LIG.F3.0F.W0 11 /r`
7441	///
7442	/// `AVX512F`
7443	///
7444	/// `16/32/64-bit`
7445	EVEX_Vmovss_m32_k1_xmm = 931,
7446	/// `MOVSD xmm1/m64, xmm2`
7447	///
7448	/// `F2 0F 11 /r`
7449	///
7450	/// `SSE2`
7451	///
7452	/// `16/32/64-bit`
7453	Movsd_xmmm64_xmm = 932,
7454	/// `VMOVSD xmm1, xmm2, xmm3`
7455	///
7456	/// `VEX.LIG.F2.0F.WIG 11 /r`
7457	///
7458	/// `AVX`
7459	///
7460	/// `16/32/64-bit`
7461	VEX_Vmovsd_xmm_xmm_xmm_0F11 = 933,
7462	/// `VMOVSD m64, xmm1`
7463	///
7464	/// `VEX.LIG.F2.0F.WIG 11 /r`
7465	///
7466	/// `AVX`
7467	///
7468	/// `16/32/64-bit`
7469	VEX_Vmovsd_m64_xmm = 934,
7470	/// `VMOVSD xmm1 {k1}{z}, xmm2, xmm3`
7471	///
7472	/// `EVEX.LIG.F2.0F.W1 11 /r`
7473	///
7474	/// `AVX512F`
7475	///
7476	/// `16/32/64-bit`
7477	EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11 = 935,
7478	/// `VMOVSD m64 {k1}, xmm1`
7479	///
7480	/// `EVEX.LIG.F2.0F.W1 11 /r`
7481	///
7482	/// `AVX512F`
7483	///
7484	/// `16/32/64-bit`
7485	EVEX_Vmovsd_m64_k1_xmm = 936,
7486	/// `MOVHLPS xmm1, xmm2`
7487	///
7488	/// `NP 0F 12 /r`
7489	///
7490	/// `SSE`
7491	///
7492	/// `16/32/64-bit`
7493	Movhlps_xmm_xmm = 937,
7494	/// `MOVLPS xmm1, m64`
7495	///
7496	/// `NP 0F 12 /r`
7497	///
7498	/// `SSE`
7499	///
7500	/// `16/32/64-bit`
7501	Movlps_xmm_m64 = 938,
7502	/// `VMOVHLPS xmm1, xmm2, xmm3`
7503	///
7504	/// `VEX.128.0F.WIG 12 /r`
7505	///
7506	/// `AVX`
7507	///
7508	/// `16/32/64-bit`
7509	VEX_Vmovhlps_xmm_xmm_xmm = 939,
7510	/// `VMOVLPS xmm2, xmm1, m64`
7511	///
7512	/// `VEX.128.0F.WIG 12 /r`
7513	///
7514	/// `AVX`
7515	///
7516	/// `16/32/64-bit`
7517	VEX_Vmovlps_xmm_xmm_m64 = 940,
7518	/// `VMOVHLPS xmm1, xmm2, xmm3`
7519	///
7520	/// `EVEX.128.0F.W0 12 /r`
7521	///
7522	/// `AVX512F`
7523	///
7524	/// `16/32/64-bit`
7525	EVEX_Vmovhlps_xmm_xmm_xmm = 941,
7526	/// `VMOVLPS xmm2, xmm1, m64`
7527	///
7528	/// `EVEX.128.0F.W0 12 /r`
7529	///
7530	/// `AVX512F`
7531	///
7532	/// `16/32/64-bit`
7533	EVEX_Vmovlps_xmm_xmm_m64 = 942,
7534	/// `MOVLPD xmm1, m64`
7535	///
7536	/// `66 0F 12 /r`
7537	///
7538	/// `SSE2`
7539	///
7540	/// `16/32/64-bit`
7541	Movlpd_xmm_m64 = 943,
7542	/// `VMOVLPD xmm2, xmm1, m64`
7543	///
7544	/// `VEX.128.66.0F.WIG 12 /r`
7545	///
7546	/// `AVX`
7547	///
7548	/// `16/32/64-bit`
7549	VEX_Vmovlpd_xmm_xmm_m64 = 944,
7550	/// `VMOVLPD xmm2, xmm1, m64`
7551	///
7552	/// `EVEX.128.66.0F.W1 12 /r`
7553	///
7554	/// `AVX512F`
7555	///
7556	/// `16/32/64-bit`
7557	EVEX_Vmovlpd_xmm_xmm_m64 = 945,
7558	/// `MOVSLDUP xmm1, xmm2/m128`
7559	///
7560	/// `F3 0F 12 /r`
7561	///
7562	/// `SSE3`
7563	///
7564	/// `16/32/64-bit`
7565	Movsldup_xmm_xmmm128 = 946,
7566	/// `VMOVSLDUP xmm1, xmm2/m128`
7567	///
7568	/// `VEX.128.F3.0F.WIG 12 /r`
7569	///
7570	/// `AVX`
7571	///
7572	/// `16/32/64-bit`
7573	VEX_Vmovsldup_xmm_xmmm128 = 947,
7574	/// `VMOVSLDUP ymm1, ymm2/m256`
7575	///
7576	/// `VEX.256.F3.0F.WIG 12 /r`
7577	///
7578	/// `AVX`
7579	///
7580	/// `16/32/64-bit`
7581	VEX_Vmovsldup_ymm_ymmm256 = 948,
7582	/// `VMOVSLDUP xmm1 {k1}{z}, xmm2/m128`
7583	///
7584	/// `EVEX.128.F3.0F.W0 12 /r`
7585	///
7586	/// `AVX512VL and AVX512F`
7587	///
7588	/// `16/32/64-bit`
7589	EVEX_Vmovsldup_xmm_k1z_xmmm128 = 949,
7590	/// `VMOVSLDUP ymm1 {k1}{z}, ymm2/m256`
7591	///
7592	/// `EVEX.256.F3.0F.W0 12 /r`
7593	///
7594	/// `AVX512VL and AVX512F`
7595	///
7596	/// `16/32/64-bit`
7597	EVEX_Vmovsldup_ymm_k1z_ymmm256 = 950,
7598	/// `VMOVSLDUP zmm1 {k1}{z}, zmm2/m512`
7599	///
7600	/// `EVEX.512.F3.0F.W0 12 /r`
7601	///
7602	/// `AVX512F`
7603	///
7604	/// `16/32/64-bit`
7605	EVEX_Vmovsldup_zmm_k1z_zmmm512 = 951,
7606	/// `MOVDDUP xmm1, xmm2/m64`
7607	///
7608	/// `F2 0F 12 /r`
7609	///
7610	/// `SSE3`
7611	///
7612	/// `16/32/64-bit`
7613	Movddup_xmm_xmmm64 = 952,
7614	/// `VMOVDDUP xmm1, xmm2/m64`
7615	///
7616	/// `VEX.128.F2.0F.WIG 12 /r`
7617	///
7618	/// `AVX`
7619	///
7620	/// `16/32/64-bit`
7621	VEX_Vmovddup_xmm_xmmm64 = 953,
7622	/// `VMOVDDUP ymm1, ymm2/m256`
7623	///
7624	/// `VEX.256.F2.0F.WIG 12 /r`
7625	///
7626	/// `AVX`
7627	///
7628	/// `16/32/64-bit`
7629	VEX_Vmovddup_ymm_ymmm256 = 954,
7630	/// `VMOVDDUP xmm1 {k1}{z}, xmm2/m64`
7631	///
7632	/// `EVEX.128.F2.0F.W1 12 /r`
7633	///
7634	/// `AVX512VL and AVX512F`
7635	///
7636	/// `16/32/64-bit`
7637	EVEX_Vmovddup_xmm_k1z_xmmm64 = 955,
7638	/// `VMOVDDUP ymm1 {k1}{z}, ymm2/m256`
7639	///
7640	/// `EVEX.256.F2.0F.W1 12 /r`
7641	///
7642	/// `AVX512VL and AVX512F`
7643	///
7644	/// `16/32/64-bit`
7645	EVEX_Vmovddup_ymm_k1z_ymmm256 = 956,
7646	/// `VMOVDDUP zmm1 {k1}{z}, zmm2/m512`
7647	///
7648	/// `EVEX.512.F2.0F.W1 12 /r`
7649	///
7650	/// `AVX512F`
7651	///
7652	/// `16/32/64-bit`
7653	EVEX_Vmovddup_zmm_k1z_zmmm512 = 957,
7654	/// `MOVLPS m64, xmm1`
7655	///
7656	/// `NP 0F 13 /r`
7657	///
7658	/// `SSE`
7659	///
7660	/// `16/32/64-bit`
7661	Movlps_m64_xmm = 958,
7662	/// `VMOVLPS m64, xmm1`
7663	///
7664	/// `VEX.128.0F.WIG 13 /r`
7665	///
7666	/// `AVX`
7667	///
7668	/// `16/32/64-bit`
7669	VEX_Vmovlps_m64_xmm = 959,
7670	/// `VMOVLPS m64, xmm1`
7671	///
7672	/// `EVEX.128.0F.W0 13 /r`
7673	///
7674	/// `AVX512F`
7675	///
7676	/// `16/32/64-bit`
7677	EVEX_Vmovlps_m64_xmm = 960,
7678	/// `MOVLPD m64, xmm1`
7679	///
7680	/// `66 0F 13 /r`
7681	///
7682	/// `SSE2`
7683	///
7684	/// `16/32/64-bit`
7685	Movlpd_m64_xmm = 961,
7686	/// `VMOVLPD m64, xmm1`
7687	///
7688	/// `VEX.128.66.0F.WIG 13 /r`
7689	///
7690	/// `AVX`
7691	///
7692	/// `16/32/64-bit`
7693	VEX_Vmovlpd_m64_xmm = 962,
7694	/// `VMOVLPD m64, xmm1`
7695	///
7696	/// `EVEX.128.66.0F.W1 13 /r`
7697	///
7698	/// `AVX512F`
7699	///
7700	/// `16/32/64-bit`
7701	EVEX_Vmovlpd_m64_xmm = 963,
7702	/// `UNPCKLPS xmm1, xmm2/m128`
7703	///
7704	/// `NP 0F 14 /r`
7705	///
7706	/// `SSE`
7707	///
7708	/// `16/32/64-bit`
7709	Unpcklps_xmm_xmmm128 = 964,
7710	/// `VUNPCKLPS xmm1, xmm2, xmm3/m128`
7711	///
7712	/// `VEX.128.0F.WIG 14 /r`
7713	///
7714	/// `AVX`
7715	///
7716	/// `16/32/64-bit`
7717	VEX_Vunpcklps_xmm_xmm_xmmm128 = 965,
7718	/// `VUNPCKLPS ymm1, ymm2, ymm3/m256`
7719	///
7720	/// `VEX.256.0F.WIG 14 /r`
7721	///
7722	/// `AVX`
7723	///
7724	/// `16/32/64-bit`
7725	VEX_Vunpcklps_ymm_ymm_ymmm256 = 966,
7726	/// `VUNPCKLPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
7727	///
7728	/// `EVEX.128.0F.W0 14 /r`
7729	///
7730	/// `AVX512VL and AVX512F`
7731	///
7732	/// `16/32/64-bit`
7733	EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32 = 967,
7734	/// `VUNPCKLPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
7735	///
7736	/// `EVEX.256.0F.W0 14 /r`
7737	///
7738	/// `AVX512VL and AVX512F`
7739	///
7740	/// `16/32/64-bit`
7741	EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32 = 968,
7742	/// `VUNPCKLPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
7743	///
7744	/// `EVEX.512.0F.W0 14 /r`
7745	///
7746	/// `AVX512F`
7747	///
7748	/// `16/32/64-bit`
7749	EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32 = 969,
7750	/// `UNPCKLPD xmm1, xmm2/m128`
7751	///
7752	/// `66 0F 14 /r`
7753	///
7754	/// `SSE2`
7755	///
7756	/// `16/32/64-bit`
7757	Unpcklpd_xmm_xmmm128 = 970,
7758	/// `VUNPCKLPD xmm1, xmm2, xmm3/m128`
7759	///
7760	/// `VEX.128.66.0F.WIG 14 /r`
7761	///
7762	/// `AVX`
7763	///
7764	/// `16/32/64-bit`
7765	VEX_Vunpcklpd_xmm_xmm_xmmm128 = 971,
7766	/// `VUNPCKLPD ymm1, ymm2, ymm3/m256`
7767	///
7768	/// `VEX.256.66.0F.WIG 14 /r`
7769	///
7770	/// `AVX`
7771	///
7772	/// `16/32/64-bit`
7773	VEX_Vunpcklpd_ymm_ymm_ymmm256 = 972,
7774	/// `VUNPCKLPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
7775	///
7776	/// `EVEX.128.66.0F.W1 14 /r`
7777	///
7778	/// `AVX512VL and AVX512F`
7779	///
7780	/// `16/32/64-bit`
7781	EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64 = 973,
7782	/// `VUNPCKLPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
7783	///
7784	/// `EVEX.256.66.0F.W1 14 /r`
7785	///
7786	/// `AVX512VL and AVX512F`
7787	///
7788	/// `16/32/64-bit`
7789	EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64 = 974,
7790	/// `VUNPCKLPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
7791	///
7792	/// `EVEX.512.66.0F.W1 14 /r`
7793	///
7794	/// `AVX512F`
7795	///
7796	/// `16/32/64-bit`
7797	EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64 = 975,
7798	/// `UNPCKHPS xmm1, xmm2/m128`
7799	///
7800	/// `NP 0F 15 /r`
7801	///
7802	/// `SSE`
7803	///
7804	/// `16/32/64-bit`
7805	Unpckhps_xmm_xmmm128 = 976,
7806	/// `VUNPCKHPS xmm1, xmm2, xmm3/m128`
7807	///
7808	/// `VEX.128.0F.WIG 15 /r`
7809	///
7810	/// `AVX`
7811	///
7812	/// `16/32/64-bit`
7813	VEX_Vunpckhps_xmm_xmm_xmmm128 = 977,
7814	/// `VUNPCKHPS ymm1, ymm2, ymm3/m256`
7815	///
7816	/// `VEX.256.0F.WIG 15 /r`
7817	///
7818	/// `AVX`
7819	///
7820	/// `16/32/64-bit`
7821	VEX_Vunpckhps_ymm_ymm_ymmm256 = 978,
7822	/// `VUNPCKHPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
7823	///
7824	/// `EVEX.128.0F.W0 15 /r`
7825	///
7826	/// `AVX512VL and AVX512F`
7827	///
7828	/// `16/32/64-bit`
7829	EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32 = 979,
7830	/// `VUNPCKHPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
7831	///
7832	/// `EVEX.256.0F.W0 15 /r`
7833	///
7834	/// `AVX512VL and AVX512F`
7835	///
7836	/// `16/32/64-bit`
7837	EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32 = 980,
7838	/// `VUNPCKHPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
7839	///
7840	/// `EVEX.512.0F.W0 15 /r`
7841	///
7842	/// `AVX512F`
7843	///
7844	/// `16/32/64-bit`
7845	EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32 = 981,
7846	/// `UNPCKHPD xmm1, xmm2/m128`
7847	///
7848	/// `66 0F 15 /r`
7849	///
7850	/// `SSE2`
7851	///
7852	/// `16/32/64-bit`
7853	Unpckhpd_xmm_xmmm128 = 982,
7854	/// `VUNPCKHPD xmm1, xmm2, xmm3/m128`
7855	///
7856	/// `VEX.128.66.0F.WIG 15 /r`
7857	///
7858	/// `AVX`
7859	///
7860	/// `16/32/64-bit`
7861	VEX_Vunpckhpd_xmm_xmm_xmmm128 = 983,
7862	/// `VUNPCKHPD ymm1, ymm2, ymm3/m256`
7863	///
7864	/// `VEX.256.66.0F.WIG 15 /r`
7865	///
7866	/// `AVX`
7867	///
7868	/// `16/32/64-bit`
7869	VEX_Vunpckhpd_ymm_ymm_ymmm256 = 984,
7870	/// `VUNPCKHPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
7871	///
7872	/// `EVEX.128.66.0F.W1 15 /r`
7873	///
7874	/// `AVX512VL and AVX512F`
7875	///
7876	/// `16/32/64-bit`
7877	EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64 = 985,
7878	/// `VUNPCKHPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
7879	///
7880	/// `EVEX.256.66.0F.W1 15 /r`
7881	///
7882	/// `AVX512VL and AVX512F`
7883	///
7884	/// `16/32/64-bit`
7885	EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64 = 986,
7886	/// `VUNPCKHPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
7887	///
7888	/// `EVEX.512.66.0F.W1 15 /r`
7889	///
7890	/// `AVX512F`
7891	///
7892	/// `16/32/64-bit`
7893	EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64 = 987,
7894	/// `MOVLHPS xmm1, xmm2`
7895	///
7896	/// `NP 0F 16 /r`
7897	///
7898	/// `SSE`
7899	///
7900	/// `16/32/64-bit`
7901	Movlhps_xmm_xmm = 988,
7902	/// `VMOVLHPS xmm1, xmm2, xmm3`
7903	///
7904	/// `VEX.128.0F.WIG 16 /r`
7905	///
7906	/// `AVX`
7907	///
7908	/// `16/32/64-bit`
7909	VEX_Vmovlhps_xmm_xmm_xmm = 989,
7910	/// `VMOVLHPS xmm1, xmm2, xmm3`
7911	///
7912	/// `EVEX.128.0F.W0 16 /r`
7913	///
7914	/// `AVX512F`
7915	///
7916	/// `16/32/64-bit`
7917	EVEX_Vmovlhps_xmm_xmm_xmm = 990,
7918	/// `MOVHPS xmm1, m64`
7919	///
7920	/// `NP 0F 16 /r`
7921	///
7922	/// `SSE`
7923	///
7924	/// `16/32/64-bit`
7925	Movhps_xmm_m64 = 991,
7926	/// `VMOVHPS xmm2, xmm1, m64`
7927	///
7928	/// `VEX.128.0F.WIG 16 /r`
7929	///
7930	/// `AVX`
7931	///
7932	/// `16/32/64-bit`
7933	VEX_Vmovhps_xmm_xmm_m64 = 992,
7934	/// `VMOVHPS xmm2, xmm1, m64`
7935	///
7936	/// `EVEX.128.0F.W0 16 /r`
7937	///
7938	/// `AVX512F`
7939	///
7940	/// `16/32/64-bit`
7941	EVEX_Vmovhps_xmm_xmm_m64 = 993,
7942	/// `MOVHPD xmm1, m64`
7943	///
7944	/// `66 0F 16 /r`
7945	///
7946	/// `SSE2`
7947	///
7948	/// `16/32/64-bit`
7949	Movhpd_xmm_m64 = 994,
7950	/// `VMOVHPD xmm2, xmm1, m64`
7951	///
7952	/// `VEX.128.66.0F.WIG 16 /r`
7953	///
7954	/// `AVX`
7955	///
7956	/// `16/32/64-bit`
7957	VEX_Vmovhpd_xmm_xmm_m64 = 995,
7958	/// `VMOVHPD xmm2, xmm1, m64`
7959	///
7960	/// `EVEX.128.66.0F.W1 16 /r`
7961	///
7962	/// `AVX512F`
7963	///
7964	/// `16/32/64-bit`
7965	EVEX_Vmovhpd_xmm_xmm_m64 = 996,
7966	/// `MOVSHDUP xmm1, xmm2/m128`
7967	///
7968	/// `F3 0F 16 /r`
7969	///
7970	/// `SSE3`
7971	///
7972	/// `16/32/64-bit`
7973	Movshdup_xmm_xmmm128 = 997,
7974	/// `VMOVSHDUP xmm1, xmm2/m128`
7975	///
7976	/// `VEX.128.F3.0F.WIG 16 /r`
7977	///
7978	/// `AVX`
7979	///
7980	/// `16/32/64-bit`
7981	VEX_Vmovshdup_xmm_xmmm128 = 998,
7982	/// `VMOVSHDUP ymm1, ymm2/m256`
7983	///
7984	/// `VEX.256.F3.0F.WIG 16 /r`
7985	///
7986	/// `AVX`
7987	///
7988	/// `16/32/64-bit`
7989	VEX_Vmovshdup_ymm_ymmm256 = 999,
7990	/// `VMOVSHDUP xmm1 {k1}{z}, xmm2/m128`
7991	///
7992	/// `EVEX.128.F3.0F.W0 16 /r`
7993	///
7994	/// `AVX512VL and AVX512F`
7995	///
7996	/// `16/32/64-bit`
7997	EVEX_Vmovshdup_xmm_k1z_xmmm128 = 1000,
7998	/// `VMOVSHDUP ymm1 {k1}{z}, ymm2/m256`
7999	///
8000	/// `EVEX.256.F3.0F.W0 16 /r`
8001	///
8002	/// `AVX512VL and AVX512F`
8003	///
8004	/// `16/32/64-bit`
8005	EVEX_Vmovshdup_ymm_k1z_ymmm256 = 1001,
8006	/// `VMOVSHDUP zmm1 {k1}{z}, zmm2/m512`
8007	///
8008	/// `EVEX.512.F3.0F.W0 16 /r`
8009	///
8010	/// `AVX512F`
8011	///
8012	/// `16/32/64-bit`
8013	EVEX_Vmovshdup_zmm_k1z_zmmm512 = 1002,
8014	/// `MOVHPS m64, xmm1`
8015	///
8016	/// `NP 0F 17 /r`
8017	///
8018	/// `SSE`
8019	///
8020	/// `16/32/64-bit`
8021	Movhps_m64_xmm = 1003,
8022	/// `VMOVHPS m64, xmm1`
8023	///
8024	/// `VEX.128.0F.WIG 17 /r`
8025	///
8026	/// `AVX`
8027	///
8028	/// `16/32/64-bit`
8029	VEX_Vmovhps_m64_xmm = 1004,
8030	/// `VMOVHPS m64, xmm1`
8031	///
8032	/// `EVEX.128.0F.W0 17 /r`
8033	///
8034	/// `AVX512F`
8035	///
8036	/// `16/32/64-bit`
8037	EVEX_Vmovhps_m64_xmm = 1005,
8038	/// `MOVHPD m64, xmm1`
8039	///
8040	/// `66 0F 17 /r`
8041	///
8042	/// `SSE2`
8043	///
8044	/// `16/32/64-bit`
8045	Movhpd_m64_xmm = 1006,
8046	/// `VMOVHPD m64, xmm1`
8047	///
8048	/// `VEX.128.66.0F.WIG 17 /r`
8049	///
8050	/// `AVX`
8051	///
8052	/// `16/32/64-bit`
8053	VEX_Vmovhpd_m64_xmm = 1007,
8054	/// `VMOVHPD m64, xmm1`
8055	///
8056	/// `EVEX.128.66.0F.W1 17 /r`
8057	///
8058	/// `AVX512F`
8059	///
8060	/// `16/32/64-bit`
8061	EVEX_Vmovhpd_m64_xmm = 1008,
8062	/// `RESERVEDNOP r/m16, r16`
8063	///
8064	/// `o16 0F 18 /r`
8065	///
8066	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8067	///
8068	/// `16/32/64-bit`
8069	Reservednop_rm16_r16_0F18 = 1009,
8070	/// `RESERVEDNOP r/m32, r32`
8071	///
8072	/// `o32 0F 18 /r`
8073	///
8074	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8075	///
8076	/// `16/32/64-bit`
8077	Reservednop_rm32_r32_0F18 = 1010,
8078	/// `RESERVEDNOP r/m64, r64`
8079	///
8080	/// `o64 0F 18 /r`
8081	///
8082	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8083	///
8084	/// `64-bit`
8085	Reservednop_rm64_r64_0F18 = 1011,
8086	/// `RESERVEDNOP r/m16, r16`
8087	///
8088	/// `o16 0F 19 /r`
8089	///
8090	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8091	///
8092	/// `16/32/64-bit`
8093	Reservednop_rm16_r16_0F19 = 1012,
8094	/// `RESERVEDNOP r/m32, r32`
8095	///
8096	/// `o32 0F 19 /r`
8097	///
8098	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8099	///
8100	/// `16/32/64-bit`
8101	Reservednop_rm32_r32_0F19 = 1013,
8102	/// `RESERVEDNOP r/m64, r64`
8103	///
8104	/// `o64 0F 19 /r`
8105	///
8106	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8107	///
8108	/// `64-bit`
8109	Reservednop_rm64_r64_0F19 = 1014,
8110	/// `RESERVEDNOP r/m16, r16`
8111	///
8112	/// `o16 0F 1A /r`
8113	///
8114	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8115	///
8116	/// `16/32/64-bit`
8117	Reservednop_rm16_r16_0F1A = 1015,
8118	/// `RESERVEDNOP r/m32, r32`
8119	///
8120	/// `o32 0F 1A /r`
8121	///
8122	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8123	///
8124	/// `16/32/64-bit`
8125	Reservednop_rm32_r32_0F1A = 1016,
8126	/// `RESERVEDNOP r/m64, r64`
8127	///
8128	/// `o64 0F 1A /r`
8129	///
8130	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8131	///
8132	/// `64-bit`
8133	Reservednop_rm64_r64_0F1A = 1017,
8134	/// `RESERVEDNOP r/m16, r16`
8135	///
8136	/// `o16 0F 1B /r`
8137	///
8138	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8139	///
8140	/// `16/32/64-bit`
8141	Reservednop_rm16_r16_0F1B = 1018,
8142	/// `RESERVEDNOP r/m32, r32`
8143	///
8144	/// `o32 0F 1B /r`
8145	///
8146	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8147	///
8148	/// `16/32/64-bit`
8149	Reservednop_rm32_r32_0F1B = 1019,
8150	/// `RESERVEDNOP r/m64, r64`
8151	///
8152	/// `o64 0F 1B /r`
8153	///
8154	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8155	///
8156	/// `64-bit`
8157	Reservednop_rm64_r64_0F1B = 1020,
8158	/// `RESERVEDNOP r/m16, r16`
8159	///
8160	/// `o16 0F 1C /r`
8161	///
8162	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8163	///
8164	/// `16/32/64-bit`
8165	Reservednop_rm16_r16_0F1C = 1021,
8166	/// `RESERVEDNOP r/m32, r32`
8167	///
8168	/// `o32 0F 1C /r`
8169	///
8170	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8171	///
8172	/// `16/32/64-bit`
8173	Reservednop_rm32_r32_0F1C = 1022,
8174	/// `RESERVEDNOP r/m64, r64`
8175	///
8176	/// `o64 0F 1C /r`
8177	///
8178	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8179	///
8180	/// `64-bit`
8181	Reservednop_rm64_r64_0F1C = 1023,
8182	/// `RESERVEDNOP r/m16, r16`
8183	///
8184	/// `o16 0F 1D /r`
8185	///
8186	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8187	///
8188	/// `16/32/64-bit`
8189	Reservednop_rm16_r16_0F1D = 1024,
8190	/// `RESERVEDNOP r/m32, r32`
8191	///
8192	/// `o32 0F 1D /r`
8193	///
8194	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8195	///
8196	/// `16/32/64-bit`
8197	Reservednop_rm32_r32_0F1D = 1025,
8198	/// `RESERVEDNOP r/m64, r64`
8199	///
8200	/// `o64 0F 1D /r`
8201	///
8202	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8203	///
8204	/// `64-bit`
8205	Reservednop_rm64_r64_0F1D = 1026,
8206	/// `RESERVEDNOP r/m16, r16`
8207	///
8208	/// `o16 0F 1E /r`
8209	///
8210	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8211	///
8212	/// `16/32/64-bit`
8213	Reservednop_rm16_r16_0F1E = 1027,
8214	/// `RESERVEDNOP r/m32, r32`
8215	///
8216	/// `o32 0F 1E /r`
8217	///
8218	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8219	///
8220	/// `16/32/64-bit`
8221	Reservednop_rm32_r32_0F1E = 1028,
8222	/// `RESERVEDNOP r/m64, r64`
8223	///
8224	/// `o64 0F 1E /r`
8225	///
8226	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8227	///
8228	/// `64-bit`
8229	Reservednop_rm64_r64_0F1E = 1029,
8230	/// `RESERVEDNOP r/m16, r16`
8231	///
8232	/// `o16 0F 1F /r`
8233	///
8234	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8235	///
8236	/// `16/32/64-bit`
8237	Reservednop_rm16_r16_0F1F = 1030,
8238	/// `RESERVEDNOP r/m32, r32`
8239	///
8240	/// `o32 0F 1F /r`
8241	///
8242	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8243	///
8244	/// `16/32/64-bit`
8245	Reservednop_rm32_r32_0F1F = 1031,
8246	/// `RESERVEDNOP r/m64, r64`
8247	///
8248	/// `o64 0F 1F /r`
8249	///
8250	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8251	///
8252	/// `64-bit`
8253	Reservednop_rm64_r64_0F1F = 1032,
8254	/// `PREFETCHNTA m8`
8255	///
8256	/// `0F 18 /0`
8257	///
8258	/// `SSE`
8259	///
8260	/// `16/32/64-bit`
8261	Prefetchnta_m8 = 1033,
8262	/// `PREFETCHT0 m8`
8263	///
8264	/// `0F 18 /1`
8265	///
8266	/// `SSE`
8267	///
8268	/// `16/32/64-bit`
8269	Prefetcht0_m8 = 1034,
8270	/// `PREFETCHT1 m8`
8271	///
8272	/// `0F 18 /2`
8273	///
8274	/// `SSE`
8275	///
8276	/// `16/32/64-bit`
8277	Prefetcht1_m8 = 1035,
8278	/// `PREFETCHT2 m8`
8279	///
8280	/// `0F 18 /3`
8281	///
8282	/// `SSE`
8283	///
8284	/// `16/32/64-bit`
8285	Prefetcht2_m8 = 1036,
8286	/// `BNDLDX bnd, mib`
8287	///
8288	/// `NP 0F 1A /r`
8289	///
8290	/// `MPX`
8291	///
8292	/// `16/32/64-bit`
8293	Bndldx_bnd_mib = 1037,
8294	/// `BNDMOV bnd1, bnd2/m64`
8295	///
8296	/// `66 0F 1A /r`
8297	///
8298	/// `MPX`
8299	///
8300	/// `16/32-bit`
8301	Bndmov_bnd_bndm64 = 1038,
8302	/// `BNDMOV bnd1, bnd2/m128`
8303	///
8304	/// `66 0F 1A /r`
8305	///
8306	/// `MPX`
8307	///
8308	/// `64-bit`
8309	Bndmov_bnd_bndm128 = 1039,
8310	/// `BNDCL bnd, r/m32`
8311	///
8312	/// `F3 0F 1A /r`
8313	///
8314	/// `MPX`
8315	///
8316	/// `16/32-bit`
8317	Bndcl_bnd_rm32 = 1040,
8318	/// `BNDCL bnd, r/m64`
8319	///
8320	/// `F3 0F 1A /r`
8321	///
8322	/// `MPX`
8323	///
8324	/// `64-bit`
8325	Bndcl_bnd_rm64 = 1041,
8326	/// `BNDCU bnd, r/m32`
8327	///
8328	/// `F2 0F 1A /r`
8329	///
8330	/// `MPX`
8331	///
8332	/// `16/32-bit`
8333	Bndcu_bnd_rm32 = 1042,
8334	/// `BNDCU bnd, r/m64`
8335	///
8336	/// `F2 0F 1A /r`
8337	///
8338	/// `MPX`
8339	///
8340	/// `64-bit`
8341	Bndcu_bnd_rm64 = 1043,
8342	/// `BNDSTX mib, bnd`
8343	///
8344	/// `NP 0F 1B /r`
8345	///
8346	/// `MPX`
8347	///
8348	/// `16/32/64-bit`
8349	Bndstx_mib_bnd = 1044,
8350	/// `BNDMOV bnd1/m64, bnd2`
8351	///
8352	/// `66 0F 1B /r`
8353	///
8354	/// `MPX`
8355	///
8356	/// `16/32-bit`
8357	Bndmov_bndm64_bnd = 1045,
8358	/// `BNDMOV bnd1/m128, bnd2`
8359	///
8360	/// `66 0F 1B /r`
8361	///
8362	/// `MPX`
8363	///
8364	/// `64-bit`
8365	Bndmov_bndm128_bnd = 1046,
8366	/// `BNDMK bnd, m32`
8367	///
8368	/// `F3 0F 1B /r`
8369	///
8370	/// `MPX`
8371	///
8372	/// `16/32-bit`
8373	Bndmk_bnd_m32 = 1047,
8374	/// `BNDMK bnd, m64`
8375	///
8376	/// `F3 0F 1B /r`
8377	///
8378	/// `MPX`
8379	///
8380	/// `64-bit`
8381	Bndmk_bnd_m64 = 1048,
8382	/// `BNDCN bnd, r/m32`
8383	///
8384	/// `F2 0F 1B /r`
8385	///
8386	/// `MPX`
8387	///
8388	/// `16/32-bit`
8389	Bndcn_bnd_rm32 = 1049,
8390	/// `BNDCN bnd, r/m64`
8391	///
8392	/// `F2 0F 1B /r`
8393	///
8394	/// `MPX`
8395	///
8396	/// `64-bit`
8397	Bndcn_bnd_rm64 = 1050,
8398	/// `CLDEMOTE m8`
8399	///
8400	/// `NP 0F 1C /0`
8401	///
8402	/// `CLDEMOTE`
8403	///
8404	/// `16/32/64-bit`
8405	Cldemote_m8 = 1051,
8406	/// `RDSSPD r32`
8407	///
8408	/// `F3 0F 1E /1`
8409	///
8410	/// `CET_SS`
8411	///
8412	/// `16/32/64-bit`
8413	Rdsspd_r32 = 1052,
8414	/// `RDSSPQ r64`
8415	///
8416	/// `F3 o64 0F 1E /1`
8417	///
8418	/// `CET_SS`
8419	///
8420	/// `64-bit`
8421	Rdsspq_r64 = 1053,
8422	/// `ENDBR64`
8423	///
8424	/// `F3 0F 1E FA`
8425	///
8426	/// `CET_IBT`
8427	///
8428	/// `16/32/64-bit`
8429	Endbr64 = 1054,
8430	/// `ENDBR32`
8431	///
8432	/// `F3 0F 1E FB`
8433	///
8434	/// `CET_IBT`
8435	///
8436	/// `16/32/64-bit`
8437	Endbr32 = 1055,
8438	/// `NOP r/m16`
8439	///
8440	/// `o16 0F 1F /0`
8441	///
8442	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8443	///
8444	/// `16/32/64-bit`
8445	Nop_rm16 = 1056,
8446	/// `NOP r/m32`
8447	///
8448	/// `o32 0F 1F /0`
8449	///
8450	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8451	///
8452	/// `16/32/64-bit`
8453	Nop_rm32 = 1057,
8454	/// `NOP r/m64`
8455	///
8456	/// `o64 0F 1F /0`
8457	///
8458	/// `CPUID.01H.EAX[Bits 11:8] = 0110B or 1111B`
8459	///
8460	/// `64-bit`
8461	Nop_rm64 = 1058,
8462	/// `MOV r32, cr`
8463	///
8464	/// `0F 20 /r`
8465	///
8466	/// `386+`
8467	///
8468	/// `16/32-bit`
8469	Mov_r32_cr = 1059,
8470	/// `MOV r64, cr`
8471	///
8472	/// `0F 20 /r`
8473	///
8474	/// `X64`
8475	///
8476	/// `64-bit`
8477	Mov_r64_cr = 1060,
8478	/// `MOV r32, dr`
8479	///
8480	/// `0F 21 /r`
8481	///
8482	/// `386+`
8483	///
8484	/// `16/32-bit`
8485	Mov_r32_dr = 1061,
8486	/// `MOV r64, dr`
8487	///
8488	/// `0F 21 /r`
8489	///
8490	/// `X64`
8491	///
8492	/// `64-bit`
8493	Mov_r64_dr = 1062,
8494	/// `MOV cr, r32`
8495	///
8496	/// `0F 22 /r`
8497	///
8498	/// `386+`
8499	///
8500	/// `16/32-bit`
8501	Mov_cr_r32 = 1063,
8502	/// `MOV cr, r64`
8503	///
8504	/// `0F 22 /r`
8505	///
8506	/// `X64`
8507	///
8508	/// `64-bit`
8509	Mov_cr_r64 = 1064,
8510	/// `MOV dr, r32`
8511	///
8512	/// `0F 23 /r`
8513	///
8514	/// `386+`
8515	///
8516	/// `16/32-bit`
8517	Mov_dr_r32 = 1065,
8518	/// `MOV dr, r64`
8519	///
8520	/// `0F 23 /r`
8521	///
8522	/// `X64`
8523	///
8524	/// `64-bit`
8525	Mov_dr_r64 = 1066,
8526	/// `MOV r32, tr`
8527	///
8528	/// `0F 24 /r`
8529	///
8530	/// `386/486/Cyrix/Geode`
8531	///
8532	/// `16/32-bit`
8533	Mov_r32_tr = 1067,
8534	/// `MOV tr, r32`
8535	///
8536	/// `0F 26 /r`
8537	///
8538	/// `386/486/Cyrix/Geode`
8539	///
8540	/// `16/32-bit`
8541	Mov_tr_r32 = 1068,
8542	/// `MOVAPS xmm1, xmm2/m128`
8543	///
8544	/// `NP 0F 28 /r`
8545	///
8546	/// `SSE`
8547	///
8548	/// `16/32/64-bit`
8549	Movaps_xmm_xmmm128 = 1069,
8550	/// `VMOVAPS xmm1, xmm2/m128`
8551	///
8552	/// `VEX.128.0F.WIG 28 /r`
8553	///
8554	/// `AVX`
8555	///
8556	/// `16/32/64-bit`
8557	VEX_Vmovaps_xmm_xmmm128 = 1070,
8558	/// `VMOVAPS ymm1, ymm2/m256`
8559	///
8560	/// `VEX.256.0F.WIG 28 /r`
8561	///
8562	/// `AVX`
8563	///
8564	/// `16/32/64-bit`
8565	VEX_Vmovaps_ymm_ymmm256 = 1071,
8566	/// `VMOVAPS xmm1 {k1}{z}, xmm2/m128`
8567	///
8568	/// `EVEX.128.0F.W0 28 /r`
8569	///
8570	/// `AVX512VL and AVX512F`
8571	///
8572	/// `16/32/64-bit`
8573	EVEX_Vmovaps_xmm_k1z_xmmm128 = 1072,
8574	/// `VMOVAPS ymm1 {k1}{z}, ymm2/m256`
8575	///
8576	/// `EVEX.256.0F.W0 28 /r`
8577	///
8578	/// `AVX512VL and AVX512F`
8579	///
8580	/// `16/32/64-bit`
8581	EVEX_Vmovaps_ymm_k1z_ymmm256 = 1073,
8582	/// `VMOVAPS zmm1 {k1}{z}, zmm2/m512`
8583	///
8584	/// `EVEX.512.0F.W0 28 /r`
8585	///
8586	/// `AVX512F`
8587	///
8588	/// `16/32/64-bit`
8589	EVEX_Vmovaps_zmm_k1z_zmmm512 = 1074,
8590	/// `MOVAPD xmm1, xmm2/m128`
8591	///
8592	/// `66 0F 28 /r`
8593	///
8594	/// `SSE2`
8595	///
8596	/// `16/32/64-bit`
8597	Movapd_xmm_xmmm128 = 1075,
8598	/// `VMOVAPD xmm1, xmm2/m128`
8599	///
8600	/// `VEX.128.66.0F.WIG 28 /r`
8601	///
8602	/// `AVX`
8603	///
8604	/// `16/32/64-bit`
8605	VEX_Vmovapd_xmm_xmmm128 = 1076,
8606	/// `VMOVAPD ymm1, ymm2/m256`
8607	///
8608	/// `VEX.256.66.0F.WIG 28 /r`
8609	///
8610	/// `AVX`
8611	///
8612	/// `16/32/64-bit`
8613	VEX_Vmovapd_ymm_ymmm256 = 1077,
8614	/// `VMOVAPD xmm1 {k1}{z}, xmm2/m128`
8615	///
8616	/// `EVEX.128.66.0F.W1 28 /r`
8617	///
8618	/// `AVX512VL and AVX512F`
8619	///
8620	/// `16/32/64-bit`
8621	EVEX_Vmovapd_xmm_k1z_xmmm128 = 1078,
8622	/// `VMOVAPD ymm1 {k1}{z}, ymm2/m256`
8623	///
8624	/// `EVEX.256.66.0F.W1 28 /r`
8625	///
8626	/// `AVX512VL and AVX512F`
8627	///
8628	/// `16/32/64-bit`
8629	EVEX_Vmovapd_ymm_k1z_ymmm256 = 1079,
8630	/// `VMOVAPD zmm1 {k1}{z}, zmm2/m512`
8631	///
8632	/// `EVEX.512.66.0F.W1 28 /r`
8633	///
8634	/// `AVX512F`
8635	///
8636	/// `16/32/64-bit`
8637	EVEX_Vmovapd_zmm_k1z_zmmm512 = 1080,
8638	/// `MOVAPS xmm2/m128, xmm1`
8639	///
8640	/// `NP 0F 29 /r`
8641	///
8642	/// `SSE`
8643	///
8644	/// `16/32/64-bit`
8645	Movaps_xmmm128_xmm = 1081,
8646	/// `VMOVAPS xmm2/m128, xmm1`
8647	///
8648	/// `VEX.128.0F.WIG 29 /r`
8649	///
8650	/// `AVX`
8651	///
8652	/// `16/32/64-bit`
8653	VEX_Vmovaps_xmmm128_xmm = 1082,
8654	/// `VMOVAPS ymm2/m256, ymm1`
8655	///
8656	/// `VEX.256.0F.WIG 29 /r`
8657	///
8658	/// `AVX`
8659	///
8660	/// `16/32/64-bit`
8661	VEX_Vmovaps_ymmm256_ymm = 1083,
8662	/// `VMOVAPS xmm2/m128 {k1}{z}, xmm1`
8663	///
8664	/// `EVEX.128.0F.W0 29 /r`
8665	///
8666	/// `AVX512VL and AVX512F`
8667	///
8668	/// `16/32/64-bit`
8669	EVEX_Vmovaps_xmmm128_k1z_xmm = 1084,
8670	/// `VMOVAPS ymm2/m256 {k1}{z}, ymm1`
8671	///
8672	/// `EVEX.256.0F.W0 29 /r`
8673	///
8674	/// `AVX512VL and AVX512F`
8675	///
8676	/// `16/32/64-bit`
8677	EVEX_Vmovaps_ymmm256_k1z_ymm = 1085,
8678	/// `VMOVAPS zmm2/m512 {k1}{z}, zmm1`
8679	///
8680	/// `EVEX.512.0F.W0 29 /r`
8681	///
8682	/// `AVX512F`
8683	///
8684	/// `16/32/64-bit`
8685	EVEX_Vmovaps_zmmm512_k1z_zmm = 1086,
8686	/// `MOVAPD xmm2/m128, xmm1`
8687	///
8688	/// `66 0F 29 /r`
8689	///
8690	/// `SSE2`
8691	///
8692	/// `16/32/64-bit`
8693	Movapd_xmmm128_xmm = 1087,
8694	/// `VMOVAPD xmm2/m128, xmm1`
8695	///
8696	/// `VEX.128.66.0F.WIG 29 /r`
8697	///
8698	/// `AVX`
8699	///
8700	/// `16/32/64-bit`
8701	VEX_Vmovapd_xmmm128_xmm = 1088,
8702	/// `VMOVAPD ymm2/m256, ymm1`
8703	///
8704	/// `VEX.256.66.0F.WIG 29 /r`
8705	///
8706	/// `AVX`
8707	///
8708	/// `16/32/64-bit`
8709	VEX_Vmovapd_ymmm256_ymm = 1089,
8710	/// `VMOVAPD xmm2/m128 {k1}{z}, xmm1`
8711	///
8712	/// `EVEX.128.66.0F.W1 29 /r`
8713	///
8714	/// `AVX512VL and AVX512F`
8715	///
8716	/// `16/32/64-bit`
8717	EVEX_Vmovapd_xmmm128_k1z_xmm = 1090,
8718	/// `VMOVAPD ymm2/m256 {k1}{z}, ymm1`
8719	///
8720	/// `EVEX.256.66.0F.W1 29 /r`
8721	///
8722	/// `AVX512VL and AVX512F`
8723	///
8724	/// `16/32/64-bit`
8725	EVEX_Vmovapd_ymmm256_k1z_ymm = 1091,
8726	/// `VMOVAPD zmm2/m512 {k1}{z}, zmm1`
8727	///
8728	/// `EVEX.512.66.0F.W1 29 /r`
8729	///
8730	/// `AVX512F`
8731	///
8732	/// `16/32/64-bit`
8733	EVEX_Vmovapd_zmmm512_k1z_zmm = 1092,
8734	/// `CVTPI2PS xmm, mm/m64`
8735	///
8736	/// `NP 0F 2A /r`
8737	///
8738	/// `SSE`
8739	///
8740	/// `16/32/64-bit`
8741	Cvtpi2ps_xmm_mmm64 = 1093,
8742	/// `CVTPI2PD xmm, mm/m64`
8743	///
8744	/// `66 0F 2A /r`
8745	///
8746	/// `SSE2`
8747	///
8748	/// `16/32/64-bit`
8749	Cvtpi2pd_xmm_mmm64 = 1094,
8750	/// `CVTSI2SS xmm1, r/m32`
8751	///
8752	/// `F3 0F 2A /r`
8753	///
8754	/// `SSE`
8755	///
8756	/// `16/32/64-bit`
8757	Cvtsi2ss_xmm_rm32 = 1095,
8758	/// `CVTSI2SS xmm1, r/m64`
8759	///
8760	/// `F3 o64 0F 2A /r`
8761	///
8762	/// `SSE`
8763	///
8764	/// `64-bit`
8765	Cvtsi2ss_xmm_rm64 = 1096,
8766	/// `VCVTSI2SS xmm1, xmm2, r/m32`
8767	///
8768	/// `VEX.LIG.F3.0F.W0 2A /r`
8769	///
8770	/// `AVX`
8771	///
8772	/// `16/32/64-bit`
8773	VEX_Vcvtsi2ss_xmm_xmm_rm32 = 1097,
8774	/// `VCVTSI2SS xmm1, xmm2, r/m64`
8775	///
8776	/// `VEX.LIG.F3.0F.W1 2A /r`
8777	///
8778	/// `AVX`
8779	///
8780	/// `64-bit`
8781	VEX_Vcvtsi2ss_xmm_xmm_rm64 = 1098,
8782	/// `VCVTSI2SS xmm1, xmm2, r/m32{er}`
8783	///
8784	/// `EVEX.LIG.F3.0F.W0 2A /r`
8785	///
8786	/// `AVX512F`
8787	///
8788	/// `16/32/64-bit`
8789	EVEX_Vcvtsi2ss_xmm_xmm_rm32_er = 1099,
8790	/// `VCVTSI2SS xmm1, xmm2, r/m64{er}`
8791	///
8792	/// `EVEX.LIG.F3.0F.W1 2A /r`
8793	///
8794	/// `AVX512F`
8795	///
8796	/// `64-bit`
8797	EVEX_Vcvtsi2ss_xmm_xmm_rm64_er = 1100,
8798	/// `CVTSI2SD xmm1, r/m32`
8799	///
8800	/// `F2 0F 2A /r`
8801	///
8802	/// `SSE2`
8803	///
8804	/// `16/32/64-bit`
8805	Cvtsi2sd_xmm_rm32 = 1101,
8806	/// `CVTSI2SD xmm1, r/m64`
8807	///
8808	/// `F2 o64 0F 2A /r`
8809	///
8810	/// `SSE2`
8811	///
8812	/// `64-bit`
8813	Cvtsi2sd_xmm_rm64 = 1102,
8814	/// `VCVTSI2SD xmm1, xmm2, r/m32`
8815	///
8816	/// `VEX.LIG.F2.0F.W0 2A /r`
8817	///
8818	/// `AVX`
8819	///
8820	/// `16/32/64-bit`
8821	VEX_Vcvtsi2sd_xmm_xmm_rm32 = 1103,
8822	/// `VCVTSI2SD xmm1, xmm2, r/m64`
8823	///
8824	/// `VEX.LIG.F2.0F.W1 2A /r`
8825	///
8826	/// `AVX`
8827	///
8828	/// `64-bit`
8829	VEX_Vcvtsi2sd_xmm_xmm_rm64 = 1104,
8830	/// `VCVTSI2SD xmm1, xmm2, r/m32{er}`
8831	///
8832	/// `EVEX.LIG.F2.0F.W0 2A /r`
8833	///
8834	/// `AVX512F`
8835	///
8836	/// `16/32/64-bit`
8837	EVEX_Vcvtsi2sd_xmm_xmm_rm32_er = 1105,
8838	/// `VCVTSI2SD xmm1, xmm2, r/m64{er}`
8839	///
8840	/// `EVEX.LIG.F2.0F.W1 2A /r`
8841	///
8842	/// `AVX512F`
8843	///
8844	/// `64-bit`
8845	EVEX_Vcvtsi2sd_xmm_xmm_rm64_er = 1106,
8846	/// `MOVNTPS m128, xmm1`
8847	///
8848	/// `NP 0F 2B /r`
8849	///
8850	/// `SSE`
8851	///
8852	/// `16/32/64-bit`
8853	Movntps_m128_xmm = 1107,
8854	/// `VMOVNTPS m128, xmm1`
8855	///
8856	/// `VEX.128.0F.WIG 2B /r`
8857	///
8858	/// `AVX`
8859	///
8860	/// `16/32/64-bit`
8861	VEX_Vmovntps_m128_xmm = 1108,
8862	/// `VMOVNTPS m256, ymm1`
8863	///
8864	/// `VEX.256.0F.WIG 2B /r`
8865	///
8866	/// `AVX`
8867	///
8868	/// `16/32/64-bit`
8869	VEX_Vmovntps_m256_ymm = 1109,
8870	/// `VMOVNTPS m128, xmm1`
8871	///
8872	/// `EVEX.128.0F.W0 2B /r`
8873	///
8874	/// `AVX512VL and AVX512F`
8875	///
8876	/// `16/32/64-bit`
8877	EVEX_Vmovntps_m128_xmm = 1110,
8878	/// `VMOVNTPS m256, ymm1`
8879	///
8880	/// `EVEX.256.0F.W0 2B /r`
8881	///
8882	/// `AVX512VL and AVX512F`
8883	///
8884	/// `16/32/64-bit`
8885	EVEX_Vmovntps_m256_ymm = 1111,
8886	/// `VMOVNTPS m512, zmm1`
8887	///
8888	/// `EVEX.512.0F.W0 2B /r`
8889	///
8890	/// `AVX512F`
8891	///
8892	/// `16/32/64-bit`
8893	EVEX_Vmovntps_m512_zmm = 1112,
8894	/// `MOVNTPD m128, xmm1`
8895	///
8896	/// `66 0F 2B /r`
8897	///
8898	/// `SSE2`
8899	///
8900	/// `16/32/64-bit`
8901	Movntpd_m128_xmm = 1113,
8902	/// `VMOVNTPD m128, xmm1`
8903	///
8904	/// `VEX.128.66.0F.WIG 2B /r`
8905	///
8906	/// `AVX`
8907	///
8908	/// `16/32/64-bit`
8909	VEX_Vmovntpd_m128_xmm = 1114,
8910	/// `VMOVNTPD m256, ymm1`
8911	///
8912	/// `VEX.256.66.0F.WIG 2B /r`
8913	///
8914	/// `AVX`
8915	///
8916	/// `16/32/64-bit`
8917	VEX_Vmovntpd_m256_ymm = 1115,
8918	/// `VMOVNTPD m128, xmm1`
8919	///
8920	/// `EVEX.128.66.0F.W1 2B /r`
8921	///
8922	/// `AVX512VL and AVX512F`
8923	///
8924	/// `16/32/64-bit`
8925	EVEX_Vmovntpd_m128_xmm = 1116,
8926	/// `VMOVNTPD m256, ymm1`
8927	///
8928	/// `EVEX.256.66.0F.W1 2B /r`
8929	///
8930	/// `AVX512VL and AVX512F`
8931	///
8932	/// `16/32/64-bit`
8933	EVEX_Vmovntpd_m256_ymm = 1117,
8934	/// `VMOVNTPD m512, zmm1`
8935	///
8936	/// `EVEX.512.66.0F.W1 2B /r`
8937	///
8938	/// `AVX512F`
8939	///
8940	/// `16/32/64-bit`
8941	EVEX_Vmovntpd_m512_zmm = 1118,
8942	/// `MOVNTSS m32, xmm1`
8943	///
8944	/// `F3 0F 2B /r`
8945	///
8946	/// `SSE4A`
8947	///
8948	/// `16/32/64-bit`
8949	Movntss_m32_xmm = 1119,
8950	/// `MOVNTSD m64, xmm1`
8951	///
8952	/// `F2 0F 2B /r`
8953	///
8954	/// `SSE4A`
8955	///
8956	/// `16/32/64-bit`
8957	Movntsd_m64_xmm = 1120,
8958	/// `CVTTPS2PI mm, xmm/m64`
8959	///
8960	/// `NP 0F 2C /r`
8961	///
8962	/// `SSE`
8963	///
8964	/// `16/32/64-bit`
8965	Cvttps2pi_mm_xmmm64 = 1121,
8966	/// `CVTTPD2PI mm, xmm/m128`
8967	///
8968	/// `66 0F 2C /r`
8969	///
8970	/// `SSE2`
8971	///
8972	/// `16/32/64-bit`
8973	Cvttpd2pi_mm_xmmm128 = 1122,
8974	/// `CVTTSS2SI r32, xmm1/m32`
8975	///
8976	/// `F3 0F 2C /r`
8977	///
8978	/// `SSE`
8979	///
8980	/// `16/32/64-bit`
8981	Cvttss2si_r32_xmmm32 = 1123,
8982	/// `CVTTSS2SI r64, xmm1/m32`
8983	///
8984	/// `F3 o64 0F 2C /r`
8985	///
8986	/// `SSE`
8987	///
8988	/// `64-bit`
8989	Cvttss2si_r64_xmmm32 = 1124,
8990	/// `VCVTTSS2SI r32, xmm1/m32`
8991	///
8992	/// `VEX.LIG.F3.0F.W0 2C /r`
8993	///
8994	/// `AVX`
8995	///
8996	/// `16/32/64-bit`
8997	VEX_Vcvttss2si_r32_xmmm32 = 1125,
8998	/// `VCVTTSS2SI r64, xmm1/m32`
8999	///
9000	/// `VEX.LIG.F3.0F.W1 2C /r`
9001	///
9002	/// `AVX`
9003	///
9004	/// `64-bit`
9005	VEX_Vcvttss2si_r64_xmmm32 = 1126,
9006	/// `VCVTTSS2SI r32, xmm1/m32{sae}`
9007	///
9008	/// `EVEX.LIG.F3.0F.W0 2C /r`
9009	///
9010	/// `AVX512F`
9011	///
9012	/// `16/32/64-bit`
9013	EVEX_Vcvttss2si_r32_xmmm32_sae = 1127,
9014	/// `VCVTTSS2SI r64, xmm1/m32{sae}`
9015	///
9016	/// `EVEX.LIG.F3.0F.W1 2C /r`
9017	///
9018	/// `AVX512F`
9019	///
9020	/// `64-bit`
9021	EVEX_Vcvttss2si_r64_xmmm32_sae = 1128,
9022	/// `CVTTSD2SI r32, xmm1/m64`
9023	///
9024	/// `F2 0F 2C /r`
9025	///
9026	/// `SSE2`
9027	///
9028	/// `16/32/64-bit`
9029	Cvttsd2si_r32_xmmm64 = 1129,
9030	/// `CVTTSD2SI r64, xmm1/m64`
9031	///
9032	/// `F2 o64 0F 2C /r`
9033	///
9034	/// `SSE2`
9035	///
9036	/// `64-bit`
9037	Cvttsd2si_r64_xmmm64 = 1130,
9038	/// `VCVTTSD2SI r32, xmm1/m64`
9039	///
9040	/// `VEX.LIG.F2.0F.W0 2C /r`
9041	///
9042	/// `AVX`
9043	///
9044	/// `16/32/64-bit`
9045	VEX_Vcvttsd2si_r32_xmmm64 = 1131,
9046	/// `VCVTTSD2SI r64, xmm1/m64`
9047	///
9048	/// `VEX.LIG.F2.0F.W1 2C /r`
9049	///
9050	/// `AVX`
9051	///
9052	/// `64-bit`
9053	VEX_Vcvttsd2si_r64_xmmm64 = 1132,
9054	/// `VCVTTSD2SI r32, xmm1/m64{sae}`
9055	///
9056	/// `EVEX.LIG.F2.0F.W0 2C /r`
9057	///
9058	/// `AVX512F`
9059	///
9060	/// `16/32/64-bit`
9061	EVEX_Vcvttsd2si_r32_xmmm64_sae = 1133,
9062	/// `VCVTTSD2SI r64, xmm1/m64{sae}`
9063	///
9064	/// `EVEX.LIG.F2.0F.W1 2C /r`
9065	///
9066	/// `AVX512F`
9067	///
9068	/// `64-bit`
9069	EVEX_Vcvttsd2si_r64_xmmm64_sae = 1134,
9070	/// `CVTPS2PI mm, xmm/m64`
9071	///
9072	/// `NP 0F 2D /r`
9073	///
9074	/// `SSE`
9075	///
9076	/// `16/32/64-bit`
9077	Cvtps2pi_mm_xmmm64 = 1135,
9078	/// `CVTPD2PI mm, xmm/m128`
9079	///
9080	/// `66 0F 2D /r`
9081	///
9082	/// `SSE2`
9083	///
9084	/// `16/32/64-bit`
9085	Cvtpd2pi_mm_xmmm128 = 1136,
9086	/// `CVTSS2SI r32, xmm1/m32`
9087	///
9088	/// `F3 0F 2D /r`
9089	///
9090	/// `SSE`
9091	///
9092	/// `16/32/64-bit`
9093	Cvtss2si_r32_xmmm32 = 1137,
9094	/// `CVTSS2SI r64, xmm1/m32`
9095	///
9096	/// `F3 o64 0F 2D /r`
9097	///
9098	/// `SSE`
9099	///
9100	/// `64-bit`
9101	Cvtss2si_r64_xmmm32 = 1138,
9102	/// `VCVTSS2SI r32, xmm1/m32`
9103	///
9104	/// `VEX.LIG.F3.0F.W0 2D /r`
9105	///
9106	/// `AVX`
9107	///
9108	/// `16/32/64-bit`
9109	VEX_Vcvtss2si_r32_xmmm32 = 1139,
9110	/// `VCVTSS2SI r64, xmm1/m32`
9111	///
9112	/// `VEX.LIG.F3.0F.W1 2D /r`
9113	///
9114	/// `AVX`
9115	///
9116	/// `64-bit`
9117	VEX_Vcvtss2si_r64_xmmm32 = 1140,
9118	/// `VCVTSS2SI r32, xmm1/m32{er}`
9119	///
9120	/// `EVEX.LIG.F3.0F.W0 2D /r`
9121	///
9122	/// `AVX512F`
9123	///
9124	/// `16/32/64-bit`
9125	EVEX_Vcvtss2si_r32_xmmm32_er = 1141,
9126	/// `VCVTSS2SI r64, xmm1/m32{er}`
9127	///
9128	/// `EVEX.LIG.F3.0F.W1 2D /r`
9129	///
9130	/// `AVX512F`
9131	///
9132	/// `64-bit`
9133	EVEX_Vcvtss2si_r64_xmmm32_er = 1142,
9134	/// `CVTSD2SI r32, xmm1/m64`
9135	///
9136	/// `F2 0F 2D /r`
9137	///
9138	/// `SSE2`
9139	///
9140	/// `16/32/64-bit`
9141	Cvtsd2si_r32_xmmm64 = 1143,
9142	/// `CVTSD2SI r64, xmm1/m64`
9143	///
9144	/// `F2 o64 0F 2D /r`
9145	///
9146	/// `SSE2`
9147	///
9148	/// `64-bit`
9149	Cvtsd2si_r64_xmmm64 = 1144,
9150	/// `VCVTSD2SI r32, xmm1/m64`
9151	///
9152	/// `VEX.LIG.F2.0F.W0 2D /r`
9153	///
9154	/// `AVX`
9155	///
9156	/// `16/32/64-bit`
9157	VEX_Vcvtsd2si_r32_xmmm64 = 1145,
9158	/// `VCVTSD2SI r64, xmm1/m64`
9159	///
9160	/// `VEX.LIG.F2.0F.W1 2D /r`
9161	///
9162	/// `AVX`
9163	///
9164	/// `64-bit`
9165	VEX_Vcvtsd2si_r64_xmmm64 = 1146,
9166	/// `VCVTSD2SI r32, xmm1/m64{er}`
9167	///
9168	/// `EVEX.LIG.F2.0F.W0 2D /r`
9169	///
9170	/// `AVX512F`
9171	///
9172	/// `16/32/64-bit`
9173	EVEX_Vcvtsd2si_r32_xmmm64_er = 1147,
9174	/// `VCVTSD2SI r64, xmm1/m64{er}`
9175	///
9176	/// `EVEX.LIG.F2.0F.W1 2D /r`
9177	///
9178	/// `AVX512F`
9179	///
9180	/// `64-bit`
9181	EVEX_Vcvtsd2si_r64_xmmm64_er = 1148,
9182	/// `UCOMISS xmm1, xmm2/m32`
9183	///
9184	/// `NP 0F 2E /r`
9185	///
9186	/// `SSE`
9187	///
9188	/// `16/32/64-bit`
9189	Ucomiss_xmm_xmmm32 = 1149,
9190	/// `VUCOMISS xmm1, xmm2/m32`
9191	///
9192	/// `VEX.LIG.0F.WIG 2E /r`
9193	///
9194	/// `AVX`
9195	///
9196	/// `16/32/64-bit`
9197	VEX_Vucomiss_xmm_xmmm32 = 1150,
9198	/// `VUCOMISS xmm1, xmm2/m32{sae}`
9199	///
9200	/// `EVEX.LIG.0F.W0 2E /r`
9201	///
9202	/// `AVX512F`
9203	///
9204	/// `16/32/64-bit`
9205	EVEX_Vucomiss_xmm_xmmm32_sae = 1151,
9206	/// `UCOMISD xmm1, xmm2/m64`
9207	///
9208	/// `66 0F 2E /r`
9209	///
9210	/// `SSE2`
9211	///
9212	/// `16/32/64-bit`
9213	Ucomisd_xmm_xmmm64 = 1152,
9214	/// `VUCOMISD xmm1, xmm2/m64`
9215	///
9216	/// `VEX.LIG.66.0F.WIG 2E /r`
9217	///
9218	/// `AVX`
9219	///
9220	/// `16/32/64-bit`
9221	VEX_Vucomisd_xmm_xmmm64 = 1153,
9222	/// `VUCOMISD xmm1, xmm2/m64{sae}`
9223	///
9224	/// `EVEX.LIG.66.0F.W1 2E /r`
9225	///
9226	/// `AVX512F`
9227	///
9228	/// `16/32/64-bit`
9229	EVEX_Vucomisd_xmm_xmmm64_sae = 1154,
9230	/// `COMISS xmm1, xmm2/m32`
9231	///
9232	/// `NP 0F 2F /r`
9233	///
9234	/// `SSE`
9235	///
9236	/// `16/32/64-bit`
9237	Comiss_xmm_xmmm32 = 1155,
9238	/// `COMISD xmm1, xmm2/m64`
9239	///
9240	/// `66 0F 2F /r`
9241	///
9242	/// `SSE2`
9243	///
9244	/// `16/32/64-bit`
9245	Comisd_xmm_xmmm64 = 1156,
9246	/// `VCOMISS xmm1, xmm2/m32`
9247	///
9248	/// `VEX.LIG.0F.WIG 2F /r`
9249	///
9250	/// `AVX`
9251	///
9252	/// `16/32/64-bit`
9253	VEX_Vcomiss_xmm_xmmm32 = 1157,
9254	/// `VCOMISD xmm1, xmm2/m64`
9255	///
9256	/// `VEX.LIG.66.0F.WIG 2F /r`
9257	///
9258	/// `AVX`
9259	///
9260	/// `16/32/64-bit`
9261	VEX_Vcomisd_xmm_xmmm64 = 1158,
9262	/// `VCOMISS xmm1, xmm2/m32{sae}`
9263	///
9264	/// `EVEX.LIG.0F.W0 2F /r`
9265	///
9266	/// `AVX512F`
9267	///
9268	/// `16/32/64-bit`
9269	EVEX_Vcomiss_xmm_xmmm32_sae = 1159,
9270	/// `VCOMISD xmm1, xmm2/m64{sae}`
9271	///
9272	/// `EVEX.LIG.66.0F.W1 2F /r`
9273	///
9274	/// `AVX512F`
9275	///
9276	/// `16/32/64-bit`
9277	EVEX_Vcomisd_xmm_xmmm64_sae = 1160,
9278	/// `WRMSR`
9279	///
9280	/// `0F 30`
9281	///
9282	/// `MSR`
9283	///
9284	/// `16/32/64-bit`
9285	Wrmsr = 1161,
9286	/// `RDTSC`
9287	///
9288	/// `0F 31`
9289	///
9290	/// `TSC`
9291	///
9292	/// `16/32/64-bit`
9293	Rdtsc = 1162,
9294	/// `RDMSR`
9295	///
9296	/// `0F 32`
9297	///
9298	/// `MSR`
9299	///
9300	/// `16/32/64-bit`
9301	Rdmsr = 1163,
9302	/// `RDPMC`
9303	///
9304	/// `0F 33`
9305	///
9306	/// `Pentium MMX or later, or Pentium Pro or later`
9307	///
9308	/// `16/32/64-bit`
9309	Rdpmc = 1164,
9310	/// `SYSENTER`
9311	///
9312	/// `0F 34`
9313	///
9314	/// `SEP`
9315	///
9316	/// `16/32/64-bit`
9317	Sysenter = 1165,
9318	/// `SYSEXIT`
9319	///
9320	/// `0F 35`
9321	///
9322	/// `SEP`
9323	///
9324	/// `16/32/64-bit`
9325	Sysexitd = 1166,
9326	/// `SYSEXITQ`
9327	///
9328	/// `o64 0F 35`
9329	///
9330	/// `SEP`
9331	///
9332	/// `64-bit`
9333	Sysexitq = 1167,
9334	/// `GETSEC`
9335	///
9336	/// `NP 0F 37`
9337	///
9338	/// `SMX`
9339	///
9340	/// `16/32/64-bit`
9341	Getsecd = 1168,
9342	/// `CMOVO r16, r/m16`
9343	///
9344	/// `o16 0F 40 /r`
9345	///
9346	/// `CMOV`
9347	///
9348	/// `16/32/64-bit`
9349	Cmovo_r16_rm16 = 1169,
9350	/// `CMOVO r32, r/m32`
9351	///
9352	/// `o32 0F 40 /r`
9353	///
9354	/// `CMOV`
9355	///
9356	/// `16/32/64-bit`
9357	Cmovo_r32_rm32 = 1170,
9358	/// `CMOVO r64, r/m64`
9359	///
9360	/// `o64 0F 40 /r`
9361	///
9362	/// `CMOV`
9363	///
9364	/// `64-bit`
9365	Cmovo_r64_rm64 = 1171,
9366	/// `CMOVNO r16, r/m16`
9367	///
9368	/// `o16 0F 41 /r`
9369	///
9370	/// `CMOV`
9371	///
9372	/// `16/32/64-bit`
9373	Cmovno_r16_rm16 = 1172,
9374	/// `CMOVNO r32, r/m32`
9375	///
9376	/// `o32 0F 41 /r`
9377	///
9378	/// `CMOV`
9379	///
9380	/// `16/32/64-bit`
9381	Cmovno_r32_rm32 = 1173,
9382	/// `CMOVNO r64, r/m64`
9383	///
9384	/// `o64 0F 41 /r`
9385	///
9386	/// `CMOV`
9387	///
9388	/// `64-bit`
9389	Cmovno_r64_rm64 = 1174,
9390	/// `CMOVB r16, r/m16`
9391	///
9392	/// `o16 0F 42 /r`
9393	///
9394	/// `CMOV`
9395	///
9396	/// `16/32/64-bit`
9397	Cmovb_r16_rm16 = 1175,
9398	/// `CMOVB r32, r/m32`
9399	///
9400	/// `o32 0F 42 /r`
9401	///
9402	/// `CMOV`
9403	///
9404	/// `16/32/64-bit`
9405	Cmovb_r32_rm32 = 1176,
9406	/// `CMOVB r64, r/m64`
9407	///
9408	/// `o64 0F 42 /r`
9409	///
9410	/// `CMOV`
9411	///
9412	/// `64-bit`
9413	Cmovb_r64_rm64 = 1177,
9414	/// `CMOVAE r16, r/m16`
9415	///
9416	/// `o16 0F 43 /r`
9417	///
9418	/// `CMOV`
9419	///
9420	/// `16/32/64-bit`
9421	Cmovae_r16_rm16 = 1178,
9422	/// `CMOVAE r32, r/m32`
9423	///
9424	/// `o32 0F 43 /r`
9425	///
9426	/// `CMOV`
9427	///
9428	/// `16/32/64-bit`
9429	Cmovae_r32_rm32 = 1179,
9430	/// `CMOVAE r64, r/m64`
9431	///
9432	/// `o64 0F 43 /r`
9433	///
9434	/// `CMOV`
9435	///
9436	/// `64-bit`
9437	Cmovae_r64_rm64 = 1180,
9438	/// `CMOVE r16, r/m16`
9439	///
9440	/// `o16 0F 44 /r`
9441	///
9442	/// `CMOV`
9443	///
9444	/// `16/32/64-bit`
9445	Cmove_r16_rm16 = 1181,
9446	/// `CMOVE r32, r/m32`
9447	///
9448	/// `o32 0F 44 /r`
9449	///
9450	/// `CMOV`
9451	///
9452	/// `16/32/64-bit`
9453	Cmove_r32_rm32 = 1182,
9454	/// `CMOVE r64, r/m64`
9455	///
9456	/// `o64 0F 44 /r`
9457	///
9458	/// `CMOV`
9459	///
9460	/// `64-bit`
9461	Cmove_r64_rm64 = 1183,
9462	/// `CMOVNE r16, r/m16`
9463	///
9464	/// `o16 0F 45 /r`
9465	///
9466	/// `CMOV`
9467	///
9468	/// `16/32/64-bit`
9469	Cmovne_r16_rm16 = 1184,
9470	/// `CMOVNE r32, r/m32`
9471	///
9472	/// `o32 0F 45 /r`
9473	///
9474	/// `CMOV`
9475	///
9476	/// `16/32/64-bit`
9477	Cmovne_r32_rm32 = 1185,
9478	/// `CMOVNE r64, r/m64`
9479	///
9480	/// `o64 0F 45 /r`
9481	///
9482	/// `CMOV`
9483	///
9484	/// `64-bit`
9485	Cmovne_r64_rm64 = 1186,
9486	/// `CMOVBE r16, r/m16`
9487	///
9488	/// `o16 0F 46 /r`
9489	///
9490	/// `CMOV`
9491	///
9492	/// `16/32/64-bit`
9493	Cmovbe_r16_rm16 = 1187,
9494	/// `CMOVBE r32, r/m32`
9495	///
9496	/// `o32 0F 46 /r`
9497	///
9498	/// `CMOV`
9499	///
9500	/// `16/32/64-bit`
9501	Cmovbe_r32_rm32 = 1188,
9502	/// `CMOVBE r64, r/m64`
9503	///
9504	/// `o64 0F 46 /r`
9505	///
9506	/// `CMOV`
9507	///
9508	/// `64-bit`
9509	Cmovbe_r64_rm64 = 1189,
9510	/// `CMOVA r16, r/m16`
9511	///
9512	/// `o16 0F 47 /r`
9513	///
9514	/// `CMOV`
9515	///
9516	/// `16/32/64-bit`
9517	Cmova_r16_rm16 = 1190,
9518	/// `CMOVA r32, r/m32`
9519	///
9520	/// `o32 0F 47 /r`
9521	///
9522	/// `CMOV`
9523	///
9524	/// `16/32/64-bit`
9525	Cmova_r32_rm32 = 1191,
9526	/// `CMOVA r64, r/m64`
9527	///
9528	/// `o64 0F 47 /r`
9529	///
9530	/// `CMOV`
9531	///
9532	/// `64-bit`
9533	Cmova_r64_rm64 = 1192,
9534	/// `CMOVS r16, r/m16`
9535	///
9536	/// `o16 0F 48 /r`
9537	///
9538	/// `CMOV`
9539	///
9540	/// `16/32/64-bit`
9541	Cmovs_r16_rm16 = 1193,
9542	/// `CMOVS r32, r/m32`
9543	///
9544	/// `o32 0F 48 /r`
9545	///
9546	/// `CMOV`
9547	///
9548	/// `16/32/64-bit`
9549	Cmovs_r32_rm32 = 1194,
9550	/// `CMOVS r64, r/m64`
9551	///
9552	/// `o64 0F 48 /r`
9553	///
9554	/// `CMOV`
9555	///
9556	/// `64-bit`
9557	Cmovs_r64_rm64 = 1195,
9558	/// `CMOVNS r16, r/m16`
9559	///
9560	/// `o16 0F 49 /r`
9561	///
9562	/// `CMOV`
9563	///
9564	/// `16/32/64-bit`
9565	Cmovns_r16_rm16 = 1196,
9566	/// `CMOVNS r32, r/m32`
9567	///
9568	/// `o32 0F 49 /r`
9569	///
9570	/// `CMOV`
9571	///
9572	/// `16/32/64-bit`
9573	Cmovns_r32_rm32 = 1197,
9574	/// `CMOVNS r64, r/m64`
9575	///
9576	/// `o64 0F 49 /r`
9577	///
9578	/// `CMOV`
9579	///
9580	/// `64-bit`
9581	Cmovns_r64_rm64 = 1198,
9582	/// `CMOVP r16, r/m16`
9583	///
9584	/// `o16 0F 4A /r`
9585	///
9586	/// `CMOV`
9587	///
9588	/// `16/32/64-bit`
9589	Cmovp_r16_rm16 = 1199,
9590	/// `CMOVP r32, r/m32`
9591	///
9592	/// `o32 0F 4A /r`
9593	///
9594	/// `CMOV`
9595	///
9596	/// `16/32/64-bit`
9597	Cmovp_r32_rm32 = 1200,
9598	/// `CMOVP r64, r/m64`
9599	///
9600	/// `o64 0F 4A /r`
9601	///
9602	/// `CMOV`
9603	///
9604	/// `64-bit`
9605	Cmovp_r64_rm64 = 1201,
9606	/// `CMOVNP r16, r/m16`
9607	///
9608	/// `o16 0F 4B /r`
9609	///
9610	/// `CMOV`
9611	///
9612	/// `16/32/64-bit`
9613	Cmovnp_r16_rm16 = 1202,
9614	/// `CMOVNP r32, r/m32`
9615	///
9616	/// `o32 0F 4B /r`
9617	///
9618	/// `CMOV`
9619	///
9620	/// `16/32/64-bit`
9621	Cmovnp_r32_rm32 = 1203,
9622	/// `CMOVNP r64, r/m64`
9623	///
9624	/// `o64 0F 4B /r`
9625	///
9626	/// `CMOV`
9627	///
9628	/// `64-bit`
9629	Cmovnp_r64_rm64 = 1204,
9630	/// `CMOVL r16, r/m16`
9631	///
9632	/// `o16 0F 4C /r`
9633	///
9634	/// `CMOV`
9635	///
9636	/// `16/32/64-bit`
9637	Cmovl_r16_rm16 = 1205,
9638	/// `CMOVL r32, r/m32`
9639	///
9640	/// `o32 0F 4C /r`
9641	///
9642	/// `CMOV`
9643	///
9644	/// `16/32/64-bit`
9645	Cmovl_r32_rm32 = 1206,
9646	/// `CMOVL r64, r/m64`
9647	///
9648	/// `o64 0F 4C /r`
9649	///
9650	/// `CMOV`
9651	///
9652	/// `64-bit`
9653	Cmovl_r64_rm64 = 1207,
9654	/// `CMOVGE r16, r/m16`
9655	///
9656	/// `o16 0F 4D /r`
9657	///
9658	/// `CMOV`
9659	///
9660	/// `16/32/64-bit`
9661	Cmovge_r16_rm16 = 1208,
9662	/// `CMOVGE r32, r/m32`
9663	///
9664	/// `o32 0F 4D /r`
9665	///
9666	/// `CMOV`
9667	///
9668	/// `16/32/64-bit`
9669	Cmovge_r32_rm32 = 1209,
9670	/// `CMOVGE r64, r/m64`
9671	///
9672	/// `o64 0F 4D /r`
9673	///
9674	/// `CMOV`
9675	///
9676	/// `64-bit`
9677	Cmovge_r64_rm64 = 1210,
9678	/// `CMOVLE r16, r/m16`
9679	///
9680	/// `o16 0F 4E /r`
9681	///
9682	/// `CMOV`
9683	///
9684	/// `16/32/64-bit`
9685	Cmovle_r16_rm16 = 1211,
9686	/// `CMOVLE r32, r/m32`
9687	///
9688	/// `o32 0F 4E /r`
9689	///
9690	/// `CMOV`
9691	///
9692	/// `16/32/64-bit`
9693	Cmovle_r32_rm32 = 1212,
9694	/// `CMOVLE r64, r/m64`
9695	///
9696	/// `o64 0F 4E /r`
9697	///
9698	/// `CMOV`
9699	///
9700	/// `64-bit`
9701	Cmovle_r64_rm64 = 1213,
9702	/// `CMOVG r16, r/m16`
9703	///
9704	/// `o16 0F 4F /r`
9705	///
9706	/// `CMOV`
9707	///
9708	/// `16/32/64-bit`
9709	Cmovg_r16_rm16 = 1214,
9710	/// `CMOVG r32, r/m32`
9711	///
9712	/// `o32 0F 4F /r`
9713	///
9714	/// `CMOV`
9715	///
9716	/// `16/32/64-bit`
9717	Cmovg_r32_rm32 = 1215,
9718	/// `CMOVG r64, r/m64`
9719	///
9720	/// `o64 0F 4F /r`
9721	///
9722	/// `CMOV`
9723	///
9724	/// `64-bit`
9725	Cmovg_r64_rm64 = 1216,
9726	/// `KANDW k1, k2, k3`
9727	///
9728	/// `VEX.L1.0F.W0 41 /r`
9729	///
9730	/// `AVX512F`
9731	///
9732	/// `16/32/64-bit`
9733	VEX_Kandw_kr_kr_kr = 1217,
9734	/// `KANDQ k1, k2, k3`
9735	///
9736	/// `VEX.L1.0F.W1 41 /r`
9737	///
9738	/// `AVX512BW`
9739	///
9740	/// `16/32/64-bit`
9741	VEX_Kandq_kr_kr_kr = 1218,
9742	/// `KANDB k1, k2, k3`
9743	///
9744	/// `VEX.L1.66.0F.W0 41 /r`
9745	///
9746	/// `AVX512DQ`
9747	///
9748	/// `16/32/64-bit`
9749	VEX_Kandb_kr_kr_kr = 1219,
9750	/// `KANDD k1, k2, k3`
9751	///
9752	/// `VEX.L1.66.0F.W1 41 /r`
9753	///
9754	/// `AVX512BW`
9755	///
9756	/// `16/32/64-bit`
9757	VEX_Kandd_kr_kr_kr = 1220,
9758	/// `KANDNW k1, k2, k3`
9759	///
9760	/// `VEX.L1.0F.W0 42 /r`
9761	///
9762	/// `AVX512F`
9763	///
9764	/// `16/32/64-bit`
9765	VEX_Kandnw_kr_kr_kr = 1221,
9766	/// `KANDNQ k1, k2, k3`
9767	///
9768	/// `VEX.L1.0F.W1 42 /r`
9769	///
9770	/// `AVX512BW`
9771	///
9772	/// `16/32/64-bit`
9773	VEX_Kandnq_kr_kr_kr = 1222,
9774	/// `KANDNB k1, k2, k3`
9775	///
9776	/// `VEX.L1.66.0F.W0 42 /r`
9777	///
9778	/// `AVX512DQ`
9779	///
9780	/// `16/32/64-bit`
9781	VEX_Kandnb_kr_kr_kr = 1223,
9782	/// `KANDND k1, k2, k3`
9783	///
9784	/// `VEX.L1.66.0F.W1 42 /r`
9785	///
9786	/// `AVX512BW`
9787	///
9788	/// `16/32/64-bit`
9789	VEX_Kandnd_kr_kr_kr = 1224,
9790	/// `KNOTW k1, k2`
9791	///
9792	/// `VEX.L0.0F.W0 44 /r`
9793	///
9794	/// `AVX512F`
9795	///
9796	/// `16/32/64-bit`
9797	VEX_Knotw_kr_kr = 1225,
9798	/// `KNOTQ k1, k2`
9799	///
9800	/// `VEX.L0.0F.W1 44 /r`
9801	///
9802	/// `AVX512BW`
9803	///
9804	/// `16/32/64-bit`
9805	VEX_Knotq_kr_kr = 1226,
9806	/// `KNOTB k1, k2`
9807	///
9808	/// `VEX.L0.66.0F.W0 44 /r`
9809	///
9810	/// `AVX512DQ`
9811	///
9812	/// `16/32/64-bit`
9813	VEX_Knotb_kr_kr = 1227,
9814	/// `KNOTD k1, k2`
9815	///
9816	/// `VEX.L0.66.0F.W1 44 /r`
9817	///
9818	/// `AVX512BW`
9819	///
9820	/// `16/32/64-bit`
9821	VEX_Knotd_kr_kr = 1228,
9822	/// `KORW k1, k2, k3`
9823	///
9824	/// `VEX.L1.0F.W0 45 /r`
9825	///
9826	/// `AVX512F`
9827	///
9828	/// `16/32/64-bit`
9829	VEX_Korw_kr_kr_kr = 1229,
9830	/// `KORQ k1, k2, k3`
9831	///
9832	/// `VEX.L1.0F.W1 45 /r`
9833	///
9834	/// `AVX512BW`
9835	///
9836	/// `16/32/64-bit`
9837	VEX_Korq_kr_kr_kr = 1230,
9838	/// `KORB k1, k2, k3`
9839	///
9840	/// `VEX.L1.66.0F.W0 45 /r`
9841	///
9842	/// `AVX512DQ`
9843	///
9844	/// `16/32/64-bit`
9845	VEX_Korb_kr_kr_kr = 1231,
9846	/// `KORD k1, k2, k3`
9847	///
9848	/// `VEX.L1.66.0F.W1 45 /r`
9849	///
9850	/// `AVX512BW`
9851	///
9852	/// `16/32/64-bit`
9853	VEX_Kord_kr_kr_kr = 1232,
9854	/// `KXNORW k1, k2, k3`
9855	///
9856	/// `VEX.L1.0F.W0 46 /r`
9857	///
9858	/// `AVX512F`
9859	///
9860	/// `16/32/64-bit`
9861	VEX_Kxnorw_kr_kr_kr = 1233,
9862	/// `KXNORQ k1, k2, k3`
9863	///
9864	/// `VEX.L1.0F.W1 46 /r`
9865	///
9866	/// `AVX512BW`
9867	///
9868	/// `16/32/64-bit`
9869	VEX_Kxnorq_kr_kr_kr = 1234,
9870	/// `KXNORB k1, k2, k3`
9871	///
9872	/// `VEX.L1.66.0F.W0 46 /r`
9873	///
9874	/// `AVX512DQ`
9875	///
9876	/// `16/32/64-bit`
9877	VEX_Kxnorb_kr_kr_kr = 1235,
9878	/// `KXNORD k1, k2, k3`
9879	///
9880	/// `VEX.L1.66.0F.W1 46 /r`
9881	///
9882	/// `AVX512BW`
9883	///
9884	/// `16/32/64-bit`
9885	VEX_Kxnord_kr_kr_kr = 1236,
9886	/// `KXORW k1, k2, k3`
9887	///
9888	/// `VEX.L1.0F.W0 47 /r`
9889	///
9890	/// `AVX512F`
9891	///
9892	/// `16/32/64-bit`
9893	VEX_Kxorw_kr_kr_kr = 1237,
9894	/// `KXORQ k1, k2, k3`
9895	///
9896	/// `VEX.L1.0F.W1 47 /r`
9897	///
9898	/// `AVX512BW`
9899	///
9900	/// `16/32/64-bit`
9901	VEX_Kxorq_kr_kr_kr = 1238,
9902	/// `KXORB k1, k2, k3`
9903	///
9904	/// `VEX.L1.66.0F.W0 47 /r`
9905	///
9906	/// `AVX512DQ`
9907	///
9908	/// `16/32/64-bit`
9909	VEX_Kxorb_kr_kr_kr = 1239,
9910	/// `KXORD k1, k2, k3`
9911	///
9912	/// `VEX.L1.66.0F.W1 47 /r`
9913	///
9914	/// `AVX512BW`
9915	///
9916	/// `16/32/64-bit`
9917	VEX_Kxord_kr_kr_kr = 1240,
9918	/// `KADDW k1, k2, k3`
9919	///
9920	/// `VEX.L1.0F.W0 4A /r`
9921	///
9922	/// `AVX512DQ`
9923	///
9924	/// `16/32/64-bit`
9925	VEX_Kaddw_kr_kr_kr = 1241,
9926	/// `KADDQ k1, k2, k3`
9927	///
9928	/// `VEX.L1.0F.W1 4A /r`
9929	///
9930	/// `AVX512BW`
9931	///
9932	/// `16/32/64-bit`
9933	VEX_Kaddq_kr_kr_kr = 1242,
9934	/// `KADDB k1, k2, k3`
9935	///
9936	/// `VEX.L1.66.0F.W0 4A /r`
9937	///
9938	/// `AVX512DQ`
9939	///
9940	/// `16/32/64-bit`
9941	VEX_Kaddb_kr_kr_kr = 1243,
9942	/// `KADDD k1, k2, k3`
9943	///
9944	/// `VEX.L1.66.0F.W1 4A /r`
9945	///
9946	/// `AVX512BW`
9947	///
9948	/// `16/32/64-bit`
9949	VEX_Kaddd_kr_kr_kr = 1244,
9950	/// `KUNPCKWD k1, k2, k3`
9951	///
9952	/// `VEX.L1.0F.W0 4B /r`
9953	///
9954	/// `AVX512BW`
9955	///
9956	/// `16/32/64-bit`
9957	VEX_Kunpckwd_kr_kr_kr = 1245,
9958	/// `KUNPCKDQ k1, k2, k3`
9959	///
9960	/// `VEX.L1.0F.W1 4B /r`
9961	///
9962	/// `AVX512BW`
9963	///
9964	/// `16/32/64-bit`
9965	VEX_Kunpckdq_kr_kr_kr = 1246,
9966	/// `KUNPCKBW k1, k2, k3`
9967	///
9968	/// `VEX.L1.66.0F.W0 4B /r`
9969	///
9970	/// `AVX512F`
9971	///
9972	/// `16/32/64-bit`
9973	VEX_Kunpckbw_kr_kr_kr = 1247,
9974	/// `MOVMSKPS r32, xmm`
9975	///
9976	/// `NP 0F 50 /r`
9977	///
9978	/// `SSE`
9979	///
9980	/// `16/32/64-bit`
9981	Movmskps_r32_xmm = 1248,
9982	/// `MOVMSKPS r64, xmm`
9983	///
9984	/// `NP o64 0F 50 /r`
9985	///
9986	/// `SSE`
9987	///
9988	/// `64-bit`
9989	Movmskps_r64_xmm = 1249,
9990	/// `VMOVMSKPS r32, xmm2`
9991	///
9992	/// `VEX.128.0F.W0 50 /r`
9993	///
9994	/// `AVX`
9995	///
9996	/// `16/32/64-bit`
9997	VEX_Vmovmskps_r32_xmm = 1250,
9998	/// `VMOVMSKPS r64, xmm2`
9999	///
10000	/// `VEX.128.0F.W1 50 /r`
10001	///
10002	/// `AVX`
10003	///
10004	/// `64-bit`
10005	VEX_Vmovmskps_r64_xmm = 1251,
10006	/// `VMOVMSKPS r32, ymm2`
10007	///
10008	/// `VEX.256.0F.W0 50 /r`
10009	///
10010	/// `AVX`
10011	///
10012	/// `16/32/64-bit`
10013	VEX_Vmovmskps_r32_ymm = 1252,
10014	/// `VMOVMSKPS r64, ymm2`
10015	///
10016	/// `VEX.256.0F.W1 50 /r`
10017	///
10018	/// `AVX`
10019	///
10020	/// `64-bit`
10021	VEX_Vmovmskps_r64_ymm = 1253,
10022	/// `MOVMSKPD r32, xmm`
10023	///
10024	/// `66 0F 50 /r`
10025	///
10026	/// `SSE2`
10027	///
10028	/// `16/32/64-bit`
10029	Movmskpd_r32_xmm = 1254,
10030	/// `MOVMSKPD r64, xmm`
10031	///
10032	/// `66 o64 0F 50 /r`
10033	///
10034	/// `SSE2`
10035	///
10036	/// `64-bit`
10037	Movmskpd_r64_xmm = 1255,
10038	/// `VMOVMSKPD r32, xmm2`
10039	///
10040	/// `VEX.128.66.0F.W0 50 /r`
10041	///
10042	/// `AVX`
10043	///
10044	/// `16/32/64-bit`
10045	VEX_Vmovmskpd_r32_xmm = 1256,
10046	/// `VMOVMSKPD r64, xmm2`
10047	///
10048	/// `VEX.128.66.0F.W1 50 /r`
10049	///
10050	/// `AVX`
10051	///
10052	/// `64-bit`
10053	VEX_Vmovmskpd_r64_xmm = 1257,
10054	/// `VMOVMSKPD r32, ymm2`
10055	///
10056	/// `VEX.256.66.0F.W0 50 /r`
10057	///
10058	/// `AVX`
10059	///
10060	/// `16/32/64-bit`
10061	VEX_Vmovmskpd_r32_ymm = 1258,
10062	/// `VMOVMSKPD r64, ymm2`
10063	///
10064	/// `VEX.256.66.0F.W1 50 /r`
10065	///
10066	/// `AVX`
10067	///
10068	/// `64-bit`
10069	VEX_Vmovmskpd_r64_ymm = 1259,
10070	/// `SQRTPS xmm1, xmm2/m128`
10071	///
10072	/// `NP 0F 51 /r`
10073	///
10074	/// `SSE`
10075	///
10076	/// `16/32/64-bit`
10077	Sqrtps_xmm_xmmm128 = 1260,
10078	/// `VSQRTPS xmm1, xmm2/m128`
10079	///
10080	/// `VEX.128.0F.WIG 51 /r`
10081	///
10082	/// `AVX`
10083	///
10084	/// `16/32/64-bit`
10085	VEX_Vsqrtps_xmm_xmmm128 = 1261,
10086	/// `VSQRTPS ymm1, ymm2/m256`
10087	///
10088	/// `VEX.256.0F.WIG 51 /r`
10089	///
10090	/// `AVX`
10091	///
10092	/// `16/32/64-bit`
10093	VEX_Vsqrtps_ymm_ymmm256 = 1262,
10094	/// `VSQRTPS xmm1 {k1}{z}, xmm2/m128/m32bcst`
10095	///
10096	/// `EVEX.128.0F.W0 51 /r`
10097	///
10098	/// `AVX512VL and AVX512F`
10099	///
10100	/// `16/32/64-bit`
10101	EVEX_Vsqrtps_xmm_k1z_xmmm128b32 = 1263,
10102	/// `VSQRTPS ymm1 {k1}{z}, ymm2/m256/m32bcst`
10103	///
10104	/// `EVEX.256.0F.W0 51 /r`
10105	///
10106	/// `AVX512VL and AVX512F`
10107	///
10108	/// `16/32/64-bit`
10109	EVEX_Vsqrtps_ymm_k1z_ymmm256b32 = 1264,
10110	/// `VSQRTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}`
10111	///
10112	/// `EVEX.512.0F.W0 51 /r`
10113	///
10114	/// `AVX512F`
10115	///
10116	/// `16/32/64-bit`
10117	EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er = 1265,
10118	/// `SQRTPD xmm1, xmm2/m128`
10119	///
10120	/// `66 0F 51 /r`
10121	///
10122	/// `SSE2`
10123	///
10124	/// `16/32/64-bit`
10125	Sqrtpd_xmm_xmmm128 = 1266,
10126	/// `VSQRTPD xmm1, xmm2/m128`
10127	///
10128	/// `VEX.128.66.0F.WIG 51 /r`
10129	///
10130	/// `AVX`
10131	///
10132	/// `16/32/64-bit`
10133	VEX_Vsqrtpd_xmm_xmmm128 = 1267,
10134	/// `VSQRTPD ymm1, ymm2/m256`
10135	///
10136	/// `VEX.256.66.0F.WIG 51 /r`
10137	///
10138	/// `AVX`
10139	///
10140	/// `16/32/64-bit`
10141	VEX_Vsqrtpd_ymm_ymmm256 = 1268,
10142	/// `VSQRTPD xmm1 {k1}{z}, xmm2/m128/m64bcst`
10143	///
10144	/// `EVEX.128.66.0F.W1 51 /r`
10145	///
10146	/// `AVX512VL and AVX512F`
10147	///
10148	/// `16/32/64-bit`
10149	EVEX_Vsqrtpd_xmm_k1z_xmmm128b64 = 1269,
10150	/// `VSQRTPD ymm1 {k1}{z}, ymm2/m256/m64bcst`
10151	///
10152	/// `EVEX.256.66.0F.W1 51 /r`
10153	///
10154	/// `AVX512VL and AVX512F`
10155	///
10156	/// `16/32/64-bit`
10157	EVEX_Vsqrtpd_ymm_k1z_ymmm256b64 = 1270,
10158	/// `VSQRTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
10159	///
10160	/// `EVEX.512.66.0F.W1 51 /r`
10161	///
10162	/// `AVX512F`
10163	///
10164	/// `16/32/64-bit`
10165	EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er = 1271,
10166	/// `SQRTSS xmm1, xmm2/m32`
10167	///
10168	/// `F3 0F 51 /r`
10169	///
10170	/// `SSE`
10171	///
10172	/// `16/32/64-bit`
10173	Sqrtss_xmm_xmmm32 = 1272,
10174	/// `VSQRTSS xmm1, xmm2, xmm3/m32`
10175	///
10176	/// `VEX.LIG.F3.0F.WIG 51 /r`
10177	///
10178	/// `AVX`
10179	///
10180	/// `16/32/64-bit`
10181	VEX_Vsqrtss_xmm_xmm_xmmm32 = 1273,
10182	/// `VSQRTSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
10183	///
10184	/// `EVEX.LIG.F3.0F.W0 51 /r`
10185	///
10186	/// `AVX512F`
10187	///
10188	/// `16/32/64-bit`
10189	EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er = 1274,
10190	/// `SQRTSD xmm1, xmm2/m64`
10191	///
10192	/// `F2 0F 51 /r`
10193	///
10194	/// `SSE2`
10195	///
10196	/// `16/32/64-bit`
10197	Sqrtsd_xmm_xmmm64 = 1275,
10198	/// `VSQRTSD xmm1, xmm2, xmm3/m64`
10199	///
10200	/// `VEX.LIG.F2.0F.WIG 51 /r`
10201	///
10202	/// `AVX`
10203	///
10204	/// `16/32/64-bit`
10205	VEX_Vsqrtsd_xmm_xmm_xmmm64 = 1276,
10206	/// `VSQRTSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
10207	///
10208	/// `EVEX.LIG.F2.0F.W1 51 /r`
10209	///
10210	/// `AVX512F`
10211	///
10212	/// `16/32/64-bit`
10213	EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er = 1277,
10214	/// `RSQRTPS xmm1, xmm2/m128`
10215	///
10216	/// `NP 0F 52 /r`
10217	///
10218	/// `SSE`
10219	///
10220	/// `16/32/64-bit`
10221	Rsqrtps_xmm_xmmm128 = 1278,
10222	/// `VRSQRTPS xmm1, xmm2/m128`
10223	///
10224	/// `VEX.128.0F.WIG 52 /r`
10225	///
10226	/// `AVX`
10227	///
10228	/// `16/32/64-bit`
10229	VEX_Vrsqrtps_xmm_xmmm128 = 1279,
10230	/// `VRSQRTPS ymm1, ymm2/m256`
10231	///
10232	/// `VEX.256.0F.WIG 52 /r`
10233	///
10234	/// `AVX`
10235	///
10236	/// `16/32/64-bit`
10237	VEX_Vrsqrtps_ymm_ymmm256 = 1280,
10238	/// `RSQRTSS xmm1, xmm2/m32`
10239	///
10240	/// `F3 0F 52 /r`
10241	///
10242	/// `SSE`
10243	///
10244	/// `16/32/64-bit`
10245	Rsqrtss_xmm_xmmm32 = 1281,
10246	/// `VRSQRTSS xmm1, xmm2, xmm3/m32`
10247	///
10248	/// `VEX.LIG.F3.0F.WIG 52 /r`
10249	///
10250	/// `AVX`
10251	///
10252	/// `16/32/64-bit`
10253	VEX_Vrsqrtss_xmm_xmm_xmmm32 = 1282,
10254	/// `RCPPS xmm1, xmm2/m128`
10255	///
10256	/// `NP 0F 53 /r`
10257	///
10258	/// `SSE`
10259	///
10260	/// `16/32/64-bit`
10261	Rcpps_xmm_xmmm128 = 1283,
10262	/// `VRCPPS xmm1, xmm2/m128`
10263	///
10264	/// `VEX.128.0F.WIG 53 /r`
10265	///
10266	/// `AVX`
10267	///
10268	/// `16/32/64-bit`
10269	VEX_Vrcpps_xmm_xmmm128 = 1284,
10270	/// `VRCPPS ymm1, ymm2/m256`
10271	///
10272	/// `VEX.256.0F.WIG 53 /r`
10273	///
10274	/// `AVX`
10275	///
10276	/// `16/32/64-bit`
10277	VEX_Vrcpps_ymm_ymmm256 = 1285,
10278	/// `RCPSS xmm1, xmm2/m32`
10279	///
10280	/// `F3 0F 53 /r`
10281	///
10282	/// `SSE`
10283	///
10284	/// `16/32/64-bit`
10285	Rcpss_xmm_xmmm32 = 1286,
10286	/// `VRCPSS xmm1, xmm2, xmm3/m32`
10287	///
10288	/// `VEX.LIG.F3.0F.WIG 53 /r`
10289	///
10290	/// `AVX`
10291	///
10292	/// `16/32/64-bit`
10293	VEX_Vrcpss_xmm_xmm_xmmm32 = 1287,
10294	/// `ANDPS xmm1, xmm2/m128`
10295	///
10296	/// `NP 0F 54 /r`
10297	///
10298	/// `SSE`
10299	///
10300	/// `16/32/64-bit`
10301	Andps_xmm_xmmm128 = 1288,
10302	/// `VANDPS xmm1, xmm2, xmm3/m128`
10303	///
10304	/// `VEX.128.0F.WIG 54 /r`
10305	///
10306	/// `AVX`
10307	///
10308	/// `16/32/64-bit`
10309	VEX_Vandps_xmm_xmm_xmmm128 = 1289,
10310	/// `VANDPS ymm1, ymm2, ymm3/m256`
10311	///
10312	/// `VEX.256.0F.WIG 54 /r`
10313	///
10314	/// `AVX`
10315	///
10316	/// `16/32/64-bit`
10317	VEX_Vandps_ymm_ymm_ymmm256 = 1290,
10318	/// `VANDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10319	///
10320	/// `EVEX.128.0F.W0 54 /r`
10321	///
10322	/// `AVX512VL and AVX512DQ`
10323	///
10324	/// `16/32/64-bit`
10325	EVEX_Vandps_xmm_k1z_xmm_xmmm128b32 = 1291,
10326	/// `VANDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10327	///
10328	/// `EVEX.256.0F.W0 54 /r`
10329	///
10330	/// `AVX512VL and AVX512DQ`
10331	///
10332	/// `16/32/64-bit`
10333	EVEX_Vandps_ymm_k1z_ymm_ymmm256b32 = 1292,
10334	/// `VANDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
10335	///
10336	/// `EVEX.512.0F.W0 54 /r`
10337	///
10338	/// `AVX512DQ`
10339	///
10340	/// `16/32/64-bit`
10341	EVEX_Vandps_zmm_k1z_zmm_zmmm512b32 = 1293,
10342	/// `ANDPD xmm1, xmm2/m128`
10343	///
10344	/// `66 0F 54 /r`
10345	///
10346	/// `SSE2`
10347	///
10348	/// `16/32/64-bit`
10349	Andpd_xmm_xmmm128 = 1294,
10350	/// `VANDPD xmm1, xmm2, xmm3/m128`
10351	///
10352	/// `VEX.128.66.0F.WIG 54 /r`
10353	///
10354	/// `AVX`
10355	///
10356	/// `16/32/64-bit`
10357	VEX_Vandpd_xmm_xmm_xmmm128 = 1295,
10358	/// `VANDPD ymm1, ymm2, ymm3/m256`
10359	///
10360	/// `VEX.256.66.0F.WIG 54 /r`
10361	///
10362	/// `AVX`
10363	///
10364	/// `16/32/64-bit`
10365	VEX_Vandpd_ymm_ymm_ymmm256 = 1296,
10366	/// `VANDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10367	///
10368	/// `EVEX.128.66.0F.W1 54 /r`
10369	///
10370	/// `AVX512VL and AVX512DQ`
10371	///
10372	/// `16/32/64-bit`
10373	EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64 = 1297,
10374	/// `VANDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10375	///
10376	/// `EVEX.256.66.0F.W1 54 /r`
10377	///
10378	/// `AVX512VL and AVX512DQ`
10379	///
10380	/// `16/32/64-bit`
10381	EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64 = 1298,
10382	/// `VANDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
10383	///
10384	/// `EVEX.512.66.0F.W1 54 /r`
10385	///
10386	/// `AVX512DQ`
10387	///
10388	/// `16/32/64-bit`
10389	EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64 = 1299,
10390	/// `ANDNPS xmm1, xmm2/m128`
10391	///
10392	/// `NP 0F 55 /r`
10393	///
10394	/// `SSE`
10395	///
10396	/// `16/32/64-bit`
10397	Andnps_xmm_xmmm128 = 1300,
10398	/// `VANDNPS xmm1, xmm2, xmm3/m128`
10399	///
10400	/// `VEX.128.0F.WIG 55 /r`
10401	///
10402	/// `AVX`
10403	///
10404	/// `16/32/64-bit`
10405	VEX_Vandnps_xmm_xmm_xmmm128 = 1301,
10406	/// `VANDNPS ymm1, ymm2, ymm3/m256`
10407	///
10408	/// `VEX.256.0F.WIG 55 /r`
10409	///
10410	/// `AVX`
10411	///
10412	/// `16/32/64-bit`
10413	VEX_Vandnps_ymm_ymm_ymmm256 = 1302,
10414	/// `VANDNPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10415	///
10416	/// `EVEX.128.0F.W0 55 /r`
10417	///
10418	/// `AVX512VL and AVX512DQ`
10419	///
10420	/// `16/32/64-bit`
10421	EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32 = 1303,
10422	/// `VANDNPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10423	///
10424	/// `EVEX.256.0F.W0 55 /r`
10425	///
10426	/// `AVX512VL and AVX512DQ`
10427	///
10428	/// `16/32/64-bit`
10429	EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32 = 1304,
10430	/// `VANDNPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
10431	///
10432	/// `EVEX.512.0F.W0 55 /r`
10433	///
10434	/// `AVX512DQ`
10435	///
10436	/// `16/32/64-bit`
10437	EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32 = 1305,
10438	/// `ANDNPD xmm1, xmm2/m128`
10439	///
10440	/// `66 0F 55 /r`
10441	///
10442	/// `SSE2`
10443	///
10444	/// `16/32/64-bit`
10445	Andnpd_xmm_xmmm128 = 1306,
10446	/// `VANDNPD xmm1, xmm2, xmm3/m128`
10447	///
10448	/// `VEX.128.66.0F.WIG 55 /r`
10449	///
10450	/// `AVX`
10451	///
10452	/// `16/32/64-bit`
10453	VEX_Vandnpd_xmm_xmm_xmmm128 = 1307,
10454	/// `VANDNPD ymm1, ymm2, ymm3/m256`
10455	///
10456	/// `VEX.256.66.0F.WIG 55 /r`
10457	///
10458	/// `AVX`
10459	///
10460	/// `16/32/64-bit`
10461	VEX_Vandnpd_ymm_ymm_ymmm256 = 1308,
10462	/// `VANDNPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10463	///
10464	/// `EVEX.128.66.0F.W1 55 /r`
10465	///
10466	/// `AVX512VL and AVX512DQ`
10467	///
10468	/// `16/32/64-bit`
10469	EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64 = 1309,
10470	/// `VANDNPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10471	///
10472	/// `EVEX.256.66.0F.W1 55 /r`
10473	///
10474	/// `AVX512VL and AVX512DQ`
10475	///
10476	/// `16/32/64-bit`
10477	EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64 = 1310,
10478	/// `VANDNPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
10479	///
10480	/// `EVEX.512.66.0F.W1 55 /r`
10481	///
10482	/// `AVX512DQ`
10483	///
10484	/// `16/32/64-bit`
10485	EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64 = 1311,
10486	/// `ORPS xmm1, xmm2/m128`
10487	///
10488	/// `NP 0F 56 /r`
10489	///
10490	/// `SSE`
10491	///
10492	/// `16/32/64-bit`
10493	Orps_xmm_xmmm128 = 1312,
10494	/// `VORPS xmm1, xmm2, xmm3/m128`
10495	///
10496	/// `VEX.128.0F.WIG 56 /r`
10497	///
10498	/// `AVX`
10499	///
10500	/// `16/32/64-bit`
10501	VEX_Vorps_xmm_xmm_xmmm128 = 1313,
10502	/// `VORPS ymm1, ymm2, ymm3/m256`
10503	///
10504	/// `VEX.256.0F.WIG 56 /r`
10505	///
10506	/// `AVX`
10507	///
10508	/// `16/32/64-bit`
10509	VEX_Vorps_ymm_ymm_ymmm256 = 1314,
10510	/// `VORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10511	///
10512	/// `EVEX.128.0F.W0 56 /r`
10513	///
10514	/// `AVX512VL and AVX512DQ`
10515	///
10516	/// `16/32/64-bit`
10517	EVEX_Vorps_xmm_k1z_xmm_xmmm128b32 = 1315,
10518	/// `VORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10519	///
10520	/// `EVEX.256.0F.W0 56 /r`
10521	///
10522	/// `AVX512VL and AVX512DQ`
10523	///
10524	/// `16/32/64-bit`
10525	EVEX_Vorps_ymm_k1z_ymm_ymmm256b32 = 1316,
10526	/// `VORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
10527	///
10528	/// `EVEX.512.0F.W0 56 /r`
10529	///
10530	/// `AVX512DQ`
10531	///
10532	/// `16/32/64-bit`
10533	EVEX_Vorps_zmm_k1z_zmm_zmmm512b32 = 1317,
10534	/// `ORPD xmm1, xmm2/m128`
10535	///
10536	/// `66 0F 56 /r`
10537	///
10538	/// `SSE2`
10539	///
10540	/// `16/32/64-bit`
10541	Orpd_xmm_xmmm128 = 1318,
10542	/// `VORPD xmm1, xmm2, xmm3/m128`
10543	///
10544	/// `VEX.128.66.0F.WIG 56 /r`
10545	///
10546	/// `AVX`
10547	///
10548	/// `16/32/64-bit`
10549	VEX_Vorpd_xmm_xmm_xmmm128 = 1319,
10550	/// `VORPD ymm1, ymm2, ymm3/m256`
10551	///
10552	/// `VEX.256.66.0F.WIG 56 /r`
10553	///
10554	/// `AVX`
10555	///
10556	/// `16/32/64-bit`
10557	VEX_Vorpd_ymm_ymm_ymmm256 = 1320,
10558	/// `VORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10559	///
10560	/// `EVEX.128.66.0F.W1 56 /r`
10561	///
10562	/// `AVX512VL and AVX512DQ`
10563	///
10564	/// `16/32/64-bit`
10565	EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64 = 1321,
10566	/// `VORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10567	///
10568	/// `EVEX.256.66.0F.W1 56 /r`
10569	///
10570	/// `AVX512VL and AVX512DQ`
10571	///
10572	/// `16/32/64-bit`
10573	EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64 = 1322,
10574	/// `VORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
10575	///
10576	/// `EVEX.512.66.0F.W1 56 /r`
10577	///
10578	/// `AVX512DQ`
10579	///
10580	/// `16/32/64-bit`
10581	EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64 = 1323,
10582	/// `XORPS xmm1, xmm2/m128`
10583	///
10584	/// `NP 0F 57 /r`
10585	///
10586	/// `SSE`
10587	///
10588	/// `16/32/64-bit`
10589	Xorps_xmm_xmmm128 = 1324,
10590	/// `VXORPS xmm1, xmm2, xmm3/m128`
10591	///
10592	/// `VEX.128.0F.WIG 57 /r`
10593	///
10594	/// `AVX`
10595	///
10596	/// `16/32/64-bit`
10597	VEX_Vxorps_xmm_xmm_xmmm128 = 1325,
10598	/// `VXORPS ymm1, ymm2, ymm3/m256`
10599	///
10600	/// `VEX.256.0F.WIG 57 /r`
10601	///
10602	/// `AVX`
10603	///
10604	/// `16/32/64-bit`
10605	VEX_Vxorps_ymm_ymm_ymmm256 = 1326,
10606	/// `VXORPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10607	///
10608	/// `EVEX.128.0F.W0 57 /r`
10609	///
10610	/// `AVX512VL and AVX512DQ`
10611	///
10612	/// `16/32/64-bit`
10613	EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32 = 1327,
10614	/// `VXORPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10615	///
10616	/// `EVEX.256.0F.W0 57 /r`
10617	///
10618	/// `AVX512VL and AVX512DQ`
10619	///
10620	/// `16/32/64-bit`
10621	EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32 = 1328,
10622	/// `VXORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
10623	///
10624	/// `EVEX.512.0F.W0 57 /r`
10625	///
10626	/// `AVX512DQ`
10627	///
10628	/// `16/32/64-bit`
10629	EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32 = 1329,
10630	/// `XORPD xmm1, xmm2/m128`
10631	///
10632	/// `66 0F 57 /r`
10633	///
10634	/// `SSE2`
10635	///
10636	/// `16/32/64-bit`
10637	Xorpd_xmm_xmmm128 = 1330,
10638	/// `VXORPD xmm1, xmm2, xmm3/m128`
10639	///
10640	/// `VEX.128.66.0F.WIG 57 /r`
10641	///
10642	/// `AVX`
10643	///
10644	/// `16/32/64-bit`
10645	VEX_Vxorpd_xmm_xmm_xmmm128 = 1331,
10646	/// `VXORPD ymm1, ymm2, ymm3/m256`
10647	///
10648	/// `VEX.256.66.0F.WIG 57 /r`
10649	///
10650	/// `AVX`
10651	///
10652	/// `16/32/64-bit`
10653	VEX_Vxorpd_ymm_ymm_ymmm256 = 1332,
10654	/// `VXORPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10655	///
10656	/// `EVEX.128.66.0F.W1 57 /r`
10657	///
10658	/// `AVX512VL and AVX512DQ`
10659	///
10660	/// `16/32/64-bit`
10661	EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64 = 1333,
10662	/// `VXORPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10663	///
10664	/// `EVEX.256.66.0F.W1 57 /r`
10665	///
10666	/// `AVX512VL and AVX512DQ`
10667	///
10668	/// `16/32/64-bit`
10669	EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64 = 1334,
10670	/// `VXORPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
10671	///
10672	/// `EVEX.512.66.0F.W1 57 /r`
10673	///
10674	/// `AVX512DQ`
10675	///
10676	/// `16/32/64-bit`
10677	EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64 = 1335,
10678	/// `ADDPS xmm1, xmm2/m128`
10679	///
10680	/// `NP 0F 58 /r`
10681	///
10682	/// `SSE`
10683	///
10684	/// `16/32/64-bit`
10685	Addps_xmm_xmmm128 = 1336,
10686	/// `VADDPS xmm1, xmm2, xmm3/m128`
10687	///
10688	/// `VEX.128.0F.WIG 58 /r`
10689	///
10690	/// `AVX`
10691	///
10692	/// `16/32/64-bit`
10693	VEX_Vaddps_xmm_xmm_xmmm128 = 1337,
10694	/// `VADDPS ymm1, ymm2, ymm3/m256`
10695	///
10696	/// `VEX.256.0F.WIG 58 /r`
10697	///
10698	/// `AVX`
10699	///
10700	/// `16/32/64-bit`
10701	VEX_Vaddps_ymm_ymm_ymmm256 = 1338,
10702	/// `VADDPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10703	///
10704	/// `EVEX.128.0F.W0 58 /r`
10705	///
10706	/// `AVX512VL and AVX512F`
10707	///
10708	/// `16/32/64-bit`
10709	EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32 = 1339,
10710	/// `VADDPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10711	///
10712	/// `EVEX.256.0F.W0 58 /r`
10713	///
10714	/// `AVX512VL and AVX512F`
10715	///
10716	/// `16/32/64-bit`
10717	EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32 = 1340,
10718	/// `VADDPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
10719	///
10720	/// `EVEX.512.0F.W0 58 /r`
10721	///
10722	/// `AVX512F`
10723	///
10724	/// `16/32/64-bit`
10725	EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er = 1341,
10726	/// `ADDPD xmm1, xmm2/m128`
10727	///
10728	/// `66 0F 58 /r`
10729	///
10730	/// `SSE2`
10731	///
10732	/// `16/32/64-bit`
10733	Addpd_xmm_xmmm128 = 1342,
10734	/// `VADDPD xmm1, xmm2, xmm3/m128`
10735	///
10736	/// `VEX.128.66.0F.WIG 58 /r`
10737	///
10738	/// `AVX`
10739	///
10740	/// `16/32/64-bit`
10741	VEX_Vaddpd_xmm_xmm_xmmm128 = 1343,
10742	/// `VADDPD ymm1, ymm2, ymm3/m256`
10743	///
10744	/// `VEX.256.66.0F.WIG 58 /r`
10745	///
10746	/// `AVX`
10747	///
10748	/// `16/32/64-bit`
10749	VEX_Vaddpd_ymm_ymm_ymmm256 = 1344,
10750	/// `VADDPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10751	///
10752	/// `EVEX.128.66.0F.W1 58 /r`
10753	///
10754	/// `AVX512VL and AVX512F`
10755	///
10756	/// `16/32/64-bit`
10757	EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64 = 1345,
10758	/// `VADDPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10759	///
10760	/// `EVEX.256.66.0F.W1 58 /r`
10761	///
10762	/// `AVX512VL and AVX512F`
10763	///
10764	/// `16/32/64-bit`
10765	EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64 = 1346,
10766	/// `VADDPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
10767	///
10768	/// `EVEX.512.66.0F.W1 58 /r`
10769	///
10770	/// `AVX512F`
10771	///
10772	/// `16/32/64-bit`
10773	EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er = 1347,
10774	/// `ADDSS xmm1, xmm2/m32`
10775	///
10776	/// `F3 0F 58 /r`
10777	///
10778	/// `SSE`
10779	///
10780	/// `16/32/64-bit`
10781	Addss_xmm_xmmm32 = 1348,
10782	/// `VADDSS xmm1, xmm2, xmm3/m32`
10783	///
10784	/// `VEX.LIG.F3.0F.WIG 58 /r`
10785	///
10786	/// `AVX`
10787	///
10788	/// `16/32/64-bit`
10789	VEX_Vaddss_xmm_xmm_xmmm32 = 1349,
10790	/// `VADDSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
10791	///
10792	/// `EVEX.LIG.F3.0F.W0 58 /r`
10793	///
10794	/// `AVX512F`
10795	///
10796	/// `16/32/64-bit`
10797	EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er = 1350,
10798	/// `ADDSD xmm1, xmm2/m64`
10799	///
10800	/// `F2 0F 58 /r`
10801	///
10802	/// `SSE2`
10803	///
10804	/// `16/32/64-bit`
10805	Addsd_xmm_xmmm64 = 1351,
10806	/// `VADDSD xmm1, xmm2, xmm3/m64`
10807	///
10808	/// `VEX.LIG.F2.0F.WIG 58 /r`
10809	///
10810	/// `AVX`
10811	///
10812	/// `16/32/64-bit`
10813	VEX_Vaddsd_xmm_xmm_xmmm64 = 1352,
10814	/// `VADDSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
10815	///
10816	/// `EVEX.LIG.F2.0F.W1 58 /r`
10817	///
10818	/// `AVX512F`
10819	///
10820	/// `16/32/64-bit`
10821	EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er = 1353,
10822	/// `MULPS xmm1, xmm2/m128`
10823	///
10824	/// `NP 0F 59 /r`
10825	///
10826	/// `SSE`
10827	///
10828	/// `16/32/64-bit`
10829	Mulps_xmm_xmmm128 = 1354,
10830	/// `VMULPS xmm1, xmm2, xmm3/m128`
10831	///
10832	/// `VEX.128.0F.WIG 59 /r`
10833	///
10834	/// `AVX`
10835	///
10836	/// `16/32/64-bit`
10837	VEX_Vmulps_xmm_xmm_xmmm128 = 1355,
10838	/// `VMULPS ymm1, ymm2, ymm3/m256`
10839	///
10840	/// `VEX.256.0F.WIG 59 /r`
10841	///
10842	/// `AVX`
10843	///
10844	/// `16/32/64-bit`
10845	VEX_Vmulps_ymm_ymm_ymmm256 = 1356,
10846	/// `VMULPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
10847	///
10848	/// `EVEX.128.0F.W0 59 /r`
10849	///
10850	/// `AVX512VL and AVX512F`
10851	///
10852	/// `16/32/64-bit`
10853	EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32 = 1357,
10854	/// `VMULPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
10855	///
10856	/// `EVEX.256.0F.W0 59 /r`
10857	///
10858	/// `AVX512VL and AVX512F`
10859	///
10860	/// `16/32/64-bit`
10861	EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32 = 1358,
10862	/// `VMULPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
10863	///
10864	/// `EVEX.512.0F.W0 59 /r`
10865	///
10866	/// `AVX512F`
10867	///
10868	/// `16/32/64-bit`
10869	EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er = 1359,
10870	/// `MULPD xmm1, xmm2/m128`
10871	///
10872	/// `66 0F 59 /r`
10873	///
10874	/// `SSE2`
10875	///
10876	/// `16/32/64-bit`
10877	Mulpd_xmm_xmmm128 = 1360,
10878	/// `VMULPD xmm1, xmm2, xmm3/m128`
10879	///
10880	/// `VEX.128.66.0F.WIG 59 /r`
10881	///
10882	/// `AVX`
10883	///
10884	/// `16/32/64-bit`
10885	VEX_Vmulpd_xmm_xmm_xmmm128 = 1361,
10886	/// `VMULPD ymm1, ymm2, ymm3/m256`
10887	///
10888	/// `VEX.256.66.0F.WIG 59 /r`
10889	///
10890	/// `AVX`
10891	///
10892	/// `16/32/64-bit`
10893	VEX_Vmulpd_ymm_ymm_ymmm256 = 1362,
10894	/// `VMULPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
10895	///
10896	/// `EVEX.128.66.0F.W1 59 /r`
10897	///
10898	/// `AVX512VL and AVX512F`
10899	///
10900	/// `16/32/64-bit`
10901	EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64 = 1363,
10902	/// `VMULPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
10903	///
10904	/// `EVEX.256.66.0F.W1 59 /r`
10905	///
10906	/// `AVX512VL and AVX512F`
10907	///
10908	/// `16/32/64-bit`
10909	EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64 = 1364,
10910	/// `VMULPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
10911	///
10912	/// `EVEX.512.66.0F.W1 59 /r`
10913	///
10914	/// `AVX512F`
10915	///
10916	/// `16/32/64-bit`
10917	EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er = 1365,
10918	/// `MULSS xmm1, xmm2/m32`
10919	///
10920	/// `F3 0F 59 /r`
10921	///
10922	/// `SSE`
10923	///
10924	/// `16/32/64-bit`
10925	Mulss_xmm_xmmm32 = 1366,
10926	/// `VMULSS xmm1, xmm2, xmm3/m32`
10927	///
10928	/// `VEX.LIG.F3.0F.WIG 59 /r`
10929	///
10930	/// `AVX`
10931	///
10932	/// `16/32/64-bit`
10933	VEX_Vmulss_xmm_xmm_xmmm32 = 1367,
10934	/// `VMULSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
10935	///
10936	/// `EVEX.LIG.F3.0F.W0 59 /r`
10937	///
10938	/// `AVX512F`
10939	///
10940	/// `16/32/64-bit`
10941	EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er = 1368,
10942	/// `MULSD xmm1, xmm2/m64`
10943	///
10944	/// `F2 0F 59 /r`
10945	///
10946	/// `SSE2`
10947	///
10948	/// `16/32/64-bit`
10949	Mulsd_xmm_xmmm64 = 1369,
10950	/// `VMULSD xmm1, xmm2, xmm3/m64`
10951	///
10952	/// `VEX.LIG.F2.0F.WIG 59 /r`
10953	///
10954	/// `AVX`
10955	///
10956	/// `16/32/64-bit`
10957	VEX_Vmulsd_xmm_xmm_xmmm64 = 1370,
10958	/// `VMULSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
10959	///
10960	/// `EVEX.LIG.F2.0F.W1 59 /r`
10961	///
10962	/// `AVX512F`
10963	///
10964	/// `16/32/64-bit`
10965	EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er = 1371,
10966	/// `CVTPS2PD xmm1, xmm2/m64`
10967	///
10968	/// `NP 0F 5A /r`
10969	///
10970	/// `SSE2`
10971	///
10972	/// `16/32/64-bit`
10973	Cvtps2pd_xmm_xmmm64 = 1372,
10974	/// `VCVTPS2PD xmm1, xmm2/m64`
10975	///
10976	/// `VEX.128.0F.WIG 5A /r`
10977	///
10978	/// `AVX`
10979	///
10980	/// `16/32/64-bit`
10981	VEX_Vcvtps2pd_xmm_xmmm64 = 1373,
10982	/// `VCVTPS2PD ymm1, xmm2/m128`
10983	///
10984	/// `VEX.256.0F.WIG 5A /r`
10985	///
10986	/// `AVX`
10987	///
10988	/// `16/32/64-bit`
10989	VEX_Vcvtps2pd_ymm_xmmm128 = 1374,
10990	/// `VCVTPS2PD xmm1 {k1}{z}, xmm2/m64/m32bcst`
10991	///
10992	/// `EVEX.128.0F.W0 5A /r`
10993	///
10994	/// `AVX512VL and AVX512F`
10995	///
10996	/// `16/32/64-bit`
10997	EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32 = 1375,
10998	/// `VCVTPS2PD ymm1 {k1}{z}, xmm2/m128/m32bcst`
10999	///
11000	/// `EVEX.256.0F.W0 5A /r`
11001	///
11002	/// `AVX512VL and AVX512F`
11003	///
11004	/// `16/32/64-bit`
11005	EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32 = 1376,
11006	/// `VCVTPS2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}`
11007	///
11008	/// `EVEX.512.0F.W0 5A /r`
11009	///
11010	/// `AVX512F`
11011	///
11012	/// `16/32/64-bit`
11013	EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae = 1377,
11014	/// `CVTPD2PS xmm1, xmm2/m128`
11015	///
11016	/// `66 0F 5A /r`
11017	///
11018	/// `SSE2`
11019	///
11020	/// `16/32/64-bit`
11021	Cvtpd2ps_xmm_xmmm128 = 1378,
11022	/// `VCVTPD2PS xmm1, xmm2/m128`
11023	///
11024	/// `VEX.128.66.0F.WIG 5A /r`
11025	///
11026	/// `AVX`
11027	///
11028	/// `16/32/64-bit`
11029	VEX_Vcvtpd2ps_xmm_xmmm128 = 1379,
11030	/// `VCVTPD2PS xmm1, ymm2/m256`
11031	///
11032	/// `VEX.256.66.0F.WIG 5A /r`
11033	///
11034	/// `AVX`
11035	///
11036	/// `16/32/64-bit`
11037	VEX_Vcvtpd2ps_xmm_ymmm256 = 1380,
11038	/// `VCVTPD2PS xmm1 {k1}{z}, xmm2/m128/m64bcst`
11039	///
11040	/// `EVEX.128.66.0F.W1 5A /r`
11041	///
11042	/// `AVX512VL and AVX512F`
11043	///
11044	/// `16/32/64-bit`
11045	EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64 = 1381,
11046	/// `VCVTPD2PS xmm1 {k1}{z}, ymm2/m256/m64bcst`
11047	///
11048	/// `EVEX.256.66.0F.W1 5A /r`
11049	///
11050	/// `AVX512VL and AVX512F`
11051	///
11052	/// `16/32/64-bit`
11053	EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64 = 1382,
11054	/// `VCVTPD2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}`
11055	///
11056	/// `EVEX.512.66.0F.W1 5A /r`
11057	///
11058	/// `AVX512F`
11059	///
11060	/// `16/32/64-bit`
11061	EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er = 1383,
11062	/// `CVTSS2SD xmm1, xmm2/m32`
11063	///
11064	/// `F3 0F 5A /r`
11065	///
11066	/// `SSE2`
11067	///
11068	/// `16/32/64-bit`
11069	Cvtss2sd_xmm_xmmm32 = 1384,
11070	/// `VCVTSS2SD xmm1, xmm2, xmm3/m32`
11071	///
11072	/// `VEX.LIG.F3.0F.WIG 5A /r`
11073	///
11074	/// `AVX`
11075	///
11076	/// `16/32/64-bit`
11077	VEX_Vcvtss2sd_xmm_xmm_xmmm32 = 1385,
11078	/// `VCVTSS2SD xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
11079	///
11080	/// `EVEX.LIG.F3.0F.W0 5A /r`
11081	///
11082	/// `AVX512F`
11083	///
11084	/// `16/32/64-bit`
11085	EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae = 1386,
11086	/// `CVTSD2SS xmm1, xmm2/m64`
11087	///
11088	/// `F2 0F 5A /r`
11089	///
11090	/// `SSE2`
11091	///
11092	/// `16/32/64-bit`
11093	Cvtsd2ss_xmm_xmmm64 = 1387,
11094	/// `VCVTSD2SS xmm1, xmm2, xmm3/m64`
11095	///
11096	/// `VEX.LIG.F2.0F.WIG 5A /r`
11097	///
11098	/// `AVX`
11099	///
11100	/// `16/32/64-bit`
11101	VEX_Vcvtsd2ss_xmm_xmm_xmmm64 = 1388,
11102	/// `VCVTSD2SS xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
11103	///
11104	/// `EVEX.LIG.F2.0F.W1 5A /r`
11105	///
11106	/// `AVX512F`
11107	///
11108	/// `16/32/64-bit`
11109	EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er = 1389,
11110	/// `CVTDQ2PS xmm1, xmm2/m128`
11111	///
11112	/// `NP 0F 5B /r`
11113	///
11114	/// `SSE2`
11115	///
11116	/// `16/32/64-bit`
11117	Cvtdq2ps_xmm_xmmm128 = 1390,
11118	/// `VCVTDQ2PS xmm1, xmm2/m128`
11119	///
11120	/// `VEX.128.0F.WIG 5B /r`
11121	///
11122	/// `AVX`
11123	///
11124	/// `16/32/64-bit`
11125	VEX_Vcvtdq2ps_xmm_xmmm128 = 1391,
11126	/// `VCVTDQ2PS ymm1, ymm2/m256`
11127	///
11128	/// `VEX.256.0F.WIG 5B /r`
11129	///
11130	/// `AVX`
11131	///
11132	/// `16/32/64-bit`
11133	VEX_Vcvtdq2ps_ymm_ymmm256 = 1392,
11134	/// `VCVTDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst`
11135	///
11136	/// `EVEX.128.0F.W0 5B /r`
11137	///
11138	/// `AVX512VL and AVX512F`
11139	///
11140	/// `16/32/64-bit`
11141	EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32 = 1393,
11142	/// `VCVTDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst`
11143	///
11144	/// `EVEX.256.0F.W0 5B /r`
11145	///
11146	/// `AVX512VL and AVX512F`
11147	///
11148	/// `16/32/64-bit`
11149	EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32 = 1394,
11150	/// `VCVTDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}`
11151	///
11152	/// `EVEX.512.0F.W0 5B /r`
11153	///
11154	/// `AVX512F`
11155	///
11156	/// `16/32/64-bit`
11157	EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er = 1395,
11158	/// `VCVTQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst`
11159	///
11160	/// `EVEX.128.0F.W1 5B /r`
11161	///
11162	/// `AVX512VL and AVX512DQ`
11163	///
11164	/// `16/32/64-bit`
11165	EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64 = 1396,
11166	/// `VCVTQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst`
11167	///
11168	/// `EVEX.256.0F.W1 5B /r`
11169	///
11170	/// `AVX512VL and AVX512DQ`
11171	///
11172	/// `16/32/64-bit`
11173	EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64 = 1397,
11174	/// `VCVTQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}`
11175	///
11176	/// `EVEX.512.0F.W1 5B /r`
11177	///
11178	/// `AVX512DQ`
11179	///
11180	/// `16/32/64-bit`
11181	EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er = 1398,
11182	/// `CVTPS2DQ xmm1, xmm2/m128`
11183	///
11184	/// `66 0F 5B /r`
11185	///
11186	/// `SSE2`
11187	///
11188	/// `16/32/64-bit`
11189	Cvtps2dq_xmm_xmmm128 = 1399,
11190	/// `VCVTPS2DQ xmm1, xmm2/m128`
11191	///
11192	/// `VEX.128.66.0F.WIG 5B /r`
11193	///
11194	/// `AVX`
11195	///
11196	/// `16/32/64-bit`
11197	VEX_Vcvtps2dq_xmm_xmmm128 = 1400,
11198	/// `VCVTPS2DQ ymm1, ymm2/m256`
11199	///
11200	/// `VEX.256.66.0F.WIG 5B /r`
11201	///
11202	/// `AVX`
11203	///
11204	/// `16/32/64-bit`
11205	VEX_Vcvtps2dq_ymm_ymmm256 = 1401,
11206	/// `VCVTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst`
11207	///
11208	/// `EVEX.128.66.0F.W0 5B /r`
11209	///
11210	/// `AVX512VL and AVX512F`
11211	///
11212	/// `16/32/64-bit`
11213	EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32 = 1402,
11214	/// `VCVTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst`
11215	///
11216	/// `EVEX.256.66.0F.W0 5B /r`
11217	///
11218	/// `AVX512VL and AVX512F`
11219	///
11220	/// `16/32/64-bit`
11221	EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32 = 1403,
11222	/// `VCVTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}`
11223	///
11224	/// `EVEX.512.66.0F.W0 5B /r`
11225	///
11226	/// `AVX512F`
11227	///
11228	/// `16/32/64-bit`
11229	EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er = 1404,
11230	/// `CVTTPS2DQ xmm1, xmm2/m128`
11231	///
11232	/// `F3 0F 5B /r`
11233	///
11234	/// `SSE2`
11235	///
11236	/// `16/32/64-bit`
11237	Cvttps2dq_xmm_xmmm128 = 1405,
11238	/// `VCVTTPS2DQ xmm1, xmm2/m128`
11239	///
11240	/// `VEX.128.F3.0F.WIG 5B /r`
11241	///
11242	/// `AVX`
11243	///
11244	/// `16/32/64-bit`
11245	VEX_Vcvttps2dq_xmm_xmmm128 = 1406,
11246	/// `VCVTTPS2DQ ymm1, ymm2/m256`
11247	///
11248	/// `VEX.256.F3.0F.WIG 5B /r`
11249	///
11250	/// `AVX`
11251	///
11252	/// `16/32/64-bit`
11253	VEX_Vcvttps2dq_ymm_ymmm256 = 1407,
11254	/// `VCVTTPS2DQ xmm1 {k1}{z}, xmm2/m128/m32bcst`
11255	///
11256	/// `EVEX.128.F3.0F.W0 5B /r`
11257	///
11258	/// `AVX512VL and AVX512F`
11259	///
11260	/// `16/32/64-bit`
11261	EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32 = 1408,
11262	/// `VCVTTPS2DQ ymm1 {k1}{z}, ymm2/m256/m32bcst`
11263	///
11264	/// `EVEX.256.F3.0F.W0 5B /r`
11265	///
11266	/// `AVX512VL and AVX512F`
11267	///
11268	/// `16/32/64-bit`
11269	EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32 = 1409,
11270	/// `VCVTTPS2DQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
11271	///
11272	/// `EVEX.512.F3.0F.W0 5B /r`
11273	///
11274	/// `AVX512F`
11275	///
11276	/// `16/32/64-bit`
11277	EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae = 1410,
11278	/// `SUBPS xmm1, xmm2/m128`
11279	///
11280	/// `NP 0F 5C /r`
11281	///
11282	/// `SSE`
11283	///
11284	/// `16/32/64-bit`
11285	Subps_xmm_xmmm128 = 1411,
11286	/// `VSUBPS xmm1, xmm2, xmm3/m128`
11287	///
11288	/// `VEX.128.0F.WIG 5C /r`
11289	///
11290	/// `AVX`
11291	///
11292	/// `16/32/64-bit`
11293	VEX_Vsubps_xmm_xmm_xmmm128 = 1412,
11294	/// `VSUBPS ymm1, ymm2, ymm3/m256`
11295	///
11296	/// `VEX.256.0F.WIG 5C /r`
11297	///
11298	/// `AVX`
11299	///
11300	/// `16/32/64-bit`
11301	VEX_Vsubps_ymm_ymm_ymmm256 = 1413,
11302	/// `VSUBPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
11303	///
11304	/// `EVEX.128.0F.W0 5C /r`
11305	///
11306	/// `AVX512VL and AVX512F`
11307	///
11308	/// `16/32/64-bit`
11309	EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32 = 1414,
11310	/// `VSUBPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
11311	///
11312	/// `EVEX.256.0F.W0 5C /r`
11313	///
11314	/// `AVX512VL and AVX512F`
11315	///
11316	/// `16/32/64-bit`
11317	EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32 = 1415,
11318	/// `VSUBPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
11319	///
11320	/// `EVEX.512.0F.W0 5C /r`
11321	///
11322	/// `AVX512F`
11323	///
11324	/// `16/32/64-bit`
11325	EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er = 1416,
11326	/// `SUBPD xmm1, xmm2/m128`
11327	///
11328	/// `66 0F 5C /r`
11329	///
11330	/// `SSE2`
11331	///
11332	/// `16/32/64-bit`
11333	Subpd_xmm_xmmm128 = 1417,
11334	/// `VSUBPD xmm1, xmm2, xmm3/m128`
11335	///
11336	/// `VEX.128.66.0F.WIG 5C /r`
11337	///
11338	/// `AVX`
11339	///
11340	/// `16/32/64-bit`
11341	VEX_Vsubpd_xmm_xmm_xmmm128 = 1418,
11342	/// `VSUBPD ymm1, ymm2, ymm3/m256`
11343	///
11344	/// `VEX.256.66.0F.WIG 5C /r`
11345	///
11346	/// `AVX`
11347	///
11348	/// `16/32/64-bit`
11349	VEX_Vsubpd_ymm_ymm_ymmm256 = 1419,
11350	/// `VSUBPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
11351	///
11352	/// `EVEX.128.66.0F.W1 5C /r`
11353	///
11354	/// `AVX512VL and AVX512F`
11355	///
11356	/// `16/32/64-bit`
11357	EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64 = 1420,
11358	/// `VSUBPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
11359	///
11360	/// `EVEX.256.66.0F.W1 5C /r`
11361	///
11362	/// `AVX512VL and AVX512F`
11363	///
11364	/// `16/32/64-bit`
11365	EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64 = 1421,
11366	/// `VSUBPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
11367	///
11368	/// `EVEX.512.66.0F.W1 5C /r`
11369	///
11370	/// `AVX512F`
11371	///
11372	/// `16/32/64-bit`
11373	EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er = 1422,
11374	/// `SUBSS xmm1, xmm2/m32`
11375	///
11376	/// `F3 0F 5C /r`
11377	///
11378	/// `SSE`
11379	///
11380	/// `16/32/64-bit`
11381	Subss_xmm_xmmm32 = 1423,
11382	/// `VSUBSS xmm1, xmm2, xmm3/m32`
11383	///
11384	/// `VEX.LIG.F3.0F.WIG 5C /r`
11385	///
11386	/// `AVX`
11387	///
11388	/// `16/32/64-bit`
11389	VEX_Vsubss_xmm_xmm_xmmm32 = 1424,
11390	/// `VSUBSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
11391	///
11392	/// `EVEX.LIG.F3.0F.W0 5C /r`
11393	///
11394	/// `AVX512F`
11395	///
11396	/// `16/32/64-bit`
11397	EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er = 1425,
11398	/// `SUBSD xmm1, xmm2/m64`
11399	///
11400	/// `F2 0F 5C /r`
11401	///
11402	/// `SSE2`
11403	///
11404	/// `16/32/64-bit`
11405	Subsd_xmm_xmmm64 = 1426,
11406	/// `VSUBSD xmm1, xmm2, xmm3/m64`
11407	///
11408	/// `VEX.LIG.F2.0F.WIG 5C /r`
11409	///
11410	/// `AVX`
11411	///
11412	/// `16/32/64-bit`
11413	VEX_Vsubsd_xmm_xmm_xmmm64 = 1427,
11414	/// `VSUBSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
11415	///
11416	/// `EVEX.LIG.F2.0F.W1 5C /r`
11417	///
11418	/// `AVX512F`
11419	///
11420	/// `16/32/64-bit`
11421	EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er = 1428,
11422	/// `MINPS xmm1, xmm2/m128`
11423	///
11424	/// `NP 0F 5D /r`
11425	///
11426	/// `SSE`
11427	///
11428	/// `16/32/64-bit`
11429	Minps_xmm_xmmm128 = 1429,
11430	/// `VMINPS xmm1, xmm2, xmm3/m128`
11431	///
11432	/// `VEX.128.0F.WIG 5D /r`
11433	///
11434	/// `AVX`
11435	///
11436	/// `16/32/64-bit`
11437	VEX_Vminps_xmm_xmm_xmmm128 = 1430,
11438	/// `VMINPS ymm1, ymm2, ymm3/m256`
11439	///
11440	/// `VEX.256.0F.WIG 5D /r`
11441	///
11442	/// `AVX`
11443	///
11444	/// `16/32/64-bit`
11445	VEX_Vminps_ymm_ymm_ymmm256 = 1431,
11446	/// `VMINPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
11447	///
11448	/// `EVEX.128.0F.W0 5D /r`
11449	///
11450	/// `AVX512VL and AVX512F`
11451	///
11452	/// `16/32/64-bit`
11453	EVEX_Vminps_xmm_k1z_xmm_xmmm128b32 = 1432,
11454	/// `VMINPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
11455	///
11456	/// `EVEX.256.0F.W0 5D /r`
11457	///
11458	/// `AVX512VL and AVX512F`
11459	///
11460	/// `16/32/64-bit`
11461	EVEX_Vminps_ymm_k1z_ymm_ymmm256b32 = 1433,
11462	/// `VMINPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}`
11463	///
11464	/// `EVEX.512.0F.W0 5D /r`
11465	///
11466	/// `AVX512F`
11467	///
11468	/// `16/32/64-bit`
11469	EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae = 1434,
11470	/// `MINPD xmm1, xmm2/m128`
11471	///
11472	/// `66 0F 5D /r`
11473	///
11474	/// `SSE2`
11475	///
11476	/// `16/32/64-bit`
11477	Minpd_xmm_xmmm128 = 1435,
11478	/// `VMINPD xmm1, xmm2, xmm3/m128`
11479	///
11480	/// `VEX.128.66.0F.WIG 5D /r`
11481	///
11482	/// `AVX`
11483	///
11484	/// `16/32/64-bit`
11485	VEX_Vminpd_xmm_xmm_xmmm128 = 1436,
11486	/// `VMINPD ymm1, ymm2, ymm3/m256`
11487	///
11488	/// `VEX.256.66.0F.WIG 5D /r`
11489	///
11490	/// `AVX`
11491	///
11492	/// `16/32/64-bit`
11493	VEX_Vminpd_ymm_ymm_ymmm256 = 1437,
11494	/// `VMINPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
11495	///
11496	/// `EVEX.128.66.0F.W1 5D /r`
11497	///
11498	/// `AVX512VL and AVX512F`
11499	///
11500	/// `16/32/64-bit`
11501	EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64 = 1438,
11502	/// `VMINPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
11503	///
11504	/// `EVEX.256.66.0F.W1 5D /r`
11505	///
11506	/// `AVX512VL and AVX512F`
11507	///
11508	/// `16/32/64-bit`
11509	EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64 = 1439,
11510	/// `VMINPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}`
11511	///
11512	/// `EVEX.512.66.0F.W1 5D /r`
11513	///
11514	/// `AVX512F`
11515	///
11516	/// `16/32/64-bit`
11517	EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae = 1440,
11518	/// `MINSS xmm1, xmm2/m32`
11519	///
11520	/// `F3 0F 5D /r`
11521	///
11522	/// `SSE`
11523	///
11524	/// `16/32/64-bit`
11525	Minss_xmm_xmmm32 = 1441,
11526	/// `VMINSS xmm1, xmm2, xmm3/m32`
11527	///
11528	/// `VEX.LIG.F3.0F.WIG 5D /r`
11529	///
11530	/// `AVX`
11531	///
11532	/// `16/32/64-bit`
11533	VEX_Vminss_xmm_xmm_xmmm32 = 1442,
11534	/// `VMINSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
11535	///
11536	/// `EVEX.LIG.F3.0F.W0 5D /r`
11537	///
11538	/// `AVX512F`
11539	///
11540	/// `16/32/64-bit`
11541	EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae = 1443,
11542	/// `MINSD xmm1, xmm2/m64`
11543	///
11544	/// `F2 0F 5D /r`
11545	///
11546	/// `SSE2`
11547	///
11548	/// `16/32/64-bit`
11549	Minsd_xmm_xmmm64 = 1444,
11550	/// `VMINSD xmm1, xmm2, xmm3/m64`
11551	///
11552	/// `VEX.LIG.F2.0F.WIG 5D /r`
11553	///
11554	/// `AVX`
11555	///
11556	/// `16/32/64-bit`
11557	VEX_Vminsd_xmm_xmm_xmmm64 = 1445,
11558	/// `VMINSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}`
11559	///
11560	/// `EVEX.LIG.F2.0F.W1 5D /r`
11561	///
11562	/// `AVX512F`
11563	///
11564	/// `16/32/64-bit`
11565	EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae = 1446,
11566	/// `DIVPS xmm1, xmm2/m128`
11567	///
11568	/// `NP 0F 5E /r`
11569	///
11570	/// `SSE`
11571	///
11572	/// `16/32/64-bit`
11573	Divps_xmm_xmmm128 = 1447,
11574	/// `VDIVPS xmm1, xmm2, xmm3/m128`
11575	///
11576	/// `VEX.128.0F.WIG 5E /r`
11577	///
11578	/// `AVX`
11579	///
11580	/// `16/32/64-bit`
11581	VEX_Vdivps_xmm_xmm_xmmm128 = 1448,
11582	/// `VDIVPS ymm1, ymm2, ymm3/m256`
11583	///
11584	/// `VEX.256.0F.WIG 5E /r`
11585	///
11586	/// `AVX`
11587	///
11588	/// `16/32/64-bit`
11589	VEX_Vdivps_ymm_ymm_ymmm256 = 1449,
11590	/// `VDIVPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
11591	///
11592	/// `EVEX.128.0F.W0 5E /r`
11593	///
11594	/// `AVX512VL and AVX512F`
11595	///
11596	/// `16/32/64-bit`
11597	EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32 = 1450,
11598	/// `VDIVPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
11599	///
11600	/// `EVEX.256.0F.W0 5E /r`
11601	///
11602	/// `AVX512VL and AVX512F`
11603	///
11604	/// `16/32/64-bit`
11605	EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32 = 1451,
11606	/// `VDIVPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
11607	///
11608	/// `EVEX.512.0F.W0 5E /r`
11609	///
11610	/// `AVX512F`
11611	///
11612	/// `16/32/64-bit`
11613	EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er = 1452,
11614	/// `DIVPD xmm1, xmm2/m128`
11615	///
11616	/// `66 0F 5E /r`
11617	///
11618	/// `SSE2`
11619	///
11620	/// `16/32/64-bit`
11621	Divpd_xmm_xmmm128 = 1453,
11622	/// `VDIVPD xmm1, xmm2, xmm3/m128`
11623	///
11624	/// `VEX.128.66.0F.WIG 5E /r`
11625	///
11626	/// `AVX`
11627	///
11628	/// `16/32/64-bit`
11629	VEX_Vdivpd_xmm_xmm_xmmm128 = 1454,
11630	/// `VDIVPD ymm1, ymm2, ymm3/m256`
11631	///
11632	/// `VEX.256.66.0F.WIG 5E /r`
11633	///
11634	/// `AVX`
11635	///
11636	/// `16/32/64-bit`
11637	VEX_Vdivpd_ymm_ymm_ymmm256 = 1455,
11638	/// `VDIVPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
11639	///
11640	/// `EVEX.128.66.0F.W1 5E /r`
11641	///
11642	/// `AVX512VL and AVX512F`
11643	///
11644	/// `16/32/64-bit`
11645	EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64 = 1456,
11646	/// `VDIVPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
11647	///
11648	/// `EVEX.256.66.0F.W1 5E /r`
11649	///
11650	/// `AVX512VL and AVX512F`
11651	///
11652	/// `16/32/64-bit`
11653	EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64 = 1457,
11654	/// `VDIVPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
11655	///
11656	/// `EVEX.512.66.0F.W1 5E /r`
11657	///
11658	/// `AVX512F`
11659	///
11660	/// `16/32/64-bit`
11661	EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er = 1458,
11662	/// `DIVSS xmm1, xmm2/m32`
11663	///
11664	/// `F3 0F 5E /r`
11665	///
11666	/// `SSE`
11667	///
11668	/// `16/32/64-bit`
11669	Divss_xmm_xmmm32 = 1459,
11670	/// `VDIVSS xmm1, xmm2, xmm3/m32`
11671	///
11672	/// `VEX.LIG.F3.0F.WIG 5E /r`
11673	///
11674	/// `AVX`
11675	///
11676	/// `16/32/64-bit`
11677	VEX_Vdivss_xmm_xmm_xmmm32 = 1460,
11678	/// `VDIVSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
11679	///
11680	/// `EVEX.LIG.F3.0F.W0 5E /r`
11681	///
11682	/// `AVX512F`
11683	///
11684	/// `16/32/64-bit`
11685	EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er = 1461,
11686	/// `DIVSD xmm1, xmm2/m64`
11687	///
11688	/// `F2 0F 5E /r`
11689	///
11690	/// `SSE2`
11691	///
11692	/// `16/32/64-bit`
11693	Divsd_xmm_xmmm64 = 1462,
11694	/// `VDIVSD xmm1, xmm2, xmm3/m64`
11695	///
11696	/// `VEX.LIG.F2.0F.WIG 5E /r`
11697	///
11698	/// `AVX`
11699	///
11700	/// `16/32/64-bit`
11701	VEX_Vdivsd_xmm_xmm_xmmm64 = 1463,
11702	/// `VDIVSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
11703	///
11704	/// `EVEX.LIG.F2.0F.W1 5E /r`
11705	///
11706	/// `AVX512F`
11707	///
11708	/// `16/32/64-bit`
11709	EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er = 1464,
11710	/// `MAXPS xmm1, xmm2/m128`
11711	///
11712	/// `NP 0F 5F /r`
11713	///
11714	/// `SSE`
11715	///
11716	/// `16/32/64-bit`
11717	Maxps_xmm_xmmm128 = 1465,
11718	/// `VMAXPS xmm1, xmm2, xmm3/m128`
11719	///
11720	/// `VEX.128.0F.WIG 5F /r`
11721	///
11722	/// `AVX`
11723	///
11724	/// `16/32/64-bit`
11725	VEX_Vmaxps_xmm_xmm_xmmm128 = 1466,
11726	/// `VMAXPS ymm1, ymm2, ymm3/m256`
11727	///
11728	/// `VEX.256.0F.WIG 5F /r`
11729	///
11730	/// `AVX`
11731	///
11732	/// `16/32/64-bit`
11733	VEX_Vmaxps_ymm_ymm_ymmm256 = 1467,
11734	/// `VMAXPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
11735	///
11736	/// `EVEX.128.0F.W0 5F /r`
11737	///
11738	/// `AVX512VL and AVX512F`
11739	///
11740	/// `16/32/64-bit`
11741	EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32 = 1468,
11742	/// `VMAXPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
11743	///
11744	/// `EVEX.256.0F.W0 5F /r`
11745	///
11746	/// `AVX512VL and AVX512F`
11747	///
11748	/// `16/32/64-bit`
11749	EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32 = 1469,
11750	/// `VMAXPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}`
11751	///
11752	/// `EVEX.512.0F.W0 5F /r`
11753	///
11754	/// `AVX512F`
11755	///
11756	/// `16/32/64-bit`
11757	EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae = 1470,
11758	/// `MAXPD xmm1, xmm2/m128`
11759	///
11760	/// `66 0F 5F /r`
11761	///
11762	/// `SSE2`
11763	///
11764	/// `16/32/64-bit`
11765	Maxpd_xmm_xmmm128 = 1471,
11766	/// `VMAXPD xmm1, xmm2, xmm3/m128`
11767	///
11768	/// `VEX.128.66.0F.WIG 5F /r`
11769	///
11770	/// `AVX`
11771	///
11772	/// `16/32/64-bit`
11773	VEX_Vmaxpd_xmm_xmm_xmmm128 = 1472,
11774	/// `VMAXPD ymm1, ymm2, ymm3/m256`
11775	///
11776	/// `VEX.256.66.0F.WIG 5F /r`
11777	///
11778	/// `AVX`
11779	///
11780	/// `16/32/64-bit`
11781	VEX_Vmaxpd_ymm_ymm_ymmm256 = 1473,
11782	/// `VMAXPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
11783	///
11784	/// `EVEX.128.66.0F.W1 5F /r`
11785	///
11786	/// `AVX512VL and AVX512F`
11787	///
11788	/// `16/32/64-bit`
11789	EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64 = 1474,
11790	/// `VMAXPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
11791	///
11792	/// `EVEX.256.66.0F.W1 5F /r`
11793	///
11794	/// `AVX512VL and AVX512F`
11795	///
11796	/// `16/32/64-bit`
11797	EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64 = 1475,
11798	/// `VMAXPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}`
11799	///
11800	/// `EVEX.512.66.0F.W1 5F /r`
11801	///
11802	/// `AVX512F`
11803	///
11804	/// `16/32/64-bit`
11805	EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae = 1476,
11806	/// `MAXSS xmm1, xmm2/m32`
11807	///
11808	/// `F3 0F 5F /r`
11809	///
11810	/// `SSE`
11811	///
11812	/// `16/32/64-bit`
11813	Maxss_xmm_xmmm32 = 1477,
11814	/// `VMAXSS xmm1, xmm2, xmm3/m32`
11815	///
11816	/// `VEX.LIG.F3.0F.WIG 5F /r`
11817	///
11818	/// `AVX`
11819	///
11820	/// `16/32/64-bit`
11821	VEX_Vmaxss_xmm_xmm_xmmm32 = 1478,
11822	/// `VMAXSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
11823	///
11824	/// `EVEX.LIG.F3.0F.W0 5F /r`
11825	///
11826	/// `AVX512F`
11827	///
11828	/// `16/32/64-bit`
11829	EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae = 1479,
11830	/// `MAXSD xmm1, xmm2/m64`
11831	///
11832	/// `F2 0F 5F /r`
11833	///
11834	/// `SSE2`
11835	///
11836	/// `16/32/64-bit`
11837	Maxsd_xmm_xmmm64 = 1480,
11838	/// `VMAXSD xmm1, xmm2, xmm3/m64`
11839	///
11840	/// `VEX.LIG.F2.0F.WIG 5F /r`
11841	///
11842	/// `AVX`
11843	///
11844	/// `16/32/64-bit`
11845	VEX_Vmaxsd_xmm_xmm_xmmm64 = 1481,
11846	/// `VMAXSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}`
11847	///
11848	/// `EVEX.LIG.F2.0F.W1 5F /r`
11849	///
11850	/// `AVX512F`
11851	///
11852	/// `16/32/64-bit`
11853	EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae = 1482,
11854	/// `PUNPCKLBW mm, mm/m32`
11855	///
11856	/// `NP 0F 60 /r`
11857	///
11858	/// `MMX`
11859	///
11860	/// `16/32/64-bit`
11861	Punpcklbw_mm_mmm32 = 1483,
11862	/// `PUNPCKLBW xmm1, xmm2/m128`
11863	///
11864	/// `66 0F 60 /r`
11865	///
11866	/// `SSE2`
11867	///
11868	/// `16/32/64-bit`
11869	Punpcklbw_xmm_xmmm128 = 1484,
11870	/// `VPUNPCKLBW xmm1, xmm2, xmm3/m128`
11871	///
11872	/// `VEX.128.66.0F.WIG 60 /r`
11873	///
11874	/// `AVX`
11875	///
11876	/// `16/32/64-bit`
11877	VEX_Vpunpcklbw_xmm_xmm_xmmm128 = 1485,
11878	/// `VPUNPCKLBW ymm1, ymm2, ymm3/m256`
11879	///
11880	/// `VEX.256.66.0F.WIG 60 /r`
11881	///
11882	/// `AVX2`
11883	///
11884	/// `16/32/64-bit`
11885	VEX_Vpunpcklbw_ymm_ymm_ymmm256 = 1486,
11886	/// `VPUNPCKLBW xmm1 {k1}{z}, xmm2, xmm3/m128`
11887	///
11888	/// `EVEX.128.66.0F.WIG 60 /r`
11889	///
11890	/// `AVX512VL and AVX512BW`
11891	///
11892	/// `16/32/64-bit`
11893	EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128 = 1487,
11894	/// `VPUNPCKLBW ymm1 {k1}{z}, ymm2, ymm3/m256`
11895	///
11896	/// `EVEX.256.66.0F.WIG 60 /r`
11897	///
11898	/// `AVX512VL and AVX512BW`
11899	///
11900	/// `16/32/64-bit`
11901	EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256 = 1488,
11902	/// `VPUNPCKLBW zmm1 {k1}{z}, zmm2, zmm3/m512`
11903	///
11904	/// `EVEX.512.66.0F.WIG 60 /r`
11905	///
11906	/// `AVX512BW`
11907	///
11908	/// `16/32/64-bit`
11909	EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512 = 1489,
11910	/// `PUNPCKLWD mm, mm/m32`
11911	///
11912	/// `NP 0F 61 /r`
11913	///
11914	/// `MMX`
11915	///
11916	/// `16/32/64-bit`
11917	Punpcklwd_mm_mmm32 = 1490,
11918	/// `PUNPCKLWD xmm1, xmm2/m128`
11919	///
11920	/// `66 0F 61 /r`
11921	///
11922	/// `SSE2`
11923	///
11924	/// `16/32/64-bit`
11925	Punpcklwd_xmm_xmmm128 = 1491,
11926	/// `VPUNPCKLWD xmm1, xmm2, xmm3/m128`
11927	///
11928	/// `VEX.128.66.0F.WIG 61 /r`
11929	///
11930	/// `AVX`
11931	///
11932	/// `16/32/64-bit`
11933	VEX_Vpunpcklwd_xmm_xmm_xmmm128 = 1492,
11934	/// `VPUNPCKLWD ymm1, ymm2, ymm3/m256`
11935	///
11936	/// `VEX.256.66.0F.WIG 61 /r`
11937	///
11938	/// `AVX2`
11939	///
11940	/// `16/32/64-bit`
11941	VEX_Vpunpcklwd_ymm_ymm_ymmm256 = 1493,
11942	/// `VPUNPCKLWD xmm1 {k1}{z}, xmm2, xmm3/m128`
11943	///
11944	/// `EVEX.128.66.0F.WIG 61 /r`
11945	///
11946	/// `AVX512VL and AVX512BW`
11947	///
11948	/// `16/32/64-bit`
11949	EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128 = 1494,
11950	/// `VPUNPCKLWD ymm1 {k1}{z}, ymm2, ymm3/m256`
11951	///
11952	/// `EVEX.256.66.0F.WIG 61 /r`
11953	///
11954	/// `AVX512VL and AVX512BW`
11955	///
11956	/// `16/32/64-bit`
11957	EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256 = 1495,
11958	/// `VPUNPCKLWD zmm1 {k1}{z}, zmm2, zmm3/m512`
11959	///
11960	/// `EVEX.512.66.0F.WIG 61 /r`
11961	///
11962	/// `AVX512BW`
11963	///
11964	/// `16/32/64-bit`
11965	EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512 = 1496,
11966	/// `PUNPCKLDQ mm, mm/m32`
11967	///
11968	/// `NP 0F 62 /r`
11969	///
11970	/// `MMX`
11971	///
11972	/// `16/32/64-bit`
11973	Punpckldq_mm_mmm32 = 1497,
11974	/// `PUNPCKLDQ xmm1, xmm2/m128`
11975	///
11976	/// `66 0F 62 /r`
11977	///
11978	/// `SSE2`
11979	///
11980	/// `16/32/64-bit`
11981	Punpckldq_xmm_xmmm128 = 1498,
11982	/// `VPUNPCKLDQ xmm1, xmm2, xmm3/m128`
11983	///
11984	/// `VEX.128.66.0F.WIG 62 /r`
11985	///
11986	/// `AVX`
11987	///
11988	/// `16/32/64-bit`
11989	VEX_Vpunpckldq_xmm_xmm_xmmm128 = 1499,
11990	/// `VPUNPCKLDQ ymm1, ymm2, ymm3/m256`
11991	///
11992	/// `VEX.256.66.0F.WIG 62 /r`
11993	///
11994	/// `AVX2`
11995	///
11996	/// `16/32/64-bit`
11997	VEX_Vpunpckldq_ymm_ymm_ymmm256 = 1500,
11998	/// `VPUNPCKLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
11999	///
12000	/// `EVEX.128.66.0F.W0 62 /r`
12001	///
12002	/// `AVX512VL and AVX512F`
12003	///
12004	/// `16/32/64-bit`
12005	EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32 = 1501,
12006	/// `VPUNPCKLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
12007	///
12008	/// `EVEX.256.66.0F.W0 62 /r`
12009	///
12010	/// `AVX512VL and AVX512F`
12011	///
12012	/// `16/32/64-bit`
12013	EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32 = 1502,
12014	/// `VPUNPCKLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
12015	///
12016	/// `EVEX.512.66.0F.W0 62 /r`
12017	///
12018	/// `AVX512F`
12019	///
12020	/// `16/32/64-bit`
12021	EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32 = 1503,
12022	/// `PACKSSWB mm1, mm2/m64`
12023	///
12024	/// `NP 0F 63 /r`
12025	///
12026	/// `MMX`
12027	///
12028	/// `16/32/64-bit`
12029	Packsswb_mm_mmm64 = 1504,
12030	/// `PACKSSWB xmm1, xmm2/m128`
12031	///
12032	/// `66 0F 63 /r`
12033	///
12034	/// `SSE2`
12035	///
12036	/// `16/32/64-bit`
12037	Packsswb_xmm_xmmm128 = 1505,
12038	/// `VPACKSSWB xmm1, xmm2, xmm3/m128`
12039	///
12040	/// `VEX.128.66.0F.WIG 63 /r`
12041	///
12042	/// `AVX`
12043	///
12044	/// `16/32/64-bit`
12045	VEX_Vpacksswb_xmm_xmm_xmmm128 = 1506,
12046	/// `VPACKSSWB ymm1, ymm2, ymm3/m256`
12047	///
12048	/// `VEX.256.66.0F.WIG 63 /r`
12049	///
12050	/// `AVX2`
12051	///
12052	/// `16/32/64-bit`
12053	VEX_Vpacksswb_ymm_ymm_ymmm256 = 1507,
12054	/// `VPACKSSWB xmm1 {k1}{z}, xmm2, xmm3/m128`
12055	///
12056	/// `EVEX.128.66.0F.WIG 63 /r`
12057	///
12058	/// `AVX512VL and AVX512BW`
12059	///
12060	/// `16/32/64-bit`
12061	EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128 = 1508,
12062	/// `VPACKSSWB ymm1 {k1}{z}, ymm2, ymm3/m256`
12063	///
12064	/// `EVEX.256.66.0F.WIG 63 /r`
12065	///
12066	/// `AVX512VL and AVX512BW`
12067	///
12068	/// `16/32/64-bit`
12069	EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256 = 1509,
12070	/// `VPACKSSWB zmm1 {k1}{z}, zmm2, zmm3/m512`
12071	///
12072	/// `EVEX.512.66.0F.WIG 63 /r`
12073	///
12074	/// `AVX512BW`
12075	///
12076	/// `16/32/64-bit`
12077	EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512 = 1510,
12078	/// `PCMPGTB mm, mm/m64`
12079	///
12080	/// `NP 0F 64 /r`
12081	///
12082	/// `MMX`
12083	///
12084	/// `16/32/64-bit`
12085	Pcmpgtb_mm_mmm64 = 1511,
12086	/// `PCMPGTB xmm1, xmm2/m128`
12087	///
12088	/// `66 0F 64 /r`
12089	///
12090	/// `SSE2`
12091	///
12092	/// `16/32/64-bit`
12093	Pcmpgtb_xmm_xmmm128 = 1512,
12094	/// `VPCMPGTB xmm1, xmm2, xmm3/m128`
12095	///
12096	/// `VEX.128.66.0F.WIG 64 /r`
12097	///
12098	/// `AVX`
12099	///
12100	/// `16/32/64-bit`
12101	VEX_Vpcmpgtb_xmm_xmm_xmmm128 = 1513,
12102	/// `VPCMPGTB ymm1, ymm2, ymm3/m256`
12103	///
12104	/// `VEX.256.66.0F.WIG 64 /r`
12105	///
12106	/// `AVX2`
12107	///
12108	/// `16/32/64-bit`
12109	VEX_Vpcmpgtb_ymm_ymm_ymmm256 = 1514,
12110	/// `VPCMPGTB k1 {k2}, xmm2, xmm3/m128`
12111	///
12112	/// `EVEX.128.66.0F.WIG 64 /r`
12113	///
12114	/// `AVX512VL and AVX512BW`
12115	///
12116	/// `16/32/64-bit`
12117	EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128 = 1515,
12118	/// `VPCMPGTB k1 {k2}, ymm2, ymm3/m256`
12119	///
12120	/// `EVEX.256.66.0F.WIG 64 /r`
12121	///
12122	/// `AVX512VL and AVX512BW`
12123	///
12124	/// `16/32/64-bit`
12125	EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256 = 1516,
12126	/// `VPCMPGTB k1 {k2}, zmm2, zmm3/m512`
12127	///
12128	/// `EVEX.512.66.0F.WIG 64 /r`
12129	///
12130	/// `AVX512BW`
12131	///
12132	/// `16/32/64-bit`
12133	EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512 = 1517,
12134	/// `PCMPGTW mm, mm/m64`
12135	///
12136	/// `NP 0F 65 /r`
12137	///
12138	/// `MMX`
12139	///
12140	/// `16/32/64-bit`
12141	Pcmpgtw_mm_mmm64 = 1518,
12142	/// `PCMPGTW xmm1, xmm2/m128`
12143	///
12144	/// `66 0F 65 /r`
12145	///
12146	/// `SSE2`
12147	///
12148	/// `16/32/64-bit`
12149	Pcmpgtw_xmm_xmmm128 = 1519,
12150	/// `VPCMPGTW xmm1, xmm2, xmm3/m128`
12151	///
12152	/// `VEX.128.66.0F.WIG 65 /r`
12153	///
12154	/// `AVX`
12155	///
12156	/// `16/32/64-bit`
12157	VEX_Vpcmpgtw_xmm_xmm_xmmm128 = 1520,
12158	/// `VPCMPGTW ymm1, ymm2, ymm3/m256`
12159	///
12160	/// `VEX.256.66.0F.WIG 65 /r`
12161	///
12162	/// `AVX2`
12163	///
12164	/// `16/32/64-bit`
12165	VEX_Vpcmpgtw_ymm_ymm_ymmm256 = 1521,
12166	/// `VPCMPGTW k1 {k2}, xmm2, xmm3/m128`
12167	///
12168	/// `EVEX.128.66.0F.WIG 65 /r`
12169	///
12170	/// `AVX512VL and AVX512BW`
12171	///
12172	/// `16/32/64-bit`
12173	EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128 = 1522,
12174	/// `VPCMPGTW k1 {k2}, ymm2, ymm3/m256`
12175	///
12176	/// `EVEX.256.66.0F.WIG 65 /r`
12177	///
12178	/// `AVX512VL and AVX512BW`
12179	///
12180	/// `16/32/64-bit`
12181	EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256 = 1523,
12182	/// `VPCMPGTW k1 {k2}, zmm2, zmm3/m512`
12183	///
12184	/// `EVEX.512.66.0F.WIG 65 /r`
12185	///
12186	/// `AVX512BW`
12187	///
12188	/// `16/32/64-bit`
12189	EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512 = 1524,
12190	/// `PCMPGTD mm, mm/m64`
12191	///
12192	/// `NP 0F 66 /r`
12193	///
12194	/// `MMX`
12195	///
12196	/// `16/32/64-bit`
12197	Pcmpgtd_mm_mmm64 = 1525,
12198	/// `PCMPGTD xmm1, xmm2/m128`
12199	///
12200	/// `66 0F 66 /r`
12201	///
12202	/// `SSE2`
12203	///
12204	/// `16/32/64-bit`
12205	Pcmpgtd_xmm_xmmm128 = 1526,
12206	/// `VPCMPGTD xmm1, xmm2, xmm3/m128`
12207	///
12208	/// `VEX.128.66.0F.WIG 66 /r`
12209	///
12210	/// `AVX`
12211	///
12212	/// `16/32/64-bit`
12213	VEX_Vpcmpgtd_xmm_xmm_xmmm128 = 1527,
12214	/// `VPCMPGTD ymm1, ymm2, ymm3/m256`
12215	///
12216	/// `VEX.256.66.0F.WIG 66 /r`
12217	///
12218	/// `AVX2`
12219	///
12220	/// `16/32/64-bit`
12221	VEX_Vpcmpgtd_ymm_ymm_ymmm256 = 1528,
12222	/// `VPCMPGTD k1 {k2}, xmm2, xmm3/m128/m32bcst`
12223	///
12224	/// `EVEX.128.66.0F.W0 66 /r`
12225	///
12226	/// `AVX512VL and AVX512F`
12227	///
12228	/// `16/32/64-bit`
12229	EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32 = 1529,
12230	/// `VPCMPGTD k1 {k2}, ymm2, ymm3/m256/m32bcst`
12231	///
12232	/// `EVEX.256.66.0F.W0 66 /r`
12233	///
12234	/// `AVX512VL and AVX512F`
12235	///
12236	/// `16/32/64-bit`
12237	EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32 = 1530,
12238	/// `VPCMPGTD k1 {k2}, zmm2, zmm3/m512/m32bcst`
12239	///
12240	/// `EVEX.512.66.0F.W0 66 /r`
12241	///
12242	/// `AVX512F`
12243	///
12244	/// `16/32/64-bit`
12245	EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32 = 1531,
12246	/// `PACKUSWB mm, mm/m64`
12247	///
12248	/// `NP 0F 67 /r`
12249	///
12250	/// `MMX`
12251	///
12252	/// `16/32/64-bit`
12253	Packuswb_mm_mmm64 = 1532,
12254	/// `PACKUSWB xmm1, xmm2/m128`
12255	///
12256	/// `66 0F 67 /r`
12257	///
12258	/// `SSE2`
12259	///
12260	/// `16/32/64-bit`
12261	Packuswb_xmm_xmmm128 = 1533,
12262	/// `VPACKUSWB xmm1, xmm2, xmm3/m128`
12263	///
12264	/// `VEX.128.66.0F.WIG 67 /r`
12265	///
12266	/// `AVX`
12267	///
12268	/// `16/32/64-bit`
12269	VEX_Vpackuswb_xmm_xmm_xmmm128 = 1534,
12270	/// `VPACKUSWB ymm1, ymm2, ymm3/m256`
12271	///
12272	/// `VEX.256.66.0F.WIG 67 /r`
12273	///
12274	/// `AVX2`
12275	///
12276	/// `16/32/64-bit`
12277	VEX_Vpackuswb_ymm_ymm_ymmm256 = 1535,
12278	/// `VPACKUSWB xmm1 {k1}{z}, xmm2, xmm3/m128`
12279	///
12280	/// `EVEX.128.66.0F.WIG 67 /r`
12281	///
12282	/// `AVX512VL and AVX512BW`
12283	///
12284	/// `16/32/64-bit`
12285	EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128 = 1536,
12286	/// `VPACKUSWB ymm1 {k1}{z}, ymm2, ymm3/m256`
12287	///
12288	/// `EVEX.256.66.0F.WIG 67 /r`
12289	///
12290	/// `AVX512VL and AVX512BW`
12291	///
12292	/// `16/32/64-bit`
12293	EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256 = 1537,
12294	/// `VPACKUSWB zmm1 {k1}{z}, zmm2, zmm3/m512`
12295	///
12296	/// `EVEX.512.66.0F.WIG 67 /r`
12297	///
12298	/// `AVX512BW`
12299	///
12300	/// `16/32/64-bit`
12301	EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512 = 1538,
12302	/// `PUNPCKHBW mm, mm/m64`
12303	///
12304	/// `NP 0F 68 /r`
12305	///
12306	/// `MMX`
12307	///
12308	/// `16/32/64-bit`
12309	Punpckhbw_mm_mmm64 = 1539,
12310	/// `PUNPCKHBW xmm1, xmm2/m128`
12311	///
12312	/// `66 0F 68 /r`
12313	///
12314	/// `SSE2`
12315	///
12316	/// `16/32/64-bit`
12317	Punpckhbw_xmm_xmmm128 = 1540,
12318	/// `VPUNPCKHBW xmm1, xmm2, xmm3/m128`
12319	///
12320	/// `VEX.128.66.0F.WIG 68 /r`
12321	///
12322	/// `AVX`
12323	///
12324	/// `16/32/64-bit`
12325	VEX_Vpunpckhbw_xmm_xmm_xmmm128 = 1541,
12326	/// `VPUNPCKHBW ymm1, ymm2, ymm3/m256`
12327	///
12328	/// `VEX.256.66.0F.WIG 68 /r`
12329	///
12330	/// `AVX2`
12331	///
12332	/// `16/32/64-bit`
12333	VEX_Vpunpckhbw_ymm_ymm_ymmm256 = 1542,
12334	/// `VPUNPCKHBW xmm1 {k1}{z}, xmm2, xmm3/m128`
12335	///
12336	/// `EVEX.128.66.0F.WIG 68 /r`
12337	///
12338	/// `AVX512VL and AVX512BW`
12339	///
12340	/// `16/32/64-bit`
12341	EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128 = 1543,
12342	/// `VPUNPCKHBW ymm1 {k1}{z}, ymm2, ymm3/m256`
12343	///
12344	/// `EVEX.256.66.0F.WIG 68 /r`
12345	///
12346	/// `AVX512VL and AVX512BW`
12347	///
12348	/// `16/32/64-bit`
12349	EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256 = 1544,
12350	/// `VPUNPCKHBW zmm1 {k1}{z}, zmm2, zmm3/m512`
12351	///
12352	/// `EVEX.512.66.0F.WIG 68 /r`
12353	///
12354	/// `AVX512BW`
12355	///
12356	/// `16/32/64-bit`
12357	EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512 = 1545,
12358	/// `PUNPCKHWD mm, mm/m64`
12359	///
12360	/// `NP 0F 69 /r`
12361	///
12362	/// `MMX`
12363	///
12364	/// `16/32/64-bit`
12365	Punpckhwd_mm_mmm64 = 1546,
12366	/// `PUNPCKHWD xmm1, xmm2/m128`
12367	///
12368	/// `66 0F 69 /r`
12369	///
12370	/// `SSE2`
12371	///
12372	/// `16/32/64-bit`
12373	Punpckhwd_xmm_xmmm128 = 1547,
12374	/// `VPUNPCKHWD xmm1, xmm2, xmm3/m128`
12375	///
12376	/// `VEX.128.66.0F.WIG 69 /r`
12377	///
12378	/// `AVX`
12379	///
12380	/// `16/32/64-bit`
12381	VEX_Vpunpckhwd_xmm_xmm_xmmm128 = 1548,
12382	/// `VPUNPCKHWD ymm1, ymm2, ymm3/m256`
12383	///
12384	/// `VEX.256.66.0F.WIG 69 /r`
12385	///
12386	/// `AVX2`
12387	///
12388	/// `16/32/64-bit`
12389	VEX_Vpunpckhwd_ymm_ymm_ymmm256 = 1549,
12390	/// `VPUNPCKHWD xmm1 {k1}{z}, xmm2, xmm3/m128`
12391	///
12392	/// `EVEX.128.66.0F.WIG 69 /r`
12393	///
12394	/// `AVX512VL and AVX512BW`
12395	///
12396	/// `16/32/64-bit`
12397	EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128 = 1550,
12398	/// `VPUNPCKHWD ymm1 {k1}{z}, ymm2, ymm3/m256`
12399	///
12400	/// `EVEX.256.66.0F.WIG 69 /r`
12401	///
12402	/// `AVX512VL and AVX512BW`
12403	///
12404	/// `16/32/64-bit`
12405	EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256 = 1551,
12406	/// `VPUNPCKHWD zmm1 {k1}{z}, zmm2, zmm3/m512`
12407	///
12408	/// `EVEX.512.66.0F.WIG 69 /r`
12409	///
12410	/// `AVX512BW`
12411	///
12412	/// `16/32/64-bit`
12413	EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512 = 1552,
12414	/// `PUNPCKHDQ mm, mm/m64`
12415	///
12416	/// `NP 0F 6A /r`
12417	///
12418	/// `MMX`
12419	///
12420	/// `16/32/64-bit`
12421	Punpckhdq_mm_mmm64 = 1553,
12422	/// `PUNPCKHDQ xmm1, xmm2/m128`
12423	///
12424	/// `66 0F 6A /r`
12425	///
12426	/// `SSE2`
12427	///
12428	/// `16/32/64-bit`
12429	Punpckhdq_xmm_xmmm128 = 1554,
12430	/// `VPUNPCKHDQ xmm1, xmm2, xmm3/m128`
12431	///
12432	/// `VEX.128.66.0F.WIG 6A /r`
12433	///
12434	/// `AVX`
12435	///
12436	/// `16/32/64-bit`
12437	VEX_Vpunpckhdq_xmm_xmm_xmmm128 = 1555,
12438	/// `VPUNPCKHDQ ymm1, ymm2, ymm3/m256`
12439	///
12440	/// `VEX.256.66.0F.WIG 6A /r`
12441	///
12442	/// `AVX2`
12443	///
12444	/// `16/32/64-bit`
12445	VEX_Vpunpckhdq_ymm_ymm_ymmm256 = 1556,
12446	/// `VPUNPCKHDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
12447	///
12448	/// `EVEX.128.66.0F.W0 6A /r`
12449	///
12450	/// `AVX512VL and AVX512F`
12451	///
12452	/// `16/32/64-bit`
12453	EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32 = 1557,
12454	/// `VPUNPCKHDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
12455	///
12456	/// `EVEX.256.66.0F.W0 6A /r`
12457	///
12458	/// `AVX512VL and AVX512F`
12459	///
12460	/// `16/32/64-bit`
12461	EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32 = 1558,
12462	/// `VPUNPCKHDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
12463	///
12464	/// `EVEX.512.66.0F.W0 6A /r`
12465	///
12466	/// `AVX512F`
12467	///
12468	/// `16/32/64-bit`
12469	EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32 = 1559,
12470	/// `PACKSSDW mm1, mm2/m64`
12471	///
12472	/// `NP 0F 6B /r`
12473	///
12474	/// `MMX`
12475	///
12476	/// `16/32/64-bit`
12477	Packssdw_mm_mmm64 = 1560,
12478	/// `PACKSSDW xmm1, xmm2/m128`
12479	///
12480	/// `66 0F 6B /r`
12481	///
12482	/// `SSE2`
12483	///
12484	/// `16/32/64-bit`
12485	Packssdw_xmm_xmmm128 = 1561,
12486	/// `VPACKSSDW xmm1, xmm2, xmm3/m128`
12487	///
12488	/// `VEX.128.66.0F.WIG 6B /r`
12489	///
12490	/// `AVX`
12491	///
12492	/// `16/32/64-bit`
12493	VEX_Vpackssdw_xmm_xmm_xmmm128 = 1562,
12494	/// `VPACKSSDW ymm1, ymm2, ymm3/m256`
12495	///
12496	/// `VEX.256.66.0F.WIG 6B /r`
12497	///
12498	/// `AVX2`
12499	///
12500	/// `16/32/64-bit`
12501	VEX_Vpackssdw_ymm_ymm_ymmm256 = 1563,
12502	/// `VPACKSSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
12503	///
12504	/// `EVEX.128.66.0F.W0 6B /r`
12505	///
12506	/// `AVX512VL and AVX512BW`
12507	///
12508	/// `16/32/64-bit`
12509	EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32 = 1564,
12510	/// `VPACKSSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
12511	///
12512	/// `EVEX.256.66.0F.W0 6B /r`
12513	///
12514	/// `AVX512VL and AVX512BW`
12515	///
12516	/// `16/32/64-bit`
12517	EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32 = 1565,
12518	/// `VPACKSSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
12519	///
12520	/// `EVEX.512.66.0F.W0 6B /r`
12521	///
12522	/// `AVX512BW`
12523	///
12524	/// `16/32/64-bit`
12525	EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32 = 1566,
12526	/// `PUNPCKLQDQ xmm1, xmm2/m128`
12527	///
12528	/// `66 0F 6C /r`
12529	///
12530	/// `SSE2`
12531	///
12532	/// `16/32/64-bit`
12533	Punpcklqdq_xmm_xmmm128 = 1567,
12534	/// `VPUNPCKLQDQ xmm1, xmm2, xmm3/m128`
12535	///
12536	/// `VEX.128.66.0F.WIG 6C /r`
12537	///
12538	/// `AVX`
12539	///
12540	/// `16/32/64-bit`
12541	VEX_Vpunpcklqdq_xmm_xmm_xmmm128 = 1568,
12542	/// `VPUNPCKLQDQ ymm1, ymm2, ymm3/m256`
12543	///
12544	/// `VEX.256.66.0F.WIG 6C /r`
12545	///
12546	/// `AVX2`
12547	///
12548	/// `16/32/64-bit`
12549	VEX_Vpunpcklqdq_ymm_ymm_ymmm256 = 1569,
12550	/// `VPUNPCKLQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
12551	///
12552	/// `EVEX.128.66.0F.W1 6C /r`
12553	///
12554	/// `AVX512VL and AVX512F`
12555	///
12556	/// `16/32/64-bit`
12557	EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64 = 1570,
12558	/// `VPUNPCKLQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
12559	///
12560	/// `EVEX.256.66.0F.W1 6C /r`
12561	///
12562	/// `AVX512VL and AVX512F`
12563	///
12564	/// `16/32/64-bit`
12565	EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64 = 1571,
12566	/// `VPUNPCKLQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
12567	///
12568	/// `EVEX.512.66.0F.W1 6C /r`
12569	///
12570	/// `AVX512F`
12571	///
12572	/// `16/32/64-bit`
12573	EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64 = 1572,
12574	/// `PUNPCKHQDQ xmm1, xmm2/m128`
12575	///
12576	/// `66 0F 6D /r`
12577	///
12578	/// `SSE2`
12579	///
12580	/// `16/32/64-bit`
12581	Punpckhqdq_xmm_xmmm128 = 1573,
12582	/// `VPUNPCKHQDQ xmm1, xmm2, xmm3/m128`
12583	///
12584	/// `VEX.128.66.0F.WIG 6D /r`
12585	///
12586	/// `AVX`
12587	///
12588	/// `16/32/64-bit`
12589	VEX_Vpunpckhqdq_xmm_xmm_xmmm128 = 1574,
12590	/// `VPUNPCKHQDQ ymm1, ymm2, ymm3/m256`
12591	///
12592	/// `VEX.256.66.0F.WIG 6D /r`
12593	///
12594	/// `AVX2`
12595	///
12596	/// `16/32/64-bit`
12597	VEX_Vpunpckhqdq_ymm_ymm_ymmm256 = 1575,
12598	/// `VPUNPCKHQDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
12599	///
12600	/// `EVEX.128.66.0F.W1 6D /r`
12601	///
12602	/// `AVX512VL and AVX512F`
12603	///
12604	/// `16/32/64-bit`
12605	EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64 = 1576,
12606	/// `VPUNPCKHQDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
12607	///
12608	/// `EVEX.256.66.0F.W1 6D /r`
12609	///
12610	/// `AVX512VL and AVX512F`
12611	///
12612	/// `16/32/64-bit`
12613	EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64 = 1577,
12614	/// `VPUNPCKHQDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
12615	///
12616	/// `EVEX.512.66.0F.W1 6D /r`
12617	///
12618	/// `AVX512F`
12619	///
12620	/// `16/32/64-bit`
12621	EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64 = 1578,
12622	/// `MOVD mm, r/m32`
12623	///
12624	/// `NP 0F 6E /r`
12625	///
12626	/// `MMX`
12627	///
12628	/// `16/32/64-bit`
12629	Movd_mm_rm32 = 1579,
12630	/// `MOVQ mm, r/m64`
12631	///
12632	/// `NP o64 0F 6E /r`
12633	///
12634	/// `MMX`
12635	///
12636	/// `64-bit`
12637	Movq_mm_rm64 = 1580,
12638	/// `MOVD xmm, r/m32`
12639	///
12640	/// `66 0F 6E /r`
12641	///
12642	/// `SSE2`
12643	///
12644	/// `16/32/64-bit`
12645	Movd_xmm_rm32 = 1581,
12646	/// `MOVQ xmm, r/m64`
12647	///
12648	/// `66 o64 0F 6E /r`
12649	///
12650	/// `SSE2`
12651	///
12652	/// `64-bit`
12653	Movq_xmm_rm64 = 1582,
12654	/// `VMOVD xmm1, r/m32`
12655	///
12656	/// `VEX.128.66.0F.W0 6E /r`
12657	///
12658	/// `AVX`
12659	///
12660	/// `16/32/64-bit`
12661	VEX_Vmovd_xmm_rm32 = 1583,
12662	/// `VMOVQ xmm1, r/m64`
12663	///
12664	/// `VEX.128.66.0F.W1 6E /r`
12665	///
12666	/// `AVX`
12667	///
12668	/// `64-bit`
12669	VEX_Vmovq_xmm_rm64 = 1584,
12670	/// `VMOVD xmm1, r/m32`
12671	///
12672	/// `EVEX.128.66.0F.W0 6E /r`
12673	///
12674	/// `AVX512F`
12675	///
12676	/// `16/32/64-bit`
12677	EVEX_Vmovd_xmm_rm32 = 1585,
12678	/// `VMOVQ xmm1, r/m64`
12679	///
12680	/// `EVEX.128.66.0F.W1 6E /r`
12681	///
12682	/// `AVX512F`
12683	///
12684	/// `64-bit`
12685	EVEX_Vmovq_xmm_rm64 = 1586,
12686	/// `MOVQ mm, mm/m64`
12687	///
12688	/// `NP 0F 6F /r`
12689	///
12690	/// `MMX`
12691	///
12692	/// `16/32/64-bit`
12693	Movq_mm_mmm64 = 1587,
12694	/// `MOVDQA xmm1, xmm2/m128`
12695	///
12696	/// `66 0F 6F /r`
12697	///
12698	/// `SSE2`
12699	///
12700	/// `16/32/64-bit`
12701	Movdqa_xmm_xmmm128 = 1588,
12702	/// `VMOVDQA xmm1, xmm2/m128`
12703	///
12704	/// `VEX.128.66.0F.WIG 6F /r`
12705	///
12706	/// `AVX`
12707	///
12708	/// `16/32/64-bit`
12709	VEX_Vmovdqa_xmm_xmmm128 = 1589,
12710	/// `VMOVDQA ymm1, ymm2/m256`
12711	///
12712	/// `VEX.256.66.0F.WIG 6F /r`
12713	///
12714	/// `AVX`
12715	///
12716	/// `16/32/64-bit`
12717	VEX_Vmovdqa_ymm_ymmm256 = 1590,
12718	/// `VMOVDQA32 xmm1 {k1}{z}, xmm2/m128`
12719	///
12720	/// `EVEX.128.66.0F.W0 6F /r`
12721	///
12722	/// `AVX512VL and AVX512F`
12723	///
12724	/// `16/32/64-bit`
12725	EVEX_Vmovdqa32_xmm_k1z_xmmm128 = 1591,
12726	/// `VMOVDQA32 ymm1 {k1}{z}, ymm2/m256`
12727	///
12728	/// `EVEX.256.66.0F.W0 6F /r`
12729	///
12730	/// `AVX512VL and AVX512F`
12731	///
12732	/// `16/32/64-bit`
12733	EVEX_Vmovdqa32_ymm_k1z_ymmm256 = 1592,
12734	/// `VMOVDQA32 zmm1 {k1}{z}, zmm2/m512`
12735	///
12736	/// `EVEX.512.66.0F.W0 6F /r`
12737	///
12738	/// `AVX512F`
12739	///
12740	/// `16/32/64-bit`
12741	EVEX_Vmovdqa32_zmm_k1z_zmmm512 = 1593,
12742	/// `VMOVDQA64 xmm1 {k1}{z}, xmm2/m128`
12743	///
12744	/// `EVEX.128.66.0F.W1 6F /r`
12745	///
12746	/// `AVX512VL and AVX512F`
12747	///
12748	/// `16/32/64-bit`
12749	EVEX_Vmovdqa64_xmm_k1z_xmmm128 = 1594,
12750	/// `VMOVDQA64 ymm1 {k1}{z}, ymm2/m256`
12751	///
12752	/// `EVEX.256.66.0F.W1 6F /r`
12753	///
12754	/// `AVX512VL and AVX512F`
12755	///
12756	/// `16/32/64-bit`
12757	EVEX_Vmovdqa64_ymm_k1z_ymmm256 = 1595,
12758	/// `VMOVDQA64 zmm1 {k1}{z}, zmm2/m512`
12759	///
12760	/// `EVEX.512.66.0F.W1 6F /r`
12761	///
12762	/// `AVX512F`
12763	///
12764	/// `16/32/64-bit`
12765	EVEX_Vmovdqa64_zmm_k1z_zmmm512 = 1596,
12766	/// `MOVDQU xmm1, xmm2/m128`
12767	///
12768	/// `F3 0F 6F /r`
12769	///
12770	/// `SSE2`
12771	///
12772	/// `16/32/64-bit`
12773	Movdqu_xmm_xmmm128 = 1597,
12774	/// `VMOVDQU xmm1, xmm2/m128`
12775	///
12776	/// `VEX.128.F3.0F.WIG 6F /r`
12777	///
12778	/// `AVX`
12779	///
12780	/// `16/32/64-bit`
12781	VEX_Vmovdqu_xmm_xmmm128 = 1598,
12782	/// `VMOVDQU ymm1, ymm2/m256`
12783	///
12784	/// `VEX.256.F3.0F.WIG 6F /r`
12785	///
12786	/// `AVX`
12787	///
12788	/// `16/32/64-bit`
12789	VEX_Vmovdqu_ymm_ymmm256 = 1599,
12790	/// `VMOVDQU32 xmm1 {k1}{z}, xmm2/m128`
12791	///
12792	/// `EVEX.128.F3.0F.W0 6F /r`
12793	///
12794	/// `AVX512VL and AVX512F`
12795	///
12796	/// `16/32/64-bit`
12797	EVEX_Vmovdqu32_xmm_k1z_xmmm128 = 1600,
12798	/// `VMOVDQU32 ymm1 {k1}{z}, ymm2/m256`
12799	///
12800	/// `EVEX.256.F3.0F.W0 6F /r`
12801	///
12802	/// `AVX512VL and AVX512F`
12803	///
12804	/// `16/32/64-bit`
12805	EVEX_Vmovdqu32_ymm_k1z_ymmm256 = 1601,
12806	/// `VMOVDQU32 zmm1 {k1}{z}, zmm2/m512`
12807	///
12808	/// `EVEX.512.F3.0F.W0 6F /r`
12809	///
12810	/// `AVX512F`
12811	///
12812	/// `16/32/64-bit`
12813	EVEX_Vmovdqu32_zmm_k1z_zmmm512 = 1602,
12814	/// `VMOVDQU64 xmm1 {k1}{z}, xmm2/m128`
12815	///
12816	/// `EVEX.128.F3.0F.W1 6F /r`
12817	///
12818	/// `AVX512VL and AVX512F`
12819	///
12820	/// `16/32/64-bit`
12821	EVEX_Vmovdqu64_xmm_k1z_xmmm128 = 1603,
12822	/// `VMOVDQU64 ymm1 {k1}{z}, ymm2/m256`
12823	///
12824	/// `EVEX.256.F3.0F.W1 6F /r`
12825	///
12826	/// `AVX512VL and AVX512F`
12827	///
12828	/// `16/32/64-bit`
12829	EVEX_Vmovdqu64_ymm_k1z_ymmm256 = 1604,
12830	/// `VMOVDQU64 zmm1 {k1}{z}, zmm2/m512`
12831	///
12832	/// `EVEX.512.F3.0F.W1 6F /r`
12833	///
12834	/// `AVX512F`
12835	///
12836	/// `16/32/64-bit`
12837	EVEX_Vmovdqu64_zmm_k1z_zmmm512 = 1605,
12838	/// `VMOVDQU8 xmm1 {k1}{z}, xmm2/m128`
12839	///
12840	/// `EVEX.128.F2.0F.W0 6F /r`
12841	///
12842	/// `AVX512VL and AVX512BW`
12843	///
12844	/// `16/32/64-bit`
12845	EVEX_Vmovdqu8_xmm_k1z_xmmm128 = 1606,
12846	/// `VMOVDQU8 ymm1 {k1}{z}, ymm2/m256`
12847	///
12848	/// `EVEX.256.F2.0F.W0 6F /r`
12849	///
12850	/// `AVX512VL and AVX512BW`
12851	///
12852	/// `16/32/64-bit`
12853	EVEX_Vmovdqu8_ymm_k1z_ymmm256 = 1607,
12854	/// `VMOVDQU8 zmm1 {k1}{z}, zmm2/m512`
12855	///
12856	/// `EVEX.512.F2.0F.W0 6F /r`
12857	///
12858	/// `AVX512BW`
12859	///
12860	/// `16/32/64-bit`
12861	EVEX_Vmovdqu8_zmm_k1z_zmmm512 = 1608,
12862	/// `VMOVDQU16 xmm1 {k1}{z}, xmm2/m128`
12863	///
12864	/// `EVEX.128.F2.0F.W1 6F /r`
12865	///
12866	/// `AVX512VL and AVX512BW`
12867	///
12868	/// `16/32/64-bit`
12869	EVEX_Vmovdqu16_xmm_k1z_xmmm128 = 1609,
12870	/// `VMOVDQU16 ymm1 {k1}{z}, ymm2/m256`
12871	///
12872	/// `EVEX.256.F2.0F.W1 6F /r`
12873	///
12874	/// `AVX512VL and AVX512BW`
12875	///
12876	/// `16/32/64-bit`
12877	EVEX_Vmovdqu16_ymm_k1z_ymmm256 = 1610,
12878	/// `VMOVDQU16 zmm1 {k1}{z}, zmm2/m512`
12879	///
12880	/// `EVEX.512.F2.0F.W1 6F /r`
12881	///
12882	/// `AVX512BW`
12883	///
12884	/// `16/32/64-bit`
12885	EVEX_Vmovdqu16_zmm_k1z_zmmm512 = 1611,
12886	/// `PSHUFW mm1, mm2/m64, imm8`
12887	///
12888	/// `NP 0F 70 /r ib`
12889	///
12890	/// `SSE`
12891	///
12892	/// `16/32/64-bit`
12893	Pshufw_mm_mmm64_imm8 = 1612,
12894	/// `PSHUFD xmm1, xmm2/m128, imm8`
12895	///
12896	/// `66 0F 70 /r ib`
12897	///
12898	/// `SSE2`
12899	///
12900	/// `16/32/64-bit`
12901	Pshufd_xmm_xmmm128_imm8 = 1613,
12902	/// `VPSHUFD xmm1, xmm2/m128, imm8`
12903	///
12904	/// `VEX.128.66.0F.WIG 70 /r ib`
12905	///
12906	/// `AVX`
12907	///
12908	/// `16/32/64-bit`
12909	VEX_Vpshufd_xmm_xmmm128_imm8 = 1614,
12910	/// `VPSHUFD ymm1, ymm2/m256, imm8`
12911	///
12912	/// `VEX.256.66.0F.WIG 70 /r ib`
12913	///
12914	/// `AVX2`
12915	///
12916	/// `16/32/64-bit`
12917	VEX_Vpshufd_ymm_ymmm256_imm8 = 1615,
12918	/// `VPSHUFD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
12919	///
12920	/// `EVEX.128.66.0F.W0 70 /r ib`
12921	///
12922	/// `AVX512VL and AVX512F`
12923	///
12924	/// `16/32/64-bit`
12925	EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8 = 1616,
12926	/// `VPSHUFD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
12927	///
12928	/// `EVEX.256.66.0F.W0 70 /r ib`
12929	///
12930	/// `AVX512VL and AVX512F`
12931	///
12932	/// `16/32/64-bit`
12933	EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8 = 1617,
12934	/// `VPSHUFD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
12935	///
12936	/// `EVEX.512.66.0F.W0 70 /r ib`
12937	///
12938	/// `AVX512F`
12939	///
12940	/// `16/32/64-bit`
12941	EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8 = 1618,
12942	/// `PSHUFHW xmm1, xmm2/m128, imm8`
12943	///
12944	/// `F3 0F 70 /r ib`
12945	///
12946	/// `SSE2`
12947	///
12948	/// `16/32/64-bit`
12949	Pshufhw_xmm_xmmm128_imm8 = 1619,
12950	/// `VPSHUFHW xmm1, xmm2/m128, imm8`
12951	///
12952	/// `VEX.128.F3.0F.WIG 70 /r ib`
12953	///
12954	/// `AVX`
12955	///
12956	/// `16/32/64-bit`
12957	VEX_Vpshufhw_xmm_xmmm128_imm8 = 1620,
12958	/// `VPSHUFHW ymm1, ymm2/m256, imm8`
12959	///
12960	/// `VEX.256.F3.0F.WIG 70 /r ib`
12961	///
12962	/// `AVX2`
12963	///
12964	/// `16/32/64-bit`
12965	VEX_Vpshufhw_ymm_ymmm256_imm8 = 1621,
12966	/// `VPSHUFHW xmm1 {k1}{z}, xmm2/m128, imm8`
12967	///
12968	/// `EVEX.128.F3.0F.WIG 70 /r ib`
12969	///
12970	/// `AVX512VL and AVX512BW`
12971	///
12972	/// `16/32/64-bit`
12973	EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8 = 1622,
12974	/// `VPSHUFHW ymm1 {k1}{z}, ymm2/m256, imm8`
12975	///
12976	/// `EVEX.256.F3.0F.WIG 70 /r ib`
12977	///
12978	/// `AVX512VL and AVX512BW`
12979	///
12980	/// `16/32/64-bit`
12981	EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8 = 1623,
12982	/// `VPSHUFHW zmm1 {k1}{z}, zmm2/m512, imm8`
12983	///
12984	/// `EVEX.512.F3.0F.WIG 70 /r ib`
12985	///
12986	/// `AVX512BW`
12987	///
12988	/// `16/32/64-bit`
12989	EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8 = 1624,
12990	/// `PSHUFLW xmm1, xmm2/m128, imm8`
12991	///
12992	/// `F2 0F 70 /r ib`
12993	///
12994	/// `SSE2`
12995	///
12996	/// `16/32/64-bit`
12997	Pshuflw_xmm_xmmm128_imm8 = 1625,
12998	/// `VPSHUFLW xmm1, xmm2/m128, imm8`
12999	///
13000	/// `VEX.128.F2.0F.WIG 70 /r ib`
13001	///
13002	/// `AVX`
13003	///
13004	/// `16/32/64-bit`
13005	VEX_Vpshuflw_xmm_xmmm128_imm8 = 1626,
13006	/// `VPSHUFLW ymm1, ymm2/m256, imm8`
13007	///
13008	/// `VEX.256.F2.0F.WIG 70 /r ib`
13009	///
13010	/// `AVX2`
13011	///
13012	/// `16/32/64-bit`
13013	VEX_Vpshuflw_ymm_ymmm256_imm8 = 1627,
13014	/// `VPSHUFLW xmm1 {k1}{z}, xmm2/m128, imm8`
13015	///
13016	/// `EVEX.128.F2.0F.WIG 70 /r ib`
13017	///
13018	/// `AVX512VL and AVX512BW`
13019	///
13020	/// `16/32/64-bit`
13021	EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8 = 1628,
13022	/// `VPSHUFLW ymm1 {k1}{z}, ymm2/m256, imm8`
13023	///
13024	/// `EVEX.256.F2.0F.WIG 70 /r ib`
13025	///
13026	/// `AVX512VL and AVX512BW`
13027	///
13028	/// `16/32/64-bit`
13029	EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8 = 1629,
13030	/// `VPSHUFLW zmm1 {k1}{z}, zmm2/m512, imm8`
13031	///
13032	/// `EVEX.512.F2.0F.WIG 70 /r ib`
13033	///
13034	/// `AVX512BW`
13035	///
13036	/// `16/32/64-bit`
13037	EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8 = 1630,
13038	/// `PSRLW mm, imm8`
13039	///
13040	/// `NP 0F 71 /2 ib`
13041	///
13042	/// `MMX`
13043	///
13044	/// `16/32/64-bit`
13045	Psrlw_mm_imm8 = 1631,
13046	/// `PSRLW xmm1, imm8`
13047	///
13048	/// `66 0F 71 /2 ib`
13049	///
13050	/// `SSE2`
13051	///
13052	/// `16/32/64-bit`
13053	Psrlw_xmm_imm8 = 1632,
13054	/// `VPSRLW xmm1, xmm2, imm8`
13055	///
13056	/// `VEX.128.66.0F.WIG 71 /2 ib`
13057	///
13058	/// `AVX`
13059	///
13060	/// `16/32/64-bit`
13061	VEX_Vpsrlw_xmm_xmm_imm8 = 1633,
13062	/// `VPSRLW ymm1, ymm2, imm8`
13063	///
13064	/// `VEX.256.66.0F.WIG 71 /2 ib`
13065	///
13066	/// `AVX2`
13067	///
13068	/// `16/32/64-bit`
13069	VEX_Vpsrlw_ymm_ymm_imm8 = 1634,
13070	/// `VPSRLW xmm1 {k1}{z}, xmm2/m128, imm8`
13071	///
13072	/// `EVEX.128.66.0F.WIG 71 /2 ib`
13073	///
13074	/// `AVX512VL and AVX512BW`
13075	///
13076	/// `16/32/64-bit`
13077	EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8 = 1635,
13078	/// `VPSRLW ymm1 {k1}{z}, ymm2/m256, imm8`
13079	///
13080	/// `EVEX.256.66.0F.WIG 71 /2 ib`
13081	///
13082	/// `AVX512VL and AVX512BW`
13083	///
13084	/// `16/32/64-bit`
13085	EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8 = 1636,
13086	/// `VPSRLW zmm1 {k1}{z}, zmm2/m512, imm8`
13087	///
13088	/// `EVEX.512.66.0F.WIG 71 /2 ib`
13089	///
13090	/// `AVX512BW`
13091	///
13092	/// `16/32/64-bit`
13093	EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8 = 1637,
13094	/// `PSRAW mm, imm8`
13095	///
13096	/// `NP 0F 71 /4 ib`
13097	///
13098	/// `MMX`
13099	///
13100	/// `16/32/64-bit`
13101	Psraw_mm_imm8 = 1638,
13102	/// `PSRAW xmm1, imm8`
13103	///
13104	/// `66 0F 71 /4 ib`
13105	///
13106	/// `SSE2`
13107	///
13108	/// `16/32/64-bit`
13109	Psraw_xmm_imm8 = 1639,
13110	/// `VPSRAW xmm1, xmm2, imm8`
13111	///
13112	/// `VEX.128.66.0F.WIG 71 /4 ib`
13113	///
13114	/// `AVX`
13115	///
13116	/// `16/32/64-bit`
13117	VEX_Vpsraw_xmm_xmm_imm8 = 1640,
13118	/// `VPSRAW ymm1, ymm2, imm8`
13119	///
13120	/// `VEX.256.66.0F.WIG 71 /4 ib`
13121	///
13122	/// `AVX2`
13123	///
13124	/// `16/32/64-bit`
13125	VEX_Vpsraw_ymm_ymm_imm8 = 1641,
13126	/// `VPSRAW xmm1 {k1}{z}, xmm2/m128, imm8`
13127	///
13128	/// `EVEX.128.66.0F.WIG 71 /4 ib`
13129	///
13130	/// `AVX512VL and AVX512BW`
13131	///
13132	/// `16/32/64-bit`
13133	EVEX_Vpsraw_xmm_k1z_xmmm128_imm8 = 1642,
13134	/// `VPSRAW ymm1 {k1}{z}, ymm2/m256, imm8`
13135	///
13136	/// `EVEX.256.66.0F.WIG 71 /4 ib`
13137	///
13138	/// `AVX512VL and AVX512BW`
13139	///
13140	/// `16/32/64-bit`
13141	EVEX_Vpsraw_ymm_k1z_ymmm256_imm8 = 1643,
13142	/// `VPSRAW zmm1 {k1}{z}, zmm2/m512, imm8`
13143	///
13144	/// `EVEX.512.66.0F.WIG 71 /4 ib`
13145	///
13146	/// `AVX512BW`
13147	///
13148	/// `16/32/64-bit`
13149	EVEX_Vpsraw_zmm_k1z_zmmm512_imm8 = 1644,
13150	/// `PSLLW mm1, imm8`
13151	///
13152	/// `NP 0F 71 /6 ib`
13153	///
13154	/// `MMX`
13155	///
13156	/// `16/32/64-bit`
13157	Psllw_mm_imm8 = 1645,
13158	/// `PSLLW xmm1, imm8`
13159	///
13160	/// `66 0F 71 /6 ib`
13161	///
13162	/// `SSE2`
13163	///
13164	/// `16/32/64-bit`
13165	Psllw_xmm_imm8 = 1646,
13166	/// `VPSLLW xmm1, xmm2, imm8`
13167	///
13168	/// `VEX.128.66.0F.WIG 71 /6 ib`
13169	///
13170	/// `AVX`
13171	///
13172	/// `16/32/64-bit`
13173	VEX_Vpsllw_xmm_xmm_imm8 = 1647,
13174	/// `VPSLLW ymm1, ymm2, imm8`
13175	///
13176	/// `VEX.256.66.0F.WIG 71 /6 ib`
13177	///
13178	/// `AVX2`
13179	///
13180	/// `16/32/64-bit`
13181	VEX_Vpsllw_ymm_ymm_imm8 = 1648,
13182	/// `VPSLLW xmm1 {k1}{z}, xmm2/m128, imm8`
13183	///
13184	/// `EVEX.128.66.0F.WIG 71 /6 ib`
13185	///
13186	/// `AVX512VL and AVX512BW`
13187	///
13188	/// `16/32/64-bit`
13189	EVEX_Vpsllw_xmm_k1z_xmmm128_imm8 = 1649,
13190	/// `VPSLLW ymm1 {k1}{z}, ymm2/m256, imm8`
13191	///
13192	/// `EVEX.256.66.0F.WIG 71 /6 ib`
13193	///
13194	/// `AVX512VL and AVX512BW`
13195	///
13196	/// `16/32/64-bit`
13197	EVEX_Vpsllw_ymm_k1z_ymmm256_imm8 = 1650,
13198	/// `VPSLLW zmm1 {k1}{z}, zmm2/m512, imm8`
13199	///
13200	/// `EVEX.512.66.0F.WIG 71 /6 ib`
13201	///
13202	/// `AVX512BW`
13203	///
13204	/// `16/32/64-bit`
13205	EVEX_Vpsllw_zmm_k1z_zmmm512_imm8 = 1651,
13206	/// `VPRORD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
13207	///
13208	/// `EVEX.128.66.0F.W0 72 /0 ib`
13209	///
13210	/// `AVX512VL and AVX512F`
13211	///
13212	/// `16/32/64-bit`
13213	EVEX_Vprord_xmm_k1z_xmmm128b32_imm8 = 1652,
13214	/// `VPRORD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
13215	///
13216	/// `EVEX.256.66.0F.W0 72 /0 ib`
13217	///
13218	/// `AVX512VL and AVX512F`
13219	///
13220	/// `16/32/64-bit`
13221	EVEX_Vprord_ymm_k1z_ymmm256b32_imm8 = 1653,
13222	/// `VPRORD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
13223	///
13224	/// `EVEX.512.66.0F.W0 72 /0 ib`
13225	///
13226	/// `AVX512F`
13227	///
13228	/// `16/32/64-bit`
13229	EVEX_Vprord_zmm_k1z_zmmm512b32_imm8 = 1654,
13230	/// `VPRORQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
13231	///
13232	/// `EVEX.128.66.0F.W1 72 /0 ib`
13233	///
13234	/// `AVX512VL and AVX512F`
13235	///
13236	/// `16/32/64-bit`
13237	EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8 = 1655,
13238	/// `VPRORQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
13239	///
13240	/// `EVEX.256.66.0F.W1 72 /0 ib`
13241	///
13242	/// `AVX512VL and AVX512F`
13243	///
13244	/// `16/32/64-bit`
13245	EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8 = 1656,
13246	/// `VPRORQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
13247	///
13248	/// `EVEX.512.66.0F.W1 72 /0 ib`
13249	///
13250	/// `AVX512F`
13251	///
13252	/// `16/32/64-bit`
13253	EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8 = 1657,
13254	/// `VPROLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
13255	///
13256	/// `EVEX.128.66.0F.W0 72 /1 ib`
13257	///
13258	/// `AVX512VL and AVX512F`
13259	///
13260	/// `16/32/64-bit`
13261	EVEX_Vprold_xmm_k1z_xmmm128b32_imm8 = 1658,
13262	/// `VPROLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
13263	///
13264	/// `EVEX.256.66.0F.W0 72 /1 ib`
13265	///
13266	/// `AVX512VL and AVX512F`
13267	///
13268	/// `16/32/64-bit`
13269	EVEX_Vprold_ymm_k1z_ymmm256b32_imm8 = 1659,
13270	/// `VPROLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
13271	///
13272	/// `EVEX.512.66.0F.W0 72 /1 ib`
13273	///
13274	/// `AVX512F`
13275	///
13276	/// `16/32/64-bit`
13277	EVEX_Vprold_zmm_k1z_zmmm512b32_imm8 = 1660,
13278	/// `VPROLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
13279	///
13280	/// `EVEX.128.66.0F.W1 72 /1 ib`
13281	///
13282	/// `AVX512VL and AVX512F`
13283	///
13284	/// `16/32/64-bit`
13285	EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8 = 1661,
13286	/// `VPROLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
13287	///
13288	/// `EVEX.256.66.0F.W1 72 /1 ib`
13289	///
13290	/// `AVX512VL and AVX512F`
13291	///
13292	/// `16/32/64-bit`
13293	EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8 = 1662,
13294	/// `VPROLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
13295	///
13296	/// `EVEX.512.66.0F.W1 72 /1 ib`
13297	///
13298	/// `AVX512F`
13299	///
13300	/// `16/32/64-bit`
13301	EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8 = 1663,
13302	/// `PSRLD mm, imm8`
13303	///
13304	/// `NP 0F 72 /2 ib`
13305	///
13306	/// `MMX`
13307	///
13308	/// `16/32/64-bit`
13309	Psrld_mm_imm8 = 1664,
13310	/// `PSRLD xmm1, imm8`
13311	///
13312	/// `66 0F 72 /2 ib`
13313	///
13314	/// `SSE2`
13315	///
13316	/// `16/32/64-bit`
13317	Psrld_xmm_imm8 = 1665,
13318	/// `VPSRLD xmm1, xmm2, imm8`
13319	///
13320	/// `VEX.128.66.0F.WIG 72 /2 ib`
13321	///
13322	/// `AVX`
13323	///
13324	/// `16/32/64-bit`
13325	VEX_Vpsrld_xmm_xmm_imm8 = 1666,
13326	/// `VPSRLD ymm1, ymm2, imm8`
13327	///
13328	/// `VEX.256.66.0F.WIG 72 /2 ib`
13329	///
13330	/// `AVX2`
13331	///
13332	/// `16/32/64-bit`
13333	VEX_Vpsrld_ymm_ymm_imm8 = 1667,
13334	/// `VPSRLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
13335	///
13336	/// `EVEX.128.66.0F.W0 72 /2 ib`
13337	///
13338	/// `AVX512VL and AVX512F`
13339	///
13340	/// `16/32/64-bit`
13341	EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8 = 1668,
13342	/// `VPSRLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
13343	///
13344	/// `EVEX.256.66.0F.W0 72 /2 ib`
13345	///
13346	/// `AVX512VL and AVX512F`
13347	///
13348	/// `16/32/64-bit`
13349	EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8 = 1669,
13350	/// `VPSRLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
13351	///
13352	/// `EVEX.512.66.0F.W0 72 /2 ib`
13353	///
13354	/// `AVX512F`
13355	///
13356	/// `16/32/64-bit`
13357	EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8 = 1670,
13358	/// `PSRAD mm, imm8`
13359	///
13360	/// `NP 0F 72 /4 ib`
13361	///
13362	/// `MMX`
13363	///
13364	/// `16/32/64-bit`
13365	Psrad_mm_imm8 = 1671,
13366	/// `PSRAD xmm1, imm8`
13367	///
13368	/// `66 0F 72 /4 ib`
13369	///
13370	/// `SSE2`
13371	///
13372	/// `16/32/64-bit`
13373	Psrad_xmm_imm8 = 1672,
13374	/// `VPSRAD xmm1, xmm2, imm8`
13375	///
13376	/// `VEX.128.66.0F.WIG 72 /4 ib`
13377	///
13378	/// `AVX`
13379	///
13380	/// `16/32/64-bit`
13381	VEX_Vpsrad_xmm_xmm_imm8 = 1673,
13382	/// `VPSRAD ymm1, ymm2, imm8`
13383	///
13384	/// `VEX.256.66.0F.WIG 72 /4 ib`
13385	///
13386	/// `AVX2`
13387	///
13388	/// `16/32/64-bit`
13389	VEX_Vpsrad_ymm_ymm_imm8 = 1674,
13390	/// `VPSRAD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
13391	///
13392	/// `EVEX.128.66.0F.W0 72 /4 ib`
13393	///
13394	/// `AVX512VL and AVX512F`
13395	///
13396	/// `16/32/64-bit`
13397	EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8 = 1675,
13398	/// `VPSRAD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
13399	///
13400	/// `EVEX.256.66.0F.W0 72 /4 ib`
13401	///
13402	/// `AVX512VL and AVX512F`
13403	///
13404	/// `16/32/64-bit`
13405	EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8 = 1676,
13406	/// `VPSRAD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
13407	///
13408	/// `EVEX.512.66.0F.W0 72 /4 ib`
13409	///
13410	/// `AVX512F`
13411	///
13412	/// `16/32/64-bit`
13413	EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8 = 1677,
13414	/// `VPSRAQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
13415	///
13416	/// `EVEX.128.66.0F.W1 72 /4 ib`
13417	///
13418	/// `AVX512VL and AVX512F`
13419	///
13420	/// `16/32/64-bit`
13421	EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8 = 1678,
13422	/// `VPSRAQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
13423	///
13424	/// `EVEX.256.66.0F.W1 72 /4 ib`
13425	///
13426	/// `AVX512VL and AVX512F`
13427	///
13428	/// `16/32/64-bit`
13429	EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8 = 1679,
13430	/// `VPSRAQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
13431	///
13432	/// `EVEX.512.66.0F.W1 72 /4 ib`
13433	///
13434	/// `AVX512F`
13435	///
13436	/// `16/32/64-bit`
13437	EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8 = 1680,
13438	/// `PSLLD mm, imm8`
13439	///
13440	/// `NP 0F 72 /6 ib`
13441	///
13442	/// `MMX`
13443	///
13444	/// `16/32/64-bit`
13445	Pslld_mm_imm8 = 1681,
13446	/// `PSLLD xmm1, imm8`
13447	///
13448	/// `66 0F 72 /6 ib`
13449	///
13450	/// `SSE2`
13451	///
13452	/// `16/32/64-bit`
13453	Pslld_xmm_imm8 = 1682,
13454	/// `VPSLLD xmm1, xmm2, imm8`
13455	///
13456	/// `VEX.128.66.0F.WIG 72 /6 ib`
13457	///
13458	/// `AVX`
13459	///
13460	/// `16/32/64-bit`
13461	VEX_Vpslld_xmm_xmm_imm8 = 1683,
13462	/// `VPSLLD ymm1, ymm2, imm8`
13463	///
13464	/// `VEX.256.66.0F.WIG 72 /6 ib`
13465	///
13466	/// `AVX2`
13467	///
13468	/// `16/32/64-bit`
13469	VEX_Vpslld_ymm_ymm_imm8 = 1684,
13470	/// `VPSLLD xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
13471	///
13472	/// `EVEX.128.66.0F.W0 72 /6 ib`
13473	///
13474	/// `AVX512VL and AVX512F`
13475	///
13476	/// `16/32/64-bit`
13477	EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8 = 1685,
13478	/// `VPSLLD ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
13479	///
13480	/// `EVEX.256.66.0F.W0 72 /6 ib`
13481	///
13482	/// `AVX512VL and AVX512F`
13483	///
13484	/// `16/32/64-bit`
13485	EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8 = 1686,
13486	/// `VPSLLD zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
13487	///
13488	/// `EVEX.512.66.0F.W0 72 /6 ib`
13489	///
13490	/// `AVX512F`
13491	///
13492	/// `16/32/64-bit`
13493	EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8 = 1687,
13494	/// `PSRLQ mm, imm8`
13495	///
13496	/// `NP 0F 73 /2 ib`
13497	///
13498	/// `MMX`
13499	///
13500	/// `16/32/64-bit`
13501	Psrlq_mm_imm8 = 1688,
13502	/// `PSRLQ xmm1, imm8`
13503	///
13504	/// `66 0F 73 /2 ib`
13505	///
13506	/// `SSE2`
13507	///
13508	/// `16/32/64-bit`
13509	Psrlq_xmm_imm8 = 1689,
13510	/// `VPSRLQ xmm1, xmm2, imm8`
13511	///
13512	/// `VEX.128.66.0F.WIG 73 /2 ib`
13513	///
13514	/// `AVX`
13515	///
13516	/// `16/32/64-bit`
13517	VEX_Vpsrlq_xmm_xmm_imm8 = 1690,
13518	/// `VPSRLQ ymm1, ymm2, imm8`
13519	///
13520	/// `VEX.256.66.0F.WIG 73 /2 ib`
13521	///
13522	/// `AVX2`
13523	///
13524	/// `16/32/64-bit`
13525	VEX_Vpsrlq_ymm_ymm_imm8 = 1691,
13526	/// `VPSRLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
13527	///
13528	/// `EVEX.128.66.0F.W1 73 /2 ib`
13529	///
13530	/// `AVX512VL and AVX512F`
13531	///
13532	/// `16/32/64-bit`
13533	EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8 = 1692,
13534	/// `VPSRLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
13535	///
13536	/// `EVEX.256.66.0F.W1 73 /2 ib`
13537	///
13538	/// `AVX512VL and AVX512F`
13539	///
13540	/// `16/32/64-bit`
13541	EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8 = 1693,
13542	/// `VPSRLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
13543	///
13544	/// `EVEX.512.66.0F.W1 73 /2 ib`
13545	///
13546	/// `AVX512F`
13547	///
13548	/// `16/32/64-bit`
13549	EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8 = 1694,
13550	/// `PSRLDQ xmm1, imm8`
13551	///
13552	/// `66 0F 73 /3 ib`
13553	///
13554	/// `SSE2`
13555	///
13556	/// `16/32/64-bit`
13557	Psrldq_xmm_imm8 = 1695,
13558	/// `VPSRLDQ xmm1, xmm2, imm8`
13559	///
13560	/// `VEX.128.66.0F.WIG 73 /3 ib`
13561	///
13562	/// `AVX`
13563	///
13564	/// `16/32/64-bit`
13565	VEX_Vpsrldq_xmm_xmm_imm8 = 1696,
13566	/// `VPSRLDQ ymm1, ymm2, imm8`
13567	///
13568	/// `VEX.256.66.0F.WIG 73 /3 ib`
13569	///
13570	/// `AVX2`
13571	///
13572	/// `16/32/64-bit`
13573	VEX_Vpsrldq_ymm_ymm_imm8 = 1697,
13574	/// `VPSRLDQ xmm1, xmm2/m128, imm8`
13575	///
13576	/// `EVEX.128.66.0F.WIG 73 /3 ib`
13577	///
13578	/// `AVX512VL and AVX512BW`
13579	///
13580	/// `16/32/64-bit`
13581	EVEX_Vpsrldq_xmm_xmmm128_imm8 = 1698,
13582	/// `VPSRLDQ ymm1, ymm2/m256, imm8`
13583	///
13584	/// `EVEX.256.66.0F.WIG 73 /3 ib`
13585	///
13586	/// `AVX512VL and AVX512BW`
13587	///
13588	/// `16/32/64-bit`
13589	EVEX_Vpsrldq_ymm_ymmm256_imm8 = 1699,
13590	/// `VPSRLDQ zmm1, zmm2/m512, imm8`
13591	///
13592	/// `EVEX.512.66.0F.WIG 73 /3 ib`
13593	///
13594	/// `AVX512BW`
13595	///
13596	/// `16/32/64-bit`
13597	EVEX_Vpsrldq_zmm_zmmm512_imm8 = 1700,
13598	/// `PSLLQ mm, imm8`
13599	///
13600	/// `NP 0F 73 /6 ib`
13601	///
13602	/// `MMX`
13603	///
13604	/// `16/32/64-bit`
13605	Psllq_mm_imm8 = 1701,
13606	/// `PSLLQ xmm1, imm8`
13607	///
13608	/// `66 0F 73 /6 ib`
13609	///
13610	/// `SSE2`
13611	///
13612	/// `16/32/64-bit`
13613	Psllq_xmm_imm8 = 1702,
13614	/// `VPSLLQ xmm1, xmm2, imm8`
13615	///
13616	/// `VEX.128.66.0F.WIG 73 /6 ib`
13617	///
13618	/// `AVX`
13619	///
13620	/// `16/32/64-bit`
13621	VEX_Vpsllq_xmm_xmm_imm8 = 1703,
13622	/// `VPSLLQ ymm1, ymm2, imm8`
13623	///
13624	/// `VEX.256.66.0F.WIG 73 /6 ib`
13625	///
13626	/// `AVX2`
13627	///
13628	/// `16/32/64-bit`
13629	VEX_Vpsllq_ymm_ymm_imm8 = 1704,
13630	/// `VPSLLQ xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
13631	///
13632	/// `EVEX.128.66.0F.W1 73 /6 ib`
13633	///
13634	/// `AVX512VL and AVX512F`
13635	///
13636	/// `16/32/64-bit`
13637	EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8 = 1705,
13638	/// `VPSLLQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
13639	///
13640	/// `EVEX.256.66.0F.W1 73 /6 ib`
13641	///
13642	/// `AVX512VL and AVX512F`
13643	///
13644	/// `16/32/64-bit`
13645	EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8 = 1706,
13646	/// `VPSLLQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
13647	///
13648	/// `EVEX.512.66.0F.W1 73 /6 ib`
13649	///
13650	/// `AVX512F`
13651	///
13652	/// `16/32/64-bit`
13653	EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8 = 1707,
13654	/// `PSLLDQ xmm1, imm8`
13655	///
13656	/// `66 0F 73 /7 ib`
13657	///
13658	/// `SSE2`
13659	///
13660	/// `16/32/64-bit`
13661	Pslldq_xmm_imm8 = 1708,
13662	/// `VPSLLDQ xmm1, xmm2, imm8`
13663	///
13664	/// `VEX.128.66.0F.WIG 73 /7 ib`
13665	///
13666	/// `AVX`
13667	///
13668	/// `16/32/64-bit`
13669	VEX_Vpslldq_xmm_xmm_imm8 = 1709,
13670	/// `VPSLLDQ ymm1, ymm2, imm8`
13671	///
13672	/// `VEX.256.66.0F.WIG 73 /7 ib`
13673	///
13674	/// `AVX2`
13675	///
13676	/// `16/32/64-bit`
13677	VEX_Vpslldq_ymm_ymm_imm8 = 1710,
13678	/// `VPSLLDQ xmm1, xmm2/m128, imm8`
13679	///
13680	/// `EVEX.128.66.0F.WIG 73 /7 ib`
13681	///
13682	/// `AVX512VL and AVX512BW`
13683	///
13684	/// `16/32/64-bit`
13685	EVEX_Vpslldq_xmm_xmmm128_imm8 = 1711,
13686	/// `VPSLLDQ ymm1, ymm2/m256, imm8`
13687	///
13688	/// `EVEX.256.66.0F.WIG 73 /7 ib`
13689	///
13690	/// `AVX512VL and AVX512BW`
13691	///
13692	/// `16/32/64-bit`
13693	EVEX_Vpslldq_ymm_ymmm256_imm8 = 1712,
13694	/// `VPSLLDQ zmm1, zmm2/m512, imm8`
13695	///
13696	/// `EVEX.512.66.0F.WIG 73 /7 ib`
13697	///
13698	/// `AVX512BW`
13699	///
13700	/// `16/32/64-bit`
13701	EVEX_Vpslldq_zmm_zmmm512_imm8 = 1713,
13702	/// `PCMPEQB mm, mm/m64`
13703	///
13704	/// `NP 0F 74 /r`
13705	///
13706	/// `MMX`
13707	///
13708	/// `16/32/64-bit`
13709	Pcmpeqb_mm_mmm64 = 1714,
13710	/// `PCMPEQB xmm1, xmm2/m128`
13711	///
13712	/// `66 0F 74 /r`
13713	///
13714	/// `SSE2`
13715	///
13716	/// `16/32/64-bit`
13717	Pcmpeqb_xmm_xmmm128 = 1715,
13718	/// `VPCMPEQB xmm1, xmm2, xmm3/m128`
13719	///
13720	/// `VEX.128.66.0F.WIG 74 /r`
13721	///
13722	/// `AVX`
13723	///
13724	/// `16/32/64-bit`
13725	VEX_Vpcmpeqb_xmm_xmm_xmmm128 = 1716,
13726	/// `VPCMPEQB ymm1, ymm2, ymm3/m256`
13727	///
13728	/// `VEX.256.66.0F.WIG 74 /r`
13729	///
13730	/// `AVX2`
13731	///
13732	/// `16/32/64-bit`
13733	VEX_Vpcmpeqb_ymm_ymm_ymmm256 = 1717,
13734	/// `VPCMPEQB k1 {k2}, xmm2, xmm3/m128`
13735	///
13736	/// `EVEX.128.66.0F.WIG 74 /r`
13737	///
13738	/// `AVX512VL and AVX512BW`
13739	///
13740	/// `16/32/64-bit`
13741	EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128 = 1718,
13742	/// `VPCMPEQB k1 {k2}, ymm2, ymm3/m256`
13743	///
13744	/// `EVEX.256.66.0F.WIG 74 /r`
13745	///
13746	/// `AVX512VL and AVX512BW`
13747	///
13748	/// `16/32/64-bit`
13749	EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256 = 1719,
13750	/// `VPCMPEQB k1 {k2}, zmm2, zmm3/m512`
13751	///
13752	/// `EVEX.512.66.0F.WIG 74 /r`
13753	///
13754	/// `AVX512BW`
13755	///
13756	/// `16/32/64-bit`
13757	EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512 = 1720,
13758	/// `PCMPEQW mm, mm/m64`
13759	///
13760	/// `NP 0F 75 /r`
13761	///
13762	/// `MMX`
13763	///
13764	/// `16/32/64-bit`
13765	Pcmpeqw_mm_mmm64 = 1721,
13766	/// `PCMPEQW xmm1, xmm2/m128`
13767	///
13768	/// `66 0F 75 /r`
13769	///
13770	/// `SSE2`
13771	///
13772	/// `16/32/64-bit`
13773	Pcmpeqw_xmm_xmmm128 = 1722,
13774	/// `VPCMPEQW xmm1, xmm2, xmm3/m128`
13775	///
13776	/// `VEX.128.66.0F.WIG 75 /r`
13777	///
13778	/// `AVX`
13779	///
13780	/// `16/32/64-bit`
13781	VEX_Vpcmpeqw_xmm_xmm_xmmm128 = 1723,
13782	/// `VPCMPEQW ymm1, ymm2, ymm3/m256`
13783	///
13784	/// `VEX.256.66.0F.WIG 75 /r`
13785	///
13786	/// `AVX2`
13787	///
13788	/// `16/32/64-bit`
13789	VEX_Vpcmpeqw_ymm_ymm_ymmm256 = 1724,
13790	/// `VPCMPEQW k1 {k2}, xmm2, xmm3/m128`
13791	///
13792	/// `EVEX.128.66.0F.WIG 75 /r`
13793	///
13794	/// `AVX512VL and AVX512BW`
13795	///
13796	/// `16/32/64-bit`
13797	EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128 = 1725,
13798	/// `VPCMPEQW k1 {k2}, ymm2, ymm3/m256`
13799	///
13800	/// `EVEX.256.66.0F.WIG 75 /r`
13801	///
13802	/// `AVX512VL and AVX512BW`
13803	///
13804	/// `16/32/64-bit`
13805	EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256 = 1726,
13806	/// `VPCMPEQW k1 {k2}, zmm2, zmm3/m512`
13807	///
13808	/// `EVEX.512.66.0F.WIG 75 /r`
13809	///
13810	/// `AVX512BW`
13811	///
13812	/// `16/32/64-bit`
13813	EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512 = 1727,
13814	/// `PCMPEQD mm, mm/m64`
13815	///
13816	/// `NP 0F 76 /r`
13817	///
13818	/// `MMX`
13819	///
13820	/// `16/32/64-bit`
13821	Pcmpeqd_mm_mmm64 = 1728,
13822	/// `PCMPEQD xmm1, xmm2/m128`
13823	///
13824	/// `66 0F 76 /r`
13825	///
13826	/// `SSE2`
13827	///
13828	/// `16/32/64-bit`
13829	Pcmpeqd_xmm_xmmm128 = 1729,
13830	/// `VPCMPEQD xmm1, xmm2, xmm3/m128`
13831	///
13832	/// `VEX.128.66.0F.WIG 76 /r`
13833	///
13834	/// `AVX`
13835	///
13836	/// `16/32/64-bit`
13837	VEX_Vpcmpeqd_xmm_xmm_xmmm128 = 1730,
13838	/// `VPCMPEQD ymm1, ymm2, ymm3/m256`
13839	///
13840	/// `VEX.256.66.0F.WIG 76 /r`
13841	///
13842	/// `AVX2`
13843	///
13844	/// `16/32/64-bit`
13845	VEX_Vpcmpeqd_ymm_ymm_ymmm256 = 1731,
13846	/// `VPCMPEQD k1 {k2}, xmm2, xmm3/m128/m32bcst`
13847	///
13848	/// `EVEX.128.66.0F.W0 76 /r`
13849	///
13850	/// `AVX512VL and AVX512F`
13851	///
13852	/// `16/32/64-bit`
13853	EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32 = 1732,
13854	/// `VPCMPEQD k1 {k2}, ymm2, ymm3/m256/m32bcst`
13855	///
13856	/// `EVEX.256.66.0F.W0 76 /r`
13857	///
13858	/// `AVX512VL and AVX512F`
13859	///
13860	/// `16/32/64-bit`
13861	EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32 = 1733,
13862	/// `VPCMPEQD k1 {k2}, zmm2, zmm3/m512/m32bcst`
13863	///
13864	/// `EVEX.512.66.0F.W0 76 /r`
13865	///
13866	/// `AVX512F`
13867	///
13868	/// `16/32/64-bit`
13869	EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32 = 1734,
13870	/// `EMMS`
13871	///
13872	/// `NP 0F 77`
13873	///
13874	/// `MMX`
13875	///
13876	/// `16/32/64-bit`
13877	Emms = 1735,
13878	/// `VZEROUPPER`
13879	///
13880	/// `VEX.128.0F.WIG 77`
13881	///
13882	/// `AVX`
13883	///
13884	/// `16/32/64-bit`
13885	VEX_Vzeroupper = 1736,
13886	/// `VZEROALL`
13887	///
13888	/// `VEX.256.0F.WIG 77`
13889	///
13890	/// `AVX`
13891	///
13892	/// `16/32/64-bit`
13893	VEX_Vzeroall = 1737,
13894	/// `VMREAD r/m32, r32`
13895	///
13896	/// `NP 0F 78 /r`
13897	///
13898	/// `VMX`
13899	///
13900	/// `16/32-bit`
13901	Vmread_rm32_r32 = 1738,
13902	/// `VMREAD r/m64, r64`
13903	///
13904	/// `NP 0F 78 /r`
13905	///
13906	/// `VMX`
13907	///
13908	/// `64-bit`
13909	Vmread_rm64_r64 = 1739,
13910	/// `VCVTTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst`
13911	///
13912	/// `EVEX.128.0F.W0 78 /r`
13913	///
13914	/// `AVX512VL and AVX512F`
13915	///
13916	/// `16/32/64-bit`
13917	EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32 = 1740,
13918	/// `VCVTTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst`
13919	///
13920	/// `EVEX.256.0F.W0 78 /r`
13921	///
13922	/// `AVX512VL and AVX512F`
13923	///
13924	/// `16/32/64-bit`
13925	EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32 = 1741,
13926	/// `VCVTTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
13927	///
13928	/// `EVEX.512.0F.W0 78 /r`
13929	///
13930	/// `AVX512F`
13931	///
13932	/// `16/32/64-bit`
13933	EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae = 1742,
13934	/// `VCVTTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
13935	///
13936	/// `EVEX.128.0F.W1 78 /r`
13937	///
13938	/// `AVX512VL and AVX512F`
13939	///
13940	/// `16/32/64-bit`
13941	EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64 = 1743,
13942	/// `VCVTTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst`
13943	///
13944	/// `EVEX.256.0F.W1 78 /r`
13945	///
13946	/// `AVX512VL and AVX512F`
13947	///
13948	/// `16/32/64-bit`
13949	EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64 = 1744,
13950	/// `VCVTTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
13951	///
13952	/// `EVEX.512.0F.W1 78 /r`
13953	///
13954	/// `AVX512F`
13955	///
13956	/// `16/32/64-bit`
13957	EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae = 1745,
13958	/// `EXTRQ xmm1, imm8, imm8`
13959	///
13960	/// `66 0F 78 /0 ib ib`
13961	///
13962	/// `SSE4A`
13963	///
13964	/// `16/32/64-bit`
13965	Extrq_xmm_imm8_imm8 = 1746,
13966	/// `VCVTTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst`
13967	///
13968	/// `EVEX.128.66.0F.W0 78 /r`
13969	///
13970	/// `AVX512VL and AVX512DQ`
13971	///
13972	/// `16/32/64-bit`
13973	EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32 = 1747,
13974	/// `VCVTTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst`
13975	///
13976	/// `EVEX.256.66.0F.W0 78 /r`
13977	///
13978	/// `AVX512VL and AVX512DQ`
13979	///
13980	/// `16/32/64-bit`
13981	EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32 = 1748,
13982	/// `VCVTTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}`
13983	///
13984	/// `EVEX.512.66.0F.W0 78 /r`
13985	///
13986	/// `AVX512DQ`
13987	///
13988	/// `16/32/64-bit`
13989	EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae = 1749,
13990	/// `VCVTTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
13991	///
13992	/// `EVEX.128.66.0F.W1 78 /r`
13993	///
13994	/// `AVX512VL and AVX512DQ`
13995	///
13996	/// `16/32/64-bit`
13997	EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64 = 1750,
13998	/// `VCVTTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
13999	///
14000	/// `EVEX.256.66.0F.W1 78 /r`
14001	///
14002	/// `AVX512VL and AVX512DQ`
14003	///
14004	/// `16/32/64-bit`
14005	EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64 = 1751,
14006	/// `VCVTTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
14007	///
14008	/// `EVEX.512.66.0F.W1 78 /r`
14009	///
14010	/// `AVX512DQ`
14011	///
14012	/// `16/32/64-bit`
14013	EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae = 1752,
14014	/// `VCVTTSS2USI r32, xmm1/m32{sae}`
14015	///
14016	/// `EVEX.LIG.F3.0F.W0 78 /r`
14017	///
14018	/// `AVX512F`
14019	///
14020	/// `16/32/64-bit`
14021	EVEX_Vcvttss2usi_r32_xmmm32_sae = 1753,
14022	/// `VCVTTSS2USI r64, xmm1/m32{sae}`
14023	///
14024	/// `EVEX.LIG.F3.0F.W1 78 /r`
14025	///
14026	/// `AVX512F`
14027	///
14028	/// `64-bit`
14029	EVEX_Vcvttss2usi_r64_xmmm32_sae = 1754,
14030	/// `INSERTQ xmm1, xmm2, imm8, imm8`
14031	///
14032	/// `F2 0F 78 /r ib ib`
14033	///
14034	/// `SSE4A`
14035	///
14036	/// `16/32/64-bit`
14037	Insertq_xmm_xmm_imm8_imm8 = 1755,
14038	/// `VCVTTSD2USI r32, xmm1/m64{sae}`
14039	///
14040	/// `EVEX.LIG.F2.0F.W0 78 /r`
14041	///
14042	/// `AVX512F`
14043	///
14044	/// `16/32/64-bit`
14045	EVEX_Vcvttsd2usi_r32_xmmm64_sae = 1756,
14046	/// `VCVTTSD2USI r64, xmm1/m64{sae}`
14047	///
14048	/// `EVEX.LIG.F2.0F.W1 78 /r`
14049	///
14050	/// `AVX512F`
14051	///
14052	/// `64-bit`
14053	EVEX_Vcvttsd2usi_r64_xmmm64_sae = 1757,
14054	/// `VMWRITE r32, r/m32`
14055	///
14056	/// `NP 0F 79 /r`
14057	///
14058	/// `VMX`
14059	///
14060	/// `16/32-bit`
14061	Vmwrite_r32_rm32 = 1758,
14062	/// `VMWRITE r64, r/m64`
14063	///
14064	/// `NP 0F 79 /r`
14065	///
14066	/// `VMX`
14067	///
14068	/// `64-bit`
14069	Vmwrite_r64_rm64 = 1759,
14070	/// `VCVTPS2UDQ xmm1 {k1}{z}, xmm2/m128/m32bcst`
14071	///
14072	/// `EVEX.128.0F.W0 79 /r`
14073	///
14074	/// `AVX512VL and AVX512F`
14075	///
14076	/// `16/32/64-bit`
14077	EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32 = 1760,
14078	/// `VCVTPS2UDQ ymm1 {k1}{z}, ymm2/m256/m32bcst`
14079	///
14080	/// `EVEX.256.0F.W0 79 /r`
14081	///
14082	/// `AVX512VL and AVX512F`
14083	///
14084	/// `16/32/64-bit`
14085	EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32 = 1761,
14086	/// `VCVTPS2UDQ zmm1 {k1}{z}, zmm2/m512/m32bcst{er}`
14087	///
14088	/// `EVEX.512.0F.W0 79 /r`
14089	///
14090	/// `AVX512F`
14091	///
14092	/// `16/32/64-bit`
14093	EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er = 1762,
14094	/// `VCVTPD2UDQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
14095	///
14096	/// `EVEX.128.0F.W1 79 /r`
14097	///
14098	/// `AVX512VL and AVX512F`
14099	///
14100	/// `16/32/64-bit`
14101	EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64 = 1763,
14102	/// `VCVTPD2UDQ xmm1 {k1}{z}, ymm2/m256/m64bcst`
14103	///
14104	/// `EVEX.256.0F.W1 79 /r`
14105	///
14106	/// `AVX512VL and AVX512F`
14107	///
14108	/// `16/32/64-bit`
14109	EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64 = 1764,
14110	/// `VCVTPD2UDQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}`
14111	///
14112	/// `EVEX.512.0F.W1 79 /r`
14113	///
14114	/// `AVX512F`
14115	///
14116	/// `16/32/64-bit`
14117	EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er = 1765,
14118	/// `EXTRQ xmm1, xmm2`
14119	///
14120	/// `66 0F 79 /r`
14121	///
14122	/// `SSE4A`
14123	///
14124	/// `16/32/64-bit`
14125	Extrq_xmm_xmm = 1766,
14126	/// `VCVTPS2UQQ xmm1 {k1}{z}, xmm2/m64/m32bcst`
14127	///
14128	/// `EVEX.128.66.0F.W0 79 /r`
14129	///
14130	/// `AVX512VL and AVX512DQ`
14131	///
14132	/// `16/32/64-bit`
14133	EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32 = 1767,
14134	/// `VCVTPS2UQQ ymm1 {k1}{z}, xmm2/m128/m32bcst`
14135	///
14136	/// `EVEX.256.66.0F.W0 79 /r`
14137	///
14138	/// `AVX512VL and AVX512DQ`
14139	///
14140	/// `16/32/64-bit`
14141	EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32 = 1768,
14142	/// `VCVTPS2UQQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}`
14143	///
14144	/// `EVEX.512.66.0F.W0 79 /r`
14145	///
14146	/// `AVX512DQ`
14147	///
14148	/// `16/32/64-bit`
14149	EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er = 1769,
14150	/// `VCVTPD2UQQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
14151	///
14152	/// `EVEX.128.66.0F.W1 79 /r`
14153	///
14154	/// `AVX512VL and AVX512DQ`
14155	///
14156	/// `16/32/64-bit`
14157	EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64 = 1770,
14158	/// `VCVTPD2UQQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
14159	///
14160	/// `EVEX.256.66.0F.W1 79 /r`
14161	///
14162	/// `AVX512VL and AVX512DQ`
14163	///
14164	/// `16/32/64-bit`
14165	EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64 = 1771,
14166	/// `VCVTPD2UQQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
14167	///
14168	/// `EVEX.512.66.0F.W1 79 /r`
14169	///
14170	/// `AVX512DQ`
14171	///
14172	/// `16/32/64-bit`
14173	EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er = 1772,
14174	/// `VCVTSS2USI r32, xmm1/m32{er}`
14175	///
14176	/// `EVEX.LIG.F3.0F.W0 79 /r`
14177	///
14178	/// `AVX512F`
14179	///
14180	/// `16/32/64-bit`
14181	EVEX_Vcvtss2usi_r32_xmmm32_er = 1773,
14182	/// `VCVTSS2USI r64, xmm1/m32{er}`
14183	///
14184	/// `EVEX.LIG.F3.0F.W1 79 /r`
14185	///
14186	/// `AVX512F`
14187	///
14188	/// `64-bit`
14189	EVEX_Vcvtss2usi_r64_xmmm32_er = 1774,
14190	/// `INSERTQ xmm1, xmm2`
14191	///
14192	/// `F2 0F 79 /r`
14193	///
14194	/// `SSE4A`
14195	///
14196	/// `16/32/64-bit`
14197	Insertq_xmm_xmm = 1775,
14198	/// `VCVTSD2USI r32, xmm1/m64{er}`
14199	///
14200	/// `EVEX.LIG.F2.0F.W0 79 /r`
14201	///
14202	/// `AVX512F`
14203	///
14204	/// `16/32/64-bit`
14205	EVEX_Vcvtsd2usi_r32_xmmm64_er = 1776,
14206	/// `VCVTSD2USI r64, xmm1/m64{er}`
14207	///
14208	/// `EVEX.LIG.F2.0F.W1 79 /r`
14209	///
14210	/// `AVX512F`
14211	///
14212	/// `64-bit`
14213	EVEX_Vcvtsd2usi_r64_xmmm64_er = 1777,
14214	/// `VCVTTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst`
14215	///
14216	/// `EVEX.128.66.0F.W0 7A /r`
14217	///
14218	/// `AVX512VL and AVX512DQ`
14219	///
14220	/// `16/32/64-bit`
14221	EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32 = 1778,
14222	/// `VCVTTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst`
14223	///
14224	/// `EVEX.256.66.0F.W0 7A /r`
14225	///
14226	/// `AVX512VL and AVX512DQ`
14227	///
14228	/// `16/32/64-bit`
14229	EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32 = 1779,
14230	/// `VCVTTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{sae}`
14231	///
14232	/// `EVEX.512.66.0F.W0 7A /r`
14233	///
14234	/// `AVX512DQ`
14235	///
14236	/// `16/32/64-bit`
14237	EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae = 1780,
14238	/// `VCVTTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
14239	///
14240	/// `EVEX.128.66.0F.W1 7A /r`
14241	///
14242	/// `AVX512VL and AVX512DQ`
14243	///
14244	/// `16/32/64-bit`
14245	EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64 = 1781,
14246	/// `VCVTTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
14247	///
14248	/// `EVEX.256.66.0F.W1 7A /r`
14249	///
14250	/// `AVX512VL and AVX512DQ`
14251	///
14252	/// `16/32/64-bit`
14253	EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64 = 1782,
14254	/// `VCVTTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
14255	///
14256	/// `EVEX.512.66.0F.W1 7A /r`
14257	///
14258	/// `AVX512DQ`
14259	///
14260	/// `16/32/64-bit`
14261	EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae = 1783,
14262	/// `VCVTUDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst`
14263	///
14264	/// `EVEX.128.F3.0F.W0 7A /r`
14265	///
14266	/// `AVX512VL and AVX512F`
14267	///
14268	/// `16/32/64-bit`
14269	EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32 = 1784,
14270	/// `VCVTUDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst`
14271	///
14272	/// `EVEX.256.F3.0F.W0 7A /r`
14273	///
14274	/// `AVX512VL and AVX512F`
14275	///
14276	/// `16/32/64-bit`
14277	EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32 = 1785,
14278	/// `VCVTUDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}`
14279	///
14280	/// `EVEX.512.F3.0F.W0 7A /r`
14281	///
14282	/// `AVX512F`
14283	///
14284	/// `16/32/64-bit`
14285	EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er = 1786,
14286	/// `VCVTUQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst`
14287	///
14288	/// `EVEX.128.F3.0F.W1 7A /r`
14289	///
14290	/// `AVX512VL and AVX512DQ`
14291	///
14292	/// `16/32/64-bit`
14293	EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64 = 1787,
14294	/// `VCVTUQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst`
14295	///
14296	/// `EVEX.256.F3.0F.W1 7A /r`
14297	///
14298	/// `AVX512VL and AVX512DQ`
14299	///
14300	/// `16/32/64-bit`
14301	EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64 = 1788,
14302	/// `VCVTUQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
14303	///
14304	/// `EVEX.512.F3.0F.W1 7A /r`
14305	///
14306	/// `AVX512DQ`
14307	///
14308	/// `16/32/64-bit`
14309	EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er = 1789,
14310	/// `VCVTUDQ2PS xmm1 {k1}{z}, xmm2/m128/m32bcst`
14311	///
14312	/// `EVEX.128.F2.0F.W0 7A /r`
14313	///
14314	/// `AVX512VL and AVX512F`
14315	///
14316	/// `16/32/64-bit`
14317	EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32 = 1790,
14318	/// `VCVTUDQ2PS ymm1 {k1}{z}, ymm2/m256/m32bcst`
14319	///
14320	/// `EVEX.256.F2.0F.W0 7A /r`
14321	///
14322	/// `AVX512VL and AVX512F`
14323	///
14324	/// `16/32/64-bit`
14325	EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32 = 1791,
14326	/// `VCVTUDQ2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{er}`
14327	///
14328	/// `EVEX.512.F2.0F.W0 7A /r`
14329	///
14330	/// `AVX512F`
14331	///
14332	/// `16/32/64-bit`
14333	EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er = 1792,
14334	/// `VCVTUQQ2PS xmm1 {k1}{z}, xmm2/m128/m64bcst`
14335	///
14336	/// `EVEX.128.F2.0F.W1 7A /r`
14337	///
14338	/// `AVX512VL and AVX512DQ`
14339	///
14340	/// `16/32/64-bit`
14341	EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64 = 1793,
14342	/// `VCVTUQQ2PS xmm1 {k1}{z}, ymm2/m256/m64bcst`
14343	///
14344	/// `EVEX.256.F2.0F.W1 7A /r`
14345	///
14346	/// `AVX512VL and AVX512DQ`
14347	///
14348	/// `16/32/64-bit`
14349	EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64 = 1794,
14350	/// `VCVTUQQ2PS ymm1 {k1}{z}, zmm2/m512/m64bcst{er}`
14351	///
14352	/// `EVEX.512.F2.0F.W1 7A /r`
14353	///
14354	/// `AVX512DQ`
14355	///
14356	/// `16/32/64-bit`
14357	EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er = 1795,
14358	/// `VCVTPS2QQ xmm1 {k1}{z}, xmm2/m64/m32bcst`
14359	///
14360	/// `EVEX.128.66.0F.W0 7B /r`
14361	///
14362	/// `AVX512VL and AVX512DQ`
14363	///
14364	/// `16/32/64-bit`
14365	EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32 = 1796,
14366	/// `VCVTPS2QQ ymm1 {k1}{z}, xmm2/m128/m32bcst`
14367	///
14368	/// `EVEX.256.66.0F.W0 7B /r`
14369	///
14370	/// `AVX512VL and AVX512DQ`
14371	///
14372	/// `16/32/64-bit`
14373	EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32 = 1797,
14374	/// `VCVTPS2QQ zmm1 {k1}{z}, ymm2/m256/m32bcst{er}`
14375	///
14376	/// `EVEX.512.66.0F.W0 7B /r`
14377	///
14378	/// `AVX512DQ`
14379	///
14380	/// `16/32/64-bit`
14381	EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er = 1798,
14382	/// `VCVTPD2QQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
14383	///
14384	/// `EVEX.128.66.0F.W1 7B /r`
14385	///
14386	/// `AVX512VL and AVX512DQ`
14387	///
14388	/// `16/32/64-bit`
14389	EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64 = 1799,
14390	/// `VCVTPD2QQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
14391	///
14392	/// `EVEX.256.66.0F.W1 7B /r`
14393	///
14394	/// `AVX512VL and AVX512DQ`
14395	///
14396	/// `16/32/64-bit`
14397	EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64 = 1800,
14398	/// `VCVTPD2QQ zmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
14399	///
14400	/// `EVEX.512.66.0F.W1 7B /r`
14401	///
14402	/// `AVX512DQ`
14403	///
14404	/// `16/32/64-bit`
14405	EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er = 1801,
14406	/// `VCVTUSI2SS xmm1, xmm2, r/m32{er}`
14407	///
14408	/// `EVEX.LIG.F3.0F.W0 7B /r`
14409	///
14410	/// `AVX512F`
14411	///
14412	/// `16/32/64-bit`
14413	EVEX_Vcvtusi2ss_xmm_xmm_rm32_er = 1802,
14414	/// `VCVTUSI2SS xmm1, xmm2, r/m64{er}`
14415	///
14416	/// `EVEX.LIG.F3.0F.W1 7B /r`
14417	///
14418	/// `AVX512F`
14419	///
14420	/// `64-bit`
14421	EVEX_Vcvtusi2ss_xmm_xmm_rm64_er = 1803,
14422	/// `VCVTUSI2SD xmm1, xmm2, r/m32{er}`
14423	///
14424	/// `EVEX.LIG.F2.0F.W0 7B /r`
14425	///
14426	/// `AVX512F`
14427	///
14428	/// `16/32/64-bit`
14429	EVEX_Vcvtusi2sd_xmm_xmm_rm32_er = 1804,
14430	/// `VCVTUSI2SD xmm1, xmm2, r/m64{er}`
14431	///
14432	/// `EVEX.LIG.F2.0F.W1 7B /r`
14433	///
14434	/// `AVX512F`
14435	///
14436	/// `64-bit`
14437	EVEX_Vcvtusi2sd_xmm_xmm_rm64_er = 1805,
14438	/// `HADDPD xmm1, xmm2/m128`
14439	///
14440	/// `66 0F 7C /r`
14441	///
14442	/// `SSE3`
14443	///
14444	/// `16/32/64-bit`
14445	Haddpd_xmm_xmmm128 = 1806,
14446	/// `VHADDPD xmm1, xmm2, xmm3/m128`
14447	///
14448	/// `VEX.128.66.0F.WIG 7C /r`
14449	///
14450	/// `AVX`
14451	///
14452	/// `16/32/64-bit`
14453	VEX_Vhaddpd_xmm_xmm_xmmm128 = 1807,
14454	/// `VHADDPD ymm1, ymm2, ymm3/m256`
14455	///
14456	/// `VEX.256.66.0F.WIG 7C /r`
14457	///
14458	/// `AVX`
14459	///
14460	/// `16/32/64-bit`
14461	VEX_Vhaddpd_ymm_ymm_ymmm256 = 1808,
14462	/// `HADDPS xmm1, xmm2/m128`
14463	///
14464	/// `F2 0F 7C /r`
14465	///
14466	/// `SSE3`
14467	///
14468	/// `16/32/64-bit`
14469	Haddps_xmm_xmmm128 = 1809,
14470	/// `VHADDPS xmm1, xmm2, xmm3/m128`
14471	///
14472	/// `VEX.128.F2.0F.WIG 7C /r`
14473	///
14474	/// `AVX`
14475	///
14476	/// `16/32/64-bit`
14477	VEX_Vhaddps_xmm_xmm_xmmm128 = 1810,
14478	/// `VHADDPS ymm1, ymm2, ymm3/m256`
14479	///
14480	/// `VEX.256.F2.0F.WIG 7C /r`
14481	///
14482	/// `AVX`
14483	///
14484	/// `16/32/64-bit`
14485	VEX_Vhaddps_ymm_ymm_ymmm256 = 1811,
14486	/// `HSUBPD xmm1, xmm2/m128`
14487	///
14488	/// `66 0F 7D /r`
14489	///
14490	/// `SSE3`
14491	///
14492	/// `16/32/64-bit`
14493	Hsubpd_xmm_xmmm128 = 1812,
14494	/// `VHSUBPD xmm1, xmm2, xmm3/m128`
14495	///
14496	/// `VEX.128.66.0F.WIG 7D /r`
14497	///
14498	/// `AVX`
14499	///
14500	/// `16/32/64-bit`
14501	VEX_Vhsubpd_xmm_xmm_xmmm128 = 1813,
14502	/// `VHSUBPD ymm1, ymm2, ymm3/m256`
14503	///
14504	/// `VEX.256.66.0F.WIG 7D /r`
14505	///
14506	/// `AVX`
14507	///
14508	/// `16/32/64-bit`
14509	VEX_Vhsubpd_ymm_ymm_ymmm256 = 1814,
14510	/// `HSUBPS xmm1, xmm2/m128`
14511	///
14512	/// `F2 0F 7D /r`
14513	///
14514	/// `SSE3`
14515	///
14516	/// `16/32/64-bit`
14517	Hsubps_xmm_xmmm128 = 1815,
14518	/// `VHSUBPS xmm1, xmm2, xmm3/m128`
14519	///
14520	/// `VEX.128.F2.0F.WIG 7D /r`
14521	///
14522	/// `AVX`
14523	///
14524	/// `16/32/64-bit`
14525	VEX_Vhsubps_xmm_xmm_xmmm128 = 1816,
14526	/// `VHSUBPS ymm1, ymm2, ymm3/m256`
14527	///
14528	/// `VEX.256.F2.0F.WIG 7D /r`
14529	///
14530	/// `AVX`
14531	///
14532	/// `16/32/64-bit`
14533	VEX_Vhsubps_ymm_ymm_ymmm256 = 1817,
14534	/// `MOVD r/m32, mm`
14535	///
14536	/// `NP 0F 7E /r`
14537	///
14538	/// `MMX`
14539	///
14540	/// `16/32/64-bit`
14541	Movd_rm32_mm = 1818,
14542	/// `MOVQ r/m64, mm`
14543	///
14544	/// `NP o64 0F 7E /r`
14545	///
14546	/// `MMX`
14547	///
14548	/// `64-bit`
14549	Movq_rm64_mm = 1819,
14550	/// `MOVD r/m32, xmm`
14551	///
14552	/// `66 0F 7E /r`
14553	///
14554	/// `SSE2`
14555	///
14556	/// `16/32/64-bit`
14557	Movd_rm32_xmm = 1820,
14558	/// `MOVQ r/m64, xmm`
14559	///
14560	/// `66 o64 0F 7E /r`
14561	///
14562	/// `SSE2`
14563	///
14564	/// `64-bit`
14565	Movq_rm64_xmm = 1821,
14566	/// `VMOVD r/m32, xmm1`
14567	///
14568	/// `VEX.128.66.0F.W0 7E /r`
14569	///
14570	/// `AVX`
14571	///
14572	/// `16/32/64-bit`
14573	VEX_Vmovd_rm32_xmm = 1822,
14574	/// `VMOVQ r/m64, xmm1`
14575	///
14576	/// `VEX.128.66.0F.W1 7E /r`
14577	///
14578	/// `AVX`
14579	///
14580	/// `64-bit`
14581	VEX_Vmovq_rm64_xmm = 1823,
14582	/// `VMOVD r/m32, xmm1`
14583	///
14584	/// `EVEX.128.66.0F.W0 7E /r`
14585	///
14586	/// `AVX512F`
14587	///
14588	/// `16/32/64-bit`
14589	EVEX_Vmovd_rm32_xmm = 1824,
14590	/// `VMOVQ r/m64, xmm1`
14591	///
14592	/// `EVEX.128.66.0F.W1 7E /r`
14593	///
14594	/// `AVX512F`
14595	///
14596	/// `64-bit`
14597	EVEX_Vmovq_rm64_xmm = 1825,
14598	/// `MOVQ xmm1, xmm2/m64`
14599	///
14600	/// `F3 0F 7E /r`
14601	///
14602	/// `SSE2`
14603	///
14604	/// `16/32/64-bit`
14605	Movq_xmm_xmmm64 = 1826,
14606	/// `VMOVQ xmm1, xmm2/m64`
14607	///
14608	/// `VEX.128.F3.0F.WIG 7E /r`
14609	///
14610	/// `AVX`
14611	///
14612	/// `16/32/64-bit`
14613	VEX_Vmovq_xmm_xmmm64 = 1827,
14614	/// `VMOVQ xmm1, xmm2/m64`
14615	///
14616	/// `EVEX.128.F3.0F.W1 7E /r`
14617	///
14618	/// `AVX512F`
14619	///
14620	/// `16/32/64-bit`
14621	EVEX_Vmovq_xmm_xmmm64 = 1828,
14622	/// `MOVQ mm/m64, mm`
14623	///
14624	/// `NP 0F 7F /r`
14625	///
14626	/// `MMX`
14627	///
14628	/// `16/32/64-bit`
14629	Movq_mmm64_mm = 1829,
14630	/// `MOVDQA xmm2/m128, xmm1`
14631	///
14632	/// `66 0F 7F /r`
14633	///
14634	/// `SSE2`
14635	///
14636	/// `16/32/64-bit`
14637	Movdqa_xmmm128_xmm = 1830,
14638	/// `VMOVDQA xmm2/m128, xmm1`
14639	///
14640	/// `VEX.128.66.0F.WIG 7F /r`
14641	///
14642	/// `AVX`
14643	///
14644	/// `16/32/64-bit`
14645	VEX_Vmovdqa_xmmm128_xmm = 1831,
14646	/// `VMOVDQA ymm2/m256, ymm1`
14647	///
14648	/// `VEX.256.66.0F.WIG 7F /r`
14649	///
14650	/// `AVX`
14651	///
14652	/// `16/32/64-bit`
14653	VEX_Vmovdqa_ymmm256_ymm = 1832,
14654	/// `VMOVDQA32 xmm2/m128 {k1}{z}, xmm1`
14655	///
14656	/// `EVEX.128.66.0F.W0 7F /r`
14657	///
14658	/// `AVX512VL and AVX512F`
14659	///
14660	/// `16/32/64-bit`
14661	EVEX_Vmovdqa32_xmmm128_k1z_xmm = 1833,
14662	/// `VMOVDQA32 ymm2/m256 {k1}{z}, ymm1`
14663	///
14664	/// `EVEX.256.66.0F.W0 7F /r`
14665	///
14666	/// `AVX512VL and AVX512F`
14667	///
14668	/// `16/32/64-bit`
14669	EVEX_Vmovdqa32_ymmm256_k1z_ymm = 1834,
14670	/// `VMOVDQA32 zmm2/m512 {k1}{z}, zmm1`
14671	///
14672	/// `EVEX.512.66.0F.W0 7F /r`
14673	///
14674	/// `AVX512F`
14675	///
14676	/// `16/32/64-bit`
14677	EVEX_Vmovdqa32_zmmm512_k1z_zmm = 1835,
14678	/// `VMOVDQA64 xmm2/m128 {k1}{z}, xmm1`
14679	///
14680	/// `EVEX.128.66.0F.W1 7F /r`
14681	///
14682	/// `AVX512VL and AVX512F`
14683	///
14684	/// `16/32/64-bit`
14685	EVEX_Vmovdqa64_xmmm128_k1z_xmm = 1836,
14686	/// `VMOVDQA64 ymm2/m256 {k1}{z}, ymm1`
14687	///
14688	/// `EVEX.256.66.0F.W1 7F /r`
14689	///
14690	/// `AVX512VL and AVX512F`
14691	///
14692	/// `16/32/64-bit`
14693	EVEX_Vmovdqa64_ymmm256_k1z_ymm = 1837,
14694	/// `VMOVDQA64 zmm2/m512 {k1}{z}, zmm1`
14695	///
14696	/// `EVEX.512.66.0F.W1 7F /r`
14697	///
14698	/// `AVX512F`
14699	///
14700	/// `16/32/64-bit`
14701	EVEX_Vmovdqa64_zmmm512_k1z_zmm = 1838,
14702	/// `MOVDQU xmm2/m128, xmm1`
14703	///
14704	/// `F3 0F 7F /r`
14705	///
14706	/// `SSE2`
14707	///
14708	/// `16/32/64-bit`
14709	Movdqu_xmmm128_xmm = 1839,
14710	/// `VMOVDQU xmm2/m128, xmm1`
14711	///
14712	/// `VEX.128.F3.0F.WIG 7F /r`
14713	///
14714	/// `AVX`
14715	///
14716	/// `16/32/64-bit`
14717	VEX_Vmovdqu_xmmm128_xmm = 1840,
14718	/// `VMOVDQU ymm2/m256, ymm1`
14719	///
14720	/// `VEX.256.F3.0F.WIG 7F /r`
14721	///
14722	/// `AVX`
14723	///
14724	/// `16/32/64-bit`
14725	VEX_Vmovdqu_ymmm256_ymm = 1841,
14726	/// `VMOVDQU32 xmm2/m128 {k1}{z}, xmm1`
14727	///
14728	/// `EVEX.128.F3.0F.W0 7F /r`
14729	///
14730	/// `AVX512VL and AVX512F`
14731	///
14732	/// `16/32/64-bit`
14733	EVEX_Vmovdqu32_xmmm128_k1z_xmm = 1842,
14734	/// `VMOVDQU32 ymm2/m256 {k1}{z}, ymm1`
14735	///
14736	/// `EVEX.256.F3.0F.W0 7F /r`
14737	///
14738	/// `AVX512VL and AVX512F`
14739	///
14740	/// `16/32/64-bit`
14741	EVEX_Vmovdqu32_ymmm256_k1z_ymm = 1843,
14742	/// `VMOVDQU32 zmm2/m512 {k1}{z}, zmm1`
14743	///
14744	/// `EVEX.512.F3.0F.W0 7F /r`
14745	///
14746	/// `AVX512F`
14747	///
14748	/// `16/32/64-bit`
14749	EVEX_Vmovdqu32_zmmm512_k1z_zmm = 1844,
14750	/// `VMOVDQU64 xmm2/m128 {k1}{z}, xmm1`
14751	///
14752	/// `EVEX.128.F3.0F.W1 7F /r`
14753	///
14754	/// `AVX512VL and AVX512F`
14755	///
14756	/// `16/32/64-bit`
14757	EVEX_Vmovdqu64_xmmm128_k1z_xmm = 1845,
14758	/// `VMOVDQU64 ymm2/m256 {k1}{z}, ymm1`
14759	///
14760	/// `EVEX.256.F3.0F.W1 7F /r`
14761	///
14762	/// `AVX512VL and AVX512F`
14763	///
14764	/// `16/32/64-bit`
14765	EVEX_Vmovdqu64_ymmm256_k1z_ymm = 1846,
14766	/// `VMOVDQU64 zmm2/m512 {k1}{z}, zmm1`
14767	///
14768	/// `EVEX.512.F3.0F.W1 7F /r`
14769	///
14770	/// `AVX512F`
14771	///
14772	/// `16/32/64-bit`
14773	EVEX_Vmovdqu64_zmmm512_k1z_zmm = 1847,
14774	/// `VMOVDQU8 xmm2/m128 {k1}{z}, xmm1`
14775	///
14776	/// `EVEX.128.F2.0F.W0 7F /r`
14777	///
14778	/// `AVX512VL and AVX512BW`
14779	///
14780	/// `16/32/64-bit`
14781	EVEX_Vmovdqu8_xmmm128_k1z_xmm = 1848,
14782	/// `VMOVDQU8 ymm2/m256 {k1}{z}, ymm1`
14783	///
14784	/// `EVEX.256.F2.0F.W0 7F /r`
14785	///
14786	/// `AVX512VL and AVX512BW`
14787	///
14788	/// `16/32/64-bit`
14789	EVEX_Vmovdqu8_ymmm256_k1z_ymm = 1849,
14790	/// `VMOVDQU8 zmm2/m512 {k1}{z}, zmm1`
14791	///
14792	/// `EVEX.512.F2.0F.W0 7F /r`
14793	///
14794	/// `AVX512BW`
14795	///
14796	/// `16/32/64-bit`
14797	EVEX_Vmovdqu8_zmmm512_k1z_zmm = 1850,
14798	/// `VMOVDQU16 xmm2/m128 {k1}{z}, xmm1`
14799	///
14800	/// `EVEX.128.F2.0F.W1 7F /r`
14801	///
14802	/// `AVX512VL and AVX512BW`
14803	///
14804	/// `16/32/64-bit`
14805	EVEX_Vmovdqu16_xmmm128_k1z_xmm = 1851,
14806	/// `VMOVDQU16 ymm2/m256 {k1}{z}, ymm1`
14807	///
14808	/// `EVEX.256.F2.0F.W1 7F /r`
14809	///
14810	/// `AVX512VL and AVX512BW`
14811	///
14812	/// `16/32/64-bit`
14813	EVEX_Vmovdqu16_ymmm256_k1z_ymm = 1852,
14814	/// `VMOVDQU16 zmm2/m512 {k1}{z}, zmm1`
14815	///
14816	/// `EVEX.512.F2.0F.W1 7F /r`
14817	///
14818	/// `AVX512BW`
14819	///
14820	/// `16/32/64-bit`
14821	EVEX_Vmovdqu16_zmmm512_k1z_zmm = 1853,
14822	/// `JO rel16`
14823	///
14824	/// `o16 0F 80 cw`
14825	///
14826	/// `386+`
14827	///
14828	/// `16/32/64-bit`
14829	Jo_rel16 = 1854,
14830	/// `JO rel32`
14831	///
14832	/// `o32 0F 80 cd`
14833	///
14834	/// `386+`
14835	///
14836	/// `16/32-bit`
14837	Jo_rel32_32 = 1855,
14838	/// `JO rel32`
14839	///
14840	/// `o64 0F 80 cd`
14841	///
14842	/// `X64`
14843	///
14844	/// `64-bit`
14845	Jo_rel32_64 = 1856,
14846	/// `JNO rel16`
14847	///
14848	/// `o16 0F 81 cw`
14849	///
14850	/// `386+`
14851	///
14852	/// `16/32/64-bit`
14853	Jno_rel16 = 1857,
14854	/// `JNO rel32`
14855	///
14856	/// `o32 0F 81 cd`
14857	///
14858	/// `386+`
14859	///
14860	/// `16/32-bit`
14861	Jno_rel32_32 = 1858,
14862	/// `JNO rel32`
14863	///
14864	/// `o64 0F 81 cd`
14865	///
14866	/// `X64`
14867	///
14868	/// `64-bit`
14869	Jno_rel32_64 = 1859,
14870	/// `JB rel16`
14871	///
14872	/// `o16 0F 82 cw`
14873	///
14874	/// `386+`
14875	///
14876	/// `16/32/64-bit`
14877	Jb_rel16 = 1860,
14878	/// `JB rel32`
14879	///
14880	/// `o32 0F 82 cd`
14881	///
14882	/// `386+`
14883	///
14884	/// `16/32-bit`
14885	Jb_rel32_32 = 1861,
14886	/// `JB rel32`
14887	///
14888	/// `o64 0F 82 cd`
14889	///
14890	/// `X64`
14891	///
14892	/// `64-bit`
14893	Jb_rel32_64 = 1862,
14894	/// `JAE rel16`
14895	///
14896	/// `o16 0F 83 cw`
14897	///
14898	/// `386+`
14899	///
14900	/// `16/32/64-bit`
14901	Jae_rel16 = 1863,
14902	/// `JAE rel32`
14903	///
14904	/// `o32 0F 83 cd`
14905	///
14906	/// `386+`
14907	///
14908	/// `16/32-bit`
14909	Jae_rel32_32 = 1864,
14910	/// `JAE rel32`
14911	///
14912	/// `o64 0F 83 cd`
14913	///
14914	/// `X64`
14915	///
14916	/// `64-bit`
14917	Jae_rel32_64 = 1865,
14918	/// `JE rel16`
14919	///
14920	/// `o16 0F 84 cw`
14921	///
14922	/// `386+`
14923	///
14924	/// `16/32/64-bit`
14925	Je_rel16 = 1866,
14926	/// `JE rel32`
14927	///
14928	/// `o32 0F 84 cd`
14929	///
14930	/// `386+`
14931	///
14932	/// `16/32-bit`
14933	Je_rel32_32 = 1867,
14934	/// `JE rel32`
14935	///
14936	/// `o64 0F 84 cd`
14937	///
14938	/// `X64`
14939	///
14940	/// `64-bit`
14941	Je_rel32_64 = 1868,
14942	/// `JNE rel16`
14943	///
14944	/// `o16 0F 85 cw`
14945	///
14946	/// `386+`
14947	///
14948	/// `16/32/64-bit`
14949	Jne_rel16 = 1869,
14950	/// `JNE rel32`
14951	///
14952	/// `o32 0F 85 cd`
14953	///
14954	/// `386+`
14955	///
14956	/// `16/32-bit`
14957	Jne_rel32_32 = 1870,
14958	/// `JNE rel32`
14959	///
14960	/// `o64 0F 85 cd`
14961	///
14962	/// `X64`
14963	///
14964	/// `64-bit`
14965	Jne_rel32_64 = 1871,
14966	/// `JBE rel16`
14967	///
14968	/// `o16 0F 86 cw`
14969	///
14970	/// `386+`
14971	///
14972	/// `16/32/64-bit`
14973	Jbe_rel16 = 1872,
14974	/// `JBE rel32`
14975	///
14976	/// `o32 0F 86 cd`
14977	///
14978	/// `386+`
14979	///
14980	/// `16/32-bit`
14981	Jbe_rel32_32 = 1873,
14982	/// `JBE rel32`
14983	///
14984	/// `o64 0F 86 cd`
14985	///
14986	/// `X64`
14987	///
14988	/// `64-bit`
14989	Jbe_rel32_64 = 1874,
14990	/// `JA rel16`
14991	///
14992	/// `o16 0F 87 cw`
14993	///
14994	/// `386+`
14995	///
14996	/// `16/32/64-bit`
14997	Ja_rel16 = 1875,
14998	/// `JA rel32`
14999	///
15000	/// `o32 0F 87 cd`
15001	///
15002	/// `386+`
15003	///
15004	/// `16/32-bit`
15005	Ja_rel32_32 = 1876,
15006	/// `JA rel32`
15007	///
15008	/// `o64 0F 87 cd`
15009	///
15010	/// `X64`
15011	///
15012	/// `64-bit`
15013	Ja_rel32_64 = 1877,
15014	/// `JS rel16`
15015	///
15016	/// `o16 0F 88 cw`
15017	///
15018	/// `386+`
15019	///
15020	/// `16/32/64-bit`
15021	Js_rel16 = 1878,
15022	/// `JS rel32`
15023	///
15024	/// `o32 0F 88 cd`
15025	///
15026	/// `386+`
15027	///
15028	/// `16/32-bit`
15029	Js_rel32_32 = 1879,
15030	/// `JS rel32`
15031	///
15032	/// `o64 0F 88 cd`
15033	///
15034	/// `X64`
15035	///
15036	/// `64-bit`
15037	Js_rel32_64 = 1880,
15038	/// `JNS rel16`
15039	///
15040	/// `o16 0F 89 cw`
15041	///
15042	/// `386+`
15043	///
15044	/// `16/32/64-bit`
15045	Jns_rel16 = 1881,
15046	/// `JNS rel32`
15047	///
15048	/// `o32 0F 89 cd`
15049	///
15050	/// `386+`
15051	///
15052	/// `16/32-bit`
15053	Jns_rel32_32 = 1882,
15054	/// `JNS rel32`
15055	///
15056	/// `o64 0F 89 cd`
15057	///
15058	/// `X64`
15059	///
15060	/// `64-bit`
15061	Jns_rel32_64 = 1883,
15062	/// `JP rel16`
15063	///
15064	/// `o16 0F 8A cw`
15065	///
15066	/// `386+`
15067	///
15068	/// `16/32/64-bit`
15069	Jp_rel16 = 1884,
15070	/// `JP rel32`
15071	///
15072	/// `o32 0F 8A cd`
15073	///
15074	/// `386+`
15075	///
15076	/// `16/32-bit`
15077	Jp_rel32_32 = 1885,
15078	/// `JP rel32`
15079	///
15080	/// `o64 0F 8A cd`
15081	///
15082	/// `X64`
15083	///
15084	/// `64-bit`
15085	Jp_rel32_64 = 1886,
15086	/// `JNP rel16`
15087	///
15088	/// `o16 0F 8B cw`
15089	///
15090	/// `386+`
15091	///
15092	/// `16/32/64-bit`
15093	Jnp_rel16 = 1887,
15094	/// `JNP rel32`
15095	///
15096	/// `o32 0F 8B cd`
15097	///
15098	/// `386+`
15099	///
15100	/// `16/32-bit`
15101	Jnp_rel32_32 = 1888,
15102	/// `JNP rel32`
15103	///
15104	/// `o64 0F 8B cd`
15105	///
15106	/// `X64`
15107	///
15108	/// `64-bit`
15109	Jnp_rel32_64 = 1889,
15110	/// `JL rel16`
15111	///
15112	/// `o16 0F 8C cw`
15113	///
15114	/// `386+`
15115	///
15116	/// `16/32/64-bit`
15117	Jl_rel16 = 1890,
15118	/// `JL rel32`
15119	///
15120	/// `o32 0F 8C cd`
15121	///
15122	/// `386+`
15123	///
15124	/// `16/32-bit`
15125	Jl_rel32_32 = 1891,
15126	/// `JL rel32`
15127	///
15128	/// `o64 0F 8C cd`
15129	///
15130	/// `X64`
15131	///
15132	/// `64-bit`
15133	Jl_rel32_64 = 1892,
15134	/// `JGE rel16`
15135	///
15136	/// `o16 0F 8D cw`
15137	///
15138	/// `386+`
15139	///
15140	/// `16/32/64-bit`
15141	Jge_rel16 = 1893,
15142	/// `JGE rel32`
15143	///
15144	/// `o32 0F 8D cd`
15145	///
15146	/// `386+`
15147	///
15148	/// `16/32-bit`
15149	Jge_rel32_32 = 1894,
15150	/// `JGE rel32`
15151	///
15152	/// `o64 0F 8D cd`
15153	///
15154	/// `X64`
15155	///
15156	/// `64-bit`
15157	Jge_rel32_64 = 1895,
15158	/// `JLE rel16`
15159	///
15160	/// `o16 0F 8E cw`
15161	///
15162	/// `386+`
15163	///
15164	/// `16/32/64-bit`
15165	Jle_rel16 = 1896,
15166	/// `JLE rel32`
15167	///
15168	/// `o32 0F 8E cd`
15169	///
15170	/// `386+`
15171	///
15172	/// `16/32-bit`
15173	Jle_rel32_32 = 1897,
15174	/// `JLE rel32`
15175	///
15176	/// `o64 0F 8E cd`
15177	///
15178	/// `X64`
15179	///
15180	/// `64-bit`
15181	Jle_rel32_64 = 1898,
15182	/// `JG rel16`
15183	///
15184	/// `o16 0F 8F cw`
15185	///
15186	/// `386+`
15187	///
15188	/// `16/32/64-bit`
15189	Jg_rel16 = 1899,
15190	/// `JG rel32`
15191	///
15192	/// `o32 0F 8F cd`
15193	///
15194	/// `386+`
15195	///
15196	/// `16/32-bit`
15197	Jg_rel32_32 = 1900,
15198	/// `JG rel32`
15199	///
15200	/// `o64 0F 8F cd`
15201	///
15202	/// `X64`
15203	///
15204	/// `64-bit`
15205	Jg_rel32_64 = 1901,
15206	/// `SETO r/m8`
15207	///
15208	/// `0F 90 /r`
15209	///
15210	/// `386+`
15211	///
15212	/// `16/32/64-bit`
15213	Seto_rm8 = 1902,
15214	/// `SETNO r/m8`
15215	///
15216	/// `0F 91 /r`
15217	///
15218	/// `386+`
15219	///
15220	/// `16/32/64-bit`
15221	Setno_rm8 = 1903,
15222	/// `SETB r/m8`
15223	///
15224	/// `0F 92 /r`
15225	///
15226	/// `386+`
15227	///
15228	/// `16/32/64-bit`
15229	Setb_rm8 = 1904,
15230	/// `SETAE r/m8`
15231	///
15232	/// `0F 93 /r`
15233	///
15234	/// `386+`
15235	///
15236	/// `16/32/64-bit`
15237	Setae_rm8 = 1905,
15238	/// `SETE r/m8`
15239	///
15240	/// `0F 94 /r`
15241	///
15242	/// `386+`
15243	///
15244	/// `16/32/64-bit`
15245	Sete_rm8 = 1906,
15246	/// `SETNE r/m8`
15247	///
15248	/// `0F 95 /r`
15249	///
15250	/// `386+`
15251	///
15252	/// `16/32/64-bit`
15253	Setne_rm8 = 1907,
15254	/// `SETBE r/m8`
15255	///
15256	/// `0F 96 /r`
15257	///
15258	/// `386+`
15259	///
15260	/// `16/32/64-bit`
15261	Setbe_rm8 = 1908,
15262	/// `SETA r/m8`
15263	///
15264	/// `0F 97 /r`
15265	///
15266	/// `386+`
15267	///
15268	/// `16/32/64-bit`
15269	Seta_rm8 = 1909,
15270	/// `SETS r/m8`
15271	///
15272	/// `0F 98 /r`
15273	///
15274	/// `386+`
15275	///
15276	/// `16/32/64-bit`
15277	Sets_rm8 = 1910,
15278	/// `SETNS r/m8`
15279	///
15280	/// `0F 99 /r`
15281	///
15282	/// `386+`
15283	///
15284	/// `16/32/64-bit`
15285	Setns_rm8 = 1911,
15286	/// `SETP r/m8`
15287	///
15288	/// `0F 9A /r`
15289	///
15290	/// `386+`
15291	///
15292	/// `16/32/64-bit`
15293	Setp_rm8 = 1912,
15294	/// `SETNP r/m8`
15295	///
15296	/// `0F 9B /r`
15297	///
15298	/// `386+`
15299	///
15300	/// `16/32/64-bit`
15301	Setnp_rm8 = 1913,
15302	/// `SETL r/m8`
15303	///
15304	/// `0F 9C /r`
15305	///
15306	/// `386+`
15307	///
15308	/// `16/32/64-bit`
15309	Setl_rm8 = 1914,
15310	/// `SETGE r/m8`
15311	///
15312	/// `0F 9D /r`
15313	///
15314	/// `386+`
15315	///
15316	/// `16/32/64-bit`
15317	Setge_rm8 = 1915,
15318	/// `SETLE r/m8`
15319	///
15320	/// `0F 9E /r`
15321	///
15322	/// `386+`
15323	///
15324	/// `16/32/64-bit`
15325	Setle_rm8 = 1916,
15326	/// `SETG r/m8`
15327	///
15328	/// `0F 9F /r`
15329	///
15330	/// `386+`
15331	///
15332	/// `16/32/64-bit`
15333	Setg_rm8 = 1917,
15334	/// `KMOVW k1, k2/m16`
15335	///
15336	/// `VEX.L0.0F.W0 90 /r`
15337	///
15338	/// `AVX512F`
15339	///
15340	/// `16/32/64-bit`
15341	VEX_Kmovw_kr_km16 = 1918,
15342	/// `KMOVQ k1, k2/m64`
15343	///
15344	/// `VEX.L0.0F.W1 90 /r`
15345	///
15346	/// `AVX512BW`
15347	///
15348	/// `16/32/64-bit`
15349	VEX_Kmovq_kr_km64 = 1919,
15350	/// `KMOVB k1, k2/m8`
15351	///
15352	/// `VEX.L0.66.0F.W0 90 /r`
15353	///
15354	/// `AVX512DQ`
15355	///
15356	/// `16/32/64-bit`
15357	VEX_Kmovb_kr_km8 = 1920,
15358	/// `KMOVD k1, k2/m32`
15359	///
15360	/// `VEX.L0.66.0F.W1 90 /r`
15361	///
15362	/// `AVX512BW`
15363	///
15364	/// `16/32/64-bit`
15365	VEX_Kmovd_kr_km32 = 1921,
15366	/// `KMOVW m16, k1`
15367	///
15368	/// `VEX.L0.0F.W0 91 /r`
15369	///
15370	/// `AVX512F`
15371	///
15372	/// `16/32/64-bit`
15373	VEX_Kmovw_m16_kr = 1922,
15374	/// `KMOVQ m64, k1`
15375	///
15376	/// `VEX.L0.0F.W1 91 /r`
15377	///
15378	/// `AVX512BW`
15379	///
15380	/// `16/32/64-bit`
15381	VEX_Kmovq_m64_kr = 1923,
15382	/// `KMOVB m8, k1`
15383	///
15384	/// `VEX.L0.66.0F.W0 91 /r`
15385	///
15386	/// `AVX512DQ`
15387	///
15388	/// `16/32/64-bit`
15389	VEX_Kmovb_m8_kr = 1924,
15390	/// `KMOVD m32, k1`
15391	///
15392	/// `VEX.L0.66.0F.W1 91 /r`
15393	///
15394	/// `AVX512BW`
15395	///
15396	/// `16/32/64-bit`
15397	VEX_Kmovd_m32_kr = 1925,
15398	/// `KMOVW k1, r32`
15399	///
15400	/// `VEX.L0.0F.W0 92 /r`
15401	///
15402	/// `AVX512F`
15403	///
15404	/// `16/32/64-bit`
15405	VEX_Kmovw_kr_r32 = 1926,
15406	/// `KMOVB k1, r32`
15407	///
15408	/// `VEX.L0.66.0F.W0 92 /r`
15409	///
15410	/// `AVX512DQ`
15411	///
15412	/// `16/32/64-bit`
15413	VEX_Kmovb_kr_r32 = 1927,
15414	/// `KMOVD k1, r32`
15415	///
15416	/// `VEX.L0.F2.0F.W0 92 /r`
15417	///
15418	/// `AVX512BW`
15419	///
15420	/// `16/32/64-bit`
15421	VEX_Kmovd_kr_r32 = 1928,
15422	/// `KMOVQ k1, r64`
15423	///
15424	/// `VEX.L0.F2.0F.W1 92 /r`
15425	///
15426	/// `AVX512BW`
15427	///
15428	/// `64-bit`
15429	VEX_Kmovq_kr_r64 = 1929,
15430	/// `KMOVW r32, k1`
15431	///
15432	/// `VEX.L0.0F.W0 93 /r`
15433	///
15434	/// `AVX512F`
15435	///
15436	/// `16/32/64-bit`
15437	VEX_Kmovw_r32_kr = 1930,
15438	/// `KMOVB r32, k1`
15439	///
15440	/// `VEX.L0.66.0F.W0 93 /r`
15441	///
15442	/// `AVX512DQ`
15443	///
15444	/// `16/32/64-bit`
15445	VEX_Kmovb_r32_kr = 1931,
15446	/// `KMOVD r32, k1`
15447	///
15448	/// `VEX.L0.F2.0F.W0 93 /r`
15449	///
15450	/// `AVX512BW`
15451	///
15452	/// `16/32/64-bit`
15453	VEX_Kmovd_r32_kr = 1932,
15454	/// `KMOVQ r64, k1`
15455	///
15456	/// `VEX.L0.F2.0F.W1 93 /r`
15457	///
15458	/// `AVX512BW`
15459	///
15460	/// `64-bit`
15461	VEX_Kmovq_r64_kr = 1933,
15462	/// `KORTESTW k1, k2`
15463	///
15464	/// `VEX.L0.0F.W0 98 /r`
15465	///
15466	/// `AVX512F`
15467	///
15468	/// `16/32/64-bit`
15469	VEX_Kortestw_kr_kr = 1934,
15470	/// `KORTESTQ k1, k2`
15471	///
15472	/// `VEX.L0.0F.W1 98 /r`
15473	///
15474	/// `AVX512BW`
15475	///
15476	/// `16/32/64-bit`
15477	VEX_Kortestq_kr_kr = 1935,
15478	/// `KORTESTB k1, k2`
15479	///
15480	/// `VEX.L0.66.0F.W0 98 /r`
15481	///
15482	/// `AVX512DQ`
15483	///
15484	/// `16/32/64-bit`
15485	VEX_Kortestb_kr_kr = 1936,
15486	/// `KORTESTD k1, k2`
15487	///
15488	/// `VEX.L0.66.0F.W1 98 /r`
15489	///
15490	/// `AVX512BW`
15491	///
15492	/// `16/32/64-bit`
15493	VEX_Kortestd_kr_kr = 1937,
15494	/// `KTESTW k1, k2`
15495	///
15496	/// `VEX.L0.0F.W0 99 /r`
15497	///
15498	/// `AVX512DQ`
15499	///
15500	/// `16/32/64-bit`
15501	VEX_Ktestw_kr_kr = 1938,
15502	/// `KTESTQ k1, k2`
15503	///
15504	/// `VEX.L0.0F.W1 99 /r`
15505	///
15506	/// `AVX512BW`
15507	///
15508	/// `16/32/64-bit`
15509	VEX_Ktestq_kr_kr = 1939,
15510	/// `KTESTB k1, k2`
15511	///
15512	/// `VEX.L0.66.0F.W0 99 /r`
15513	///
15514	/// `AVX512DQ`
15515	///
15516	/// `16/32/64-bit`
15517	VEX_Ktestb_kr_kr = 1940,
15518	/// `KTESTD k1, k2`
15519	///
15520	/// `VEX.L0.66.0F.W1 99 /r`
15521	///
15522	/// `AVX512BW`
15523	///
15524	/// `16/32/64-bit`
15525	VEX_Ktestd_kr_kr = 1941,
15526	/// `PUSH FS`
15527	///
15528	/// `o16 0F A0`
15529	///
15530	/// `386+`
15531	///
15532	/// `16/32/64-bit`
15533	Pushw_FS = 1942,
15534	/// `PUSH FS`
15535	///
15536	/// `o32 0F A0`
15537	///
15538	/// `386+`
15539	///
15540	/// `16/32-bit`
15541	Pushd_FS = 1943,
15542	/// `PUSH FS`
15543	///
15544	/// `o64 0F A0`
15545	///
15546	/// `X64`
15547	///
15548	/// `64-bit`
15549	Pushq_FS = 1944,
15550	/// `POP FS`
15551	///
15552	/// `o16 0F A1`
15553	///
15554	/// `386+`
15555	///
15556	/// `16/32/64-bit`
15557	Popw_FS = 1945,
15558	/// `POP FS`
15559	///
15560	/// `o32 0F A1`
15561	///
15562	/// `386+`
15563	///
15564	/// `16/32-bit`
15565	Popd_FS = 1946,
15566	/// `POP FS`
15567	///
15568	/// `o64 0F A1`
15569	///
15570	/// `X64`
15571	///
15572	/// `64-bit`
15573	Popq_FS = 1947,
15574	/// `CPUID`
15575	///
15576	/// `0F A2`
15577	///
15578	/// `CPUID`
15579	///
15580	/// `16/32/64-bit`
15581	Cpuid = 1948,
15582	/// `BT r/m16, r16`
15583	///
15584	/// `o16 0F A3 /r`
15585	///
15586	/// `386+`
15587	///
15588	/// `16/32/64-bit`
15589	Bt_rm16_r16 = 1949,
15590	/// `BT r/m32, r32`
15591	///
15592	/// `o32 0F A3 /r`
15593	///
15594	/// `386+`
15595	///
15596	/// `16/32/64-bit`
15597	Bt_rm32_r32 = 1950,
15598	/// `BT r/m64, r64`
15599	///
15600	/// `o64 0F A3 /r`
15601	///
15602	/// `X64`
15603	///
15604	/// `64-bit`
15605	Bt_rm64_r64 = 1951,
15606	/// `SHLD r/m16, r16, imm8`
15607	///
15608	/// `o16 0F A4 /r ib`
15609	///
15610	/// `386+`
15611	///
15612	/// `16/32/64-bit`
15613	Shld_rm16_r16_imm8 = 1952,
15614	/// `SHLD r/m32, r32, imm8`
15615	///
15616	/// `o32 0F A4 /r ib`
15617	///
15618	/// `386+`
15619	///
15620	/// `16/32/64-bit`
15621	Shld_rm32_r32_imm8 = 1953,
15622	/// `SHLD r/m64, r64, imm8`
15623	///
15624	/// `o64 0F A4 /r ib`
15625	///
15626	/// `X64`
15627	///
15628	/// `64-bit`
15629	Shld_rm64_r64_imm8 = 1954,
15630	/// `SHLD r/m16, r16, CL`
15631	///
15632	/// `o16 0F A5 /r`
15633	///
15634	/// `386+`
15635	///
15636	/// `16/32/64-bit`
15637	Shld_rm16_r16_CL = 1955,
15638	/// `SHLD r/m32, r32, CL`
15639	///
15640	/// `o32 0F A5 /r`
15641	///
15642	/// `386+`
15643	///
15644	/// `16/32/64-bit`
15645	Shld_rm32_r32_CL = 1956,
15646	/// `SHLD r/m64, r64, CL`
15647	///
15648	/// `o64 0F A5 /r`
15649	///
15650	/// `X64`
15651	///
15652	/// `64-bit`
15653	Shld_rm64_r64_CL = 1957,
15654	/// `MONTMUL`
15655	///
15656	/// `a16 F3 0F A6 C0`
15657	///
15658	/// `PADLOCK_PMM`
15659	///
15660	/// `16/32-bit`
15661	Montmul_16 = 1958,
15662	/// `MONTMUL`
15663	///
15664	/// `a32 F3 0F A6 C0`
15665	///
15666	/// `PADLOCK_PMM`
15667	///
15668	/// `16/32/64-bit`
15669	Montmul_32 = 1959,
15670	/// `MONTMUL`
15671	///
15672	/// `a64 F3 0F A6 C0`
15673	///
15674	/// `PADLOCK_PMM`
15675	///
15676	/// `64-bit`
15677	Montmul_64 = 1960,
15678	/// `XSHA1`
15679	///
15680	/// `a16 F3 0F A6 C8`
15681	///
15682	/// `PADLOCK_PHE`
15683	///
15684	/// `16/32-bit`
15685	Xsha1_16 = 1961,
15686	/// `XSHA1`
15687	///
15688	/// `a32 F3 0F A6 C8`
15689	///
15690	/// `PADLOCK_PHE`
15691	///
15692	/// `16/32/64-bit`
15693	Xsha1_32 = 1962,
15694	/// `XSHA1`
15695	///
15696	/// `a64 F3 0F A6 C8`
15697	///
15698	/// `PADLOCK_PHE`
15699	///
15700	/// `64-bit`
15701	Xsha1_64 = 1963,
15702	/// `XSHA256`
15703	///
15704	/// `a16 F3 0F A6 D0`
15705	///
15706	/// `PADLOCK_PHE`
15707	///
15708	/// `16/32-bit`
15709	Xsha256_16 = 1964,
15710	/// `XSHA256`
15711	///
15712	/// `a32 F3 0F A6 D0`
15713	///
15714	/// `PADLOCK_PHE`
15715	///
15716	/// `16/32/64-bit`
15717	Xsha256_32 = 1965,
15718	/// `XSHA256`
15719	///
15720	/// `a64 F3 0F A6 D0`
15721	///
15722	/// `PADLOCK_PHE`
15723	///
15724	/// `64-bit`
15725	Xsha256_64 = 1966,
15726	/// `XBTS r16, r/m16`
15727	///
15728	/// `o16 0F A6 /r`
15729	///
15730	/// `386 A0`
15731	///
15732	/// `16/32-bit`
15733	Xbts_r16_rm16 = 1967,
15734	/// `XBTS r32, r/m32`
15735	///
15736	/// `o32 0F A6 /r`
15737	///
15738	/// `386 A0`
15739	///
15740	/// `16/32-bit`
15741	Xbts_r32_rm32 = 1968,
15742	/// `XSTORE`
15743	///
15744	/// `a16 0F A7 C0`
15745	///
15746	/// `PADLOCK_RNG`
15747	///
15748	/// `16/32-bit`
15749	Xstore_16 = 1969,
15750	/// `XSTORE`
15751	///
15752	/// `a32 0F A7 C0`
15753	///
15754	/// `PADLOCK_RNG`
15755	///
15756	/// `16/32/64-bit`
15757	Xstore_32 = 1970,
15758	/// `XSTORE`
15759	///
15760	/// `a64 0F A7 C0`
15761	///
15762	/// `PADLOCK_RNG`
15763	///
15764	/// `64-bit`
15765	Xstore_64 = 1971,
15766	/// `XCRYPTECB`
15767	///
15768	/// `a16 F3 0F A7 C8`
15769	///
15770	/// `PADLOCK_ACE`
15771	///
15772	/// `16/32-bit`
15773	Xcryptecb_16 = 1972,
15774	/// `XCRYPTECB`
15775	///
15776	/// `a32 F3 0F A7 C8`
15777	///
15778	/// `PADLOCK_ACE`
15779	///
15780	/// `16/32/64-bit`
15781	Xcryptecb_32 = 1973,
15782	/// `XCRYPTECB`
15783	///
15784	/// `a64 F3 0F A7 C8`
15785	///
15786	/// `PADLOCK_ACE`
15787	///
15788	/// `64-bit`
15789	Xcryptecb_64 = 1974,
15790	/// `XCRYPTCBC`
15791	///
15792	/// `a16 F3 0F A7 D0`
15793	///
15794	/// `PADLOCK_ACE`
15795	///
15796	/// `16/32-bit`
15797	Xcryptcbc_16 = 1975,
15798	/// `XCRYPTCBC`
15799	///
15800	/// `a32 F3 0F A7 D0`
15801	///
15802	/// `PADLOCK_ACE`
15803	///
15804	/// `16/32/64-bit`
15805	Xcryptcbc_32 = 1976,
15806	/// `XCRYPTCBC`
15807	///
15808	/// `a64 F3 0F A7 D0`
15809	///
15810	/// `PADLOCK_ACE`
15811	///
15812	/// `64-bit`
15813	Xcryptcbc_64 = 1977,
15814	/// `XCRYPTCTR`
15815	///
15816	/// `a16 F3 0F A7 D8`
15817	///
15818	/// `PADLOCK_ACE`
15819	///
15820	/// `16/32-bit`
15821	Xcryptctr_16 = 1978,
15822	/// `XCRYPTCTR`
15823	///
15824	/// `a32 F3 0F A7 D8`
15825	///
15826	/// `PADLOCK_ACE`
15827	///
15828	/// `16/32/64-bit`
15829	Xcryptctr_32 = 1979,
15830	/// `XCRYPTCTR`
15831	///
15832	/// `a64 F3 0F A7 D8`
15833	///
15834	/// `PADLOCK_ACE`
15835	///
15836	/// `64-bit`
15837	Xcryptctr_64 = 1980,
15838	/// `XCRYPTCFB`
15839	///
15840	/// `a16 F3 0F A7 E0`
15841	///
15842	/// `PADLOCK_ACE`
15843	///
15844	/// `16/32-bit`
15845	Xcryptcfb_16 = 1981,
15846	/// `XCRYPTCFB`
15847	///
15848	/// `a32 F3 0F A7 E0`
15849	///
15850	/// `PADLOCK_ACE`
15851	///
15852	/// `16/32/64-bit`
15853	Xcryptcfb_32 = 1982,
15854	/// `XCRYPTCFB`
15855	///
15856	/// `a64 F3 0F A7 E0`
15857	///
15858	/// `PADLOCK_ACE`
15859	///
15860	/// `64-bit`
15861	Xcryptcfb_64 = 1983,
15862	/// `XCRYPTOFB`
15863	///
15864	/// `a16 F3 0F A7 E8`
15865	///
15866	/// `PADLOCK_ACE`
15867	///
15868	/// `16/32-bit`
15869	Xcryptofb_16 = 1984,
15870	/// `XCRYPTOFB`
15871	///
15872	/// `a32 F3 0F A7 E8`
15873	///
15874	/// `PADLOCK_ACE`
15875	///
15876	/// `16/32/64-bit`
15877	Xcryptofb_32 = 1985,
15878	/// `XCRYPTOFB`
15879	///
15880	/// `a64 F3 0F A7 E8`
15881	///
15882	/// `PADLOCK_ACE`
15883	///
15884	/// `64-bit`
15885	Xcryptofb_64 = 1986,
15886	/// `IBTS r/m16, r16`
15887	///
15888	/// `o16 0F A7 /r`
15889	///
15890	/// `386 A0`
15891	///
15892	/// `16/32-bit`
15893	Ibts_rm16_r16 = 1987,
15894	/// `IBTS r/m32, r32`
15895	///
15896	/// `o32 0F A7 /r`
15897	///
15898	/// `386 A0`
15899	///
15900	/// `16/32-bit`
15901	Ibts_rm32_r32 = 1988,
15902	/// `CMPXCHG r/m8, r8`
15903	///
15904	/// `0F A6 /r`
15905	///
15906	/// `486 A`
15907	///
15908	/// `16/32-bit`
15909	Cmpxchg486_rm8_r8 = 1989,
15910	/// `CMPXCHG r/m16, r16`
15911	///
15912	/// `o16 0F A7 /r`
15913	///
15914	/// `486 A`
15915	///
15916	/// `16/32-bit`
15917	Cmpxchg486_rm16_r16 = 1990,
15918	/// `CMPXCHG r/m32, r32`
15919	///
15920	/// `o32 0F A7 /r`
15921	///
15922	/// `486 A`
15923	///
15924	/// `16/32-bit`
15925	Cmpxchg486_rm32_r32 = 1991,
15926	/// `PUSH GS`
15927	///
15928	/// `o16 0F A8`
15929	///
15930	/// `386+`
15931	///
15932	/// `16/32/64-bit`
15933	Pushw_GS = 1992,
15934	/// `PUSH GS`
15935	///
15936	/// `o32 0F A8`
15937	///
15938	/// `386+`
15939	///
15940	/// `16/32-bit`
15941	Pushd_GS = 1993,
15942	/// `PUSH GS`
15943	///
15944	/// `o64 0F A8`
15945	///
15946	/// `X64`
15947	///
15948	/// `64-bit`
15949	Pushq_GS = 1994,
15950	/// `POP GS`
15951	///
15952	/// `o16 0F A9`
15953	///
15954	/// `386+`
15955	///
15956	/// `16/32/64-bit`
15957	Popw_GS = 1995,
15958	/// `POP GS`
15959	///
15960	/// `o32 0F A9`
15961	///
15962	/// `386+`
15963	///
15964	/// `16/32-bit`
15965	Popd_GS = 1996,
15966	/// `POP GS`
15967	///
15968	/// `o64 0F A9`
15969	///
15970	/// `X64`
15971	///
15972	/// `64-bit`
15973	Popq_GS = 1997,
15974	/// `RSM`
15975	///
15976	/// `0F AA`
15977	///
15978	/// `386+`
15979	///
15980	/// `16/32/64-bit`
15981	Rsm = 1998,
15982	/// `BTS r/m16, r16`
15983	///
15984	/// `o16 0F AB /r`
15985	///
15986	/// `386+`
15987	///
15988	/// `16/32/64-bit`
15989	Bts_rm16_r16 = 1999,
15990	/// `BTS r/m32, r32`
15991	///
15992	/// `o32 0F AB /r`
15993	///
15994	/// `386+`
15995	///
15996	/// `16/32/64-bit`
15997	Bts_rm32_r32 = 2000,
15998	/// `BTS r/m64, r64`
15999	///
16000	/// `o64 0F AB /r`
16001	///
16002	/// `X64`
16003	///
16004	/// `64-bit`
16005	Bts_rm64_r64 = 2001,
16006	/// `SHRD r/m16, r16, imm8`
16007	///
16008	/// `o16 0F AC /r ib`
16009	///
16010	/// `386+`
16011	///
16012	/// `16/32/64-bit`
16013	Shrd_rm16_r16_imm8 = 2002,
16014	/// `SHRD r/m32, r32, imm8`
16015	///
16016	/// `o32 0F AC /r ib`
16017	///
16018	/// `386+`
16019	///
16020	/// `16/32/64-bit`
16021	Shrd_rm32_r32_imm8 = 2003,
16022	/// `SHRD r/m64, r64, imm8`
16023	///
16024	/// `o64 0F AC /r ib`
16025	///
16026	/// `X64`
16027	///
16028	/// `64-bit`
16029	Shrd_rm64_r64_imm8 = 2004,
16030	/// `SHRD r/m16, r16, CL`
16031	///
16032	/// `o16 0F AD /r`
16033	///
16034	/// `386+`
16035	///
16036	/// `16/32/64-bit`
16037	Shrd_rm16_r16_CL = 2005,
16038	/// `SHRD r/m32, r32, CL`
16039	///
16040	/// `o32 0F AD /r`
16041	///
16042	/// `386+`
16043	///
16044	/// `16/32/64-bit`
16045	Shrd_rm32_r32_CL = 2006,
16046	/// `SHRD r/m64, r64, CL`
16047	///
16048	/// `o64 0F AD /r`
16049	///
16050	/// `X64`
16051	///
16052	/// `64-bit`
16053	Shrd_rm64_r64_CL = 2007,
16054	/// `FXSAVE m512byte`
16055	///
16056	/// `NP 0F AE /0`
16057	///
16058	/// `FXSR`
16059	///
16060	/// `16/32/64-bit`
16061	Fxsave_m512byte = 2008,
16062	/// `FXSAVE64 m512byte`
16063	///
16064	/// `NP o64 0F AE /0`
16065	///
16066	/// `FXSR`
16067	///
16068	/// `64-bit`
16069	Fxsave64_m512byte = 2009,
16070	/// `RDFSBASE r32`
16071	///
16072	/// `F3 0F AE /0`
16073	///
16074	/// `FSGSBASE`
16075	///
16076	/// `64-bit`
16077	Rdfsbase_r32 = 2010,
16078	/// `RDFSBASE r64`
16079	///
16080	/// `F3 o64 0F AE /0`
16081	///
16082	/// `FSGSBASE`
16083	///
16084	/// `64-bit`
16085	Rdfsbase_r64 = 2011,
16086	/// `FXRSTOR m512byte`
16087	///
16088	/// `NP 0F AE /1`
16089	///
16090	/// `FXSR`
16091	///
16092	/// `16/32/64-bit`
16093	Fxrstor_m512byte = 2012,
16094	/// `FXRSTOR64 m512byte`
16095	///
16096	/// `NP o64 0F AE /1`
16097	///
16098	/// `FXSR`
16099	///
16100	/// `64-bit`
16101	Fxrstor64_m512byte = 2013,
16102	/// `RDGSBASE r32`
16103	///
16104	/// `F3 0F AE /1`
16105	///
16106	/// `FSGSBASE`
16107	///
16108	/// `64-bit`
16109	Rdgsbase_r32 = 2014,
16110	/// `RDGSBASE r64`
16111	///
16112	/// `F3 o64 0F AE /1`
16113	///
16114	/// `FSGSBASE`
16115	///
16116	/// `64-bit`
16117	Rdgsbase_r64 = 2015,
16118	/// `LDMXCSR m32`
16119	///
16120	/// `NP 0F AE /2`
16121	///
16122	/// `SSE`
16123	///
16124	/// `16/32/64-bit`
16125	Ldmxcsr_m32 = 2016,
16126	/// `WRFSBASE r32`
16127	///
16128	/// `F3 0F AE /2`
16129	///
16130	/// `FSGSBASE`
16131	///
16132	/// `64-bit`
16133	Wrfsbase_r32 = 2017,
16134	/// `WRFSBASE r64`
16135	///
16136	/// `F3 o64 0F AE /2`
16137	///
16138	/// `FSGSBASE`
16139	///
16140	/// `64-bit`
16141	Wrfsbase_r64 = 2018,
16142	/// `VLDMXCSR m32`
16143	///
16144	/// `VEX.LZ.0F.WIG AE /2`
16145	///
16146	/// `AVX`
16147	///
16148	/// `16/32/64-bit`
16149	VEX_Vldmxcsr_m32 = 2019,
16150	/// `STMXCSR m32`
16151	///
16152	/// `NP 0F AE /3`
16153	///
16154	/// `SSE`
16155	///
16156	/// `16/32/64-bit`
16157	Stmxcsr_m32 = 2020,
16158	/// `WRGSBASE r32`
16159	///
16160	/// `F3 0F AE /3`
16161	///
16162	/// `FSGSBASE`
16163	///
16164	/// `64-bit`
16165	Wrgsbase_r32 = 2021,
16166	/// `WRGSBASE r64`
16167	///
16168	/// `F3 o64 0F AE /3`
16169	///
16170	/// `FSGSBASE`
16171	///
16172	/// `64-bit`
16173	Wrgsbase_r64 = 2022,
16174	/// `VSTMXCSR m32`
16175	///
16176	/// `VEX.LZ.0F.WIG AE /3`
16177	///
16178	/// `AVX`
16179	///
16180	/// `16/32/64-bit`
16181	VEX_Vstmxcsr_m32 = 2023,
16182	/// `XSAVE mem`
16183	///
16184	/// `NP 0F AE /4`
16185	///
16186	/// `XSAVE`
16187	///
16188	/// `16/32/64-bit`
16189	Xsave_mem = 2024,
16190	/// `XSAVE64 mem`
16191	///
16192	/// `NP o64 0F AE /4`
16193	///
16194	/// `XSAVE`
16195	///
16196	/// `64-bit`
16197	Xsave64_mem = 2025,
16198	/// `PTWRITE r/m32`
16199	///
16200	/// `F3 0F AE /4`
16201	///
16202	/// `PTWRITE`
16203	///
16204	/// `16/32/64-bit`
16205	Ptwrite_rm32 = 2026,
16206	/// `PTWRITE r/m64`
16207	///
16208	/// `F3 o64 0F AE /4`
16209	///
16210	/// `PTWRITE`
16211	///
16212	/// `64-bit`
16213	Ptwrite_rm64 = 2027,
16214	/// `XRSTOR mem`
16215	///
16216	/// `NP 0F AE /5`
16217	///
16218	/// `XSAVE`
16219	///
16220	/// `16/32/64-bit`
16221	Xrstor_mem = 2028,
16222	/// `XRSTOR64 mem`
16223	///
16224	/// `NP o64 0F AE /5`
16225	///
16226	/// `XSAVE`
16227	///
16228	/// `64-bit`
16229	Xrstor64_mem = 2029,
16230	/// `INCSSPD r32`
16231	///
16232	/// `F3 0F AE /5`
16233	///
16234	/// `CET_SS`
16235	///
16236	/// `16/32/64-bit`
16237	Incsspd_r32 = 2030,
16238	/// `INCSSPQ r64`
16239	///
16240	/// `F3 o64 0F AE /5`
16241	///
16242	/// `CET_SS`
16243	///
16244	/// `64-bit`
16245	Incsspq_r64 = 2031,
16246	/// `XSAVEOPT mem`
16247	///
16248	/// `NP 0F AE /6`
16249	///
16250	/// `XSAVEOPT`
16251	///
16252	/// `16/32/64-bit`
16253	Xsaveopt_mem = 2032,
16254	/// `XSAVEOPT64 mem`
16255	///
16256	/// `NP o64 0F AE /6`
16257	///
16258	/// `XSAVEOPT`
16259	///
16260	/// `64-bit`
16261	Xsaveopt64_mem = 2033,
16262	/// `CLWB m8`
16263	///
16264	/// `66 0F AE /6`
16265	///
16266	/// `CLWB`
16267	///
16268	/// `16/32/64-bit`
16269	Clwb_m8 = 2034,
16270	/// `TPAUSE r32, <edx>, <eax>`
16271	///
16272	/// `66 0F AE /6`
16273	///
16274	/// `WAITPKG`
16275	///
16276	/// `16/32/64-bit`
16277	Tpause_r32 = 2035,
16278	/// `TPAUSE r64, <edx>, <eax>`
16279	///
16280	/// `66 o64 0F AE /6`
16281	///
16282	/// `WAITPKG`
16283	///
16284	/// `64-bit`
16285	Tpause_r64 = 2036,
16286	/// `CLRSSBSY m64`
16287	///
16288	/// `F3 0F AE /6`
16289	///
16290	/// `CET_SS`
16291	///
16292	/// `16/32/64-bit`
16293	Clrssbsy_m64 = 2037,
16294	/// `UMONITOR r16`
16295	///
16296	/// `a16 F3 0F AE /6`
16297	///
16298	/// `WAITPKG`
16299	///
16300	/// `16/32-bit`
16301	Umonitor_r16 = 2038,
16302	/// `UMONITOR r32`
16303	///
16304	/// `a32 F3 0F AE /6`
16305	///
16306	/// `WAITPKG`
16307	///
16308	/// `16/32/64-bit`
16309	Umonitor_r32 = 2039,
16310	/// `UMONITOR r64`
16311	///
16312	/// `a64 F3 0F AE /6`
16313	///
16314	/// `WAITPKG`
16315	///
16316	/// `64-bit`
16317	Umonitor_r64 = 2040,
16318	/// `UMWAIT r32, <edx>, <eax>`
16319	///
16320	/// `F2 0F AE /6`
16321	///
16322	/// `WAITPKG`
16323	///
16324	/// `16/32/64-bit`
16325	Umwait_r32 = 2041,
16326	/// `UMWAIT r64, <edx>, <eax>`
16327	///
16328	/// `F2 o64 0F AE /6`
16329	///
16330	/// `WAITPKG`
16331	///
16332	/// `64-bit`
16333	Umwait_r64 = 2042,
16334	/// `CLFLUSH m8`
16335	///
16336	/// `NP 0F AE /7`
16337	///
16338	/// `CLFSH`
16339	///
16340	/// `16/32/64-bit`
16341	Clflush_m8 = 2043,
16342	/// `CLFLUSHOPT m8`
16343	///
16344	/// `66 0F AE /7`
16345	///
16346	/// `CLFLUSHOPT`
16347	///
16348	/// `16/32/64-bit`
16349	Clflushopt_m8 = 2044,
16350	/// `LFENCE`
16351	///
16352	/// `NP 0F AE E8`
16353	///
16354	/// `SSE2`
16355	///
16356	/// `16/32/64-bit`
16357	Lfence = 2045,
16358	/// `LFENCE`
16359	///
16360	/// `NP 0F AE E9`
16361	///
16362	/// `SSE2`
16363	///
16364	/// `16/32/64-bit`
16365	Lfence_E9 = 2046,
16366	/// `LFENCE`
16367	///
16368	/// `NP 0F AE EA`
16369	///
16370	/// `SSE2`
16371	///
16372	/// `16/32/64-bit`
16373	Lfence_EA = 2047,
16374	/// `LFENCE`
16375	///
16376	/// `NP 0F AE EB`
16377	///
16378	/// `SSE2`
16379	///
16380	/// `16/32/64-bit`
16381	Lfence_EB = 2048,
16382	/// `LFENCE`
16383	///
16384	/// `NP 0F AE EC`
16385	///
16386	/// `SSE2`
16387	///
16388	/// `16/32/64-bit`
16389	Lfence_EC = 2049,
16390	/// `LFENCE`
16391	///
16392	/// `NP 0F AE ED`
16393	///
16394	/// `SSE2`
16395	///
16396	/// `16/32/64-bit`
16397	Lfence_ED = 2050,
16398	/// `LFENCE`
16399	///
16400	/// `NP 0F AE EE`
16401	///
16402	/// `SSE2`
16403	///
16404	/// `16/32/64-bit`
16405	Lfence_EE = 2051,
16406	/// `LFENCE`
16407	///
16408	/// `NP 0F AE EF`
16409	///
16410	/// `SSE2`
16411	///
16412	/// `16/32/64-bit`
16413	Lfence_EF = 2052,
16414	/// `MFENCE`
16415	///
16416	/// `NP 0F AE F0`
16417	///
16418	/// `SSE2`
16419	///
16420	/// `16/32/64-bit`
16421	Mfence = 2053,
16422	/// `MFENCE`
16423	///
16424	/// `NP 0F AE F1`
16425	///
16426	/// `SSE2`
16427	///
16428	/// `16/32/64-bit`
16429	Mfence_F1 = 2054,
16430	/// `MFENCE`
16431	///
16432	/// `NP 0F AE F2`
16433	///
16434	/// `SSE2`
16435	///
16436	/// `16/32/64-bit`
16437	Mfence_F2 = 2055,
16438	/// `MFENCE`
16439	///
16440	/// `NP 0F AE F3`
16441	///
16442	/// `SSE2`
16443	///
16444	/// `16/32/64-bit`
16445	Mfence_F3 = 2056,
16446	/// `MFENCE`
16447	///
16448	/// `NP 0F AE F4`
16449	///
16450	/// `SSE2`
16451	///
16452	/// `16/32/64-bit`
16453	Mfence_F4 = 2057,
16454	/// `MFENCE`
16455	///
16456	/// `NP 0F AE F5`
16457	///
16458	/// `SSE2`
16459	///
16460	/// `16/32/64-bit`
16461	Mfence_F5 = 2058,
16462	/// `MFENCE`
16463	///
16464	/// `NP 0F AE F6`
16465	///
16466	/// `SSE2`
16467	///
16468	/// `16/32/64-bit`
16469	Mfence_F6 = 2059,
16470	/// `MFENCE`
16471	///
16472	/// `NP 0F AE F7`
16473	///
16474	/// `SSE2`
16475	///
16476	/// `16/32/64-bit`
16477	Mfence_F7 = 2060,
16478	/// `SFENCE`
16479	///
16480	/// `NP 0F AE F8`
16481	///
16482	/// `SSE`
16483	///
16484	/// `16/32/64-bit`
16485	Sfence = 2061,
16486	/// `SFENCE`
16487	///
16488	/// `NP 0F AE F9`
16489	///
16490	/// `SSE`
16491	///
16492	/// `16/32/64-bit`
16493	Sfence_F9 = 2062,
16494	/// `SFENCE`
16495	///
16496	/// `NP 0F AE FA`
16497	///
16498	/// `SSE`
16499	///
16500	/// `16/32/64-bit`
16501	Sfence_FA = 2063,
16502	/// `SFENCE`
16503	///
16504	/// `NP 0F AE FB`
16505	///
16506	/// `SSE`
16507	///
16508	/// `16/32/64-bit`
16509	Sfence_FB = 2064,
16510	/// `SFENCE`
16511	///
16512	/// `NP 0F AE FC`
16513	///
16514	/// `SSE`
16515	///
16516	/// `16/32/64-bit`
16517	Sfence_FC = 2065,
16518	/// `SFENCE`
16519	///
16520	/// `NP 0F AE FD`
16521	///
16522	/// `SSE`
16523	///
16524	/// `16/32/64-bit`
16525	Sfence_FD = 2066,
16526	/// `SFENCE`
16527	///
16528	/// `NP 0F AE FE`
16529	///
16530	/// `SSE`
16531	///
16532	/// `16/32/64-bit`
16533	Sfence_FE = 2067,
16534	/// `SFENCE`
16535	///
16536	/// `NP 0F AE FF`
16537	///
16538	/// `SSE`
16539	///
16540	/// `16/32/64-bit`
16541	Sfence_FF = 2068,
16542	/// `PCOMMIT`
16543	///
16544	/// `66 0F AE F8`
16545	///
16546	/// `PCOMMIT`
16547	///
16548	/// `16/32/64-bit`
16549	Pcommit = 2069,
16550	/// `IMUL r16, r/m16`
16551	///
16552	/// `o16 0F AF /r`
16553	///
16554	/// `386+`
16555	///
16556	/// `16/32/64-bit`
16557	Imul_r16_rm16 = 2070,
16558	/// `IMUL r32, r/m32`
16559	///
16560	/// `o32 0F AF /r`
16561	///
16562	/// `386+`
16563	///
16564	/// `16/32/64-bit`
16565	Imul_r32_rm32 = 2071,
16566	/// `IMUL r64, r/m64`
16567	///
16568	/// `o64 0F AF /r`
16569	///
16570	/// `X64`
16571	///
16572	/// `64-bit`
16573	Imul_r64_rm64 = 2072,
16574	/// `CMPXCHG r/m8, r8`
16575	///
16576	/// `0F B0 /r`
16577	///
16578	/// `486+`
16579	///
16580	/// `16/32/64-bit`
16581	Cmpxchg_rm8_r8 = 2073,
16582	/// `CMPXCHG r/m16, r16`
16583	///
16584	/// `o16 0F B1 /r`
16585	///
16586	/// `486+`
16587	///
16588	/// `16/32/64-bit`
16589	Cmpxchg_rm16_r16 = 2074,
16590	/// `CMPXCHG r/m32, r32`
16591	///
16592	/// `o32 0F B1 /r`
16593	///
16594	/// `486+`
16595	///
16596	/// `16/32/64-bit`
16597	Cmpxchg_rm32_r32 = 2075,
16598	/// `CMPXCHG r/m64, r64`
16599	///
16600	/// `o64 0F B1 /r`
16601	///
16602	/// `X64`
16603	///
16604	/// `64-bit`
16605	Cmpxchg_rm64_r64 = 2076,
16606	/// `LSS r16, m16:16`
16607	///
16608	/// `o16 0F B2 /r`
16609	///
16610	/// `386+`
16611	///
16612	/// `16/32/64-bit`
16613	Lss_r16_m1616 = 2077,
16614	/// `LSS r32, m16:32`
16615	///
16616	/// `o32 0F B2 /r`
16617	///
16618	/// `386+`
16619	///
16620	/// `16/32/64-bit`
16621	Lss_r32_m1632 = 2078,
16622	/// `LSS r64, m16:64`
16623	///
16624	/// `o64 0F B2 /r`
16625	///
16626	/// `X64`
16627	///
16628	/// `64-bit`
16629	Lss_r64_m1664 = 2079,
16630	/// `BTR r/m16, r16`
16631	///
16632	/// `o16 0F B3 /r`
16633	///
16634	/// `386+`
16635	///
16636	/// `16/32/64-bit`
16637	Btr_rm16_r16 = 2080,
16638	/// `BTR r/m32, r32`
16639	///
16640	/// `o32 0F B3 /r`
16641	///
16642	/// `386+`
16643	///
16644	/// `16/32/64-bit`
16645	Btr_rm32_r32 = 2081,
16646	/// `BTR r/m64, r64`
16647	///
16648	/// `o64 0F B3 /r`
16649	///
16650	/// `X64`
16651	///
16652	/// `64-bit`
16653	Btr_rm64_r64 = 2082,
16654	/// `LFS r16, m16:16`
16655	///
16656	/// `o16 0F B4 /r`
16657	///
16658	/// `386+`
16659	///
16660	/// `16/32/64-bit`
16661	Lfs_r16_m1616 = 2083,
16662	/// `LFS r32, m16:32`
16663	///
16664	/// `o32 0F B4 /r`
16665	///
16666	/// `386+`
16667	///
16668	/// `16/32/64-bit`
16669	Lfs_r32_m1632 = 2084,
16670	/// `LFS r64, m16:64`
16671	///
16672	/// `o64 0F B4 /r`
16673	///
16674	/// `X64`
16675	///
16676	/// `64-bit`
16677	Lfs_r64_m1664 = 2085,
16678	/// `LGS r16, m16:16`
16679	///
16680	/// `o16 0F B5 /r`
16681	///
16682	/// `386+`
16683	///
16684	/// `16/32/64-bit`
16685	Lgs_r16_m1616 = 2086,
16686	/// `LGS r32, m16:32`
16687	///
16688	/// `o32 0F B5 /r`
16689	///
16690	/// `386+`
16691	///
16692	/// `16/32/64-bit`
16693	Lgs_r32_m1632 = 2087,
16694	/// `LGS r64, m16:64`
16695	///
16696	/// `o64 0F B5 /r`
16697	///
16698	/// `X64`
16699	///
16700	/// `64-bit`
16701	Lgs_r64_m1664 = 2088,
16702	/// `MOVZX r16, r/m8`
16703	///
16704	/// `o16 0F B6 /r`
16705	///
16706	/// `386+`
16707	///
16708	/// `16/32/64-bit`
16709	Movzx_r16_rm8 = 2089,
16710	/// `MOVZX r32, r/m8`
16711	///
16712	/// `o32 0F B6 /r`
16713	///
16714	/// `386+`
16715	///
16716	/// `16/32/64-bit`
16717	Movzx_r32_rm8 = 2090,
16718	/// `MOVZX r64, r/m8`
16719	///
16720	/// `o64 0F B6 /r`
16721	///
16722	/// `X64`
16723	///
16724	/// `64-bit`
16725	Movzx_r64_rm8 = 2091,
16726	/// `MOVZX r16, r/m16`
16727	///
16728	/// `o16 0F B7 /r`
16729	///
16730	/// `386+`
16731	///
16732	/// `16/32/64-bit`
16733	Movzx_r16_rm16 = 2092,
16734	/// `MOVZX r32, r/m16`
16735	///
16736	/// `o32 0F B7 /r`
16737	///
16738	/// `386+`
16739	///
16740	/// `16/32/64-bit`
16741	Movzx_r32_rm16 = 2093,
16742	/// `MOVZX r64, r/m16`
16743	///
16744	/// `o64 0F B7 /r`
16745	///
16746	/// `X64`
16747	///
16748	/// `64-bit`
16749	Movzx_r64_rm16 = 2094,
16750	/// `JMPE disp16`
16751	///
16752	/// `o16 0F B8 cw`
16753	///
16754	/// `IA-64`
16755	///
16756	/// `16/32-bit`
16757	Jmpe_disp16 = 2095,
16758	/// `JMPE disp32`
16759	///
16760	/// `o32 0F B8 cd`
16761	///
16762	/// `IA-64`
16763	///
16764	/// `16/32-bit`
16765	Jmpe_disp32 = 2096,
16766	/// `POPCNT r16, r/m16`
16767	///
16768	/// `o16 F3 0F B8 /r`
16769	///
16770	/// `POPCNT`
16771	///
16772	/// `16/32/64-bit`
16773	Popcnt_r16_rm16 = 2097,
16774	/// `POPCNT r32, r/m32`
16775	///
16776	/// `o32 F3 0F B8 /r`
16777	///
16778	/// `POPCNT`
16779	///
16780	/// `16/32/64-bit`
16781	Popcnt_r32_rm32 = 2098,
16782	/// `POPCNT r64, r/m64`
16783	///
16784	/// `F3 o64 0F B8 /r`
16785	///
16786	/// `POPCNT`
16787	///
16788	/// `64-bit`
16789	Popcnt_r64_rm64 = 2099,
16790	/// `UD1 r16, r/m16`
16791	///
16792	/// `o16 0F B9 /r`
16793	///
16794	/// `286+`
16795	///
16796	/// `16/32/64-bit`
16797	Ud1_r16_rm16 = 2100,
16798	/// `UD1 r32, r/m32`
16799	///
16800	/// `o32 0F B9 /r`
16801	///
16802	/// `386+`
16803	///
16804	/// `16/32/64-bit`
16805	Ud1_r32_rm32 = 2101,
16806	/// `UD1 r64, r/m64`
16807	///
16808	/// `o64 0F B9 /r`
16809	///
16810	/// `X64`
16811	///
16812	/// `64-bit`
16813	Ud1_r64_rm64 = 2102,
16814	/// `BT r/m16, imm8`
16815	///
16816	/// `o16 0F BA /4 ib`
16817	///
16818	/// `386+`
16819	///
16820	/// `16/32/64-bit`
16821	Bt_rm16_imm8 = 2103,
16822	/// `BT r/m32, imm8`
16823	///
16824	/// `o32 0F BA /4 ib`
16825	///
16826	/// `386+`
16827	///
16828	/// `16/32/64-bit`
16829	Bt_rm32_imm8 = 2104,
16830	/// `BT r/m64, imm8`
16831	///
16832	/// `o64 0F BA /4 ib`
16833	///
16834	/// `X64`
16835	///
16836	/// `64-bit`
16837	Bt_rm64_imm8 = 2105,
16838	/// `BTS r/m16, imm8`
16839	///
16840	/// `o16 0F BA /5 ib`
16841	///
16842	/// `386+`
16843	///
16844	/// `16/32/64-bit`
16845	Bts_rm16_imm8 = 2106,
16846	/// `BTS r/m32, imm8`
16847	///
16848	/// `o32 0F BA /5 ib`
16849	///
16850	/// `386+`
16851	///
16852	/// `16/32/64-bit`
16853	Bts_rm32_imm8 = 2107,
16854	/// `BTS r/m64, imm8`
16855	///
16856	/// `o64 0F BA /5 ib`
16857	///
16858	/// `X64`
16859	///
16860	/// `64-bit`
16861	Bts_rm64_imm8 = 2108,
16862	/// `BTR r/m16, imm8`
16863	///
16864	/// `o16 0F BA /6 ib`
16865	///
16866	/// `386+`
16867	///
16868	/// `16/32/64-bit`
16869	Btr_rm16_imm8 = 2109,
16870	/// `BTR r/m32, imm8`
16871	///
16872	/// `o32 0F BA /6 ib`
16873	///
16874	/// `386+`
16875	///
16876	/// `16/32/64-bit`
16877	Btr_rm32_imm8 = 2110,
16878	/// `BTR r/m64, imm8`
16879	///
16880	/// `o64 0F BA /6 ib`
16881	///
16882	/// `X64`
16883	///
16884	/// `64-bit`
16885	Btr_rm64_imm8 = 2111,
16886	/// `BTC r/m16, imm8`
16887	///
16888	/// `o16 0F BA /7 ib`
16889	///
16890	/// `386+`
16891	///
16892	/// `16/32/64-bit`
16893	Btc_rm16_imm8 = 2112,
16894	/// `BTC r/m32, imm8`
16895	///
16896	/// `o32 0F BA /7 ib`
16897	///
16898	/// `386+`
16899	///
16900	/// `16/32/64-bit`
16901	Btc_rm32_imm8 = 2113,
16902	/// `BTC r/m64, imm8`
16903	///
16904	/// `o64 0F BA /7 ib`
16905	///
16906	/// `X64`
16907	///
16908	/// `64-bit`
16909	Btc_rm64_imm8 = 2114,
16910	/// `BTC r/m16, r16`
16911	///
16912	/// `o16 0F BB /r`
16913	///
16914	/// `386+`
16915	///
16916	/// `16/32/64-bit`
16917	Btc_rm16_r16 = 2115,
16918	/// `BTC r/m32, r32`
16919	///
16920	/// `o32 0F BB /r`
16921	///
16922	/// `386+`
16923	///
16924	/// `16/32/64-bit`
16925	Btc_rm32_r32 = 2116,
16926	/// `BTC r/m64, r64`
16927	///
16928	/// `o64 0F BB /r`
16929	///
16930	/// `X64`
16931	///
16932	/// `64-bit`
16933	Btc_rm64_r64 = 2117,
16934	/// `BSF r16, r/m16`
16935	///
16936	/// `o16 0F BC /r`
16937	///
16938	/// `386+`
16939	///
16940	/// `16/32/64-bit`
16941	Bsf_r16_rm16 = 2118,
16942	/// `BSF r32, r/m32`
16943	///
16944	/// `o32 0F BC /r`
16945	///
16946	/// `386+`
16947	///
16948	/// `16/32/64-bit`
16949	Bsf_r32_rm32 = 2119,
16950	/// `BSF r64, r/m64`
16951	///
16952	/// `o64 0F BC /r`
16953	///
16954	/// `X64`
16955	///
16956	/// `64-bit`
16957	Bsf_r64_rm64 = 2120,
16958	/// `TZCNT r16, r/m16`
16959	///
16960	/// `o16 F3 0F BC /r`
16961	///
16962	/// `BMI1`
16963	///
16964	/// `16/32/64-bit`
16965	Tzcnt_r16_rm16 = 2121,
16966	/// `TZCNT r32, r/m32`
16967	///
16968	/// `o32 F3 0F BC /r`
16969	///
16970	/// `BMI1`
16971	///
16972	/// `16/32/64-bit`
16973	Tzcnt_r32_rm32 = 2122,
16974	/// `TZCNT r64, r/m64`
16975	///
16976	/// `F3 o64 0F BC /r`
16977	///
16978	/// `BMI1`
16979	///
16980	/// `64-bit`
16981	Tzcnt_r64_rm64 = 2123,
16982	/// `BSR r16, r/m16`
16983	///
16984	/// `o16 0F BD /r`
16985	///
16986	/// `386+`
16987	///
16988	/// `16/32/64-bit`
16989	Bsr_r16_rm16 = 2124,
16990	/// `BSR r32, r/m32`
16991	///
16992	/// `o32 0F BD /r`
16993	///
16994	/// `386+`
16995	///
16996	/// `16/32/64-bit`
16997	Bsr_r32_rm32 = 2125,
16998	/// `BSR r64, r/m64`
16999	///
17000	/// `o64 0F BD /r`
17001	///
17002	/// `X64`
17003	///
17004	/// `64-bit`
17005	Bsr_r64_rm64 = 2126,
17006	/// `LZCNT r16, r/m16`
17007	///
17008	/// `o16 F3 0F BD /r`
17009	///
17010	/// `LZCNT`
17011	///
17012	/// `16/32/64-bit`
17013	Lzcnt_r16_rm16 = 2127,
17014	/// `LZCNT r32, r/m32`
17015	///
17016	/// `o32 F3 0F BD /r`
17017	///
17018	/// `LZCNT`
17019	///
17020	/// `16/32/64-bit`
17021	Lzcnt_r32_rm32 = 2128,
17022	/// `LZCNT r64, r/m64`
17023	///
17024	/// `F3 o64 0F BD /r`
17025	///
17026	/// `LZCNT`
17027	///
17028	/// `64-bit`
17029	Lzcnt_r64_rm64 = 2129,
17030	/// `MOVSX r16, r/m8`
17031	///
17032	/// `o16 0F BE /r`
17033	///
17034	/// `386+`
17035	///
17036	/// `16/32/64-bit`
17037	Movsx_r16_rm8 = 2130,
17038	/// `MOVSX r32, r/m8`
17039	///
17040	/// `o32 0F BE /r`
17041	///
17042	/// `386+`
17043	///
17044	/// `16/32/64-bit`
17045	Movsx_r32_rm8 = 2131,
17046	/// `MOVSX r64, r/m8`
17047	///
17048	/// `o64 0F BE /r`
17049	///
17050	/// `X64`
17051	///
17052	/// `64-bit`
17053	Movsx_r64_rm8 = 2132,
17054	/// `MOVSX r16, r/m16`
17055	///
17056	/// `o16 0F BF /r`
17057	///
17058	/// `386+`
17059	///
17060	/// `16/32/64-bit`
17061	Movsx_r16_rm16 = 2133,
17062	/// `MOVSX r32, r/m16`
17063	///
17064	/// `o32 0F BF /r`
17065	///
17066	/// `386+`
17067	///
17068	/// `16/32/64-bit`
17069	Movsx_r32_rm16 = 2134,
17070	/// `MOVSX r64, r/m16`
17071	///
17072	/// `o64 0F BF /r`
17073	///
17074	/// `X64`
17075	///
17076	/// `64-bit`
17077	Movsx_r64_rm16 = 2135,
17078	/// `XADD r/m8, r8`
17079	///
17080	/// `0F C0 /r`
17081	///
17082	/// `486+`
17083	///
17084	/// `16/32/64-bit`
17085	Xadd_rm8_r8 = 2136,
17086	/// `XADD r/m16, r16`
17087	///
17088	/// `o16 0F C1 /r`
17089	///
17090	/// `486+`
17091	///
17092	/// `16/32/64-bit`
17093	Xadd_rm16_r16 = 2137,
17094	/// `XADD r/m32, r32`
17095	///
17096	/// `o32 0F C1 /r`
17097	///
17098	/// `486+`
17099	///
17100	/// `16/32/64-bit`
17101	Xadd_rm32_r32 = 2138,
17102	/// `XADD r/m64, r64`
17103	///
17104	/// `o64 0F C1 /r`
17105	///
17106	/// `X64`
17107	///
17108	/// `64-bit`
17109	Xadd_rm64_r64 = 2139,
17110	/// `CMPPS xmm1, xmm2/m128, imm8`
17111	///
17112	/// `NP 0F C2 /r ib`
17113	///
17114	/// `SSE`
17115	///
17116	/// `16/32/64-bit`
17117	Cmpps_xmm_xmmm128_imm8 = 2140,
17118	/// `VCMPPS xmm1, xmm2, xmm3/m128, imm8`
17119	///
17120	/// `VEX.128.0F.WIG C2 /r ib`
17121	///
17122	/// `AVX`
17123	///
17124	/// `16/32/64-bit`
17125	VEX_Vcmpps_xmm_xmm_xmmm128_imm8 = 2141,
17126	/// `VCMPPS ymm1, ymm2, ymm3/m256, imm8`
17127	///
17128	/// `VEX.256.0F.WIG C2 /r ib`
17129	///
17130	/// `AVX`
17131	///
17132	/// `16/32/64-bit`
17133	VEX_Vcmpps_ymm_ymm_ymmm256_imm8 = 2142,
17134	/// `VCMPPS k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8`
17135	///
17136	/// `EVEX.128.0F.W0 C2 /r ib`
17137	///
17138	/// `AVX512VL and AVX512F`
17139	///
17140	/// `16/32/64-bit`
17141	EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8 = 2143,
17142	/// `VCMPPS k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8`
17143	///
17144	/// `EVEX.256.0F.W0 C2 /r ib`
17145	///
17146	/// `AVX512VL and AVX512F`
17147	///
17148	/// `16/32/64-bit`
17149	EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8 = 2144,
17150	/// `VCMPPS k1 {k2}, zmm2, zmm3/m512/m32bcst{sae}, imm8`
17151	///
17152	/// `EVEX.512.0F.W0 C2 /r ib`
17153	///
17154	/// `AVX512F`
17155	///
17156	/// `16/32/64-bit`
17157	EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae = 2145,
17158	/// `CMPPD xmm1, xmm2/m128, imm8`
17159	///
17160	/// `66 0F C2 /r ib`
17161	///
17162	/// `SSE2`
17163	///
17164	/// `16/32/64-bit`
17165	Cmppd_xmm_xmmm128_imm8 = 2146,
17166	/// `VCMPPD xmm1, xmm2, xmm3/m128, imm8`
17167	///
17168	/// `VEX.128.66.0F.WIG C2 /r ib`
17169	///
17170	/// `AVX`
17171	///
17172	/// `16/32/64-bit`
17173	VEX_Vcmppd_xmm_xmm_xmmm128_imm8 = 2147,
17174	/// `VCMPPD ymm1, ymm2, ymm3/m256, imm8`
17175	///
17176	/// `VEX.256.66.0F.WIG C2 /r ib`
17177	///
17178	/// `AVX`
17179	///
17180	/// `16/32/64-bit`
17181	VEX_Vcmppd_ymm_ymm_ymmm256_imm8 = 2148,
17182	/// `VCMPPD k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8`
17183	///
17184	/// `EVEX.128.66.0F.W1 C2 /r ib`
17185	///
17186	/// `AVX512VL and AVX512F`
17187	///
17188	/// `16/32/64-bit`
17189	EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8 = 2149,
17190	/// `VCMPPD k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8`
17191	///
17192	/// `EVEX.256.66.0F.W1 C2 /r ib`
17193	///
17194	/// `AVX512VL and AVX512F`
17195	///
17196	/// `16/32/64-bit`
17197	EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8 = 2150,
17198	/// `VCMPPD k1 {k2}, zmm2, zmm3/m512/m64bcst{sae}, imm8`
17199	///
17200	/// `EVEX.512.66.0F.W1 C2 /r ib`
17201	///
17202	/// `AVX512F`
17203	///
17204	/// `16/32/64-bit`
17205	EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae = 2151,
17206	/// `CMPSS xmm1, xmm2/m32, imm8`
17207	///
17208	/// `F3 0F C2 /r ib`
17209	///
17210	/// `SSE`
17211	///
17212	/// `16/32/64-bit`
17213	Cmpss_xmm_xmmm32_imm8 = 2152,
17214	/// `VCMPSS xmm1, xmm2, xmm3/m32, imm8`
17215	///
17216	/// `VEX.LIG.F3.0F.WIG C2 /r ib`
17217	///
17218	/// `AVX`
17219	///
17220	/// `16/32/64-bit`
17221	VEX_Vcmpss_xmm_xmm_xmmm32_imm8 = 2153,
17222	/// `VCMPSS k1 {k2}, xmm2, xmm3/m32{sae}, imm8`
17223	///
17224	/// `EVEX.LIG.F3.0F.W0 C2 /r ib`
17225	///
17226	/// `AVX512F`
17227	///
17228	/// `16/32/64-bit`
17229	EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae = 2154,
17230	/// `CMPSD xmm1, xmm2/m64, imm8`
17231	///
17232	/// `F2 0F C2 /r ib`
17233	///
17234	/// `SSE2`
17235	///
17236	/// `16/32/64-bit`
17237	Cmpsd_xmm_xmmm64_imm8 = 2155,
17238	/// `VCMPSD xmm1, xmm2, xmm3/m64, imm8`
17239	///
17240	/// `VEX.LIG.F2.0F.WIG C2 /r ib`
17241	///
17242	/// `AVX`
17243	///
17244	/// `16/32/64-bit`
17245	VEX_Vcmpsd_xmm_xmm_xmmm64_imm8 = 2156,
17246	/// `VCMPSD k1 {k2}, xmm2, xmm3/m64{sae}, imm8`
17247	///
17248	/// `EVEX.LIG.F2.0F.W1 C2 /r ib`
17249	///
17250	/// `AVX512F`
17251	///
17252	/// `16/32/64-bit`
17253	EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae = 2157,
17254	/// `MOVNTI m32, r32`
17255	///
17256	/// `NP 0F C3 /r`
17257	///
17258	/// `SSE2`
17259	///
17260	/// `16/32/64-bit`
17261	Movnti_m32_r32 = 2158,
17262	/// `MOVNTI m64, r64`
17263	///
17264	/// `NP o64 0F C3 /r`
17265	///
17266	/// `SSE2`
17267	///
17268	/// `64-bit`
17269	Movnti_m64_r64 = 2159,
17270	/// `PINSRW mm, r32/m16, imm8`
17271	///
17272	/// `NP 0F C4 /r ib`
17273	///
17274	/// `SSE`
17275	///
17276	/// `16/32/64-bit`
17277	Pinsrw_mm_r32m16_imm8 = 2160,
17278	/// `PINSRW mm, r64/m16, imm8`
17279	///
17280	/// `NP o64 0F C4 /r ib`
17281	///
17282	/// `SSE`
17283	///
17284	/// `64-bit`
17285	Pinsrw_mm_r64m16_imm8 = 2161,
17286	/// `PINSRW xmm, r32/m16, imm8`
17287	///
17288	/// `66 0F C4 /r ib`
17289	///
17290	/// `SSE2`
17291	///
17292	/// `16/32/64-bit`
17293	Pinsrw_xmm_r32m16_imm8 = 2162,
17294	/// `PINSRW xmm, r64/m16, imm8`
17295	///
17296	/// `66 o64 0F C4 /r ib`
17297	///
17298	/// `SSE2`
17299	///
17300	/// `64-bit`
17301	Pinsrw_xmm_r64m16_imm8 = 2163,
17302	/// `VPINSRW xmm1, xmm2, r32/m16, imm8`
17303	///
17304	/// `VEX.128.66.0F.W0 C4 /r ib`
17305	///
17306	/// `AVX`
17307	///
17308	/// `16/32/64-bit`
17309	VEX_Vpinsrw_xmm_xmm_r32m16_imm8 = 2164,
17310	/// `VPINSRW xmm1, xmm2, r64/m16, imm8`
17311	///
17312	/// `VEX.128.66.0F.W1 C4 /r ib`
17313	///
17314	/// `AVX`
17315	///
17316	/// `64-bit`
17317	VEX_Vpinsrw_xmm_xmm_r64m16_imm8 = 2165,
17318	/// `VPINSRW xmm1, xmm2, r32/m16, imm8`
17319	///
17320	/// `EVEX.128.66.0F.W0 C4 /r ib`
17321	///
17322	/// `AVX512BW`
17323	///
17324	/// `16/32/64-bit`
17325	EVEX_Vpinsrw_xmm_xmm_r32m16_imm8 = 2166,
17326	/// `VPINSRW xmm1, xmm2, r64/m16, imm8`
17327	///
17328	/// `EVEX.128.66.0F.W1 C4 /r ib`
17329	///
17330	/// `AVX512BW`
17331	///
17332	/// `64-bit`
17333	EVEX_Vpinsrw_xmm_xmm_r64m16_imm8 = 2167,
17334	/// `PEXTRW r32, mm, imm8`
17335	///
17336	/// `NP 0F C5 /r ib`
17337	///
17338	/// `SSE`
17339	///
17340	/// `16/32/64-bit`
17341	Pextrw_r32_mm_imm8 = 2168,
17342	/// `PEXTRW r64, mm, imm8`
17343	///
17344	/// `NP o64 0F C5 /r ib`
17345	///
17346	/// `SSE`
17347	///
17348	/// `64-bit`
17349	Pextrw_r64_mm_imm8 = 2169,
17350	/// `PEXTRW r32, xmm, imm8`
17351	///
17352	/// `66 0F C5 /r ib`
17353	///
17354	/// `SSE2`
17355	///
17356	/// `16/32/64-bit`
17357	Pextrw_r32_xmm_imm8 = 2170,
17358	/// `PEXTRW r64, xmm, imm8`
17359	///
17360	/// `66 o64 0F C5 /r ib`
17361	///
17362	/// `SSE2`
17363	///
17364	/// `64-bit`
17365	Pextrw_r64_xmm_imm8 = 2171,
17366	/// `VPEXTRW r32, xmm1, imm8`
17367	///
17368	/// `VEX.128.66.0F.W0 C5 /r ib`
17369	///
17370	/// `AVX`
17371	///
17372	/// `16/32/64-bit`
17373	VEX_Vpextrw_r32_xmm_imm8 = 2172,
17374	/// `VPEXTRW r64, xmm1, imm8`
17375	///
17376	/// `VEX.128.66.0F.W1 C5 /r ib`
17377	///
17378	/// `AVX`
17379	///
17380	/// `64-bit`
17381	VEX_Vpextrw_r64_xmm_imm8 = 2173,
17382	/// `VPEXTRW r32, xmm1, imm8`
17383	///
17384	/// `EVEX.128.66.0F.W0 C5 /r ib`
17385	///
17386	/// `AVX512BW`
17387	///
17388	/// `16/32/64-bit`
17389	EVEX_Vpextrw_r32_xmm_imm8 = 2174,
17390	/// `VPEXTRW r64, xmm1, imm8`
17391	///
17392	/// `EVEX.128.66.0F.W1 C5 /r ib`
17393	///
17394	/// `AVX512BW`
17395	///
17396	/// `64-bit`
17397	EVEX_Vpextrw_r64_xmm_imm8 = 2175,
17398	/// `SHUFPS xmm1, xmm2/m128, imm8`
17399	///
17400	/// `NP 0F C6 /r ib`
17401	///
17402	/// `SSE`
17403	///
17404	/// `16/32/64-bit`
17405	Shufps_xmm_xmmm128_imm8 = 2176,
17406	/// `VSHUFPS xmm1, xmm2, xmm3/m128, imm8`
17407	///
17408	/// `VEX.128.0F.WIG C6 /r ib`
17409	///
17410	/// `AVX`
17411	///
17412	/// `16/32/64-bit`
17413	VEX_Vshufps_xmm_xmm_xmmm128_imm8 = 2177,
17414	/// `VSHUFPS ymm1, ymm2, ymm3/m256, imm8`
17415	///
17416	/// `VEX.256.0F.WIG C6 /r ib`
17417	///
17418	/// `AVX`
17419	///
17420	/// `16/32/64-bit`
17421	VEX_Vshufps_ymm_ymm_ymmm256_imm8 = 2178,
17422	/// `VSHUFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
17423	///
17424	/// `EVEX.128.0F.W0 C6 /r ib`
17425	///
17426	/// `AVX512VL and AVX512F`
17427	///
17428	/// `16/32/64-bit`
17429	EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8 = 2179,
17430	/// `VSHUFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
17431	///
17432	/// `EVEX.256.0F.W0 C6 /r ib`
17433	///
17434	/// `AVX512VL and AVX512F`
17435	///
17436	/// `16/32/64-bit`
17437	EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8 = 2180,
17438	/// `VSHUFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
17439	///
17440	/// `EVEX.512.0F.W0 C6 /r ib`
17441	///
17442	/// `AVX512F`
17443	///
17444	/// `16/32/64-bit`
17445	EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8 = 2181,
17446	/// `SHUFPD xmm1, xmm2/m128, imm8`
17447	///
17448	/// `66 0F C6 /r ib`
17449	///
17450	/// `SSE2`
17451	///
17452	/// `16/32/64-bit`
17453	Shufpd_xmm_xmmm128_imm8 = 2182,
17454	/// `VSHUFPD xmm1, xmm2, xmm3/m128, imm8`
17455	///
17456	/// `VEX.128.66.0F.WIG C6 /r ib`
17457	///
17458	/// `AVX`
17459	///
17460	/// `16/32/64-bit`
17461	VEX_Vshufpd_xmm_xmm_xmmm128_imm8 = 2183,
17462	/// `VSHUFPD ymm1, ymm2, ymm3/m256, imm8`
17463	///
17464	/// `VEX.256.66.0F.WIG C6 /r ib`
17465	///
17466	/// `AVX`
17467	///
17468	/// `16/32/64-bit`
17469	VEX_Vshufpd_ymm_ymm_ymmm256_imm8 = 2184,
17470	/// `VSHUFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
17471	///
17472	/// `EVEX.128.66.0F.W1 C6 /r ib`
17473	///
17474	/// `AVX512VL and AVX512F`
17475	///
17476	/// `16/32/64-bit`
17477	EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8 = 2185,
17478	/// `VSHUFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
17479	///
17480	/// `EVEX.256.66.0F.W1 C6 /r ib`
17481	///
17482	/// `AVX512VL and AVX512F`
17483	///
17484	/// `16/32/64-bit`
17485	EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8 = 2186,
17486	/// `VSHUFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
17487	///
17488	/// `EVEX.512.66.0F.W1 C6 /r ib`
17489	///
17490	/// `AVX512F`
17491	///
17492	/// `16/32/64-bit`
17493	EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8 = 2187,
17494	/// `CMPXCHG8B m64`
17495	///
17496	/// `0F C7 /1`
17497	///
17498	/// `CX8`
17499	///
17500	/// `16/32/64-bit`
17501	Cmpxchg8b_m64 = 2188,
17502	/// `CMPXCHG16B m128`
17503	///
17504	/// `o64 0F C7 /1`
17505	///
17506	/// `CMPXCHG16B`
17507	///
17508	/// `64-bit`
17509	Cmpxchg16b_m128 = 2189,
17510	/// `XRSTORS mem`
17511	///
17512	/// `NP 0F C7 /3`
17513	///
17514	/// `XSAVES`
17515	///
17516	/// `16/32/64-bit`
17517	Xrstors_mem = 2190,
17518	/// `XRSTORS64 mem`
17519	///
17520	/// `NP o64 0F C7 /3`
17521	///
17522	/// `XSAVES`
17523	///
17524	/// `64-bit`
17525	Xrstors64_mem = 2191,
17526	/// `XSAVEC mem`
17527	///
17528	/// `NP 0F C7 /4`
17529	///
17530	/// `XSAVEC`
17531	///
17532	/// `16/32/64-bit`
17533	Xsavec_mem = 2192,
17534	/// `XSAVEC64 mem`
17535	///
17536	/// `NP o64 0F C7 /4`
17537	///
17538	/// `XSAVEC`
17539	///
17540	/// `64-bit`
17541	Xsavec64_mem = 2193,
17542	/// `XSAVES mem`
17543	///
17544	/// `NP 0F C7 /5`
17545	///
17546	/// `XSAVES`
17547	///
17548	/// `16/32/64-bit`
17549	Xsaves_mem = 2194,
17550	/// `XSAVES64 mem`
17551	///
17552	/// `NP o64 0F C7 /5`
17553	///
17554	/// `XSAVES`
17555	///
17556	/// `64-bit`
17557	Xsaves64_mem = 2195,
17558	/// `VMPTRLD m64`
17559	///
17560	/// `NP 0F C7 /6`
17561	///
17562	/// `VMX`
17563	///
17564	/// `16/32/64-bit`
17565	Vmptrld_m64 = 2196,
17566	/// `VMCLEAR m64`
17567	///
17568	/// `66 0F C7 /6`
17569	///
17570	/// `VMX`
17571	///
17572	/// `16/32/64-bit`
17573	Vmclear_m64 = 2197,
17574	/// `VMXON m64`
17575	///
17576	/// `F3 0F C7 /6`
17577	///
17578	/// `VMX`
17579	///
17580	/// `16/32/64-bit`
17581	Vmxon_m64 = 2198,
17582	/// `RDRAND r16`
17583	///
17584	/// `o16 0F C7 /6`
17585	///
17586	/// `RDRAND`
17587	///
17588	/// `16/32/64-bit`
17589	Rdrand_r16 = 2199,
17590	/// `RDRAND r32`
17591	///
17592	/// `o32 0F C7 /6`
17593	///
17594	/// `RDRAND`
17595	///
17596	/// `16/32/64-bit`
17597	Rdrand_r32 = 2200,
17598	/// `RDRAND r64`
17599	///
17600	/// `o64 0F C7 /6`
17601	///
17602	/// `RDRAND`
17603	///
17604	/// `64-bit`
17605	Rdrand_r64 = 2201,
17606	/// `VMPTRST m64`
17607	///
17608	/// `NP 0F C7 /7`
17609	///
17610	/// `VMX`
17611	///
17612	/// `16/32/64-bit`
17613	Vmptrst_m64 = 2202,
17614	/// `RDSEED r16`
17615	///
17616	/// `o16 0F C7 /7`
17617	///
17618	/// `RDSEED`
17619	///
17620	/// `16/32/64-bit`
17621	Rdseed_r16 = 2203,
17622	/// `RDSEED r32`
17623	///
17624	/// `o32 0F C7 /7`
17625	///
17626	/// `RDSEED`
17627	///
17628	/// `16/32/64-bit`
17629	Rdseed_r32 = 2204,
17630	/// `RDSEED r64`
17631	///
17632	/// `o64 0F C7 /7`
17633	///
17634	/// `RDSEED`
17635	///
17636	/// `64-bit`
17637	Rdseed_r64 = 2205,
17638	/// `RDPID r32`
17639	///
17640	/// `F3 0F C7 /7`
17641	///
17642	/// `RDPID`
17643	///
17644	/// `16/32-bit`
17645	Rdpid_r32 = 2206,
17646	/// `RDPID r64`
17647	///
17648	/// `F3 0F C7 /7`
17649	///
17650	/// `RDPID`
17651	///
17652	/// `64-bit`
17653	Rdpid_r64 = 2207,
17654	/// `BSWAP r16`
17655	///
17656	/// `o16 0F C8+rw`
17657	///
17658	/// `486+`
17659	///
17660	/// `16/32/64-bit`
17661	Bswap_r16 = 2208,
17662	/// `BSWAP r32`
17663	///
17664	/// `o32 0F C8+rd`
17665	///
17666	/// `486+`
17667	///
17668	/// `16/32/64-bit`
17669	Bswap_r32 = 2209,
17670	/// `BSWAP r64`
17671	///
17672	/// `o64 0F C8+ro`
17673	///
17674	/// `X64`
17675	///
17676	/// `64-bit`
17677	Bswap_r64 = 2210,
17678	/// `ADDSUBPD xmm1, xmm2/m128`
17679	///
17680	/// `66 0F D0 /r`
17681	///
17682	/// `SSE3`
17683	///
17684	/// `16/32/64-bit`
17685	Addsubpd_xmm_xmmm128 = 2211,
17686	/// `VADDSUBPD xmm1, xmm2, xmm3/m128`
17687	///
17688	/// `VEX.128.66.0F.WIG D0 /r`
17689	///
17690	/// `AVX`
17691	///
17692	/// `16/32/64-bit`
17693	VEX_Vaddsubpd_xmm_xmm_xmmm128 = 2212,
17694	/// `VADDSUBPD ymm1, ymm2, ymm3/m256`
17695	///
17696	/// `VEX.256.66.0F.WIG D0 /r`
17697	///
17698	/// `AVX`
17699	///
17700	/// `16/32/64-bit`
17701	VEX_Vaddsubpd_ymm_ymm_ymmm256 = 2213,
17702	/// `ADDSUBPS xmm1, xmm2/m128`
17703	///
17704	/// `F2 0F D0 /r`
17705	///
17706	/// `SSE3`
17707	///
17708	/// `16/32/64-bit`
17709	Addsubps_xmm_xmmm128 = 2214,
17710	/// `VADDSUBPS xmm1, xmm2, xmm3/m128`
17711	///
17712	/// `VEX.128.F2.0F.WIG D0 /r`
17713	///
17714	/// `AVX`
17715	///
17716	/// `16/32/64-bit`
17717	VEX_Vaddsubps_xmm_xmm_xmmm128 = 2215,
17718	/// `VADDSUBPS ymm1, ymm2, ymm3/m256`
17719	///
17720	/// `VEX.256.F2.0F.WIG D0 /r`
17721	///
17722	/// `AVX`
17723	///
17724	/// `16/32/64-bit`
17725	VEX_Vaddsubps_ymm_ymm_ymmm256 = 2216,
17726	/// `PSRLW mm, mm/m64`
17727	///
17728	/// `NP 0F D1 /r`
17729	///
17730	/// `MMX`
17731	///
17732	/// `16/32/64-bit`
17733	Psrlw_mm_mmm64 = 2217,
17734	/// `PSRLW xmm1, xmm2/m128`
17735	///
17736	/// `66 0F D1 /r`
17737	///
17738	/// `SSE2`
17739	///
17740	/// `16/32/64-bit`
17741	Psrlw_xmm_xmmm128 = 2218,
17742	/// `VPSRLW xmm1, xmm2, xmm3/m128`
17743	///
17744	/// `VEX.128.66.0F.WIG D1 /r`
17745	///
17746	/// `AVX`
17747	///
17748	/// `16/32/64-bit`
17749	VEX_Vpsrlw_xmm_xmm_xmmm128 = 2219,
17750	/// `VPSRLW ymm1, ymm2, xmm3/m128`
17751	///
17752	/// `VEX.256.66.0F.WIG D1 /r`
17753	///
17754	/// `AVX2`
17755	///
17756	/// `16/32/64-bit`
17757	VEX_Vpsrlw_ymm_ymm_xmmm128 = 2220,
17758	/// `VPSRLW xmm1 {k1}{z}, xmm2, xmm3/m128`
17759	///
17760	/// `EVEX.128.66.0F.WIG D1 /r`
17761	///
17762	/// `AVX512VL and AVX512BW`
17763	///
17764	/// `16/32/64-bit`
17765	EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128 = 2221,
17766	/// `VPSRLW ymm1 {k1}{z}, ymm2, xmm3/m128`
17767	///
17768	/// `EVEX.256.66.0F.WIG D1 /r`
17769	///
17770	/// `AVX512VL and AVX512BW`
17771	///
17772	/// `16/32/64-bit`
17773	EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128 = 2222,
17774	/// `VPSRLW zmm1 {k1}{z}, zmm2, xmm3/m128`
17775	///
17776	/// `EVEX.512.66.0F.WIG D1 /r`
17777	///
17778	/// `AVX512BW`
17779	///
17780	/// `16/32/64-bit`
17781	EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128 = 2223,
17782	/// `PSRLD mm, mm/m64`
17783	///
17784	/// `NP 0F D2 /r`
17785	///
17786	/// `MMX`
17787	///
17788	/// `16/32/64-bit`
17789	Psrld_mm_mmm64 = 2224,
17790	/// `PSRLD xmm1, xmm2/m128`
17791	///
17792	/// `66 0F D2 /r`
17793	///
17794	/// `SSE2`
17795	///
17796	/// `16/32/64-bit`
17797	Psrld_xmm_xmmm128 = 2225,
17798	/// `VPSRLD xmm1, xmm2, xmm3/m128`
17799	///
17800	/// `VEX.128.66.0F.WIG D2 /r`
17801	///
17802	/// `AVX`
17803	///
17804	/// `16/32/64-bit`
17805	VEX_Vpsrld_xmm_xmm_xmmm128 = 2226,
17806	/// `VPSRLD ymm1, ymm2, xmm3/m128`
17807	///
17808	/// `VEX.256.66.0F.WIG D2 /r`
17809	///
17810	/// `AVX2`
17811	///
17812	/// `16/32/64-bit`
17813	VEX_Vpsrld_ymm_ymm_xmmm128 = 2227,
17814	/// `VPSRLD xmm1 {k1}{z}, xmm2, xmm3/m128`
17815	///
17816	/// `EVEX.128.66.0F.W0 D2 /r`
17817	///
17818	/// `AVX512VL and AVX512F`
17819	///
17820	/// `16/32/64-bit`
17821	EVEX_Vpsrld_xmm_k1z_xmm_xmmm128 = 2228,
17822	/// `VPSRLD ymm1 {k1}{z}, ymm2, xmm3/m128`
17823	///
17824	/// `EVEX.256.66.0F.W0 D2 /r`
17825	///
17826	/// `AVX512VL and AVX512F`
17827	///
17828	/// `16/32/64-bit`
17829	EVEX_Vpsrld_ymm_k1z_ymm_xmmm128 = 2229,
17830	/// `VPSRLD zmm1 {k1}{z}, zmm2, xmm3/m128`
17831	///
17832	/// `EVEX.512.66.0F.W0 D2 /r`
17833	///
17834	/// `AVX512F`
17835	///
17836	/// `16/32/64-bit`
17837	EVEX_Vpsrld_zmm_k1z_zmm_xmmm128 = 2230,
17838	/// `PSRLQ mm, mm/m64`
17839	///
17840	/// `NP 0F D3 /r`
17841	///
17842	/// `MMX`
17843	///
17844	/// `16/32/64-bit`
17845	Psrlq_mm_mmm64 = 2231,
17846	/// `PSRLQ xmm1, xmm2/m128`
17847	///
17848	/// `66 0F D3 /r`
17849	///
17850	/// `SSE2`
17851	///
17852	/// `16/32/64-bit`
17853	Psrlq_xmm_xmmm128 = 2232,
17854	/// `VPSRLQ xmm1, xmm2, xmm3/m128`
17855	///
17856	/// `VEX.128.66.0F.WIG D3 /r`
17857	///
17858	/// `AVX`
17859	///
17860	/// `16/32/64-bit`
17861	VEX_Vpsrlq_xmm_xmm_xmmm128 = 2233,
17862	/// `VPSRLQ ymm1, ymm2, xmm3/m128`
17863	///
17864	/// `VEX.256.66.0F.WIG D3 /r`
17865	///
17866	/// `AVX2`
17867	///
17868	/// `16/32/64-bit`
17869	VEX_Vpsrlq_ymm_ymm_xmmm128 = 2234,
17870	/// `VPSRLQ xmm1 {k1}{z}, xmm2, xmm3/m128`
17871	///
17872	/// `EVEX.128.66.0F.W1 D3 /r`
17873	///
17874	/// `AVX512VL and AVX512F`
17875	///
17876	/// `16/32/64-bit`
17877	EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128 = 2235,
17878	/// `VPSRLQ ymm1 {k1}{z}, ymm2, xmm3/m128`
17879	///
17880	/// `EVEX.256.66.0F.W1 D3 /r`
17881	///
17882	/// `AVX512VL and AVX512F`
17883	///
17884	/// `16/32/64-bit`
17885	EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128 = 2236,
17886	/// `VPSRLQ zmm1 {k1}{z}, zmm2, xmm3/m128`
17887	///
17888	/// `EVEX.512.66.0F.W1 D3 /r`
17889	///
17890	/// `AVX512F`
17891	///
17892	/// `16/32/64-bit`
17893	EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128 = 2237,
17894	/// `PADDQ mm, mm/m64`
17895	///
17896	/// `NP 0F D4 /r`
17897	///
17898	/// `MMX`
17899	///
17900	/// `16/32/64-bit`
17901	Paddq_mm_mmm64 = 2238,
17902	/// `PADDQ xmm1, xmm2/m128`
17903	///
17904	/// `66 0F D4 /r`
17905	///
17906	/// `SSE2`
17907	///
17908	/// `16/32/64-bit`
17909	Paddq_xmm_xmmm128 = 2239,
17910	/// `VPADDQ xmm1, xmm2, xmm3/m128`
17911	///
17912	/// `VEX.128.66.0F.WIG D4 /r`
17913	///
17914	/// `AVX`
17915	///
17916	/// `16/32/64-bit`
17917	VEX_Vpaddq_xmm_xmm_xmmm128 = 2240,
17918	/// `VPADDQ ymm1, ymm2, ymm3/m256`
17919	///
17920	/// `VEX.256.66.0F.WIG D4 /r`
17921	///
17922	/// `AVX2`
17923	///
17924	/// `16/32/64-bit`
17925	VEX_Vpaddq_ymm_ymm_ymmm256 = 2241,
17926	/// `VPADDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
17927	///
17928	/// `EVEX.128.66.0F.W1 D4 /r`
17929	///
17930	/// `AVX512VL and AVX512F`
17931	///
17932	/// `16/32/64-bit`
17933	EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64 = 2242,
17934	/// `VPADDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
17935	///
17936	/// `EVEX.256.66.0F.W1 D4 /r`
17937	///
17938	/// `AVX512VL and AVX512F`
17939	///
17940	/// `16/32/64-bit`
17941	EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64 = 2243,
17942	/// `VPADDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
17943	///
17944	/// `EVEX.512.66.0F.W1 D4 /r`
17945	///
17946	/// `AVX512F`
17947	///
17948	/// `16/32/64-bit`
17949	EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64 = 2244,
17950	/// `PMULLW mm, mm/m64`
17951	///
17952	/// `NP 0F D5 /r`
17953	///
17954	/// `MMX`
17955	///
17956	/// `16/32/64-bit`
17957	Pmullw_mm_mmm64 = 2245,
17958	/// `PMULLW xmm1, xmm2/m128`
17959	///
17960	/// `66 0F D5 /r`
17961	///
17962	/// `SSE2`
17963	///
17964	/// `16/32/64-bit`
17965	Pmullw_xmm_xmmm128 = 2246,
17966	/// `VPMULLW xmm1, xmm2, xmm3/m128`
17967	///
17968	/// `VEX.128.66.0F.WIG D5 /r`
17969	///
17970	/// `AVX`
17971	///
17972	/// `16/32/64-bit`
17973	VEX_Vpmullw_xmm_xmm_xmmm128 = 2247,
17974	/// `VPMULLW ymm1, ymm2, ymm3/m256`
17975	///
17976	/// `VEX.256.66.0F.WIG D5 /r`
17977	///
17978	/// `AVX2`
17979	///
17980	/// `16/32/64-bit`
17981	VEX_Vpmullw_ymm_ymm_ymmm256 = 2248,
17982	/// `VPMULLW xmm1 {k1}{z}, xmm2, xmm3/m128`
17983	///
17984	/// `EVEX.128.66.0F.WIG D5 /r`
17985	///
17986	/// `AVX512VL and AVX512BW`
17987	///
17988	/// `16/32/64-bit`
17989	EVEX_Vpmullw_xmm_k1z_xmm_xmmm128 = 2249,
17990	/// `VPMULLW ymm1 {k1}{z}, ymm2, ymm3/m256`
17991	///
17992	/// `EVEX.256.66.0F.WIG D5 /r`
17993	///
17994	/// `AVX512VL and AVX512BW`
17995	///
17996	/// `16/32/64-bit`
17997	EVEX_Vpmullw_ymm_k1z_ymm_ymmm256 = 2250,
17998	/// `VPMULLW zmm1 {k1}{z}, zmm2, zmm3/m512`
17999	///
18000	/// `EVEX.512.66.0F.WIG D5 /r`
18001	///
18002	/// `AVX512BW`
18003	///
18004	/// `16/32/64-bit`
18005	EVEX_Vpmullw_zmm_k1z_zmm_zmmm512 = 2251,
18006	/// `MOVQ xmm2/m64, xmm1`
18007	///
18008	/// `66 0F D6 /r`
18009	///
18010	/// `SSE2`
18011	///
18012	/// `16/32/64-bit`
18013	Movq_xmmm64_xmm = 2252,
18014	/// `VMOVQ xmm1/m64, xmm2`
18015	///
18016	/// `VEX.128.66.0F.WIG D6 /r`
18017	///
18018	/// `AVX`
18019	///
18020	/// `16/32/64-bit`
18021	VEX_Vmovq_xmmm64_xmm = 2253,
18022	/// `VMOVQ xmm1/m64, xmm2`
18023	///
18024	/// `EVEX.128.66.0F.W1 D6 /r`
18025	///
18026	/// `AVX512F`
18027	///
18028	/// `16/32/64-bit`
18029	EVEX_Vmovq_xmmm64_xmm = 2254,
18030	/// `MOVQ2DQ xmm, mm`
18031	///
18032	/// `F3 0F D6 /r`
18033	///
18034	/// `SSE2`
18035	///
18036	/// `16/32/64-bit`
18037	Movq2dq_xmm_mm = 2255,
18038	/// `MOVDQ2Q mm, xmm`
18039	///
18040	/// `F2 0F D6 /r`
18041	///
18042	/// `SSE2`
18043	///
18044	/// `16/32/64-bit`
18045	Movdq2q_mm_xmm = 2256,
18046	/// `PMOVMSKB r32, mm`
18047	///
18048	/// `NP 0F D7 /r`
18049	///
18050	/// `SSE`
18051	///
18052	/// `16/32/64-bit`
18053	Pmovmskb_r32_mm = 2257,
18054	/// `PMOVMSKB r64, mm`
18055	///
18056	/// `NP o64 0F D7 /r`
18057	///
18058	/// `SSE`
18059	///
18060	/// `64-bit`
18061	Pmovmskb_r64_mm = 2258,
18062	/// `PMOVMSKB r32, xmm`
18063	///
18064	/// `66 0F D7 /r`
18065	///
18066	/// `SSE2`
18067	///
18068	/// `16/32/64-bit`
18069	Pmovmskb_r32_xmm = 2259,
18070	/// `PMOVMSKB r64, xmm`
18071	///
18072	/// `66 o64 0F D7 /r`
18073	///
18074	/// `SSE2`
18075	///
18076	/// `64-bit`
18077	Pmovmskb_r64_xmm = 2260,
18078	/// `VPMOVMSKB r32, xmm1`
18079	///
18080	/// `VEX.128.66.0F.W0 D7 /r`
18081	///
18082	/// `AVX`
18083	///
18084	/// `16/32/64-bit`
18085	VEX_Vpmovmskb_r32_xmm = 2261,
18086	/// `VPMOVMSKB r64, xmm1`
18087	///
18088	/// `VEX.128.66.0F.W1 D7 /r`
18089	///
18090	/// `AVX`
18091	///
18092	/// `64-bit`
18093	VEX_Vpmovmskb_r64_xmm = 2262,
18094	/// `VPMOVMSKB r32, ymm1`
18095	///
18096	/// `VEX.256.66.0F.W0 D7 /r`
18097	///
18098	/// `AVX2`
18099	///
18100	/// `16/32/64-bit`
18101	VEX_Vpmovmskb_r32_ymm = 2263,
18102	/// `VPMOVMSKB r64, ymm1`
18103	///
18104	/// `VEX.256.66.0F.W1 D7 /r`
18105	///
18106	/// `AVX2`
18107	///
18108	/// `64-bit`
18109	VEX_Vpmovmskb_r64_ymm = 2264,
18110	/// `PSUBUSB mm, mm/m64`
18111	///
18112	/// `NP 0F D8 /r`
18113	///
18114	/// `MMX`
18115	///
18116	/// `16/32/64-bit`
18117	Psubusb_mm_mmm64 = 2265,
18118	/// `PSUBUSB xmm1, xmm2/m128`
18119	///
18120	/// `66 0F D8 /r`
18121	///
18122	/// `SSE2`
18123	///
18124	/// `16/32/64-bit`
18125	Psubusb_xmm_xmmm128 = 2266,
18126	/// `VPSUBUSB xmm1, xmm2, xmm3/m128`
18127	///
18128	/// `VEX.128.66.0F.WIG D8 /r`
18129	///
18130	/// `AVX`
18131	///
18132	/// `16/32/64-bit`
18133	VEX_Vpsubusb_xmm_xmm_xmmm128 = 2267,
18134	/// `VPSUBUSB ymm1, ymm2, ymm3/m256`
18135	///
18136	/// `VEX.256.66.0F.WIG D8 /r`
18137	///
18138	/// `AVX2`
18139	///
18140	/// `16/32/64-bit`
18141	VEX_Vpsubusb_ymm_ymm_ymmm256 = 2268,
18142	/// `VPSUBUSB xmm1 {k1}{z}, xmm2, xmm3/m128`
18143	///
18144	/// `EVEX.128.66.0F.WIG D8 /r`
18145	///
18146	/// `AVX512VL and AVX512BW`
18147	///
18148	/// `16/32/64-bit`
18149	EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128 = 2269,
18150	/// `VPSUBUSB ymm1 {k1}{z}, ymm2, ymm3/m256`
18151	///
18152	/// `EVEX.256.66.0F.WIG D8 /r`
18153	///
18154	/// `AVX512VL and AVX512BW`
18155	///
18156	/// `16/32/64-bit`
18157	EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256 = 2270,
18158	/// `VPSUBUSB zmm1 {k1}{z}, zmm2, zmm3/m512`
18159	///
18160	/// `EVEX.512.66.0F.WIG D8 /r`
18161	///
18162	/// `AVX512BW`
18163	///
18164	/// `16/32/64-bit`
18165	EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512 = 2271,
18166	/// `PSUBUSW mm, mm/m64`
18167	///
18168	/// `NP 0F D9 /r`
18169	///
18170	/// `MMX`
18171	///
18172	/// `16/32/64-bit`
18173	Psubusw_mm_mmm64 = 2272,
18174	/// `PSUBUSW xmm1, xmm2/m128`
18175	///
18176	/// `66 0F D9 /r`
18177	///
18178	/// `SSE2`
18179	///
18180	/// `16/32/64-bit`
18181	Psubusw_xmm_xmmm128 = 2273,
18182	/// `VPSUBUSW xmm1, xmm2, xmm3/m128`
18183	///
18184	/// `VEX.128.66.0F.WIG D9 /r`
18185	///
18186	/// `AVX`
18187	///
18188	/// `16/32/64-bit`
18189	VEX_Vpsubusw_xmm_xmm_xmmm128 = 2274,
18190	/// `VPSUBUSW ymm1, ymm2, ymm3/m256`
18191	///
18192	/// `VEX.256.66.0F.WIG D9 /r`
18193	///
18194	/// `AVX2`
18195	///
18196	/// `16/32/64-bit`
18197	VEX_Vpsubusw_ymm_ymm_ymmm256 = 2275,
18198	/// `VPSUBUSW xmm1 {k1}{z}, xmm2, xmm3/m128`
18199	///
18200	/// `EVEX.128.66.0F.WIG D9 /r`
18201	///
18202	/// `AVX512VL and AVX512BW`
18203	///
18204	/// `16/32/64-bit`
18205	EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128 = 2276,
18206	/// `VPSUBUSW ymm1 {k1}{z}, ymm2, ymm3/m256`
18207	///
18208	/// `EVEX.256.66.0F.WIG D9 /r`
18209	///
18210	/// `AVX512VL and AVX512BW`
18211	///
18212	/// `16/32/64-bit`
18213	EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256 = 2277,
18214	/// `VPSUBUSW zmm1 {k1}{z}, zmm2, zmm3/m512`
18215	///
18216	/// `EVEX.512.66.0F.WIG D9 /r`
18217	///
18218	/// `AVX512BW`
18219	///
18220	/// `16/32/64-bit`
18221	EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512 = 2278,
18222	/// `PMINUB mm1, mm2/m64`
18223	///
18224	/// `NP 0F DA /r`
18225	///
18226	/// `SSE`
18227	///
18228	/// `16/32/64-bit`
18229	Pminub_mm_mmm64 = 2279,
18230	/// `PMINUB xmm1, xmm2/m128`
18231	///
18232	/// `66 0F DA /r`
18233	///
18234	/// `SSE2`
18235	///
18236	/// `16/32/64-bit`
18237	Pminub_xmm_xmmm128 = 2280,
18238	/// `VPMINUB xmm1, xmm2, xmm3/m128`
18239	///
18240	/// `VEX.128.66.0F.WIG DA /r`
18241	///
18242	/// `AVX`
18243	///
18244	/// `16/32/64-bit`
18245	VEX_Vpminub_xmm_xmm_xmmm128 = 2281,
18246	/// `VPMINUB ymm1, ymm2, ymm3/m256`
18247	///
18248	/// `VEX.256.66.0F.WIG DA /r`
18249	///
18250	/// `AVX2`
18251	///
18252	/// `16/32/64-bit`
18253	VEX_Vpminub_ymm_ymm_ymmm256 = 2282,
18254	/// `VPMINUB xmm1 {k1}{z}, xmm2, xmm3/m128`
18255	///
18256	/// `EVEX.128.66.0F.WIG DA /r`
18257	///
18258	/// `AVX512VL and AVX512BW`
18259	///
18260	/// `16/32/64-bit`
18261	EVEX_Vpminub_xmm_k1z_xmm_xmmm128 = 2283,
18262	/// `VPMINUB ymm1 {k1}{z}, ymm2, ymm3/m256`
18263	///
18264	/// `EVEX.256.66.0F.WIG DA /r`
18265	///
18266	/// `AVX512VL and AVX512BW`
18267	///
18268	/// `16/32/64-bit`
18269	EVEX_Vpminub_ymm_k1z_ymm_ymmm256 = 2284,
18270	/// `VPMINUB zmm1 {k1}{z}, zmm2, zmm3/m512`
18271	///
18272	/// `EVEX.512.66.0F.WIG DA /r`
18273	///
18274	/// `AVX512BW`
18275	///
18276	/// `16/32/64-bit`
18277	EVEX_Vpminub_zmm_k1z_zmm_zmmm512 = 2285,
18278	/// `PAND mm, mm/m64`
18279	///
18280	/// `NP 0F DB /r`
18281	///
18282	/// `MMX`
18283	///
18284	/// `16/32/64-bit`
18285	Pand_mm_mmm64 = 2286,
18286	/// `PAND xmm1, xmm2/m128`
18287	///
18288	/// `66 0F DB /r`
18289	///
18290	/// `SSE2`
18291	///
18292	/// `16/32/64-bit`
18293	Pand_xmm_xmmm128 = 2287,
18294	/// `VPAND xmm1, xmm2, xmm3/m128`
18295	///
18296	/// `VEX.128.66.0F.WIG DB /r`
18297	///
18298	/// `AVX`
18299	///
18300	/// `16/32/64-bit`
18301	VEX_Vpand_xmm_xmm_xmmm128 = 2288,
18302	/// `VPAND ymm1, ymm2, ymm3/m256`
18303	///
18304	/// `VEX.256.66.0F.WIG DB /r`
18305	///
18306	/// `AVX2`
18307	///
18308	/// `16/32/64-bit`
18309	VEX_Vpand_ymm_ymm_ymmm256 = 2289,
18310	/// `VPANDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
18311	///
18312	/// `EVEX.128.66.0F.W0 DB /r`
18313	///
18314	/// `AVX512VL and AVX512F`
18315	///
18316	/// `16/32/64-bit`
18317	EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32 = 2290,
18318	/// `VPANDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
18319	///
18320	/// `EVEX.256.66.0F.W0 DB /r`
18321	///
18322	/// `AVX512VL and AVX512F`
18323	///
18324	/// `16/32/64-bit`
18325	EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32 = 2291,
18326	/// `VPANDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
18327	///
18328	/// `EVEX.512.66.0F.W0 DB /r`
18329	///
18330	/// `AVX512F`
18331	///
18332	/// `16/32/64-bit`
18333	EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32 = 2292,
18334	/// `VPANDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
18335	///
18336	/// `EVEX.128.66.0F.W1 DB /r`
18337	///
18338	/// `AVX512VL and AVX512F`
18339	///
18340	/// `16/32/64-bit`
18341	EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64 = 2293,
18342	/// `VPANDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
18343	///
18344	/// `EVEX.256.66.0F.W1 DB /r`
18345	///
18346	/// `AVX512VL and AVX512F`
18347	///
18348	/// `16/32/64-bit`
18349	EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64 = 2294,
18350	/// `VPANDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
18351	///
18352	/// `EVEX.512.66.0F.W1 DB /r`
18353	///
18354	/// `AVX512F`
18355	///
18356	/// `16/32/64-bit`
18357	EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64 = 2295,
18358	/// `PADDUSB mm, mm/m64`
18359	///
18360	/// `NP 0F DC /r`
18361	///
18362	/// `MMX`
18363	///
18364	/// `16/32/64-bit`
18365	Paddusb_mm_mmm64 = 2296,
18366	/// `PADDUSB xmm1, xmm2/m128`
18367	///
18368	/// `66 0F DC /r`
18369	///
18370	/// `SSE2`
18371	///
18372	/// `16/32/64-bit`
18373	Paddusb_xmm_xmmm128 = 2297,
18374	/// `VPADDUSB xmm1, xmm2, xmm3/m128`
18375	///
18376	/// `VEX.128.66.0F.WIG DC /r`
18377	///
18378	/// `AVX`
18379	///
18380	/// `16/32/64-bit`
18381	VEX_Vpaddusb_xmm_xmm_xmmm128 = 2298,
18382	/// `VPADDUSB ymm1, ymm2, ymm3/m256`
18383	///
18384	/// `VEX.256.66.0F.WIG DC /r`
18385	///
18386	/// `AVX2`
18387	///
18388	/// `16/32/64-bit`
18389	VEX_Vpaddusb_ymm_ymm_ymmm256 = 2299,
18390	/// `VPADDUSB xmm1 {k1}{z}, xmm2, xmm3/m128`
18391	///
18392	/// `EVEX.128.66.0F.WIG DC /r`
18393	///
18394	/// `AVX512VL and AVX512BW`
18395	///
18396	/// `16/32/64-bit`
18397	EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128 = 2300,
18398	/// `VPADDUSB ymm1 {k1}{z}, ymm2, ymm3/m256`
18399	///
18400	/// `EVEX.256.66.0F.WIG DC /r`
18401	///
18402	/// `AVX512VL and AVX512BW`
18403	///
18404	/// `16/32/64-bit`
18405	EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256 = 2301,
18406	/// `VPADDUSB zmm1 {k1}{z}, zmm2, zmm3/m512`
18407	///
18408	/// `EVEX.512.66.0F.WIG DC /r`
18409	///
18410	/// `AVX512BW`
18411	///
18412	/// `16/32/64-bit`
18413	EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512 = 2302,
18414	/// `PADDUSW mm, mm/m64`
18415	///
18416	/// `NP 0F DD /r`
18417	///
18418	/// `MMX`
18419	///
18420	/// `16/32/64-bit`
18421	Paddusw_mm_mmm64 = 2303,
18422	/// `PADDUSW xmm1, xmm2/m128`
18423	///
18424	/// `66 0F DD /r`
18425	///
18426	/// `SSE2`
18427	///
18428	/// `16/32/64-bit`
18429	Paddusw_xmm_xmmm128 = 2304,
18430	/// `VPADDUSW xmm1, xmm2, xmm3/m128`
18431	///
18432	/// `VEX.128.66.0F.WIG DD /r`
18433	///
18434	/// `AVX`
18435	///
18436	/// `16/32/64-bit`
18437	VEX_Vpaddusw_xmm_xmm_xmmm128 = 2305,
18438	/// `VPADDUSW ymm1, ymm2, ymm3/m256`
18439	///
18440	/// `VEX.256.66.0F.WIG DD /r`
18441	///
18442	/// `AVX2`
18443	///
18444	/// `16/32/64-bit`
18445	VEX_Vpaddusw_ymm_ymm_ymmm256 = 2306,
18446	/// `VPADDUSW xmm1 {k1}{z}, xmm2, xmm3/m128`
18447	///
18448	/// `EVEX.128.66.0F.WIG DD /r`
18449	///
18450	/// `AVX512VL and AVX512BW`
18451	///
18452	/// `16/32/64-bit`
18453	EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128 = 2307,
18454	/// `VPADDUSW ymm1 {k1}{z}, ymm2, ymm3/m256`
18455	///
18456	/// `EVEX.256.66.0F.WIG DD /r`
18457	///
18458	/// `AVX512VL and AVX512BW`
18459	///
18460	/// `16/32/64-bit`
18461	EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256 = 2308,
18462	/// `VPADDUSW zmm1 {k1}{z}, zmm2, zmm3/m512`
18463	///
18464	/// `EVEX.512.66.0F.WIG DD /r`
18465	///
18466	/// `AVX512BW`
18467	///
18468	/// `16/32/64-bit`
18469	EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512 = 2309,
18470	/// `PMAXUB mm1, mm2/m64`
18471	///
18472	/// `NP 0F DE /r`
18473	///
18474	/// `SSE`
18475	///
18476	/// `16/32/64-bit`
18477	Pmaxub_mm_mmm64 = 2310,
18478	/// `PMAXUB xmm1, xmm2/m128`
18479	///
18480	/// `66 0F DE /r`
18481	///
18482	/// `SSE2`
18483	///
18484	/// `16/32/64-bit`
18485	Pmaxub_xmm_xmmm128 = 2311,
18486	/// `VPMAXUB xmm1, xmm2, xmm3/m128`
18487	///
18488	/// `VEX.128.66.0F.WIG DE /r`
18489	///
18490	/// `AVX`
18491	///
18492	/// `16/32/64-bit`
18493	VEX_Vpmaxub_xmm_xmm_xmmm128 = 2312,
18494	/// `VPMAXUB ymm1, ymm2, ymm3/m256`
18495	///
18496	/// `VEX.256.66.0F.WIG DE /r`
18497	///
18498	/// `AVX2`
18499	///
18500	/// `16/32/64-bit`
18501	VEX_Vpmaxub_ymm_ymm_ymmm256 = 2313,
18502	/// `VPMAXUB xmm1 {k1}{z}, xmm2, xmm3/m128`
18503	///
18504	/// `EVEX.128.66.0F.WIG DE /r`
18505	///
18506	/// `AVX512VL and AVX512BW`
18507	///
18508	/// `16/32/64-bit`
18509	EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128 = 2314,
18510	/// `VPMAXUB ymm1 {k1}{z}, ymm2, ymm3/m256`
18511	///
18512	/// `EVEX.256.66.0F.WIG DE /r`
18513	///
18514	/// `AVX512VL and AVX512BW`
18515	///
18516	/// `16/32/64-bit`
18517	EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256 = 2315,
18518	/// `VPMAXUB zmm1 {k1}{z}, zmm2, zmm3/m512`
18519	///
18520	/// `EVEX.512.66.0F.WIG DE /r`
18521	///
18522	/// `AVX512BW`
18523	///
18524	/// `16/32/64-bit`
18525	EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512 = 2316,
18526	/// `PANDN mm, mm/m64`
18527	///
18528	/// `NP 0F DF /r`
18529	///
18530	/// `MMX`
18531	///
18532	/// `16/32/64-bit`
18533	Pandn_mm_mmm64 = 2317,
18534	/// `PANDN xmm1, xmm2/m128`
18535	///
18536	/// `66 0F DF /r`
18537	///
18538	/// `SSE2`
18539	///
18540	/// `16/32/64-bit`
18541	Pandn_xmm_xmmm128 = 2318,
18542	/// `VPANDN xmm1, xmm2, xmm3/m128`
18543	///
18544	/// `VEX.128.66.0F.WIG DF /r`
18545	///
18546	/// `AVX`
18547	///
18548	/// `16/32/64-bit`
18549	VEX_Vpandn_xmm_xmm_xmmm128 = 2319,
18550	/// `VPANDN ymm1, ymm2, ymm3/m256`
18551	///
18552	/// `VEX.256.66.0F.WIG DF /r`
18553	///
18554	/// `AVX2`
18555	///
18556	/// `16/32/64-bit`
18557	VEX_Vpandn_ymm_ymm_ymmm256 = 2320,
18558	/// `VPANDND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
18559	///
18560	/// `EVEX.128.66.0F.W0 DF /r`
18561	///
18562	/// `AVX512VL and AVX512F`
18563	///
18564	/// `16/32/64-bit`
18565	EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32 = 2321,
18566	/// `VPANDND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
18567	///
18568	/// `EVEX.256.66.0F.W0 DF /r`
18569	///
18570	/// `AVX512VL and AVX512F`
18571	///
18572	/// `16/32/64-bit`
18573	EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32 = 2322,
18574	/// `VPANDND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
18575	///
18576	/// `EVEX.512.66.0F.W0 DF /r`
18577	///
18578	/// `AVX512F`
18579	///
18580	/// `16/32/64-bit`
18581	EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32 = 2323,
18582	/// `VPANDNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
18583	///
18584	/// `EVEX.128.66.0F.W1 DF /r`
18585	///
18586	/// `AVX512VL and AVX512F`
18587	///
18588	/// `16/32/64-bit`
18589	EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64 = 2324,
18590	/// `VPANDNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
18591	///
18592	/// `EVEX.256.66.0F.W1 DF /r`
18593	///
18594	/// `AVX512VL and AVX512F`
18595	///
18596	/// `16/32/64-bit`
18597	EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64 = 2325,
18598	/// `VPANDNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
18599	///
18600	/// `EVEX.512.66.0F.W1 DF /r`
18601	///
18602	/// `AVX512F`
18603	///
18604	/// `16/32/64-bit`
18605	EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64 = 2326,
18606	/// `PAVGB mm1, mm2/m64`
18607	///
18608	/// `NP 0F E0 /r`
18609	///
18610	/// `SSE`
18611	///
18612	/// `16/32/64-bit`
18613	Pavgb_mm_mmm64 = 2327,
18614	/// `PAVGB xmm1, xmm2/m128`
18615	///
18616	/// `66 0F E0 /r`
18617	///
18618	/// `SSE2`
18619	///
18620	/// `16/32/64-bit`
18621	Pavgb_xmm_xmmm128 = 2328,
18622	/// `VPAVGB xmm1, xmm2, xmm3/m128`
18623	///
18624	/// `VEX.128.66.0F.WIG E0 /r`
18625	///
18626	/// `AVX`
18627	///
18628	/// `16/32/64-bit`
18629	VEX_Vpavgb_xmm_xmm_xmmm128 = 2329,
18630	/// `VPAVGB ymm1, ymm2, ymm3/m256`
18631	///
18632	/// `VEX.256.66.0F.WIG E0 /r`
18633	///
18634	/// `AVX2`
18635	///
18636	/// `16/32/64-bit`
18637	VEX_Vpavgb_ymm_ymm_ymmm256 = 2330,
18638	/// `VPAVGB xmm1 {k1}{z}, xmm2, xmm3/m128`
18639	///
18640	/// `EVEX.128.66.0F.WIG E0 /r`
18641	///
18642	/// `AVX512VL and AVX512BW`
18643	///
18644	/// `16/32/64-bit`
18645	EVEX_Vpavgb_xmm_k1z_xmm_xmmm128 = 2331,
18646	/// `VPAVGB ymm1 {k1}{z}, ymm2, ymm3/m256`
18647	///
18648	/// `EVEX.256.66.0F.WIG E0 /r`
18649	///
18650	/// `AVX512VL and AVX512BW`
18651	///
18652	/// `16/32/64-bit`
18653	EVEX_Vpavgb_ymm_k1z_ymm_ymmm256 = 2332,
18654	/// `VPAVGB zmm1 {k1}{z}, zmm2, zmm3/m512`
18655	///
18656	/// `EVEX.512.66.0F.WIG E0 /r`
18657	///
18658	/// `AVX512BW`
18659	///
18660	/// `16/32/64-bit`
18661	EVEX_Vpavgb_zmm_k1z_zmm_zmmm512 = 2333,
18662	/// `PSRAW mm, mm/m64`
18663	///
18664	/// `NP 0F E1 /r`
18665	///
18666	/// `MMX`
18667	///
18668	/// `16/32/64-bit`
18669	Psraw_mm_mmm64 = 2334,
18670	/// `PSRAW xmm1, xmm2/m128`
18671	///
18672	/// `66 0F E1 /r`
18673	///
18674	/// `SSE2`
18675	///
18676	/// `16/32/64-bit`
18677	Psraw_xmm_xmmm128 = 2335,
18678	/// `VPSRAW xmm1, xmm2, xmm3/m128`
18679	///
18680	/// `VEX.128.66.0F.WIG E1 /r`
18681	///
18682	/// `AVX`
18683	///
18684	/// `16/32/64-bit`
18685	VEX_Vpsraw_xmm_xmm_xmmm128 = 2336,
18686	/// `VPSRAW ymm1, ymm2, xmm3/m128`
18687	///
18688	/// `VEX.256.66.0F.WIG E1 /r`
18689	///
18690	/// `AVX2`
18691	///
18692	/// `16/32/64-bit`
18693	VEX_Vpsraw_ymm_ymm_xmmm128 = 2337,
18694	/// `VPSRAW xmm1 {k1}{z}, xmm2, xmm3/m128`
18695	///
18696	/// `EVEX.128.66.0F.WIG E1 /r`
18697	///
18698	/// `AVX512VL and AVX512BW`
18699	///
18700	/// `16/32/64-bit`
18701	EVEX_Vpsraw_xmm_k1z_xmm_xmmm128 = 2338,
18702	/// `VPSRAW ymm1 {k1}{z}, ymm2, xmm3/m128`
18703	///
18704	/// `EVEX.256.66.0F.WIG E1 /r`
18705	///
18706	/// `AVX512VL and AVX512BW`
18707	///
18708	/// `16/32/64-bit`
18709	EVEX_Vpsraw_ymm_k1z_ymm_xmmm128 = 2339,
18710	/// `VPSRAW zmm1 {k1}{z}, zmm2, xmm3/m128`
18711	///
18712	/// `EVEX.512.66.0F.WIG E1 /r`
18713	///
18714	/// `AVX512BW`
18715	///
18716	/// `16/32/64-bit`
18717	EVEX_Vpsraw_zmm_k1z_zmm_xmmm128 = 2340,
18718	/// `PSRAD mm, mm/m64`
18719	///
18720	/// `NP 0F E2 /r`
18721	///
18722	/// `MMX`
18723	///
18724	/// `16/32/64-bit`
18725	Psrad_mm_mmm64 = 2341,
18726	/// `PSRAD xmm1, xmm2/m128`
18727	///
18728	/// `66 0F E2 /r`
18729	///
18730	/// `SSE2`
18731	///
18732	/// `16/32/64-bit`
18733	Psrad_xmm_xmmm128 = 2342,
18734	/// `VPSRAD xmm1, xmm2, xmm3/m128`
18735	///
18736	/// `VEX.128.66.0F.WIG E2 /r`
18737	///
18738	/// `AVX`
18739	///
18740	/// `16/32/64-bit`
18741	VEX_Vpsrad_xmm_xmm_xmmm128 = 2343,
18742	/// `VPSRAD ymm1, ymm2, xmm3/m128`
18743	///
18744	/// `VEX.256.66.0F.WIG E2 /r`
18745	///
18746	/// `AVX2`
18747	///
18748	/// `16/32/64-bit`
18749	VEX_Vpsrad_ymm_ymm_xmmm128 = 2344,
18750	/// `VPSRAD xmm1 {k1}{z}, xmm2, xmm3/m128`
18751	///
18752	/// `EVEX.128.66.0F.W0 E2 /r`
18753	///
18754	/// `AVX512VL and AVX512F`
18755	///
18756	/// `16/32/64-bit`
18757	EVEX_Vpsrad_xmm_k1z_xmm_xmmm128 = 2345,
18758	/// `VPSRAD ymm1 {k1}{z}, ymm2, xmm3/m128`
18759	///
18760	/// `EVEX.256.66.0F.W0 E2 /r`
18761	///
18762	/// `AVX512VL and AVX512F`
18763	///
18764	/// `16/32/64-bit`
18765	EVEX_Vpsrad_ymm_k1z_ymm_xmmm128 = 2346,
18766	/// `VPSRAD zmm1 {k1}{z}, zmm2, xmm3/m128`
18767	///
18768	/// `EVEX.512.66.0F.W0 E2 /r`
18769	///
18770	/// `AVX512F`
18771	///
18772	/// `16/32/64-bit`
18773	EVEX_Vpsrad_zmm_k1z_zmm_xmmm128 = 2347,
18774	/// `VPSRAQ xmm1 {k1}{z}, xmm2, xmm3/m128`
18775	///
18776	/// `EVEX.128.66.0F.W1 E2 /r`
18777	///
18778	/// `AVX512VL and AVX512F`
18779	///
18780	/// `16/32/64-bit`
18781	EVEX_Vpsraq_xmm_k1z_xmm_xmmm128 = 2348,
18782	/// `VPSRAQ ymm1 {k1}{z}, ymm2, xmm3/m128`
18783	///
18784	/// `EVEX.256.66.0F.W1 E2 /r`
18785	///
18786	/// `AVX512VL and AVX512F`
18787	///
18788	/// `16/32/64-bit`
18789	EVEX_Vpsraq_ymm_k1z_ymm_xmmm128 = 2349,
18790	/// `VPSRAQ zmm1 {k1}{z}, zmm2, xmm3/m128`
18791	///
18792	/// `EVEX.512.66.0F.W1 E2 /r`
18793	///
18794	/// `AVX512F`
18795	///
18796	/// `16/32/64-bit`
18797	EVEX_Vpsraq_zmm_k1z_zmm_xmmm128 = 2350,
18798	/// `PAVGW mm1, mm2/m64`
18799	///
18800	/// `NP 0F E3 /r`
18801	///
18802	/// `SSE`
18803	///
18804	/// `16/32/64-bit`
18805	Pavgw_mm_mmm64 = 2351,
18806	/// `PAVGW xmm1, xmm2/m128`
18807	///
18808	/// `66 0F E3 /r`
18809	///
18810	/// `SSE2`
18811	///
18812	/// `16/32/64-bit`
18813	Pavgw_xmm_xmmm128 = 2352,
18814	/// `VPAVGW xmm1, xmm2, xmm3/m128`
18815	///
18816	/// `VEX.128.66.0F.WIG E3 /r`
18817	///
18818	/// `AVX`
18819	///
18820	/// `16/32/64-bit`
18821	VEX_Vpavgw_xmm_xmm_xmmm128 = 2353,
18822	/// `VPAVGW ymm1, ymm2, ymm3/m256`
18823	///
18824	/// `VEX.256.66.0F.WIG E3 /r`
18825	///
18826	/// `AVX2`
18827	///
18828	/// `16/32/64-bit`
18829	VEX_Vpavgw_ymm_ymm_ymmm256 = 2354,
18830	/// `VPAVGW xmm1 {k1}{z}, xmm2, xmm3/m128`
18831	///
18832	/// `EVEX.128.66.0F.WIG E3 /r`
18833	///
18834	/// `AVX512VL and AVX512BW`
18835	///
18836	/// `16/32/64-bit`
18837	EVEX_Vpavgw_xmm_k1z_xmm_xmmm128 = 2355,
18838	/// `VPAVGW ymm1 {k1}{z}, ymm2, ymm3/m256`
18839	///
18840	/// `EVEX.256.66.0F.WIG E3 /r`
18841	///
18842	/// `AVX512VL and AVX512BW`
18843	///
18844	/// `16/32/64-bit`
18845	EVEX_Vpavgw_ymm_k1z_ymm_ymmm256 = 2356,
18846	/// `VPAVGW zmm1 {k1}{z}, zmm2, zmm3/m512`
18847	///
18848	/// `EVEX.512.66.0F.WIG E3 /r`
18849	///
18850	/// `AVX512BW`
18851	///
18852	/// `16/32/64-bit`
18853	EVEX_Vpavgw_zmm_k1z_zmm_zmmm512 = 2357,
18854	/// `PMULHUW mm1, mm2/m64`
18855	///
18856	/// `NP 0F E4 /r`
18857	///
18858	/// `SSE`
18859	///
18860	/// `16/32/64-bit`
18861	Pmulhuw_mm_mmm64 = 2358,
18862	/// `PMULHUW xmm1, xmm2/m128`
18863	///
18864	/// `66 0F E4 /r`
18865	///
18866	/// `SSE2`
18867	///
18868	/// `16/32/64-bit`
18869	Pmulhuw_xmm_xmmm128 = 2359,
18870	/// `VPMULHUW xmm1, xmm2, xmm3/m128`
18871	///
18872	/// `VEX.128.66.0F.WIG E4 /r`
18873	///
18874	/// `AVX`
18875	///
18876	/// `16/32/64-bit`
18877	VEX_Vpmulhuw_xmm_xmm_xmmm128 = 2360,
18878	/// `VPMULHUW ymm1, ymm2, ymm3/m256`
18879	///
18880	/// `VEX.256.66.0F.WIG E4 /r`
18881	///
18882	/// `AVX2`
18883	///
18884	/// `16/32/64-bit`
18885	VEX_Vpmulhuw_ymm_ymm_ymmm256 = 2361,
18886	/// `VPMULHUW xmm1 {k1}{z}, xmm2, xmm3/m128`
18887	///
18888	/// `EVEX.128.66.0F.WIG E4 /r`
18889	///
18890	/// `AVX512VL and AVX512BW`
18891	///
18892	/// `16/32/64-bit`
18893	EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128 = 2362,
18894	/// `VPMULHUW ymm1 {k1}{z}, ymm2, ymm3/m256`
18895	///
18896	/// `EVEX.256.66.0F.WIG E4 /r`
18897	///
18898	/// `AVX512VL and AVX512BW`
18899	///
18900	/// `16/32/64-bit`
18901	EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256 = 2363,
18902	/// `VPMULHUW zmm1 {k1}{z}, zmm2, zmm3/m512`
18903	///
18904	/// `EVEX.512.66.0F.WIG E4 /r`
18905	///
18906	/// `AVX512BW`
18907	///
18908	/// `16/32/64-bit`
18909	EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512 = 2364,
18910	/// `PMULHW mm, mm/m64`
18911	///
18912	/// `NP 0F E5 /r`
18913	///
18914	/// `MMX`
18915	///
18916	/// `16/32/64-bit`
18917	Pmulhw_mm_mmm64 = 2365,
18918	/// `PMULHW xmm1, xmm2/m128`
18919	///
18920	/// `66 0F E5 /r`
18921	///
18922	/// `SSE2`
18923	///
18924	/// `16/32/64-bit`
18925	Pmulhw_xmm_xmmm128 = 2366,
18926	/// `VPMULHW xmm1, xmm2, xmm3/m128`
18927	///
18928	/// `VEX.128.66.0F.WIG E5 /r`
18929	///
18930	/// `AVX`
18931	///
18932	/// `16/32/64-bit`
18933	VEX_Vpmulhw_xmm_xmm_xmmm128 = 2367,
18934	/// `VPMULHW ymm1, ymm2, ymm3/m256`
18935	///
18936	/// `VEX.256.66.0F.WIG E5 /r`
18937	///
18938	/// `AVX2`
18939	///
18940	/// `16/32/64-bit`
18941	VEX_Vpmulhw_ymm_ymm_ymmm256 = 2368,
18942	/// `VPMULHW xmm1 {k1}{z}, xmm2, xmm3/m128`
18943	///
18944	/// `EVEX.128.66.0F.WIG E5 /r`
18945	///
18946	/// `AVX512VL and AVX512BW`
18947	///
18948	/// `16/32/64-bit`
18949	EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128 = 2369,
18950	/// `VPMULHW ymm1 {k1}{z}, ymm2, ymm3/m256`
18951	///
18952	/// `EVEX.256.66.0F.WIG E5 /r`
18953	///
18954	/// `AVX512VL and AVX512BW`
18955	///
18956	/// `16/32/64-bit`
18957	EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256 = 2370,
18958	/// `VPMULHW zmm1 {k1}{z}, zmm2, zmm3/m512`
18959	///
18960	/// `EVEX.512.66.0F.WIG E5 /r`
18961	///
18962	/// `AVX512BW`
18963	///
18964	/// `16/32/64-bit`
18965	EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512 = 2371,
18966	/// `CVTTPD2DQ xmm1, xmm2/m128`
18967	///
18968	/// `66 0F E6 /r`
18969	///
18970	/// `SSE2`
18971	///
18972	/// `16/32/64-bit`
18973	Cvttpd2dq_xmm_xmmm128 = 2372,
18974	/// `VCVTTPD2DQ xmm1, xmm2/m128`
18975	///
18976	/// `VEX.128.66.0F.WIG E6 /r`
18977	///
18978	/// `AVX`
18979	///
18980	/// `16/32/64-bit`
18981	VEX_Vcvttpd2dq_xmm_xmmm128 = 2373,
18982	/// `VCVTTPD2DQ xmm1, ymm2/m256`
18983	///
18984	/// `VEX.256.66.0F.WIG E6 /r`
18985	///
18986	/// `AVX`
18987	///
18988	/// `16/32/64-bit`
18989	VEX_Vcvttpd2dq_xmm_ymmm256 = 2374,
18990	/// `VCVTTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
18991	///
18992	/// `EVEX.128.66.0F.W1 E6 /r`
18993	///
18994	/// `AVX512VL and AVX512F`
18995	///
18996	/// `16/32/64-bit`
18997	EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64 = 2375,
18998	/// `VCVTTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst`
18999	///
19000	/// `EVEX.256.66.0F.W1 E6 /r`
19001	///
19002	/// `AVX512VL and AVX512F`
19003	///
19004	/// `16/32/64-bit`
19005	EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64 = 2376,
19006	/// `VCVTTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
19007	///
19008	/// `EVEX.512.66.0F.W1 E6 /r`
19009	///
19010	/// `AVX512F`
19011	///
19012	/// `16/32/64-bit`
19013	EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae = 2377,
19014	/// `CVTDQ2PD xmm1, xmm2/m64`
19015	///
19016	/// `F3 0F E6 /r`
19017	///
19018	/// `SSE2`
19019	///
19020	/// `16/32/64-bit`
19021	Cvtdq2pd_xmm_xmmm64 = 2378,
19022	/// `VCVTDQ2PD xmm1, xmm2/m64`
19023	///
19024	/// `VEX.128.F3.0F.WIG E6 /r`
19025	///
19026	/// `AVX`
19027	///
19028	/// `16/32/64-bit`
19029	VEX_Vcvtdq2pd_xmm_xmmm64 = 2379,
19030	/// `VCVTDQ2PD ymm1, xmm2/m128`
19031	///
19032	/// `VEX.256.F3.0F.WIG E6 /r`
19033	///
19034	/// `AVX`
19035	///
19036	/// `16/32/64-bit`
19037	VEX_Vcvtdq2pd_ymm_xmmm128 = 2380,
19038	/// `VCVTDQ2PD xmm1 {k1}{z}, xmm2/m64/m32bcst`
19039	///
19040	/// `EVEX.128.F3.0F.W0 E6 /r`
19041	///
19042	/// `AVX512VL and AVX512F`
19043	///
19044	/// `16/32/64-bit`
19045	EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32 = 2381,
19046	/// `VCVTDQ2PD ymm1 {k1}{z}, xmm2/m128/m32bcst`
19047	///
19048	/// `EVEX.256.F3.0F.W0 E6 /r`
19049	///
19050	/// `AVX512VL and AVX512F`
19051	///
19052	/// `16/32/64-bit`
19053	EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32 = 2382,
19054	/// `VCVTDQ2PD zmm1 {k1}{z}, ymm2/m256/m32bcst{er}`
19055	///
19056	/// `EVEX.512.F3.0F.W0 E6 /r`
19057	///
19058	/// `AVX512F`
19059	///
19060	/// `16/32/64-bit`
19061	EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er = 2383,
19062	/// `VCVTQQ2PD xmm1 {k1}{z}, xmm2/m128/m64bcst`
19063	///
19064	/// `EVEX.128.F3.0F.W1 E6 /r`
19065	///
19066	/// `AVX512VL and AVX512DQ`
19067	///
19068	/// `16/32/64-bit`
19069	EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64 = 2384,
19070	/// `VCVTQQ2PD ymm1 {k1}{z}, ymm2/m256/m64bcst`
19071	///
19072	/// `EVEX.256.F3.0F.W1 E6 /r`
19073	///
19074	/// `AVX512VL and AVX512DQ`
19075	///
19076	/// `16/32/64-bit`
19077	EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64 = 2385,
19078	/// `VCVTQQ2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
19079	///
19080	/// `EVEX.512.F3.0F.W1 E6 /r`
19081	///
19082	/// `AVX512DQ`
19083	///
19084	/// `16/32/64-bit`
19085	EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er = 2386,
19086	/// `CVTPD2DQ xmm1, xmm2/m128`
19087	///
19088	/// `F2 0F E6 /r`
19089	///
19090	/// `SSE2`
19091	///
19092	/// `16/32/64-bit`
19093	Cvtpd2dq_xmm_xmmm128 = 2387,
19094	/// `VCVTPD2DQ xmm1, xmm2/m128`
19095	///
19096	/// `VEX.128.F2.0F.WIG E6 /r`
19097	///
19098	/// `AVX`
19099	///
19100	/// `16/32/64-bit`
19101	VEX_Vcvtpd2dq_xmm_xmmm128 = 2388,
19102	/// `VCVTPD2DQ xmm1, ymm2/m256`
19103	///
19104	/// `VEX.256.F2.0F.WIG E6 /r`
19105	///
19106	/// `AVX`
19107	///
19108	/// `16/32/64-bit`
19109	VEX_Vcvtpd2dq_xmm_ymmm256 = 2389,
19110	/// `VCVTPD2DQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
19111	///
19112	/// `EVEX.128.F2.0F.W1 E6 /r`
19113	///
19114	/// `AVX512VL and AVX512F`
19115	///
19116	/// `16/32/64-bit`
19117	EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64 = 2390,
19118	/// `VCVTPD2DQ xmm1 {k1}{z}, ymm2/m256/m64bcst`
19119	///
19120	/// `EVEX.256.F2.0F.W1 E6 /r`
19121	///
19122	/// `AVX512VL and AVX512F`
19123	///
19124	/// `16/32/64-bit`
19125	EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64 = 2391,
19126	/// `VCVTPD2DQ ymm1 {k1}{z}, zmm2/m512/m64bcst{er}`
19127	///
19128	/// `EVEX.512.F2.0F.W1 E6 /r`
19129	///
19130	/// `AVX512F`
19131	///
19132	/// `16/32/64-bit`
19133	EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er = 2392,
19134	/// `MOVNTQ m64, mm`
19135	///
19136	/// `NP 0F E7 /r`
19137	///
19138	/// `SSE`
19139	///
19140	/// `16/32/64-bit`
19141	Movntq_m64_mm = 2393,
19142	/// `MOVNTDQ m128, xmm1`
19143	///
19144	/// `66 0F E7 /r`
19145	///
19146	/// `SSE2`
19147	///
19148	/// `16/32/64-bit`
19149	Movntdq_m128_xmm = 2394,
19150	/// `VMOVNTDQ m128, xmm1`
19151	///
19152	/// `VEX.128.66.0F.WIG E7 /r`
19153	///
19154	/// `AVX`
19155	///
19156	/// `16/32/64-bit`
19157	VEX_Vmovntdq_m128_xmm = 2395,
19158	/// `VMOVNTDQ m256, ymm1`
19159	///
19160	/// `VEX.256.66.0F.WIG E7 /r`
19161	///
19162	/// `AVX`
19163	///
19164	/// `16/32/64-bit`
19165	VEX_Vmovntdq_m256_ymm = 2396,
19166	/// `VMOVNTDQ m128, xmm1`
19167	///
19168	/// `EVEX.128.66.0F.W0 E7 /r`
19169	///
19170	/// `AVX512VL and AVX512F`
19171	///
19172	/// `16/32/64-bit`
19173	EVEX_Vmovntdq_m128_xmm = 2397,
19174	/// `VMOVNTDQ m256, ymm1`
19175	///
19176	/// `EVEX.256.66.0F.W0 E7 /r`
19177	///
19178	/// `AVX512VL and AVX512F`
19179	///
19180	/// `16/32/64-bit`
19181	EVEX_Vmovntdq_m256_ymm = 2398,
19182	/// `VMOVNTDQ m512, zmm1`
19183	///
19184	/// `EVEX.512.66.0F.W0 E7 /r`
19185	///
19186	/// `AVX512F`
19187	///
19188	/// `16/32/64-bit`
19189	EVEX_Vmovntdq_m512_zmm = 2399,
19190	/// `PSUBSB mm, mm/m64`
19191	///
19192	/// `NP 0F E8 /r`
19193	///
19194	/// `MMX`
19195	///
19196	/// `16/32/64-bit`
19197	Psubsb_mm_mmm64 = 2400,
19198	/// `PSUBSB xmm1, xmm2/m128`
19199	///
19200	/// `66 0F E8 /r`
19201	///
19202	/// `SSE2`
19203	///
19204	/// `16/32/64-bit`
19205	Psubsb_xmm_xmmm128 = 2401,
19206	/// `VPSUBSB xmm1, xmm2, xmm3/m128`
19207	///
19208	/// `VEX.128.66.0F.WIG E8 /r`
19209	///
19210	/// `AVX`
19211	///
19212	/// `16/32/64-bit`
19213	VEX_Vpsubsb_xmm_xmm_xmmm128 = 2402,
19214	/// `VPSUBSB ymm1, ymm2, ymm3/m256`
19215	///
19216	/// `VEX.256.66.0F.WIG E8 /r`
19217	///
19218	/// `AVX2`
19219	///
19220	/// `16/32/64-bit`
19221	VEX_Vpsubsb_ymm_ymm_ymmm256 = 2403,
19222	/// `VPSUBSB xmm1 {k1}{z}, xmm2, xmm3/m128`
19223	///
19224	/// `EVEX.128.66.0F.WIG E8 /r`
19225	///
19226	/// `AVX512VL and AVX512BW`
19227	///
19228	/// `16/32/64-bit`
19229	EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128 = 2404,
19230	/// `VPSUBSB ymm1 {k1}{z}, ymm2, ymm3/m256`
19231	///
19232	/// `EVEX.256.66.0F.WIG E8 /r`
19233	///
19234	/// `AVX512VL and AVX512BW`
19235	///
19236	/// `16/32/64-bit`
19237	EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256 = 2405,
19238	/// `VPSUBSB zmm1 {k1}{z}, zmm2, zmm3/m512`
19239	///
19240	/// `EVEX.512.66.0F.WIG E8 /r`
19241	///
19242	/// `AVX512BW`
19243	///
19244	/// `16/32/64-bit`
19245	EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512 = 2406,
19246	/// `PSUBSW mm, mm/m64`
19247	///
19248	/// `NP 0F E9 /r`
19249	///
19250	/// `MMX`
19251	///
19252	/// `16/32/64-bit`
19253	Psubsw_mm_mmm64 = 2407,
19254	/// `PSUBSW xmm1, xmm2/m128`
19255	///
19256	/// `66 0F E9 /r`
19257	///
19258	/// `SSE2`
19259	///
19260	/// `16/32/64-bit`
19261	Psubsw_xmm_xmmm128 = 2408,
19262	/// `VPSUBSW xmm1, xmm2, xmm3/m128`
19263	///
19264	/// `VEX.128.66.0F.WIG E9 /r`
19265	///
19266	/// `AVX`
19267	///
19268	/// `16/32/64-bit`
19269	VEX_Vpsubsw_xmm_xmm_xmmm128 = 2409,
19270	/// `VPSUBSW ymm1, ymm2, ymm3/m256`
19271	///
19272	/// `VEX.256.66.0F.WIG E9 /r`
19273	///
19274	/// `AVX2`
19275	///
19276	/// `16/32/64-bit`
19277	VEX_Vpsubsw_ymm_ymm_ymmm256 = 2410,
19278	/// `VPSUBSW xmm1 {k1}{z}, xmm2, xmm3/m128`
19279	///
19280	/// `EVEX.128.66.0F.WIG E9 /r`
19281	///
19282	/// `AVX512VL and AVX512BW`
19283	///
19284	/// `16/32/64-bit`
19285	EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128 = 2411,
19286	/// `VPSUBSW ymm1 {k1}{z}, ymm2, ymm3/m256`
19287	///
19288	/// `EVEX.256.66.0F.WIG E9 /r`
19289	///
19290	/// `AVX512VL and AVX512BW`
19291	///
19292	/// `16/32/64-bit`
19293	EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256 = 2412,
19294	/// `VPSUBSW zmm1 {k1}{z}, zmm2, zmm3/m512`
19295	///
19296	/// `EVEX.512.66.0F.WIG E9 /r`
19297	///
19298	/// `AVX512BW`
19299	///
19300	/// `16/32/64-bit`
19301	EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512 = 2413,
19302	/// `PMINSW mm1, mm2/m64`
19303	///
19304	/// `NP 0F EA /r`
19305	///
19306	/// `SSE`
19307	///
19308	/// `16/32/64-bit`
19309	Pminsw_mm_mmm64 = 2414,
19310	/// `PMINSW xmm1, xmm2/m128`
19311	///
19312	/// `66 0F EA /r`
19313	///
19314	/// `SSE2`
19315	///
19316	/// `16/32/64-bit`
19317	Pminsw_xmm_xmmm128 = 2415,
19318	/// `VPMINSW xmm1, xmm2, xmm3/m128`
19319	///
19320	/// `VEX.128.66.0F.WIG EA /r`
19321	///
19322	/// `AVX`
19323	///
19324	/// `16/32/64-bit`
19325	VEX_Vpminsw_xmm_xmm_xmmm128 = 2416,
19326	/// `VPMINSW ymm1, ymm2, ymm3/m256`
19327	///
19328	/// `VEX.256.66.0F.WIG EA /r`
19329	///
19330	/// `AVX2`
19331	///
19332	/// `16/32/64-bit`
19333	VEX_Vpminsw_ymm_ymm_ymmm256 = 2417,
19334	/// `VPMINSW xmm1 {k1}{z}, xmm2, xmm3/m128`
19335	///
19336	/// `EVEX.128.66.0F.WIG EA /r`
19337	///
19338	/// `AVX512VL and AVX512BW`
19339	///
19340	/// `16/32/64-bit`
19341	EVEX_Vpminsw_xmm_k1z_xmm_xmmm128 = 2418,
19342	/// `VPMINSW ymm1 {k1}{z}, ymm2, ymm3/m256`
19343	///
19344	/// `EVEX.256.66.0F.WIG EA /r`
19345	///
19346	/// `AVX512VL and AVX512BW`
19347	///
19348	/// `16/32/64-bit`
19349	EVEX_Vpminsw_ymm_k1z_ymm_ymmm256 = 2419,
19350	/// `VPMINSW zmm1 {k1}{z}, zmm2, zmm3/m512`
19351	///
19352	/// `EVEX.512.66.0F.WIG EA /r`
19353	///
19354	/// `AVX512BW`
19355	///
19356	/// `16/32/64-bit`
19357	EVEX_Vpminsw_zmm_k1z_zmm_zmmm512 = 2420,
19358	/// `POR mm, mm/m64`
19359	///
19360	/// `NP 0F EB /r`
19361	///
19362	/// `MMX`
19363	///
19364	/// `16/32/64-bit`
19365	Por_mm_mmm64 = 2421,
19366	/// `POR xmm1, xmm2/m128`
19367	///
19368	/// `66 0F EB /r`
19369	///
19370	/// `SSE2`
19371	///
19372	/// `16/32/64-bit`
19373	Por_xmm_xmmm128 = 2422,
19374	/// `VPOR xmm1, xmm2, xmm3/m128`
19375	///
19376	/// `VEX.128.66.0F.WIG EB /r`
19377	///
19378	/// `AVX`
19379	///
19380	/// `16/32/64-bit`
19381	VEX_Vpor_xmm_xmm_xmmm128 = 2423,
19382	/// `VPOR ymm1, ymm2, ymm3/m256`
19383	///
19384	/// `VEX.256.66.0F.WIG EB /r`
19385	///
19386	/// `AVX2`
19387	///
19388	/// `16/32/64-bit`
19389	VEX_Vpor_ymm_ymm_ymmm256 = 2424,
19390	/// `VPORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
19391	///
19392	/// `EVEX.128.66.0F.W0 EB /r`
19393	///
19394	/// `AVX512VL and AVX512F`
19395	///
19396	/// `16/32/64-bit`
19397	EVEX_Vpord_xmm_k1z_xmm_xmmm128b32 = 2425,
19398	/// `VPORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
19399	///
19400	/// `EVEX.256.66.0F.W0 EB /r`
19401	///
19402	/// `AVX512VL and AVX512F`
19403	///
19404	/// `16/32/64-bit`
19405	EVEX_Vpord_ymm_k1z_ymm_ymmm256b32 = 2426,
19406	/// `VPORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
19407	///
19408	/// `EVEX.512.66.0F.W0 EB /r`
19409	///
19410	/// `AVX512F`
19411	///
19412	/// `16/32/64-bit`
19413	EVEX_Vpord_zmm_k1z_zmm_zmmm512b32 = 2427,
19414	/// `VPORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
19415	///
19416	/// `EVEX.128.66.0F.W1 EB /r`
19417	///
19418	/// `AVX512VL and AVX512F`
19419	///
19420	/// `16/32/64-bit`
19421	EVEX_Vporq_xmm_k1z_xmm_xmmm128b64 = 2428,
19422	/// `VPORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
19423	///
19424	/// `EVEX.256.66.0F.W1 EB /r`
19425	///
19426	/// `AVX512VL and AVX512F`
19427	///
19428	/// `16/32/64-bit`
19429	EVEX_Vporq_ymm_k1z_ymm_ymmm256b64 = 2429,
19430	/// `VPORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
19431	///
19432	/// `EVEX.512.66.0F.W1 EB /r`
19433	///
19434	/// `AVX512F`
19435	///
19436	/// `16/32/64-bit`
19437	EVEX_Vporq_zmm_k1z_zmm_zmmm512b64 = 2430,
19438	/// `PADDSB mm, mm/m64`
19439	///
19440	/// `NP 0F EC /r`
19441	///
19442	/// `MMX`
19443	///
19444	/// `16/32/64-bit`
19445	Paddsb_mm_mmm64 = 2431,
19446	/// `PADDSB xmm1, xmm2/m128`
19447	///
19448	/// `66 0F EC /r`
19449	///
19450	/// `SSE2`
19451	///
19452	/// `16/32/64-bit`
19453	Paddsb_xmm_xmmm128 = 2432,
19454	/// `VPADDSB xmm1, xmm2, xmm3/m128`
19455	///
19456	/// `VEX.128.66.0F.WIG EC /r`
19457	///
19458	/// `AVX`
19459	///
19460	/// `16/32/64-bit`
19461	VEX_Vpaddsb_xmm_xmm_xmmm128 = 2433,
19462	/// `VPADDSB ymm1, ymm2, ymm3/m256`
19463	///
19464	/// `VEX.256.66.0F.WIG EC /r`
19465	///
19466	/// `AVX2`
19467	///
19468	/// `16/32/64-bit`
19469	VEX_Vpaddsb_ymm_ymm_ymmm256 = 2434,
19470	/// `VPADDSB xmm1 {k1}{z}, xmm2, xmm3/m128`
19471	///
19472	/// `EVEX.128.66.0F.WIG EC /r`
19473	///
19474	/// `AVX512VL and AVX512BW`
19475	///
19476	/// `16/32/64-bit`
19477	EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128 = 2435,
19478	/// `VPADDSB ymm1 {k1}{z}, ymm2, ymm3/m256`
19479	///
19480	/// `EVEX.256.66.0F.WIG EC /r`
19481	///
19482	/// `AVX512VL and AVX512BW`
19483	///
19484	/// `16/32/64-bit`
19485	EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256 = 2436,
19486	/// `VPADDSB zmm1 {k1}{z}, zmm2, zmm3/m512`
19487	///
19488	/// `EVEX.512.66.0F.WIG EC /r`
19489	///
19490	/// `AVX512BW`
19491	///
19492	/// `16/32/64-bit`
19493	EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512 = 2437,
19494	/// `PADDSW mm, mm/m64`
19495	///
19496	/// `NP 0F ED /r`
19497	///
19498	/// `MMX`
19499	///
19500	/// `16/32/64-bit`
19501	Paddsw_mm_mmm64 = 2438,
19502	/// `PADDSW xmm1, xmm2/m128`
19503	///
19504	/// `66 0F ED /r`
19505	///
19506	/// `SSE2`
19507	///
19508	/// `16/32/64-bit`
19509	Paddsw_xmm_xmmm128 = 2439,
19510	/// `VPADDSW xmm1, xmm2, xmm3/m128`
19511	///
19512	/// `VEX.128.66.0F.WIG ED /r`
19513	///
19514	/// `AVX`
19515	///
19516	/// `16/32/64-bit`
19517	VEX_Vpaddsw_xmm_xmm_xmmm128 = 2440,
19518	/// `VPADDSW ymm1, ymm2, ymm3/m256`
19519	///
19520	/// `VEX.256.66.0F.WIG ED /r`
19521	///
19522	/// `AVX2`
19523	///
19524	/// `16/32/64-bit`
19525	VEX_Vpaddsw_ymm_ymm_ymmm256 = 2441,
19526	/// `VPADDSW xmm1 {k1}{z}, xmm2, xmm3/m128`
19527	///
19528	/// `EVEX.128.66.0F.WIG ED /r`
19529	///
19530	/// `AVX512VL and AVX512BW`
19531	///
19532	/// `16/32/64-bit`
19533	EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128 = 2442,
19534	/// `VPADDSW ymm1 {k1}{z}, ymm2, ymm3/m256`
19535	///
19536	/// `EVEX.256.66.0F.WIG ED /r`
19537	///
19538	/// `AVX512VL and AVX512BW`
19539	///
19540	/// `16/32/64-bit`
19541	EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256 = 2443,
19542	/// `VPADDSW zmm1 {k1}{z}, zmm2, zmm3/m512`
19543	///
19544	/// `EVEX.512.66.0F.WIG ED /r`
19545	///
19546	/// `AVX512BW`
19547	///
19548	/// `16/32/64-bit`
19549	EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512 = 2444,
19550	/// `PMAXSW mm1, mm2/m64`
19551	///
19552	/// `NP 0F EE /r`
19553	///
19554	/// `SSE`
19555	///
19556	/// `16/32/64-bit`
19557	Pmaxsw_mm_mmm64 = 2445,
19558	/// `PMAXSW xmm1, xmm2/m128`
19559	///
19560	/// `66 0F EE /r`
19561	///
19562	/// `SSE2`
19563	///
19564	/// `16/32/64-bit`
19565	Pmaxsw_xmm_xmmm128 = 2446,
19566	/// `VPMAXSW xmm1, xmm2, xmm3/m128`
19567	///
19568	/// `VEX.128.66.0F.WIG EE /r`
19569	///
19570	/// `AVX`
19571	///
19572	/// `16/32/64-bit`
19573	VEX_Vpmaxsw_xmm_xmm_xmmm128 = 2447,
19574	/// `VPMAXSW ymm1, ymm2, ymm3/m256`
19575	///
19576	/// `VEX.256.66.0F.WIG EE /r`
19577	///
19578	/// `AVX2`
19579	///
19580	/// `16/32/64-bit`
19581	VEX_Vpmaxsw_ymm_ymm_ymmm256 = 2448,
19582	/// `VPMAXSW xmm1 {k1}{z}, xmm2, xmm3/m128`
19583	///
19584	/// `EVEX.128.66.0F.WIG EE /r`
19585	///
19586	/// `AVX512VL and AVX512BW`
19587	///
19588	/// `16/32/64-bit`
19589	EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128 = 2449,
19590	/// `VPMAXSW ymm1 {k1}{z}, ymm2, ymm3/m256`
19591	///
19592	/// `EVEX.256.66.0F.WIG EE /r`
19593	///
19594	/// `AVX512VL and AVX512BW`
19595	///
19596	/// `16/32/64-bit`
19597	EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256 = 2450,
19598	/// `VPMAXSW zmm1 {k1}{z}, zmm2, zmm3/m512`
19599	///
19600	/// `EVEX.512.66.0F.WIG EE /r`
19601	///
19602	/// `AVX512BW`
19603	///
19604	/// `16/32/64-bit`
19605	EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512 = 2451,
19606	/// `PXOR mm, mm/m64`
19607	///
19608	/// `NP 0F EF /r`
19609	///
19610	/// `MMX`
19611	///
19612	/// `16/32/64-bit`
19613	Pxor_mm_mmm64 = 2452,
19614	/// `PXOR xmm1, xmm2/m128`
19615	///
19616	/// `66 0F EF /r`
19617	///
19618	/// `SSE2`
19619	///
19620	/// `16/32/64-bit`
19621	Pxor_xmm_xmmm128 = 2453,
19622	/// `VPXOR xmm1, xmm2, xmm3/m128`
19623	///
19624	/// `VEX.128.66.0F.WIG EF /r`
19625	///
19626	/// `AVX`
19627	///
19628	/// `16/32/64-bit`
19629	VEX_Vpxor_xmm_xmm_xmmm128 = 2454,
19630	/// `VPXOR ymm1, ymm2, ymm3/m256`
19631	///
19632	/// `VEX.256.66.0F.WIG EF /r`
19633	///
19634	/// `AVX2`
19635	///
19636	/// `16/32/64-bit`
19637	VEX_Vpxor_ymm_ymm_ymmm256 = 2455,
19638	/// `VPXORD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
19639	///
19640	/// `EVEX.128.66.0F.W0 EF /r`
19641	///
19642	/// `AVX512VL and AVX512F`
19643	///
19644	/// `16/32/64-bit`
19645	EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32 = 2456,
19646	/// `VPXORD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
19647	///
19648	/// `EVEX.256.66.0F.W0 EF /r`
19649	///
19650	/// `AVX512VL and AVX512F`
19651	///
19652	/// `16/32/64-bit`
19653	EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32 = 2457,
19654	/// `VPXORD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
19655	///
19656	/// `EVEX.512.66.0F.W0 EF /r`
19657	///
19658	/// `AVX512F`
19659	///
19660	/// `16/32/64-bit`
19661	EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32 = 2458,
19662	/// `VPXORQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
19663	///
19664	/// `EVEX.128.66.0F.W1 EF /r`
19665	///
19666	/// `AVX512VL and AVX512F`
19667	///
19668	/// `16/32/64-bit`
19669	EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64 = 2459,
19670	/// `VPXORQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
19671	///
19672	/// `EVEX.256.66.0F.W1 EF /r`
19673	///
19674	/// `AVX512VL and AVX512F`
19675	///
19676	/// `16/32/64-bit`
19677	EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64 = 2460,
19678	/// `VPXORQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
19679	///
19680	/// `EVEX.512.66.0F.W1 EF /r`
19681	///
19682	/// `AVX512F`
19683	///
19684	/// `16/32/64-bit`
19685	EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64 = 2461,
19686	/// `LDDQU xmm1, m128`
19687	///
19688	/// `F2 0F F0 /r`
19689	///
19690	/// `SSE3`
19691	///
19692	/// `16/32/64-bit`
19693	Lddqu_xmm_m128 = 2462,
19694	/// `VLDDQU xmm1, m128`
19695	///
19696	/// `VEX.128.F2.0F.WIG F0 /r`
19697	///
19698	/// `AVX`
19699	///
19700	/// `16/32/64-bit`
19701	VEX_Vlddqu_xmm_m128 = 2463,
19702	/// `VLDDQU ymm1, m256`
19703	///
19704	/// `VEX.256.F2.0F.WIG F0 /r`
19705	///
19706	/// `AVX`
19707	///
19708	/// `16/32/64-bit`
19709	VEX_Vlddqu_ymm_m256 = 2464,
19710	/// `PSLLW mm, mm/m64`
19711	///
19712	/// `NP 0F F1 /r`
19713	///
19714	/// `MMX`
19715	///
19716	/// `16/32/64-bit`
19717	Psllw_mm_mmm64 = 2465,
19718	/// `PSLLW xmm1, xmm2/m128`
19719	///
19720	/// `66 0F F1 /r`
19721	///
19722	/// `SSE2`
19723	///
19724	/// `16/32/64-bit`
19725	Psllw_xmm_xmmm128 = 2466,
19726	/// `VPSLLW xmm1, xmm2, xmm3/m128`
19727	///
19728	/// `VEX.128.66.0F.WIG F1 /r`
19729	///
19730	/// `AVX`
19731	///
19732	/// `16/32/64-bit`
19733	VEX_Vpsllw_xmm_xmm_xmmm128 = 2467,
19734	/// `VPSLLW ymm1, ymm2, xmm3/m128`
19735	///
19736	/// `VEX.256.66.0F.WIG F1 /r`
19737	///
19738	/// `AVX2`
19739	///
19740	/// `16/32/64-bit`
19741	VEX_Vpsllw_ymm_ymm_xmmm128 = 2468,
19742	/// `VPSLLW xmm1 {k1}{z}, xmm2, xmm3/m128`
19743	///
19744	/// `EVEX.128.66.0F.WIG F1 /r`
19745	///
19746	/// `AVX512VL and AVX512BW`
19747	///
19748	/// `16/32/64-bit`
19749	EVEX_Vpsllw_xmm_k1z_xmm_xmmm128 = 2469,
19750	/// `VPSLLW ymm1 {k1}{z}, ymm2, xmm3/m128`
19751	///
19752	/// `EVEX.256.66.0F.WIG F1 /r`
19753	///
19754	/// `AVX512VL and AVX512BW`
19755	///
19756	/// `16/32/64-bit`
19757	EVEX_Vpsllw_ymm_k1z_ymm_xmmm128 = 2470,
19758	/// `VPSLLW zmm1 {k1}{z}, zmm2, xmm3/m128`
19759	///
19760	/// `EVEX.512.66.0F.WIG F1 /r`
19761	///
19762	/// `AVX512BW`
19763	///
19764	/// `16/32/64-bit`
19765	EVEX_Vpsllw_zmm_k1z_zmm_xmmm128 = 2471,
19766	/// `PSLLD mm, mm/m64`
19767	///
19768	/// `NP 0F F2 /r`
19769	///
19770	/// `MMX`
19771	///
19772	/// `16/32/64-bit`
19773	Pslld_mm_mmm64 = 2472,
19774	/// `PSLLD xmm1, xmm2/m128`
19775	///
19776	/// `66 0F F2 /r`
19777	///
19778	/// `SSE2`
19779	///
19780	/// `16/32/64-bit`
19781	Pslld_xmm_xmmm128 = 2473,
19782	/// `VPSLLD xmm1, xmm2, xmm3/m128`
19783	///
19784	/// `VEX.128.66.0F.WIG F2 /r`
19785	///
19786	/// `AVX`
19787	///
19788	/// `16/32/64-bit`
19789	VEX_Vpslld_xmm_xmm_xmmm128 = 2474,
19790	/// `VPSLLD ymm1, ymm2, xmm3/m128`
19791	///
19792	/// `VEX.256.66.0F.WIG F2 /r`
19793	///
19794	/// `AVX2`
19795	///
19796	/// `16/32/64-bit`
19797	VEX_Vpslld_ymm_ymm_xmmm128 = 2475,
19798	/// `VPSLLD xmm1 {k1}{z}, xmm2, xmm3/m128`
19799	///
19800	/// `EVEX.128.66.0F.W0 F2 /r`
19801	///
19802	/// `AVX512VL and AVX512F`
19803	///
19804	/// `16/32/64-bit`
19805	EVEX_Vpslld_xmm_k1z_xmm_xmmm128 = 2476,
19806	/// `VPSLLD ymm1 {k1}{z}, ymm2, xmm3/m128`
19807	///
19808	/// `EVEX.256.66.0F.W0 F2 /r`
19809	///
19810	/// `AVX512VL and AVX512F`
19811	///
19812	/// `16/32/64-bit`
19813	EVEX_Vpslld_ymm_k1z_ymm_xmmm128 = 2477,
19814	/// `VPSLLD zmm1 {k1}{z}, zmm2, xmm3/m128`
19815	///
19816	/// `EVEX.512.66.0F.W0 F2 /r`
19817	///
19818	/// `AVX512F`
19819	///
19820	/// `16/32/64-bit`
19821	EVEX_Vpslld_zmm_k1z_zmm_xmmm128 = 2478,
19822	/// `PSLLQ mm, mm/m64`
19823	///
19824	/// `NP 0F F3 /r`
19825	///
19826	/// `MMX`
19827	///
19828	/// `16/32/64-bit`
19829	Psllq_mm_mmm64 = 2479,
19830	/// `PSLLQ xmm1, xmm2/m128`
19831	///
19832	/// `66 0F F3 /r`
19833	///
19834	/// `SSE2`
19835	///
19836	/// `16/32/64-bit`
19837	Psllq_xmm_xmmm128 = 2480,
19838	/// `VPSLLQ xmm1, xmm2, xmm3/m128`
19839	///
19840	/// `VEX.128.66.0F.WIG F3 /r`
19841	///
19842	/// `AVX`
19843	///
19844	/// `16/32/64-bit`
19845	VEX_Vpsllq_xmm_xmm_xmmm128 = 2481,
19846	/// `VPSLLQ ymm1, ymm2, xmm3/m128`
19847	///
19848	/// `VEX.256.66.0F.WIG F3 /r`
19849	///
19850	/// `AVX2`
19851	///
19852	/// `16/32/64-bit`
19853	VEX_Vpsllq_ymm_ymm_xmmm128 = 2482,
19854	/// `VPSLLQ xmm1 {k1}{z}, xmm2, xmm3/m128`
19855	///
19856	/// `EVEX.128.66.0F.W1 F3 /r`
19857	///
19858	/// `AVX512VL and AVX512F`
19859	///
19860	/// `16/32/64-bit`
19861	EVEX_Vpsllq_xmm_k1z_xmm_xmmm128 = 2483,
19862	/// `VPSLLQ ymm1 {k1}{z}, ymm2, xmm3/m128`
19863	///
19864	/// `EVEX.256.66.0F.W1 F3 /r`
19865	///
19866	/// `AVX512VL and AVX512F`
19867	///
19868	/// `16/32/64-bit`
19869	EVEX_Vpsllq_ymm_k1z_ymm_xmmm128 = 2484,
19870	/// `VPSLLQ zmm1 {k1}{z}, zmm2, xmm3/m128`
19871	///
19872	/// `EVEX.512.66.0F.W1 F3 /r`
19873	///
19874	/// `AVX512F`
19875	///
19876	/// `16/32/64-bit`
19877	EVEX_Vpsllq_zmm_k1z_zmm_xmmm128 = 2485,
19878	/// `PMULUDQ mm1, mm2/m64`
19879	///
19880	/// `NP 0F F4 /r`
19881	///
19882	/// `SSE2`
19883	///
19884	/// `16/32/64-bit`
19885	Pmuludq_mm_mmm64 = 2486,
19886	/// `PMULUDQ xmm1, xmm2/m128`
19887	///
19888	/// `66 0F F4 /r`
19889	///
19890	/// `SSE2`
19891	///
19892	/// `16/32/64-bit`
19893	Pmuludq_xmm_xmmm128 = 2487,
19894	/// `VPMULUDQ xmm1, xmm2, xmm3/m128`
19895	///
19896	/// `VEX.128.66.0F.WIG F4 /r`
19897	///
19898	/// `AVX`
19899	///
19900	/// `16/32/64-bit`
19901	VEX_Vpmuludq_xmm_xmm_xmmm128 = 2488,
19902	/// `VPMULUDQ ymm1, ymm2, ymm3/m256`
19903	///
19904	/// `VEX.256.66.0F.WIG F4 /r`
19905	///
19906	/// `AVX2`
19907	///
19908	/// `16/32/64-bit`
19909	VEX_Vpmuludq_ymm_ymm_ymmm256 = 2489,
19910	/// `VPMULUDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
19911	///
19912	/// `EVEX.128.66.0F.W1 F4 /r`
19913	///
19914	/// `AVX512VL and AVX512F`
19915	///
19916	/// `16/32/64-bit`
19917	EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64 = 2490,
19918	/// `VPMULUDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
19919	///
19920	/// `EVEX.256.66.0F.W1 F4 /r`
19921	///
19922	/// `AVX512VL and AVX512F`
19923	///
19924	/// `16/32/64-bit`
19925	EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64 = 2491,
19926	/// `VPMULUDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
19927	///
19928	/// `EVEX.512.66.0F.W1 F4 /r`
19929	///
19930	/// `AVX512F`
19931	///
19932	/// `16/32/64-bit`
19933	EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64 = 2492,
19934	/// `PMADDWD mm, mm/m64`
19935	///
19936	/// `NP 0F F5 /r`
19937	///
19938	/// `MMX`
19939	///
19940	/// `16/32/64-bit`
19941	Pmaddwd_mm_mmm64 = 2493,
19942	/// `PMADDWD xmm1, xmm2/m128`
19943	///
19944	/// `66 0F F5 /r`
19945	///
19946	/// `SSE2`
19947	///
19948	/// `16/32/64-bit`
19949	Pmaddwd_xmm_xmmm128 = 2494,
19950	/// `VPMADDWD xmm1, xmm2, xmm3/m128`
19951	///
19952	/// `VEX.128.66.0F.WIG F5 /r`
19953	///
19954	/// `AVX`
19955	///
19956	/// `16/32/64-bit`
19957	VEX_Vpmaddwd_xmm_xmm_xmmm128 = 2495,
19958	/// `VPMADDWD ymm1, ymm2, ymm3/m256`
19959	///
19960	/// `VEX.256.66.0F.WIG F5 /r`
19961	///
19962	/// `AVX2`
19963	///
19964	/// `16/32/64-bit`
19965	VEX_Vpmaddwd_ymm_ymm_ymmm256 = 2496,
19966	/// `VPMADDWD xmm1 {k1}{z}, xmm2, xmm3/m128`
19967	///
19968	/// `EVEX.128.66.0F.WIG F5 /r`
19969	///
19970	/// `AVX512VL and AVX512BW`
19971	///
19972	/// `16/32/64-bit`
19973	EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128 = 2497,
19974	/// `VPMADDWD ymm1 {k1}{z}, ymm2, ymm3/m256`
19975	///
19976	/// `EVEX.256.66.0F.WIG F5 /r`
19977	///
19978	/// `AVX512VL and AVX512BW`
19979	///
19980	/// `16/32/64-bit`
19981	EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256 = 2498,
19982	/// `VPMADDWD zmm1 {k1}{z}, zmm2, zmm3/m512`
19983	///
19984	/// `EVEX.512.66.0F.WIG F5 /r`
19985	///
19986	/// `AVX512BW`
19987	///
19988	/// `16/32/64-bit`
19989	EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512 = 2499,
19990	/// `PSADBW mm1, mm2/m64`
19991	///
19992	/// `NP 0F F6 /r`
19993	///
19994	/// `SSE`
19995	///
19996	/// `16/32/64-bit`
19997	Psadbw_mm_mmm64 = 2500,
19998	/// `PSADBW xmm1, xmm2/m128`
19999	///
20000	/// `66 0F F6 /r`
20001	///
20002	/// `SSE2`
20003	///
20004	/// `16/32/64-bit`
20005	Psadbw_xmm_xmmm128 = 2501,
20006	/// `VPSADBW xmm1, xmm2, xmm3/m128`
20007	///
20008	/// `VEX.128.66.0F.WIG F6 /r`
20009	///
20010	/// `AVX`
20011	///
20012	/// `16/32/64-bit`
20013	VEX_Vpsadbw_xmm_xmm_xmmm128 = 2502,
20014	/// `VPSADBW ymm1, ymm2, ymm3/m256`
20015	///
20016	/// `VEX.256.66.0F.WIG F6 /r`
20017	///
20018	/// `AVX2`
20019	///
20020	/// `16/32/64-bit`
20021	VEX_Vpsadbw_ymm_ymm_ymmm256 = 2503,
20022	/// `VPSADBW xmm1, xmm2, xmm3/m128`
20023	///
20024	/// `EVEX.128.66.0F.WIG F6 /r`
20025	///
20026	/// `AVX512VL and AVX512BW`
20027	///
20028	/// `16/32/64-bit`
20029	EVEX_Vpsadbw_xmm_xmm_xmmm128 = 2504,
20030	/// `VPSADBW ymm1, ymm2, ymm3/m256`
20031	///
20032	/// `EVEX.256.66.0F.WIG F6 /r`
20033	///
20034	/// `AVX512VL and AVX512BW`
20035	///
20036	/// `16/32/64-bit`
20037	EVEX_Vpsadbw_ymm_ymm_ymmm256 = 2505,
20038	/// `VPSADBW zmm1, zmm2, zmm3/m512`
20039	///
20040	/// `EVEX.512.66.0F.WIG F6 /r`
20041	///
20042	/// `AVX512BW`
20043	///
20044	/// `16/32/64-bit`
20045	EVEX_Vpsadbw_zmm_zmm_zmmm512 = 2506,
20046	/// `MASKMOVQ mm1, mm2`
20047	///
20048	/// `NP 0F F7 /r`
20049	///
20050	/// `SSE`
20051	///
20052	/// `16/32/64-bit`
20053	Maskmovq_rDI_mm_mm = 2507,
20054	/// `MASKMOVDQU xmm1, xmm2`
20055	///
20056	/// `66 0F F7 /r`
20057	///
20058	/// `SSE2`
20059	///
20060	/// `16/32/64-bit`
20061	Maskmovdqu_rDI_xmm_xmm = 2508,
20062	/// `VMASKMOVDQU xmm1, xmm2`
20063	///
20064	/// `VEX.128.66.0F.WIG F7 /r`
20065	///
20066	/// `AVX`
20067	///
20068	/// `16/32/64-bit`
20069	VEX_Vmaskmovdqu_rDI_xmm_xmm = 2509,
20070	/// `PSUBB mm, mm/m64`
20071	///
20072	/// `NP 0F F8 /r`
20073	///
20074	/// `MMX`
20075	///
20076	/// `16/32/64-bit`
20077	Psubb_mm_mmm64 = 2510,
20078	/// `PSUBB xmm1, xmm2/m128`
20079	///
20080	/// `66 0F F8 /r`
20081	///
20082	/// `SSE2`
20083	///
20084	/// `16/32/64-bit`
20085	Psubb_xmm_xmmm128 = 2511,
20086	/// `VPSUBB xmm1, xmm2, xmm3/m128`
20087	///
20088	/// `VEX.128.66.0F.WIG F8 /r`
20089	///
20090	/// `AVX`
20091	///
20092	/// `16/32/64-bit`
20093	VEX_Vpsubb_xmm_xmm_xmmm128 = 2512,
20094	/// `VPSUBB ymm1, ymm2, ymm3/m256`
20095	///
20096	/// `VEX.256.66.0F.WIG F8 /r`
20097	///
20098	/// `AVX2`
20099	///
20100	/// `16/32/64-bit`
20101	VEX_Vpsubb_ymm_ymm_ymmm256 = 2513,
20102	/// `VPSUBB xmm1 {k1}{z}, xmm2, xmm3/m128`
20103	///
20104	/// `EVEX.128.66.0F.WIG F8 /r`
20105	///
20106	/// `AVX512VL and AVX512BW`
20107	///
20108	/// `16/32/64-bit`
20109	EVEX_Vpsubb_xmm_k1z_xmm_xmmm128 = 2514,
20110	/// `VPSUBB ymm1 {k1}{z}, ymm2, ymm3/m256`
20111	///
20112	/// `EVEX.256.66.0F.WIG F8 /r`
20113	///
20114	/// `AVX512VL and AVX512BW`
20115	///
20116	/// `16/32/64-bit`
20117	EVEX_Vpsubb_ymm_k1z_ymm_ymmm256 = 2515,
20118	/// `VPSUBB zmm1 {k1}{z}, zmm2, zmm3/m512`
20119	///
20120	/// `EVEX.512.66.0F.WIG F8 /r`
20121	///
20122	/// `AVX512BW`
20123	///
20124	/// `16/32/64-bit`
20125	EVEX_Vpsubb_zmm_k1z_zmm_zmmm512 = 2516,
20126	/// `PSUBW mm, mm/m64`
20127	///
20128	/// `NP 0F F9 /r`
20129	///
20130	/// `MMX`
20131	///
20132	/// `16/32/64-bit`
20133	Psubw_mm_mmm64 = 2517,
20134	/// `PSUBW xmm1, xmm2/m128`
20135	///
20136	/// `66 0F F9 /r`
20137	///
20138	/// `SSE2`
20139	///
20140	/// `16/32/64-bit`
20141	Psubw_xmm_xmmm128 = 2518,
20142	/// `VPSUBW xmm1, xmm2, xmm3/m128`
20143	///
20144	/// `VEX.128.66.0F.WIG F9 /r`
20145	///
20146	/// `AVX`
20147	///
20148	/// `16/32/64-bit`
20149	VEX_Vpsubw_xmm_xmm_xmmm128 = 2519,
20150	/// `VPSUBW ymm1, ymm2, ymm3/m256`
20151	///
20152	/// `VEX.256.66.0F.WIG F9 /r`
20153	///
20154	/// `AVX2`
20155	///
20156	/// `16/32/64-bit`
20157	VEX_Vpsubw_ymm_ymm_ymmm256 = 2520,
20158	/// `VPSUBW xmm1 {k1}{z}, xmm2, xmm3/m128`
20159	///
20160	/// `EVEX.128.66.0F.WIG F9 /r`
20161	///
20162	/// `AVX512VL and AVX512BW`
20163	///
20164	/// `16/32/64-bit`
20165	EVEX_Vpsubw_xmm_k1z_xmm_xmmm128 = 2521,
20166	/// `VPSUBW ymm1 {k1}{z}, ymm2, ymm3/m256`
20167	///
20168	/// `EVEX.256.66.0F.WIG F9 /r`
20169	///
20170	/// `AVX512VL and AVX512BW`
20171	///
20172	/// `16/32/64-bit`
20173	EVEX_Vpsubw_ymm_k1z_ymm_ymmm256 = 2522,
20174	/// `VPSUBW zmm1 {k1}{z}, zmm2, zmm3/m512`
20175	///
20176	/// `EVEX.512.66.0F.WIG F9 /r`
20177	///
20178	/// `AVX512BW`
20179	///
20180	/// `16/32/64-bit`
20181	EVEX_Vpsubw_zmm_k1z_zmm_zmmm512 = 2523,
20182	/// `PSUBD mm, mm/m64`
20183	///
20184	/// `NP 0F FA /r`
20185	///
20186	/// `MMX`
20187	///
20188	/// `16/32/64-bit`
20189	Psubd_mm_mmm64 = 2524,
20190	/// `PSUBD xmm1, xmm2/m128`
20191	///
20192	/// `66 0F FA /r`
20193	///
20194	/// `SSE2`
20195	///
20196	/// `16/32/64-bit`
20197	Psubd_xmm_xmmm128 = 2525,
20198	/// `VPSUBD xmm1, xmm2, xmm3/m128`
20199	///
20200	/// `VEX.128.66.0F.WIG FA /r`
20201	///
20202	/// `AVX`
20203	///
20204	/// `16/32/64-bit`
20205	VEX_Vpsubd_xmm_xmm_xmmm128 = 2526,
20206	/// `VPSUBD ymm1, ymm2, ymm3/m256`
20207	///
20208	/// `VEX.256.66.0F.WIG FA /r`
20209	///
20210	/// `AVX2`
20211	///
20212	/// `16/32/64-bit`
20213	VEX_Vpsubd_ymm_ymm_ymmm256 = 2527,
20214	/// `VPSUBD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
20215	///
20216	/// `EVEX.128.66.0F.W0 FA /r`
20217	///
20218	/// `AVX512VL and AVX512F`
20219	///
20220	/// `16/32/64-bit`
20221	EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32 = 2528,
20222	/// `VPSUBD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
20223	///
20224	/// `EVEX.256.66.0F.W0 FA /r`
20225	///
20226	/// `AVX512VL and AVX512F`
20227	///
20228	/// `16/32/64-bit`
20229	EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32 = 2529,
20230	/// `VPSUBD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
20231	///
20232	/// `EVEX.512.66.0F.W0 FA /r`
20233	///
20234	/// `AVX512F`
20235	///
20236	/// `16/32/64-bit`
20237	EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32 = 2530,
20238	/// `PSUBQ mm1, mm2/m64`
20239	///
20240	/// `NP 0F FB /r`
20241	///
20242	/// `SSE2`
20243	///
20244	/// `16/32/64-bit`
20245	Psubq_mm_mmm64 = 2531,
20246	/// `PSUBQ xmm1, xmm2/m128`
20247	///
20248	/// `66 0F FB /r`
20249	///
20250	/// `SSE2`
20251	///
20252	/// `16/32/64-bit`
20253	Psubq_xmm_xmmm128 = 2532,
20254	/// `VPSUBQ xmm1, xmm2, xmm3/m128`
20255	///
20256	/// `VEX.128.66.0F.WIG FB /r`
20257	///
20258	/// `AVX`
20259	///
20260	/// `16/32/64-bit`
20261	VEX_Vpsubq_xmm_xmm_xmmm128 = 2533,
20262	/// `VPSUBQ ymm1, ymm2, ymm3/m256`
20263	///
20264	/// `VEX.256.66.0F.WIG FB /r`
20265	///
20266	/// `AVX2`
20267	///
20268	/// `16/32/64-bit`
20269	VEX_Vpsubq_ymm_ymm_ymmm256 = 2534,
20270	/// `VPSUBQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
20271	///
20272	/// `EVEX.128.66.0F.W1 FB /r`
20273	///
20274	/// `AVX512VL and AVX512F`
20275	///
20276	/// `16/32/64-bit`
20277	EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64 = 2535,
20278	/// `VPSUBQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
20279	///
20280	/// `EVEX.256.66.0F.W1 FB /r`
20281	///
20282	/// `AVX512VL and AVX512F`
20283	///
20284	/// `16/32/64-bit`
20285	EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64 = 2536,
20286	/// `VPSUBQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
20287	///
20288	/// `EVEX.512.66.0F.W1 FB /r`
20289	///
20290	/// `AVX512F`
20291	///
20292	/// `16/32/64-bit`
20293	EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64 = 2537,
20294	/// `PADDB mm, mm/m64`
20295	///
20296	/// `NP 0F FC /r`
20297	///
20298	/// `MMX`
20299	///
20300	/// `16/32/64-bit`
20301	Paddb_mm_mmm64 = 2538,
20302	/// `PADDB xmm1, xmm2/m128`
20303	///
20304	/// `66 0F FC /r`
20305	///
20306	/// `SSE2`
20307	///
20308	/// `16/32/64-bit`
20309	Paddb_xmm_xmmm128 = 2539,
20310	/// `VPADDB xmm1, xmm2, xmm3/m128`
20311	///
20312	/// `VEX.128.66.0F.WIG FC /r`
20313	///
20314	/// `AVX`
20315	///
20316	/// `16/32/64-bit`
20317	VEX_Vpaddb_xmm_xmm_xmmm128 = 2540,
20318	/// `VPADDB ymm1, ymm2, ymm3/m256`
20319	///
20320	/// `VEX.256.66.0F.WIG FC /r`
20321	///
20322	/// `AVX2`
20323	///
20324	/// `16/32/64-bit`
20325	VEX_Vpaddb_ymm_ymm_ymmm256 = 2541,
20326	/// `VPADDB xmm1 {k1}{z}, xmm2, xmm3/m128`
20327	///
20328	/// `EVEX.128.66.0F.WIG FC /r`
20329	///
20330	/// `AVX512VL and AVX512BW`
20331	///
20332	/// `16/32/64-bit`
20333	EVEX_Vpaddb_xmm_k1z_xmm_xmmm128 = 2542,
20334	/// `VPADDB ymm1 {k1}{z}, ymm2, ymm3/m256`
20335	///
20336	/// `EVEX.256.66.0F.WIG FC /r`
20337	///
20338	/// `AVX512VL and AVX512BW`
20339	///
20340	/// `16/32/64-bit`
20341	EVEX_Vpaddb_ymm_k1z_ymm_ymmm256 = 2543,
20342	/// `VPADDB zmm1 {k1}{z}, zmm2, zmm3/m512`
20343	///
20344	/// `EVEX.512.66.0F.WIG FC /r`
20345	///
20346	/// `AVX512BW`
20347	///
20348	/// `16/32/64-bit`
20349	EVEX_Vpaddb_zmm_k1z_zmm_zmmm512 = 2544,
20350	/// `PADDW mm, mm/m64`
20351	///
20352	/// `NP 0F FD /r`
20353	///
20354	/// `MMX`
20355	///
20356	/// `16/32/64-bit`
20357	Paddw_mm_mmm64 = 2545,
20358	/// `PADDW xmm1, xmm2/m128`
20359	///
20360	/// `66 0F FD /r`
20361	///
20362	/// `SSE2`
20363	///
20364	/// `16/32/64-bit`
20365	Paddw_xmm_xmmm128 = 2546,
20366	/// `VPADDW xmm1, xmm2, xmm3/m128`
20367	///
20368	/// `VEX.128.66.0F.WIG FD /r`
20369	///
20370	/// `AVX`
20371	///
20372	/// `16/32/64-bit`
20373	VEX_Vpaddw_xmm_xmm_xmmm128 = 2547,
20374	/// `VPADDW ymm1, ymm2, ymm3/m256`
20375	///
20376	/// `VEX.256.66.0F.WIG FD /r`
20377	///
20378	/// `AVX2`
20379	///
20380	/// `16/32/64-bit`
20381	VEX_Vpaddw_ymm_ymm_ymmm256 = 2548,
20382	/// `VPADDW xmm1 {k1}{z}, xmm2, xmm3/m128`
20383	///
20384	/// `EVEX.128.66.0F.WIG FD /r`
20385	///
20386	/// `AVX512VL and AVX512BW`
20387	///
20388	/// `16/32/64-bit`
20389	EVEX_Vpaddw_xmm_k1z_xmm_xmmm128 = 2549,
20390	/// `VPADDW ymm1 {k1}{z}, ymm2, ymm3/m256`
20391	///
20392	/// `EVEX.256.66.0F.WIG FD /r`
20393	///
20394	/// `AVX512VL and AVX512BW`
20395	///
20396	/// `16/32/64-bit`
20397	EVEX_Vpaddw_ymm_k1z_ymm_ymmm256 = 2550,
20398	/// `VPADDW zmm1 {k1}{z}, zmm2, zmm3/m512`
20399	///
20400	/// `EVEX.512.66.0F.WIG FD /r`
20401	///
20402	/// `AVX512BW`
20403	///
20404	/// `16/32/64-bit`
20405	EVEX_Vpaddw_zmm_k1z_zmm_zmmm512 = 2551,
20406	/// `PADDD mm, mm/m64`
20407	///
20408	/// `NP 0F FE /r`
20409	///
20410	/// `MMX`
20411	///
20412	/// `16/32/64-bit`
20413	Paddd_mm_mmm64 = 2552,
20414	/// `PADDD xmm1, xmm2/m128`
20415	///
20416	/// `66 0F FE /r`
20417	///
20418	/// `SSE2`
20419	///
20420	/// `16/32/64-bit`
20421	Paddd_xmm_xmmm128 = 2553,
20422	/// `VPADDD xmm1, xmm2, xmm3/m128`
20423	///
20424	/// `VEX.128.66.0F.WIG FE /r`
20425	///
20426	/// `AVX`
20427	///
20428	/// `16/32/64-bit`
20429	VEX_Vpaddd_xmm_xmm_xmmm128 = 2554,
20430	/// `VPADDD ymm1, ymm2, ymm3/m256`
20431	///
20432	/// `VEX.256.66.0F.WIG FE /r`
20433	///
20434	/// `AVX2`
20435	///
20436	/// `16/32/64-bit`
20437	VEX_Vpaddd_ymm_ymm_ymmm256 = 2555,
20438	/// `VPADDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
20439	///
20440	/// `EVEX.128.66.0F.W0 FE /r`
20441	///
20442	/// `AVX512VL and AVX512F`
20443	///
20444	/// `16/32/64-bit`
20445	EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32 = 2556,
20446	/// `VPADDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
20447	///
20448	/// `EVEX.256.66.0F.W0 FE /r`
20449	///
20450	/// `AVX512VL and AVX512F`
20451	///
20452	/// `16/32/64-bit`
20453	EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32 = 2557,
20454	/// `VPADDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
20455	///
20456	/// `EVEX.512.66.0F.W0 FE /r`
20457	///
20458	/// `AVX512F`
20459	///
20460	/// `16/32/64-bit`
20461	EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32 = 2558,
20462	/// `UD0 r16, r/m16`
20463	///
20464	/// `o16 0F FF /r`
20465	///
20466	/// `286+`
20467	///
20468	/// `16/32/64-bit`
20469	Ud0_r16_rm16 = 2559,
20470	/// `UD0 r32, r/m32`
20471	///
20472	/// `o32 0F FF /r`
20473	///
20474	/// `386+`
20475	///
20476	/// `16/32/64-bit`
20477	Ud0_r32_rm32 = 2560,
20478	/// `UD0 r64, r/m64`
20479	///
20480	/// `o64 0F FF /r`
20481	///
20482	/// `X64`
20483	///
20484	/// `64-bit`
20485	Ud0_r64_rm64 = 2561,
20486	/// `PSHUFB mm1, mm2/m64`
20487	///
20488	/// `NP 0F 38 00 /r`
20489	///
20490	/// `SSSE3`
20491	///
20492	/// `16/32/64-bit`
20493	Pshufb_mm_mmm64 = 2562,
20494	/// `PSHUFB xmm1, xmm2/m128`
20495	///
20496	/// `66 0F 38 00 /r`
20497	///
20498	/// `SSSE3`
20499	///
20500	/// `16/32/64-bit`
20501	Pshufb_xmm_xmmm128 = 2563,
20502	/// `VPSHUFB xmm1, xmm2, xmm3/m128`
20503	///
20504	/// `VEX.128.66.0F38.WIG 00 /r`
20505	///
20506	/// `AVX`
20507	///
20508	/// `16/32/64-bit`
20509	VEX_Vpshufb_xmm_xmm_xmmm128 = 2564,
20510	/// `VPSHUFB ymm1, ymm2, ymm3/m256`
20511	///
20512	/// `VEX.256.66.0F38.WIG 00 /r`
20513	///
20514	/// `AVX2`
20515	///
20516	/// `16/32/64-bit`
20517	VEX_Vpshufb_ymm_ymm_ymmm256 = 2565,
20518	/// `VPSHUFB xmm1 {k1}{z}, xmm2, xmm3/m128`
20519	///
20520	/// `EVEX.128.66.0F38.WIG 00 /r`
20521	///
20522	/// `AVX512VL and AVX512BW`
20523	///
20524	/// `16/32/64-bit`
20525	EVEX_Vpshufb_xmm_k1z_xmm_xmmm128 = 2566,
20526	/// `VPSHUFB ymm1 {k1}{z}, ymm2, ymm3/m256`
20527	///
20528	/// `EVEX.256.66.0F38.WIG 00 /r`
20529	///
20530	/// `AVX512VL and AVX512BW`
20531	///
20532	/// `16/32/64-bit`
20533	EVEX_Vpshufb_ymm_k1z_ymm_ymmm256 = 2567,
20534	/// `VPSHUFB zmm1 {k1}{z}, zmm2, zmm3/m512`
20535	///
20536	/// `EVEX.512.66.0F38.WIG 00 /r`
20537	///
20538	/// `AVX512BW`
20539	///
20540	/// `16/32/64-bit`
20541	EVEX_Vpshufb_zmm_k1z_zmm_zmmm512 = 2568,
20542	/// `PHADDW mm1, mm2/m64`
20543	///
20544	/// `NP 0F 38 01 /r`
20545	///
20546	/// `SSSE3`
20547	///
20548	/// `16/32/64-bit`
20549	Phaddw_mm_mmm64 = 2569,
20550	/// `PHADDW xmm1, xmm2/m128`
20551	///
20552	/// `66 0F 38 01 /r`
20553	///
20554	/// `SSSE3`
20555	///
20556	/// `16/32/64-bit`
20557	Phaddw_xmm_xmmm128 = 2570,
20558	/// `VPHADDW xmm1, xmm2, xmm3/m128`
20559	///
20560	/// `VEX.128.66.0F38.WIG 01 /r`
20561	///
20562	/// `AVX`
20563	///
20564	/// `16/32/64-bit`
20565	VEX_Vphaddw_xmm_xmm_xmmm128 = 2571,
20566	/// `VPHADDW ymm1, ymm2, ymm3/m256`
20567	///
20568	/// `VEX.256.66.0F38.WIG 01 /r`
20569	///
20570	/// `AVX2`
20571	///
20572	/// `16/32/64-bit`
20573	VEX_Vphaddw_ymm_ymm_ymmm256 = 2572,
20574	/// `PHADDD mm1, mm2/m64`
20575	///
20576	/// `NP 0F 38 02 /r`
20577	///
20578	/// `SSSE3`
20579	///
20580	/// `16/32/64-bit`
20581	Phaddd_mm_mmm64 = 2573,
20582	/// `PHADDD xmm1, xmm2/m128`
20583	///
20584	/// `66 0F 38 02 /r`
20585	///
20586	/// `SSSE3`
20587	///
20588	/// `16/32/64-bit`
20589	Phaddd_xmm_xmmm128 = 2574,
20590	/// `VPHADDD xmm1, xmm2, xmm3/m128`
20591	///
20592	/// `VEX.128.66.0F38.WIG 02 /r`
20593	///
20594	/// `AVX`
20595	///
20596	/// `16/32/64-bit`
20597	VEX_Vphaddd_xmm_xmm_xmmm128 = 2575,
20598	/// `VPHADDD ymm1, ymm2, ymm3/m256`
20599	///
20600	/// `VEX.256.66.0F38.WIG 02 /r`
20601	///
20602	/// `AVX2`
20603	///
20604	/// `16/32/64-bit`
20605	VEX_Vphaddd_ymm_ymm_ymmm256 = 2576,
20606	/// `PHADDSW mm1, mm2/m64`
20607	///
20608	/// `NP 0F 38 03 /r`
20609	///
20610	/// `SSSE3`
20611	///
20612	/// `16/32/64-bit`
20613	Phaddsw_mm_mmm64 = 2577,
20614	/// `PHADDSW xmm1, xmm2/m128`
20615	///
20616	/// `66 0F 38 03 /r`
20617	///
20618	/// `SSSE3`
20619	///
20620	/// `16/32/64-bit`
20621	Phaddsw_xmm_xmmm128 = 2578,
20622	/// `VPHADDSW xmm1, xmm2, xmm3/m128`
20623	///
20624	/// `VEX.128.66.0F38.WIG 03 /r`
20625	///
20626	/// `AVX`
20627	///
20628	/// `16/32/64-bit`
20629	VEX_Vphaddsw_xmm_xmm_xmmm128 = 2579,
20630	/// `VPHADDSW ymm1, ymm2, ymm3/m256`
20631	///
20632	/// `VEX.256.66.0F38.WIG 03 /r`
20633	///
20634	/// `AVX2`
20635	///
20636	/// `16/32/64-bit`
20637	VEX_Vphaddsw_ymm_ymm_ymmm256 = 2580,
20638	/// `PMADDUBSW mm1, mm2/m64`
20639	///
20640	/// `NP 0F 38 04 /r`
20641	///
20642	/// `SSSE3`
20643	///
20644	/// `16/32/64-bit`
20645	Pmaddubsw_mm_mmm64 = 2581,
20646	/// `PMADDUBSW xmm1, xmm2/m128`
20647	///
20648	/// `66 0F 38 04 /r`
20649	///
20650	/// `SSSE3`
20651	///
20652	/// `16/32/64-bit`
20653	Pmaddubsw_xmm_xmmm128 = 2582,
20654	/// `VPMADDUBSW xmm1, xmm2, xmm3/m128`
20655	///
20656	/// `VEX.128.66.0F38.WIG 04 /r`
20657	///
20658	/// `AVX`
20659	///
20660	/// `16/32/64-bit`
20661	VEX_Vpmaddubsw_xmm_xmm_xmmm128 = 2583,
20662	/// `VPMADDUBSW ymm1, ymm2, ymm3/m256`
20663	///
20664	/// `VEX.256.66.0F38.WIG 04 /r`
20665	///
20666	/// `AVX2`
20667	///
20668	/// `16/32/64-bit`
20669	VEX_Vpmaddubsw_ymm_ymm_ymmm256 = 2584,
20670	/// `VPMADDUBSW xmm1 {k1}{z}, xmm2, xmm3/m128`
20671	///
20672	/// `EVEX.128.66.0F38.WIG 04 /r`
20673	///
20674	/// `AVX512VL and AVX512BW`
20675	///
20676	/// `16/32/64-bit`
20677	EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128 = 2585,
20678	/// `VPMADDUBSW ymm1 {k1}{z}, ymm2, ymm3/m256`
20679	///
20680	/// `EVEX.256.66.0F38.WIG 04 /r`
20681	///
20682	/// `AVX512VL and AVX512BW`
20683	///
20684	/// `16/32/64-bit`
20685	EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256 = 2586,
20686	/// `VPMADDUBSW zmm1 {k1}{z}, zmm2, zmm3/m512`
20687	///
20688	/// `EVEX.512.66.0F38.WIG 04 /r`
20689	///
20690	/// `AVX512BW`
20691	///
20692	/// `16/32/64-bit`
20693	EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512 = 2587,
20694	/// `PHSUBW mm1, mm2/m64`
20695	///
20696	/// `NP 0F 38 05 /r`
20697	///
20698	/// `SSSE3`
20699	///
20700	/// `16/32/64-bit`
20701	Phsubw_mm_mmm64 = 2588,
20702	/// `PHSUBW xmm1, xmm2/m128`
20703	///
20704	/// `66 0F 38 05 /r`
20705	///
20706	/// `SSSE3`
20707	///
20708	/// `16/32/64-bit`
20709	Phsubw_xmm_xmmm128 = 2589,
20710	/// `VPHSUBW xmm1, xmm2, xmm3/m128`
20711	///
20712	/// `VEX.128.66.0F38.WIG 05 /r`
20713	///
20714	/// `AVX`
20715	///
20716	/// `16/32/64-bit`
20717	VEX_Vphsubw_xmm_xmm_xmmm128 = 2590,
20718	/// `VPHSUBW ymm1, ymm2, ymm3/m256`
20719	///
20720	/// `VEX.256.66.0F38.WIG 05 /r`
20721	///
20722	/// `AVX2`
20723	///
20724	/// `16/32/64-bit`
20725	VEX_Vphsubw_ymm_ymm_ymmm256 = 2591,
20726	/// `PHSUBD mm1, mm2/m64`
20727	///
20728	/// `NP 0F 38 06 /r`
20729	///
20730	/// `SSSE3`
20731	///
20732	/// `16/32/64-bit`
20733	Phsubd_mm_mmm64 = 2592,
20734	/// `PHSUBD xmm1, xmm2/m128`
20735	///
20736	/// `66 0F 38 06 /r`
20737	///
20738	/// `SSSE3`
20739	///
20740	/// `16/32/64-bit`
20741	Phsubd_xmm_xmmm128 = 2593,
20742	/// `VPHSUBD xmm1, xmm2, xmm3/m128`
20743	///
20744	/// `VEX.128.66.0F38.WIG 06 /r`
20745	///
20746	/// `AVX`
20747	///
20748	/// `16/32/64-bit`
20749	VEX_Vphsubd_xmm_xmm_xmmm128 = 2594,
20750	/// `VPHSUBD ymm1, ymm2, ymm3/m256`
20751	///
20752	/// `VEX.256.66.0F38.WIG 06 /r`
20753	///
20754	/// `AVX2`
20755	///
20756	/// `16/32/64-bit`
20757	VEX_Vphsubd_ymm_ymm_ymmm256 = 2595,
20758	/// `PHSUBSW mm1, mm2/m64`
20759	///
20760	/// `NP 0F 38 07 /r`
20761	///
20762	/// `SSSE3`
20763	///
20764	/// `16/32/64-bit`
20765	Phsubsw_mm_mmm64 = 2596,
20766	/// `PHSUBSW xmm1, xmm2/m128`
20767	///
20768	/// `66 0F 38 07 /r`
20769	///
20770	/// `SSSE3`
20771	///
20772	/// `16/32/64-bit`
20773	Phsubsw_xmm_xmmm128 = 2597,
20774	/// `VPHSUBSW xmm1, xmm2, xmm3/m128`
20775	///
20776	/// `VEX.128.66.0F38.WIG 07 /r`
20777	///
20778	/// `AVX`
20779	///
20780	/// `16/32/64-bit`
20781	VEX_Vphsubsw_xmm_xmm_xmmm128 = 2598,
20782	/// `VPHSUBSW ymm1, ymm2, ymm3/m256`
20783	///
20784	/// `VEX.256.66.0F38.WIG 07 /r`
20785	///
20786	/// `AVX2`
20787	///
20788	/// `16/32/64-bit`
20789	VEX_Vphsubsw_ymm_ymm_ymmm256 = 2599,
20790	/// `PSIGNB mm1, mm2/m64`
20791	///
20792	/// `NP 0F 38 08 /r`
20793	///
20794	/// `SSSE3`
20795	///
20796	/// `16/32/64-bit`
20797	Psignb_mm_mmm64 = 2600,
20798	/// `PSIGNB xmm1, xmm2/m128`
20799	///
20800	/// `66 0F 38 08 /r`
20801	///
20802	/// `SSSE3`
20803	///
20804	/// `16/32/64-bit`
20805	Psignb_xmm_xmmm128 = 2601,
20806	/// `VPSIGNB xmm1, xmm2, xmm3/m128`
20807	///
20808	/// `VEX.128.66.0F38.WIG 08 /r`
20809	///
20810	/// `AVX`
20811	///
20812	/// `16/32/64-bit`
20813	VEX_Vpsignb_xmm_xmm_xmmm128 = 2602,
20814	/// `VPSIGNB ymm1, ymm2, ymm3/m256`
20815	///
20816	/// `VEX.256.66.0F38.WIG 08 /r`
20817	///
20818	/// `AVX2`
20819	///
20820	/// `16/32/64-bit`
20821	VEX_Vpsignb_ymm_ymm_ymmm256 = 2603,
20822	/// `PSIGNW mm1, mm2/m64`
20823	///
20824	/// `NP 0F 38 09 /r`
20825	///
20826	/// `SSSE3`
20827	///
20828	/// `16/32/64-bit`
20829	Psignw_mm_mmm64 = 2604,
20830	/// `PSIGNW xmm1, xmm2/m128`
20831	///
20832	/// `66 0F 38 09 /r`
20833	///
20834	/// `SSSE3`
20835	///
20836	/// `16/32/64-bit`
20837	Psignw_xmm_xmmm128 = 2605,
20838	/// `VPSIGNW xmm1, xmm2, xmm3/m128`
20839	///
20840	/// `VEX.128.66.0F38.WIG 09 /r`
20841	///
20842	/// `AVX`
20843	///
20844	/// `16/32/64-bit`
20845	VEX_Vpsignw_xmm_xmm_xmmm128 = 2606,
20846	/// `VPSIGNW ymm1, ymm2, ymm3/m256`
20847	///
20848	/// `VEX.256.66.0F38.WIG 09 /r`
20849	///
20850	/// `AVX2`
20851	///
20852	/// `16/32/64-bit`
20853	VEX_Vpsignw_ymm_ymm_ymmm256 = 2607,
20854	/// `PSIGND mm1, mm2/m64`
20855	///
20856	/// `NP 0F 38 0A /r`
20857	///
20858	/// `SSSE3`
20859	///
20860	/// `16/32/64-bit`
20861	Psignd_mm_mmm64 = 2608,
20862	/// `PSIGND xmm1, xmm2/m128`
20863	///
20864	/// `66 0F 38 0A /r`
20865	///
20866	/// `SSSE3`
20867	///
20868	/// `16/32/64-bit`
20869	Psignd_xmm_xmmm128 = 2609,
20870	/// `VPSIGND xmm1, xmm2, xmm3/m128`
20871	///
20872	/// `VEX.128.66.0F38.WIG 0A /r`
20873	///
20874	/// `AVX`
20875	///
20876	/// `16/32/64-bit`
20877	VEX_Vpsignd_xmm_xmm_xmmm128 = 2610,
20878	/// `VPSIGND ymm1, ymm2, ymm3/m256`
20879	///
20880	/// `VEX.256.66.0F38.WIG 0A /r`
20881	///
20882	/// `AVX2`
20883	///
20884	/// `16/32/64-bit`
20885	VEX_Vpsignd_ymm_ymm_ymmm256 = 2611,
20886	/// `PMULHRSW mm1, mm2/m64`
20887	///
20888	/// `NP 0F 38 0B /r`
20889	///
20890	/// `SSSE3`
20891	///
20892	/// `16/32/64-bit`
20893	Pmulhrsw_mm_mmm64 = 2612,
20894	/// `PMULHRSW xmm1, xmm2/m128`
20895	///
20896	/// `66 0F 38 0B /r`
20897	///
20898	/// `SSSE3`
20899	///
20900	/// `16/32/64-bit`
20901	Pmulhrsw_xmm_xmmm128 = 2613,
20902	/// `VPMULHRSW xmm1, xmm2, xmm3/m128`
20903	///
20904	/// `VEX.128.66.0F38.WIG 0B /r`
20905	///
20906	/// `AVX`
20907	///
20908	/// `16/32/64-bit`
20909	VEX_Vpmulhrsw_xmm_xmm_xmmm128 = 2614,
20910	/// `VPMULHRSW ymm1, ymm2, ymm3/m256`
20911	///
20912	/// `VEX.256.66.0F38.WIG 0B /r`
20913	///
20914	/// `AVX2`
20915	///
20916	/// `16/32/64-bit`
20917	VEX_Vpmulhrsw_ymm_ymm_ymmm256 = 2615,
20918	/// `VPMULHRSW xmm1 {k1}{z}, xmm2, xmm3/m128`
20919	///
20920	/// `EVEX.128.66.0F38.WIG 0B /r`
20921	///
20922	/// `AVX512VL and AVX512BW`
20923	///
20924	/// `16/32/64-bit`
20925	EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128 = 2616,
20926	/// `VPMULHRSW ymm1 {k1}{z}, ymm2, ymm3/m256`
20927	///
20928	/// `EVEX.256.66.0F38.WIG 0B /r`
20929	///
20930	/// `AVX512VL and AVX512BW`
20931	///
20932	/// `16/32/64-bit`
20933	EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256 = 2617,
20934	/// `VPMULHRSW zmm1 {k1}{z}, zmm2, zmm3/m512`
20935	///
20936	/// `EVEX.512.66.0F38.WIG 0B /r`
20937	///
20938	/// `AVX512BW`
20939	///
20940	/// `16/32/64-bit`
20941	EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512 = 2618,
20942	/// `VPERMILPS xmm1, xmm2, xmm3/m128`
20943	///
20944	/// `VEX.128.66.0F38.W0 0C /r`
20945	///
20946	/// `AVX`
20947	///
20948	/// `16/32/64-bit`
20949	VEX_Vpermilps_xmm_xmm_xmmm128 = 2619,
20950	/// `VPERMILPS ymm1, ymm2, ymm3/m256`
20951	///
20952	/// `VEX.256.66.0F38.W0 0C /r`
20953	///
20954	/// `AVX`
20955	///
20956	/// `16/32/64-bit`
20957	VEX_Vpermilps_ymm_ymm_ymmm256 = 2620,
20958	/// `VPERMILPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
20959	///
20960	/// `EVEX.128.66.0F38.W0 0C /r`
20961	///
20962	/// `AVX512VL and AVX512F`
20963	///
20964	/// `16/32/64-bit`
20965	EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32 = 2621,
20966	/// `VPERMILPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
20967	///
20968	/// `EVEX.256.66.0F38.W0 0C /r`
20969	///
20970	/// `AVX512VL and AVX512F`
20971	///
20972	/// `16/32/64-bit`
20973	EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32 = 2622,
20974	/// `VPERMILPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
20975	///
20976	/// `EVEX.512.66.0F38.W0 0C /r`
20977	///
20978	/// `AVX512F`
20979	///
20980	/// `16/32/64-bit`
20981	EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32 = 2623,
20982	/// `VPERMILPD xmm1, xmm2, xmm3/m128`
20983	///
20984	/// `VEX.128.66.0F38.W0 0D /r`
20985	///
20986	/// `AVX`
20987	///
20988	/// `16/32/64-bit`
20989	VEX_Vpermilpd_xmm_xmm_xmmm128 = 2624,
20990	/// `VPERMILPD ymm1, ymm2, ymm3/m256`
20991	///
20992	/// `VEX.256.66.0F38.W0 0D /r`
20993	///
20994	/// `AVX`
20995	///
20996	/// `16/32/64-bit`
20997	VEX_Vpermilpd_ymm_ymm_ymmm256 = 2625,
20998	/// `VPERMILPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
20999	///
21000	/// `EVEX.128.66.0F38.W1 0D /r`
21001	///
21002	/// `AVX512VL and AVX512F`
21003	///
21004	/// `16/32/64-bit`
21005	EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64 = 2626,
21006	/// `VPERMILPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
21007	///
21008	/// `EVEX.256.66.0F38.W1 0D /r`
21009	///
21010	/// `AVX512VL and AVX512F`
21011	///
21012	/// `16/32/64-bit`
21013	EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64 = 2627,
21014	/// `VPERMILPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
21015	///
21016	/// `EVEX.512.66.0F38.W1 0D /r`
21017	///
21018	/// `AVX512F`
21019	///
21020	/// `16/32/64-bit`
21021	EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64 = 2628,
21022	/// `VTESTPS xmm1, xmm2/m128`
21023	///
21024	/// `VEX.128.66.0F38.W0 0E /r`
21025	///
21026	/// `AVX`
21027	///
21028	/// `16/32/64-bit`
21029	VEX_Vtestps_xmm_xmmm128 = 2629,
21030	/// `VTESTPS ymm1, ymm2/m256`
21031	///
21032	/// `VEX.256.66.0F38.W0 0E /r`
21033	///
21034	/// `AVX`
21035	///
21036	/// `16/32/64-bit`
21037	VEX_Vtestps_ymm_ymmm256 = 2630,
21038	/// `VTESTPD xmm1, xmm2/m128`
21039	///
21040	/// `VEX.128.66.0F38.W0 0F /r`
21041	///
21042	/// `AVX`
21043	///
21044	/// `16/32/64-bit`
21045	VEX_Vtestpd_xmm_xmmm128 = 2631,
21046	/// `VTESTPD ymm1, ymm2/m256`
21047	///
21048	/// `VEX.256.66.0F38.W0 0F /r`
21049	///
21050	/// `AVX`
21051	///
21052	/// `16/32/64-bit`
21053	VEX_Vtestpd_ymm_ymmm256 = 2632,
21054	/// `PBLENDVB xmm1, xmm2/m128, <XMM0>`
21055	///
21056	/// `66 0F 38 10 /r`
21057	///
21058	/// `SSE4.1`
21059	///
21060	/// `16/32/64-bit`
21061	Pblendvb_xmm_xmmm128 = 2633,
21062	/// `VPSRLVW xmm1 {k1}{z}, xmm2, xmm3/m128`
21063	///
21064	/// `EVEX.128.66.0F38.W1 10 /r`
21065	///
21066	/// `AVX512VL and AVX512BW`
21067	///
21068	/// `16/32/64-bit`
21069	EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128 = 2634,
21070	/// `VPSRLVW ymm1 {k1}{z}, ymm2, ymm3/m256`
21071	///
21072	/// `EVEX.256.66.0F38.W1 10 /r`
21073	///
21074	/// `AVX512VL and AVX512BW`
21075	///
21076	/// `16/32/64-bit`
21077	EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256 = 2635,
21078	/// `VPSRLVW zmm1 {k1}{z}, zmm2, zmm3/m512`
21079	///
21080	/// `EVEX.512.66.0F38.W1 10 /r`
21081	///
21082	/// `AVX512BW`
21083	///
21084	/// `16/32/64-bit`
21085	EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512 = 2636,
21086	/// `VPMOVUSWB xmm1/m64 {k1}{z}, xmm2`
21087	///
21088	/// `EVEX.128.F3.0F38.W0 10 /r`
21089	///
21090	/// `AVX512VL and AVX512BW`
21091	///
21092	/// `16/32/64-bit`
21093	EVEX_Vpmovuswb_xmmm64_k1z_xmm = 2637,
21094	/// `VPMOVUSWB xmm1/m128 {k1}{z}, ymm2`
21095	///
21096	/// `EVEX.256.F3.0F38.W0 10 /r`
21097	///
21098	/// `AVX512VL and AVX512BW`
21099	///
21100	/// `16/32/64-bit`
21101	EVEX_Vpmovuswb_xmmm128_k1z_ymm = 2638,
21102	/// `VPMOVUSWB ymm1/m256 {k1}{z}, zmm2`
21103	///
21104	/// `EVEX.512.F3.0F38.W0 10 /r`
21105	///
21106	/// `AVX512BW`
21107	///
21108	/// `16/32/64-bit`
21109	EVEX_Vpmovuswb_ymmm256_k1z_zmm = 2639,
21110	/// `VPSRAVW xmm1 {k1}{z}, xmm2, xmm3/m128`
21111	///
21112	/// `EVEX.128.66.0F38.W1 11 /r`
21113	///
21114	/// `AVX512VL and AVX512BW`
21115	///
21116	/// `16/32/64-bit`
21117	EVEX_Vpsravw_xmm_k1z_xmm_xmmm128 = 2640,
21118	/// `VPSRAVW ymm1 {k1}{z}, ymm2, ymm3/m256`
21119	///
21120	/// `EVEX.256.66.0F38.W1 11 /r`
21121	///
21122	/// `AVX512VL and AVX512BW`
21123	///
21124	/// `16/32/64-bit`
21125	EVEX_Vpsravw_ymm_k1z_ymm_ymmm256 = 2641,
21126	/// `VPSRAVW zmm1 {k1}{z}, zmm2, zmm3/m512`
21127	///
21128	/// `EVEX.512.66.0F38.W1 11 /r`
21129	///
21130	/// `AVX512BW`
21131	///
21132	/// `16/32/64-bit`
21133	EVEX_Vpsravw_zmm_k1z_zmm_zmmm512 = 2642,
21134	/// `VPMOVUSDB xmm1/m32 {k1}{z}, xmm2`
21135	///
21136	/// `EVEX.128.F3.0F38.W0 11 /r`
21137	///
21138	/// `AVX512VL and AVX512F`
21139	///
21140	/// `16/32/64-bit`
21141	EVEX_Vpmovusdb_xmmm32_k1z_xmm = 2643,
21142	/// `VPMOVUSDB xmm1/m64 {k1}{z}, ymm2`
21143	///
21144	/// `EVEX.256.F3.0F38.W0 11 /r`
21145	///
21146	/// `AVX512VL and AVX512F`
21147	///
21148	/// `16/32/64-bit`
21149	EVEX_Vpmovusdb_xmmm64_k1z_ymm = 2644,
21150	/// `VPMOVUSDB xmm1/m128 {k1}{z}, zmm2`
21151	///
21152	/// `EVEX.512.F3.0F38.W0 11 /r`
21153	///
21154	/// `AVX512F`
21155	///
21156	/// `16/32/64-bit`
21157	EVEX_Vpmovusdb_xmmm128_k1z_zmm = 2645,
21158	/// `VPSLLVW xmm1 {k1}{z}, xmm2, xmm3/m128`
21159	///
21160	/// `EVEX.128.66.0F38.W1 12 /r`
21161	///
21162	/// `AVX512VL and AVX512BW`
21163	///
21164	/// `16/32/64-bit`
21165	EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128 = 2646,
21166	/// `VPSLLVW ymm1 {k1}{z}, ymm2, ymm3/m256`
21167	///
21168	/// `EVEX.256.66.0F38.W1 12 /r`
21169	///
21170	/// `AVX512VL and AVX512BW`
21171	///
21172	/// `16/32/64-bit`
21173	EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256 = 2647,
21174	/// `VPSLLVW zmm1 {k1}{z}, zmm2, zmm3/m512`
21175	///
21176	/// `EVEX.512.66.0F38.W1 12 /r`
21177	///
21178	/// `AVX512BW`
21179	///
21180	/// `16/32/64-bit`
21181	EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512 = 2648,
21182	/// `VPMOVUSQB xmm1/m16 {k1}{z}, xmm2`
21183	///
21184	/// `EVEX.128.F3.0F38.W0 12 /r`
21185	///
21186	/// `AVX512VL and AVX512F`
21187	///
21188	/// `16/32/64-bit`
21189	EVEX_Vpmovusqb_xmmm16_k1z_xmm = 2649,
21190	/// `VPMOVUSQB xmm1/m32 {k1}{z}, ymm2`
21191	///
21192	/// `EVEX.256.F3.0F38.W0 12 /r`
21193	///
21194	/// `AVX512VL and AVX512F`
21195	///
21196	/// `16/32/64-bit`
21197	EVEX_Vpmovusqb_xmmm32_k1z_ymm = 2650,
21198	/// `VPMOVUSQB xmm1/m64 {k1}{z}, zmm2`
21199	///
21200	/// `EVEX.512.F3.0F38.W0 12 /r`
21201	///
21202	/// `AVX512F`
21203	///
21204	/// `16/32/64-bit`
21205	EVEX_Vpmovusqb_xmmm64_k1z_zmm = 2651,
21206	/// `VCVTPH2PS xmm1, xmm2/m64`
21207	///
21208	/// `VEX.128.66.0F38.W0 13 /r`
21209	///
21210	/// `F16C`
21211	///
21212	/// `16/32/64-bit`
21213	VEX_Vcvtph2ps_xmm_xmmm64 = 2652,
21214	/// `VCVTPH2PS ymm1, xmm2/m128`
21215	///
21216	/// `VEX.256.66.0F38.W0 13 /r`
21217	///
21218	/// `F16C`
21219	///
21220	/// `16/32/64-bit`
21221	VEX_Vcvtph2ps_ymm_xmmm128 = 2653,
21222	/// `VCVTPH2PS xmm1 {k1}{z}, xmm2/m64`
21223	///
21224	/// `EVEX.128.66.0F38.W0 13 /r`
21225	///
21226	/// `AVX512VL and AVX512F`
21227	///
21228	/// `16/32/64-bit`
21229	EVEX_Vcvtph2ps_xmm_k1z_xmmm64 = 2654,
21230	/// `VCVTPH2PS ymm1 {k1}{z}, xmm2/m128`
21231	///
21232	/// `EVEX.256.66.0F38.W0 13 /r`
21233	///
21234	/// `AVX512VL and AVX512F`
21235	///
21236	/// `16/32/64-bit`
21237	EVEX_Vcvtph2ps_ymm_k1z_xmmm128 = 2655,
21238	/// `VCVTPH2PS zmm1 {k1}{z}, ymm2/m256{sae}`
21239	///
21240	/// `EVEX.512.66.0F38.W0 13 /r`
21241	///
21242	/// `AVX512F`
21243	///
21244	/// `16/32/64-bit`
21245	EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae = 2656,
21246	/// `VPMOVUSDW xmm1/m64 {k1}{z}, xmm2`
21247	///
21248	/// `EVEX.128.F3.0F38.W0 13 /r`
21249	///
21250	/// `AVX512VL and AVX512F`
21251	///
21252	/// `16/32/64-bit`
21253	EVEX_Vpmovusdw_xmmm64_k1z_xmm = 2657,
21254	/// `VPMOVUSDW xmm1/m128 {k1}{z}, ymm2`
21255	///
21256	/// `EVEX.256.F3.0F38.W0 13 /r`
21257	///
21258	/// `AVX512VL and AVX512F`
21259	///
21260	/// `16/32/64-bit`
21261	EVEX_Vpmovusdw_xmmm128_k1z_ymm = 2658,
21262	/// `VPMOVUSDW ymm1/m256 {k1}{z}, zmm2`
21263	///
21264	/// `EVEX.512.F3.0F38.W0 13 /r`
21265	///
21266	/// `AVX512F`
21267	///
21268	/// `16/32/64-bit`
21269	EVEX_Vpmovusdw_ymmm256_k1z_zmm = 2659,
21270	/// `BLENDVPS xmm1, xmm2/m128, <XMM0>`
21271	///
21272	/// `66 0F 38 14 /r`
21273	///
21274	/// `SSE4.1`
21275	///
21276	/// `16/32/64-bit`
21277	Blendvps_xmm_xmmm128 = 2660,
21278	/// `VPRORVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
21279	///
21280	/// `EVEX.128.66.0F38.W0 14 /r`
21281	///
21282	/// `AVX512VL and AVX512F`
21283	///
21284	/// `16/32/64-bit`
21285	EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32 = 2661,
21286	/// `VPRORVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
21287	///
21288	/// `EVEX.256.66.0F38.W0 14 /r`
21289	///
21290	/// `AVX512VL and AVX512F`
21291	///
21292	/// `16/32/64-bit`
21293	EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32 = 2662,
21294	/// `VPRORVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
21295	///
21296	/// `EVEX.512.66.0F38.W0 14 /r`
21297	///
21298	/// `AVX512F`
21299	///
21300	/// `16/32/64-bit`
21301	EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32 = 2663,
21302	/// `VPRORVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
21303	///
21304	/// `EVEX.128.66.0F38.W1 14 /r`
21305	///
21306	/// `AVX512VL and AVX512F`
21307	///
21308	/// `16/32/64-bit`
21309	EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64 = 2664,
21310	/// `VPRORVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
21311	///
21312	/// `EVEX.256.66.0F38.W1 14 /r`
21313	///
21314	/// `AVX512VL and AVX512F`
21315	///
21316	/// `16/32/64-bit`
21317	EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64 = 2665,
21318	/// `VPRORVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
21319	///
21320	/// `EVEX.512.66.0F38.W1 14 /r`
21321	///
21322	/// `AVX512F`
21323	///
21324	/// `16/32/64-bit`
21325	EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64 = 2666,
21326	/// `VPMOVUSQW xmm1/m32 {k1}{z}, xmm2`
21327	///
21328	/// `EVEX.128.F3.0F38.W0 14 /r`
21329	///
21330	/// `AVX512VL and AVX512F`
21331	///
21332	/// `16/32/64-bit`
21333	EVEX_Vpmovusqw_xmmm32_k1z_xmm = 2667,
21334	/// `VPMOVUSQW xmm1/m64 {k1}{z}, ymm2`
21335	///
21336	/// `EVEX.256.F3.0F38.W0 14 /r`
21337	///
21338	/// `AVX512VL and AVX512F`
21339	///
21340	/// `16/32/64-bit`
21341	EVEX_Vpmovusqw_xmmm64_k1z_ymm = 2668,
21342	/// `VPMOVUSQW xmm1/m128 {k1}{z}, zmm2`
21343	///
21344	/// `EVEX.512.F3.0F38.W0 14 /r`
21345	///
21346	/// `AVX512F`
21347	///
21348	/// `16/32/64-bit`
21349	EVEX_Vpmovusqw_xmmm128_k1z_zmm = 2669,
21350	/// `BLENDVPD xmm1, xmm2/m128, <XMM0>`
21351	///
21352	/// `66 0F 38 15 /r`
21353	///
21354	/// `SSE4.1`
21355	///
21356	/// `16/32/64-bit`
21357	Blendvpd_xmm_xmmm128 = 2670,
21358	/// `VPROLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
21359	///
21360	/// `EVEX.128.66.0F38.W0 15 /r`
21361	///
21362	/// `AVX512VL and AVX512F`
21363	///
21364	/// `16/32/64-bit`
21365	EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32 = 2671,
21366	/// `VPROLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
21367	///
21368	/// `EVEX.256.66.0F38.W0 15 /r`
21369	///
21370	/// `AVX512VL and AVX512F`
21371	///
21372	/// `16/32/64-bit`
21373	EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32 = 2672,
21374	/// `VPROLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
21375	///
21376	/// `EVEX.512.66.0F38.W0 15 /r`
21377	///
21378	/// `AVX512F`
21379	///
21380	/// `16/32/64-bit`
21381	EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32 = 2673,
21382	/// `VPROLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
21383	///
21384	/// `EVEX.128.66.0F38.W1 15 /r`
21385	///
21386	/// `AVX512VL and AVX512F`
21387	///
21388	/// `16/32/64-bit`
21389	EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64 = 2674,
21390	/// `VPROLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
21391	///
21392	/// `EVEX.256.66.0F38.W1 15 /r`
21393	///
21394	/// `AVX512VL and AVX512F`
21395	///
21396	/// `16/32/64-bit`
21397	EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64 = 2675,
21398	/// `VPROLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
21399	///
21400	/// `EVEX.512.66.0F38.W1 15 /r`
21401	///
21402	/// `AVX512F`
21403	///
21404	/// `16/32/64-bit`
21405	EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64 = 2676,
21406	/// `VPMOVUSQD xmm1/m64 {k1}{z}, xmm2`
21407	///
21408	/// `EVEX.128.F3.0F38.W0 15 /r`
21409	///
21410	/// `AVX512VL and AVX512F`
21411	///
21412	/// `16/32/64-bit`
21413	EVEX_Vpmovusqd_xmmm64_k1z_xmm = 2677,
21414	/// `VPMOVUSQD xmm1/m128 {k1}{z}, ymm2`
21415	///
21416	/// `EVEX.256.F3.0F38.W0 15 /r`
21417	///
21418	/// `AVX512VL and AVX512F`
21419	///
21420	/// `16/32/64-bit`
21421	EVEX_Vpmovusqd_xmmm128_k1z_ymm = 2678,
21422	/// `VPMOVUSQD ymm1/m256 {k1}{z}, zmm2`
21423	///
21424	/// `EVEX.512.F3.0F38.W0 15 /r`
21425	///
21426	/// `AVX512F`
21427	///
21428	/// `16/32/64-bit`
21429	EVEX_Vpmovusqd_ymmm256_k1z_zmm = 2679,
21430	/// `VPERMPS ymm1, ymm2, ymm3/m256`
21431	///
21432	/// `VEX.256.66.0F38.W0 16 /r`
21433	///
21434	/// `AVX2`
21435	///
21436	/// `16/32/64-bit`
21437	VEX_Vpermps_ymm_ymm_ymmm256 = 2680,
21438	/// `VPERMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
21439	///
21440	/// `EVEX.256.66.0F38.W0 16 /r`
21441	///
21442	/// `AVX512VL and AVX512F`
21443	///
21444	/// `16/32/64-bit`
21445	EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32 = 2681,
21446	/// `VPERMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
21447	///
21448	/// `EVEX.512.66.0F38.W0 16 /r`
21449	///
21450	/// `AVX512F`
21451	///
21452	/// `16/32/64-bit`
21453	EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32 = 2682,
21454	/// `VPERMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
21455	///
21456	/// `EVEX.256.66.0F38.W1 16 /r`
21457	///
21458	/// `AVX512VL and AVX512F`
21459	///
21460	/// `16/32/64-bit`
21461	EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64 = 2683,
21462	/// `VPERMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
21463	///
21464	/// `EVEX.512.66.0F38.W1 16 /r`
21465	///
21466	/// `AVX512F`
21467	///
21468	/// `16/32/64-bit`
21469	EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64 = 2684,
21470	/// `PTEST xmm1, xmm2/m128`
21471	///
21472	/// `66 0F 38 17 /r`
21473	///
21474	/// `SSE4.1`
21475	///
21476	/// `16/32/64-bit`
21477	Ptest_xmm_xmmm128 = 2685,
21478	/// `VPTEST xmm1, xmm2/m128`
21479	///
21480	/// `VEX.128.66.0F38.WIG 17 /r`
21481	///
21482	/// `AVX`
21483	///
21484	/// `16/32/64-bit`
21485	VEX_Vptest_xmm_xmmm128 = 2686,
21486	/// `VPTEST ymm1, ymm2/m256`
21487	///
21488	/// `VEX.256.66.0F38.WIG 17 /r`
21489	///
21490	/// `AVX`
21491	///
21492	/// `16/32/64-bit`
21493	VEX_Vptest_ymm_ymmm256 = 2687,
21494	/// `VBROADCASTSS xmm1, m32`
21495	///
21496	/// `VEX.128.66.0F38.W0 18 /r`
21497	///
21498	/// `AVX`
21499	///
21500	/// `16/32/64-bit`
21501	VEX_Vbroadcastss_xmm_m32 = 2688,
21502	/// `VBROADCASTSS ymm1, m32`
21503	///
21504	/// `VEX.256.66.0F38.W0 18 /r`
21505	///
21506	/// `AVX`
21507	///
21508	/// `16/32/64-bit`
21509	VEX_Vbroadcastss_ymm_m32 = 2689,
21510	/// `VBROADCASTSS xmm1 {k1}{z}, xmm2/m32`
21511	///
21512	/// `EVEX.128.66.0F38.W0 18 /r`
21513	///
21514	/// `AVX512VL and AVX512F`
21515	///
21516	/// `16/32/64-bit`
21517	EVEX_Vbroadcastss_xmm_k1z_xmmm32 = 2690,
21518	/// `VBROADCASTSS ymm1 {k1}{z}, xmm2/m32`
21519	///
21520	/// `EVEX.256.66.0F38.W0 18 /r`
21521	///
21522	/// `AVX512VL and AVX512F`
21523	///
21524	/// `16/32/64-bit`
21525	EVEX_Vbroadcastss_ymm_k1z_xmmm32 = 2691,
21526	/// `VBROADCASTSS zmm1 {k1}{z}, xmm2/m32`
21527	///
21528	/// `EVEX.512.66.0F38.W0 18 /r`
21529	///
21530	/// `AVX512F`
21531	///
21532	/// `16/32/64-bit`
21533	EVEX_Vbroadcastss_zmm_k1z_xmmm32 = 2692,
21534	/// `VBROADCASTSD ymm1, m64`
21535	///
21536	/// `VEX.256.66.0F38.W0 19 /r`
21537	///
21538	/// `AVX`
21539	///
21540	/// `16/32/64-bit`
21541	VEX_Vbroadcastsd_ymm_m64 = 2693,
21542	/// `VBROADCASTF32X2 ymm1 {k1}{z}, xmm2/m64`
21543	///
21544	/// `EVEX.256.66.0F38.W0 19 /r`
21545	///
21546	/// `AVX512VL and AVX512DQ`
21547	///
21548	/// `16/32/64-bit`
21549	EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64 = 2694,
21550	/// `VBROADCASTF32X2 zmm1 {k1}{z}, xmm2/m64`
21551	///
21552	/// `EVEX.512.66.0F38.W0 19 /r`
21553	///
21554	/// `AVX512DQ`
21555	///
21556	/// `16/32/64-bit`
21557	EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64 = 2695,
21558	/// `VBROADCASTSD ymm1 {k1}{z}, xmm2/m64`
21559	///
21560	/// `EVEX.256.66.0F38.W1 19 /r`
21561	///
21562	/// `AVX512VL and AVX512F`
21563	///
21564	/// `16/32/64-bit`
21565	EVEX_Vbroadcastsd_ymm_k1z_xmmm64 = 2696,
21566	/// `VBROADCASTSD zmm1 {k1}{z}, xmm2/m64`
21567	///
21568	/// `EVEX.512.66.0F38.W1 19 /r`
21569	///
21570	/// `AVX512F`
21571	///
21572	/// `16/32/64-bit`
21573	EVEX_Vbroadcastsd_zmm_k1z_xmmm64 = 2697,
21574	/// `VBROADCASTF128 ymm1, m128`
21575	///
21576	/// `VEX.256.66.0F38.W0 1A /r`
21577	///
21578	/// `AVX`
21579	///
21580	/// `16/32/64-bit`
21581	VEX_Vbroadcastf128_ymm_m128 = 2698,
21582	/// `VBROADCASTF32X4 ymm1 {k1}{z}, m128`
21583	///
21584	/// `EVEX.256.66.0F38.W0 1A /r`
21585	///
21586	/// `AVX512VL and AVX512F`
21587	///
21588	/// `16/32/64-bit`
21589	EVEX_Vbroadcastf32x4_ymm_k1z_m128 = 2699,
21590	/// `VBROADCASTF32X4 zmm1 {k1}{z}, m128`
21591	///
21592	/// `EVEX.512.66.0F38.W0 1A /r`
21593	///
21594	/// `AVX512F`
21595	///
21596	/// `16/32/64-bit`
21597	EVEX_Vbroadcastf32x4_zmm_k1z_m128 = 2700,
21598	/// `VBROADCASTF64X2 ymm1 {k1}{z}, m128`
21599	///
21600	/// `EVEX.256.66.0F38.W1 1A /r`
21601	///
21602	/// `AVX512VL and AVX512DQ`
21603	///
21604	/// `16/32/64-bit`
21605	EVEX_Vbroadcastf64x2_ymm_k1z_m128 = 2701,
21606	/// `VBROADCASTF64X2 zmm1 {k1}{z}, m128`
21607	///
21608	/// `EVEX.512.66.0F38.W1 1A /r`
21609	///
21610	/// `AVX512DQ`
21611	///
21612	/// `16/32/64-bit`
21613	EVEX_Vbroadcastf64x2_zmm_k1z_m128 = 2702,
21614	/// `VBROADCASTF32X8 zmm1 {k1}{z}, m256`
21615	///
21616	/// `EVEX.512.66.0F38.W0 1B /r`
21617	///
21618	/// `AVX512DQ`
21619	///
21620	/// `16/32/64-bit`
21621	EVEX_Vbroadcastf32x8_zmm_k1z_m256 = 2703,
21622	/// `VBROADCASTF64X4 zmm1 {k1}{z}, m256`
21623	///
21624	/// `EVEX.512.66.0F38.W1 1B /r`
21625	///
21626	/// `AVX512F`
21627	///
21628	/// `16/32/64-bit`
21629	EVEX_Vbroadcastf64x4_zmm_k1z_m256 = 2704,
21630	/// `PABSB mm1, mm2/m64`
21631	///
21632	/// `NP 0F 38 1C /r`
21633	///
21634	/// `SSSE3`
21635	///
21636	/// `16/32/64-bit`
21637	Pabsb_mm_mmm64 = 2705,
21638	/// `PABSB xmm1, xmm2/m128`
21639	///
21640	/// `66 0F 38 1C /r`
21641	///
21642	/// `SSSE3`
21643	///
21644	/// `16/32/64-bit`
21645	Pabsb_xmm_xmmm128 = 2706,
21646	/// `VPABSB xmm1, xmm2/m128`
21647	///
21648	/// `VEX.128.66.0F38.WIG 1C /r`
21649	///
21650	/// `AVX`
21651	///
21652	/// `16/32/64-bit`
21653	VEX_Vpabsb_xmm_xmmm128 = 2707,
21654	/// `VPABSB ymm1, ymm2/m256`
21655	///
21656	/// `VEX.256.66.0F38.WIG 1C /r`
21657	///
21658	/// `AVX2`
21659	///
21660	/// `16/32/64-bit`
21661	VEX_Vpabsb_ymm_ymmm256 = 2708,
21662	/// `VPABSB xmm1 {k1}{z}, xmm2/m128`
21663	///
21664	/// `EVEX.128.66.0F38.WIG 1C /r`
21665	///
21666	/// `AVX512VL and AVX512BW`
21667	///
21668	/// `16/32/64-bit`
21669	EVEX_Vpabsb_xmm_k1z_xmmm128 = 2709,
21670	/// `VPABSB ymm1 {k1}{z}, ymm2/m256`
21671	///
21672	/// `EVEX.256.66.0F38.WIG 1C /r`
21673	///
21674	/// `AVX512VL and AVX512BW`
21675	///
21676	/// `16/32/64-bit`
21677	EVEX_Vpabsb_ymm_k1z_ymmm256 = 2710,
21678	/// `VPABSB zmm1 {k1}{z}, zmm2/m512`
21679	///
21680	/// `EVEX.512.66.0F38.WIG 1C /r`
21681	///
21682	/// `AVX512BW`
21683	///
21684	/// `16/32/64-bit`
21685	EVEX_Vpabsb_zmm_k1z_zmmm512 = 2711,
21686	/// `PABSW mm1, mm2/m64`
21687	///
21688	/// `NP 0F 38 1D /r`
21689	///
21690	/// `SSSE3`
21691	///
21692	/// `16/32/64-bit`
21693	Pabsw_mm_mmm64 = 2712,
21694	/// `PABSW xmm1, xmm2/m128`
21695	///
21696	/// `66 0F 38 1D /r`
21697	///
21698	/// `SSSE3`
21699	///
21700	/// `16/32/64-bit`
21701	Pabsw_xmm_xmmm128 = 2713,
21702	/// `VPABSW xmm1, xmm2/m128`
21703	///
21704	/// `VEX.128.66.0F38.WIG 1D /r`
21705	///
21706	/// `AVX`
21707	///
21708	/// `16/32/64-bit`
21709	VEX_Vpabsw_xmm_xmmm128 = 2714,
21710	/// `VPABSW ymm1, ymm2/m256`
21711	///
21712	/// `VEX.256.66.0F38.WIG 1D /r`
21713	///
21714	/// `AVX2`
21715	///
21716	/// `16/32/64-bit`
21717	VEX_Vpabsw_ymm_ymmm256 = 2715,
21718	/// `VPABSW xmm1 {k1}{z}, xmm2/m128`
21719	///
21720	/// `EVEX.128.66.0F38.WIG 1D /r`
21721	///
21722	/// `AVX512VL and AVX512BW`
21723	///
21724	/// `16/32/64-bit`
21725	EVEX_Vpabsw_xmm_k1z_xmmm128 = 2716,
21726	/// `VPABSW ymm1 {k1}{z}, ymm2/m256`
21727	///
21728	/// `EVEX.256.66.0F38.WIG 1D /r`
21729	///
21730	/// `AVX512VL and AVX512BW`
21731	///
21732	/// `16/32/64-bit`
21733	EVEX_Vpabsw_ymm_k1z_ymmm256 = 2717,
21734	/// `VPABSW zmm1 {k1}{z}, zmm2/m512`
21735	///
21736	/// `EVEX.512.66.0F38.WIG 1D /r`
21737	///
21738	/// `AVX512BW`
21739	///
21740	/// `16/32/64-bit`
21741	EVEX_Vpabsw_zmm_k1z_zmmm512 = 2718,
21742	/// `PABSD mm1, mm2/m64`
21743	///
21744	/// `NP 0F 38 1E /r`
21745	///
21746	/// `SSSE3`
21747	///
21748	/// `16/32/64-bit`
21749	Pabsd_mm_mmm64 = 2719,
21750	/// `PABSD xmm1, xmm2/m128`
21751	///
21752	/// `66 0F 38 1E /r`
21753	///
21754	/// `SSSE3`
21755	///
21756	/// `16/32/64-bit`
21757	Pabsd_xmm_xmmm128 = 2720,
21758	/// `VPABSD xmm1, xmm2/m128`
21759	///
21760	/// `VEX.128.66.0F38.WIG 1E /r`
21761	///
21762	/// `AVX`
21763	///
21764	/// `16/32/64-bit`
21765	VEX_Vpabsd_xmm_xmmm128 = 2721,
21766	/// `VPABSD ymm1, ymm2/m256`
21767	///
21768	/// `VEX.256.66.0F38.WIG 1E /r`
21769	///
21770	/// `AVX2`
21771	///
21772	/// `16/32/64-bit`
21773	VEX_Vpabsd_ymm_ymmm256 = 2722,
21774	/// `VPABSD xmm1 {k1}{z}, xmm2/m128/m32bcst`
21775	///
21776	/// `EVEX.128.66.0F38.W0 1E /r`
21777	///
21778	/// `AVX512VL and AVX512F`
21779	///
21780	/// `16/32/64-bit`
21781	EVEX_Vpabsd_xmm_k1z_xmmm128b32 = 2723,
21782	/// `VPABSD ymm1 {k1}{z}, ymm2/m256/m32bcst`
21783	///
21784	/// `EVEX.256.66.0F38.W0 1E /r`
21785	///
21786	/// `AVX512VL and AVX512F`
21787	///
21788	/// `16/32/64-bit`
21789	EVEX_Vpabsd_ymm_k1z_ymmm256b32 = 2724,
21790	/// `VPABSD zmm1 {k1}{z}, zmm2/m512/m32bcst`
21791	///
21792	/// `EVEX.512.66.0F38.W0 1E /r`
21793	///
21794	/// `AVX512F`
21795	///
21796	/// `16/32/64-bit`
21797	EVEX_Vpabsd_zmm_k1z_zmmm512b32 = 2725,
21798	/// `VPABSQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
21799	///
21800	/// `EVEX.128.66.0F38.W1 1F /r`
21801	///
21802	/// `AVX512VL and AVX512F`
21803	///
21804	/// `16/32/64-bit`
21805	EVEX_Vpabsq_xmm_k1z_xmmm128b64 = 2726,
21806	/// `VPABSQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
21807	///
21808	/// `EVEX.256.66.0F38.W1 1F /r`
21809	///
21810	/// `AVX512VL and AVX512F`
21811	///
21812	/// `16/32/64-bit`
21813	EVEX_Vpabsq_ymm_k1z_ymmm256b64 = 2727,
21814	/// `VPABSQ zmm1 {k1}{z}, zmm2/m512/m64bcst`
21815	///
21816	/// `EVEX.512.66.0F38.W1 1F /r`
21817	///
21818	/// `AVX512F`
21819	///
21820	/// `16/32/64-bit`
21821	EVEX_Vpabsq_zmm_k1z_zmmm512b64 = 2728,
21822	/// `PMOVSXBW xmm1, xmm2/m64`
21823	///
21824	/// `66 0F 38 20 /r`
21825	///
21826	/// `SSE4.1`
21827	///
21828	/// `16/32/64-bit`
21829	Pmovsxbw_xmm_xmmm64 = 2729,
21830	/// `VPMOVSXBW xmm1, xmm2/m64`
21831	///
21832	/// `VEX.128.66.0F38.WIG 20 /r`
21833	///
21834	/// `AVX`
21835	///
21836	/// `16/32/64-bit`
21837	VEX_Vpmovsxbw_xmm_xmmm64 = 2730,
21838	/// `VPMOVSXBW ymm1, xmm2/m128`
21839	///
21840	/// `VEX.256.66.0F38.WIG 20 /r`
21841	///
21842	/// `AVX2`
21843	///
21844	/// `16/32/64-bit`
21845	VEX_Vpmovsxbw_ymm_xmmm128 = 2731,
21846	/// `VPMOVSXBW xmm1 {k1}{z}, xmm2/m64`
21847	///
21848	/// `EVEX.128.66.0F38.WIG 20 /r`
21849	///
21850	/// `AVX512VL and AVX512BW`
21851	///
21852	/// `16/32/64-bit`
21853	EVEX_Vpmovsxbw_xmm_k1z_xmmm64 = 2732,
21854	/// `VPMOVSXBW ymm1 {k1}{z}, xmm2/m128`
21855	///
21856	/// `EVEX.256.66.0F38.WIG 20 /r`
21857	///
21858	/// `AVX512VL and AVX512BW`
21859	///
21860	/// `16/32/64-bit`
21861	EVEX_Vpmovsxbw_ymm_k1z_xmmm128 = 2733,
21862	/// `VPMOVSXBW zmm1 {k1}{z}, ymm2/m256`
21863	///
21864	/// `EVEX.512.66.0F38.WIG 20 /r`
21865	///
21866	/// `AVX512BW`
21867	///
21868	/// `16/32/64-bit`
21869	EVEX_Vpmovsxbw_zmm_k1z_ymmm256 = 2734,
21870	/// `VPMOVSWB xmm1/m64 {k1}{z}, xmm2`
21871	///
21872	/// `EVEX.128.F3.0F38.W0 20 /r`
21873	///
21874	/// `AVX512VL and AVX512BW`
21875	///
21876	/// `16/32/64-bit`
21877	EVEX_Vpmovswb_xmmm64_k1z_xmm = 2735,
21878	/// `VPMOVSWB xmm1/m128 {k1}{z}, ymm2`
21879	///
21880	/// `EVEX.256.F3.0F38.W0 20 /r`
21881	///
21882	/// `AVX512VL and AVX512BW`
21883	///
21884	/// `16/32/64-bit`
21885	EVEX_Vpmovswb_xmmm128_k1z_ymm = 2736,
21886	/// `VPMOVSWB ymm1/m256 {k1}{z}, zmm2`
21887	///
21888	/// `EVEX.512.F3.0F38.W0 20 /r`
21889	///
21890	/// `AVX512BW`
21891	///
21892	/// `16/32/64-bit`
21893	EVEX_Vpmovswb_ymmm256_k1z_zmm = 2737,
21894	/// `PMOVSXBD xmm1, xmm2/m32`
21895	///
21896	/// `66 0F 38 21 /r`
21897	///
21898	/// `SSE4.1`
21899	///
21900	/// `16/32/64-bit`
21901	Pmovsxbd_xmm_xmmm32 = 2738,
21902	/// `VPMOVSXBD xmm1, xmm2/m32`
21903	///
21904	/// `VEX.128.66.0F38.WIG 21 /r`
21905	///
21906	/// `AVX`
21907	///
21908	/// `16/32/64-bit`
21909	VEX_Vpmovsxbd_xmm_xmmm32 = 2739,
21910	/// `VPMOVSXBD ymm1, xmm2/m64`
21911	///
21912	/// `VEX.256.66.0F38.WIG 21 /r`
21913	///
21914	/// `AVX2`
21915	///
21916	/// `16/32/64-bit`
21917	VEX_Vpmovsxbd_ymm_xmmm64 = 2740,
21918	/// `VPMOVSXBD xmm1 {k1}{z}, xmm2/m32`
21919	///
21920	/// `EVEX.128.66.0F38.WIG 21 /r`
21921	///
21922	/// `AVX512VL and AVX512F`
21923	///
21924	/// `16/32/64-bit`
21925	EVEX_Vpmovsxbd_xmm_k1z_xmmm32 = 2741,
21926	/// `VPMOVSXBD ymm1 {k1}{z}, xmm2/m64`
21927	///
21928	/// `EVEX.256.66.0F38.WIG 21 /r`
21929	///
21930	/// `AVX512VL and AVX512F`
21931	///
21932	/// `16/32/64-bit`
21933	EVEX_Vpmovsxbd_ymm_k1z_xmmm64 = 2742,
21934	/// `VPMOVSXBD zmm1 {k1}{z}, xmm2/m128`
21935	///
21936	/// `EVEX.512.66.0F38.WIG 21 /r`
21937	///
21938	/// `AVX512F`
21939	///
21940	/// `16/32/64-bit`
21941	EVEX_Vpmovsxbd_zmm_k1z_xmmm128 = 2743,
21942	/// `VPMOVSDB xmm1/m32 {k1}{z}, xmm2`
21943	///
21944	/// `EVEX.128.F3.0F38.W0 21 /r`
21945	///
21946	/// `AVX512VL and AVX512F`
21947	///
21948	/// `16/32/64-bit`
21949	EVEX_Vpmovsdb_xmmm32_k1z_xmm = 2744,
21950	/// `VPMOVSDB xmm1/m64 {k1}{z}, ymm2`
21951	///
21952	/// `EVEX.256.F3.0F38.W0 21 /r`
21953	///
21954	/// `AVX512VL and AVX512F`
21955	///
21956	/// `16/32/64-bit`
21957	EVEX_Vpmovsdb_xmmm64_k1z_ymm = 2745,
21958	/// `VPMOVSDB xmm1/m128 {k1}{z}, zmm2`
21959	///
21960	/// `EVEX.512.F3.0F38.W0 21 /r`
21961	///
21962	/// `AVX512F`
21963	///
21964	/// `16/32/64-bit`
21965	EVEX_Vpmovsdb_xmmm128_k1z_zmm = 2746,
21966	/// `PMOVSXBQ xmm1, xmm2/m16`
21967	///
21968	/// `66 0F 38 22 /r`
21969	///
21970	/// `SSE4.1`
21971	///
21972	/// `16/32/64-bit`
21973	Pmovsxbq_xmm_xmmm16 = 2747,
21974	/// `VPMOVSXBQ xmm1, xmm2/m16`
21975	///
21976	/// `VEX.128.66.0F38.WIG 22 /r`
21977	///
21978	/// `AVX`
21979	///
21980	/// `16/32/64-bit`
21981	VEX_Vpmovsxbq_xmm_xmmm16 = 2748,
21982	/// `VPMOVSXBQ ymm1, xmm2/m32`
21983	///
21984	/// `VEX.256.66.0F38.WIG 22 /r`
21985	///
21986	/// `AVX2`
21987	///
21988	/// `16/32/64-bit`
21989	VEX_Vpmovsxbq_ymm_xmmm32 = 2749,
21990	/// `VPMOVSXBQ xmm1 {k1}{z}, xmm2/m16`
21991	///
21992	/// `EVEX.128.66.0F38.WIG 22 /r`
21993	///
21994	/// `AVX512VL and AVX512F`
21995	///
21996	/// `16/32/64-bit`
21997	EVEX_Vpmovsxbq_xmm_k1z_xmmm16 = 2750,
21998	/// `VPMOVSXBQ ymm1 {k1}{z}, xmm2/m32`
21999	///
22000	/// `EVEX.256.66.0F38.WIG 22 /r`
22001	///
22002	/// `AVX512VL and AVX512F`
22003	///
22004	/// `16/32/64-bit`
22005	EVEX_Vpmovsxbq_ymm_k1z_xmmm32 = 2751,
22006	/// `VPMOVSXBQ zmm1 {k1}{z}, xmm2/m64`
22007	///
22008	/// `EVEX.512.66.0F38.WIG 22 /r`
22009	///
22010	/// `AVX512F`
22011	///
22012	/// `16/32/64-bit`
22013	EVEX_Vpmovsxbq_zmm_k1z_xmmm64 = 2752,
22014	/// `VPMOVSQB xmm1/m16 {k1}{z}, xmm2`
22015	///
22016	/// `EVEX.128.F3.0F38.W0 22 /r`
22017	///
22018	/// `AVX512VL and AVX512F`
22019	///
22020	/// `16/32/64-bit`
22021	EVEX_Vpmovsqb_xmmm16_k1z_xmm = 2753,
22022	/// `VPMOVSQB xmm1/m32 {k1}{z}, ymm2`
22023	///
22024	/// `EVEX.256.F3.0F38.W0 22 /r`
22025	///
22026	/// `AVX512VL and AVX512F`
22027	///
22028	/// `16/32/64-bit`
22029	EVEX_Vpmovsqb_xmmm32_k1z_ymm = 2754,
22030	/// `VPMOVSQB xmm1/m64 {k1}{z}, zmm2`
22031	///
22032	/// `EVEX.512.F3.0F38.W0 22 /r`
22033	///
22034	/// `AVX512F`
22035	///
22036	/// `16/32/64-bit`
22037	EVEX_Vpmovsqb_xmmm64_k1z_zmm = 2755,
22038	/// `PMOVSXWD xmm1, xmm2/m64`
22039	///
22040	/// `66 0F 38 23 /r`
22041	///
22042	/// `SSE4.1`
22043	///
22044	/// `16/32/64-bit`
22045	Pmovsxwd_xmm_xmmm64 = 2756,
22046	/// `VPMOVSXWD xmm1, xmm2/m64`
22047	///
22048	/// `VEX.128.66.0F38.WIG 23 /r`
22049	///
22050	/// `AVX`
22051	///
22052	/// `16/32/64-bit`
22053	VEX_Vpmovsxwd_xmm_xmmm64 = 2757,
22054	/// `VPMOVSXWD ymm1, xmm2/m128`
22055	///
22056	/// `VEX.256.66.0F38.WIG 23 /r`
22057	///
22058	/// `AVX2`
22059	///
22060	/// `16/32/64-bit`
22061	VEX_Vpmovsxwd_ymm_xmmm128 = 2758,
22062	/// `VPMOVSXWD xmm1 {k1}{z}, xmm2/m64`
22063	///
22064	/// `EVEX.128.66.0F38.WIG 23 /r`
22065	///
22066	/// `AVX512VL and AVX512F`
22067	///
22068	/// `16/32/64-bit`
22069	EVEX_Vpmovsxwd_xmm_k1z_xmmm64 = 2759,
22070	/// `VPMOVSXWD ymm1 {k1}{z}, xmm2/m128`
22071	///
22072	/// `EVEX.256.66.0F38.WIG 23 /r`
22073	///
22074	/// `AVX512VL and AVX512F`
22075	///
22076	/// `16/32/64-bit`
22077	EVEX_Vpmovsxwd_ymm_k1z_xmmm128 = 2760,
22078	/// `VPMOVSXWD zmm1 {k1}{z}, ymm2/m256`
22079	///
22080	/// `EVEX.512.66.0F38.WIG 23 /r`
22081	///
22082	/// `AVX512F`
22083	///
22084	/// `16/32/64-bit`
22085	EVEX_Vpmovsxwd_zmm_k1z_ymmm256 = 2761,
22086	/// `VPMOVSDW xmm1/m64 {k1}{z}, xmm2`
22087	///
22088	/// `EVEX.128.F3.0F38.W0 23 /r`
22089	///
22090	/// `AVX512VL and AVX512F`
22091	///
22092	/// `16/32/64-bit`
22093	EVEX_Vpmovsdw_xmmm64_k1z_xmm = 2762,
22094	/// `VPMOVSDW xmm1/m128 {k1}{z}, ymm2`
22095	///
22096	/// `EVEX.256.F3.0F38.W0 23 /r`
22097	///
22098	/// `AVX512VL and AVX512F`
22099	///
22100	/// `16/32/64-bit`
22101	EVEX_Vpmovsdw_xmmm128_k1z_ymm = 2763,
22102	/// `VPMOVSDW ymm1/m256 {k1}{z}, zmm2`
22103	///
22104	/// `EVEX.512.F3.0F38.W0 23 /r`
22105	///
22106	/// `AVX512F`
22107	///
22108	/// `16/32/64-bit`
22109	EVEX_Vpmovsdw_ymmm256_k1z_zmm = 2764,
22110	/// `PMOVSXWQ xmm1, xmm2/m32`
22111	///
22112	/// `66 0F 38 24 /r`
22113	///
22114	/// `SSE4.1`
22115	///
22116	/// `16/32/64-bit`
22117	Pmovsxwq_xmm_xmmm32 = 2765,
22118	/// `VPMOVSXWQ xmm1, xmm2/m32`
22119	///
22120	/// `VEX.128.66.0F38.WIG 24 /r`
22121	///
22122	/// `AVX`
22123	///
22124	/// `16/32/64-bit`
22125	VEX_Vpmovsxwq_xmm_xmmm32 = 2766,
22126	/// `VPMOVSXWQ ymm1, xmm2/m64`
22127	///
22128	/// `VEX.256.66.0F38.WIG 24 /r`
22129	///
22130	/// `AVX2`
22131	///
22132	/// `16/32/64-bit`
22133	VEX_Vpmovsxwq_ymm_xmmm64 = 2767,
22134	/// `VPMOVSXWQ xmm1 {k1}{z}, xmm2/m32`
22135	///
22136	/// `EVEX.128.66.0F38.WIG 24 /r`
22137	///
22138	/// `AVX512VL and AVX512F`
22139	///
22140	/// `16/32/64-bit`
22141	EVEX_Vpmovsxwq_xmm_k1z_xmmm32 = 2768,
22142	/// `VPMOVSXWQ ymm1 {k1}{z}, xmm2/m64`
22143	///
22144	/// `EVEX.256.66.0F38.WIG 24 /r`
22145	///
22146	/// `AVX512VL and AVX512F`
22147	///
22148	/// `16/32/64-bit`
22149	EVEX_Vpmovsxwq_ymm_k1z_xmmm64 = 2769,
22150	/// `VPMOVSXWQ zmm1 {k1}{z}, xmm2/m128`
22151	///
22152	/// `EVEX.512.66.0F38.WIG 24 /r`
22153	///
22154	/// `AVX512F`
22155	///
22156	/// `16/32/64-bit`
22157	EVEX_Vpmovsxwq_zmm_k1z_xmmm128 = 2770,
22158	/// `VPMOVSQW xmm1/m32 {k1}{z}, xmm2`
22159	///
22160	/// `EVEX.128.F3.0F38.W0 24 /r`
22161	///
22162	/// `AVX512VL and AVX512F`
22163	///
22164	/// `16/32/64-bit`
22165	EVEX_Vpmovsqw_xmmm32_k1z_xmm = 2771,
22166	/// `VPMOVSQW xmm1/m64 {k1}{z}, ymm2`
22167	///
22168	/// `EVEX.256.F3.0F38.W0 24 /r`
22169	///
22170	/// `AVX512VL and AVX512F`
22171	///
22172	/// `16/32/64-bit`
22173	EVEX_Vpmovsqw_xmmm64_k1z_ymm = 2772,
22174	/// `VPMOVSQW xmm1/m128 {k1}{z}, zmm2`
22175	///
22176	/// `EVEX.512.F3.0F38.W0 24 /r`
22177	///
22178	/// `AVX512F`
22179	///
22180	/// `16/32/64-bit`
22181	EVEX_Vpmovsqw_xmmm128_k1z_zmm = 2773,
22182	/// `PMOVSXDQ xmm1, xmm2/m64`
22183	///
22184	/// `66 0F 38 25 /r`
22185	///
22186	/// `SSE4.1`
22187	///
22188	/// `16/32/64-bit`
22189	Pmovsxdq_xmm_xmmm64 = 2774,
22190	/// `VPMOVSXDQ xmm1, xmm2/m64`
22191	///
22192	/// `VEX.128.66.0F38.WIG 25 /r`
22193	///
22194	/// `AVX`
22195	///
22196	/// `16/32/64-bit`
22197	VEX_Vpmovsxdq_xmm_xmmm64 = 2775,
22198	/// `VPMOVSXDQ ymm1, xmm2/m128`
22199	///
22200	/// `VEX.256.66.0F38.WIG 25 /r`
22201	///
22202	/// `AVX2`
22203	///
22204	/// `16/32/64-bit`
22205	VEX_Vpmovsxdq_ymm_xmmm128 = 2776,
22206	/// `VPMOVSXDQ xmm1 {k1}{z}, xmm2/m64`
22207	///
22208	/// `EVEX.128.66.0F38.W0 25 /r`
22209	///
22210	/// `AVX512VL and AVX512F`
22211	///
22212	/// `16/32/64-bit`
22213	EVEX_Vpmovsxdq_xmm_k1z_xmmm64 = 2777,
22214	/// `VPMOVSXDQ ymm1 {k1}{z}, xmm2/m128`
22215	///
22216	/// `EVEX.256.66.0F38.W0 25 /r`
22217	///
22218	/// `AVX512VL and AVX512F`
22219	///
22220	/// `16/32/64-bit`
22221	EVEX_Vpmovsxdq_ymm_k1z_xmmm128 = 2778,
22222	/// `VPMOVSXDQ zmm1 {k1}{z}, ymm2/m256`
22223	///
22224	/// `EVEX.512.66.0F38.W0 25 /r`
22225	///
22226	/// `AVX512F`
22227	///
22228	/// `16/32/64-bit`
22229	EVEX_Vpmovsxdq_zmm_k1z_ymmm256 = 2779,
22230	/// `VPMOVSQD xmm1/m64 {k1}{z}, xmm2`
22231	///
22232	/// `EVEX.128.F3.0F38.W0 25 /r`
22233	///
22234	/// `AVX512VL and AVX512F`
22235	///
22236	/// `16/32/64-bit`
22237	EVEX_Vpmovsqd_xmmm64_k1z_xmm = 2780,
22238	/// `VPMOVSQD xmm1/m128 {k1}{z}, ymm2`
22239	///
22240	/// `EVEX.256.F3.0F38.W0 25 /r`
22241	///
22242	/// `AVX512VL and AVX512F`
22243	///
22244	/// `16/32/64-bit`
22245	EVEX_Vpmovsqd_xmmm128_k1z_ymm = 2781,
22246	/// `VPMOVSQD ymm1/m256 {k1}{z}, zmm2`
22247	///
22248	/// `EVEX.512.F3.0F38.W0 25 /r`
22249	///
22250	/// `AVX512F`
22251	///
22252	/// `16/32/64-bit`
22253	EVEX_Vpmovsqd_ymmm256_k1z_zmm = 2782,
22254	/// `VPTESTMB k2 {k1}, xmm2, xmm3/m128`
22255	///
22256	/// `EVEX.128.66.0F38.W0 26 /r`
22257	///
22258	/// `AVX512VL and AVX512BW`
22259	///
22260	/// `16/32/64-bit`
22261	EVEX_Vptestmb_kr_k1_xmm_xmmm128 = 2783,
22262	/// `VPTESTMB k2 {k1}, ymm2, ymm3/m256`
22263	///
22264	/// `EVEX.256.66.0F38.W0 26 /r`
22265	///
22266	/// `AVX512VL and AVX512BW`
22267	///
22268	/// `16/32/64-bit`
22269	EVEX_Vptestmb_kr_k1_ymm_ymmm256 = 2784,
22270	/// `VPTESTMB k2 {k1}, zmm2, zmm3/m512`
22271	///
22272	/// `EVEX.512.66.0F38.W0 26 /r`
22273	///
22274	/// `AVX512BW`
22275	///
22276	/// `16/32/64-bit`
22277	EVEX_Vptestmb_kr_k1_zmm_zmmm512 = 2785,
22278	/// `VPTESTMW k2 {k1}, xmm2, xmm3/m128`
22279	///
22280	/// `EVEX.128.66.0F38.W1 26 /r`
22281	///
22282	/// `AVX512VL and AVX512BW`
22283	///
22284	/// `16/32/64-bit`
22285	EVEX_Vptestmw_kr_k1_xmm_xmmm128 = 2786,
22286	/// `VPTESTMW k2 {k1}, ymm2, ymm3/m256`
22287	///
22288	/// `EVEX.256.66.0F38.W1 26 /r`
22289	///
22290	/// `AVX512VL and AVX512BW`
22291	///
22292	/// `16/32/64-bit`
22293	EVEX_Vptestmw_kr_k1_ymm_ymmm256 = 2787,
22294	/// `VPTESTMW k2 {k1}, zmm2, zmm3/m512`
22295	///
22296	/// `EVEX.512.66.0F38.W1 26 /r`
22297	///
22298	/// `AVX512BW`
22299	///
22300	/// `16/32/64-bit`
22301	EVEX_Vptestmw_kr_k1_zmm_zmmm512 = 2788,
22302	/// `VPTESTNMB k2 {k1}, xmm2, xmm3/m128`
22303	///
22304	/// `EVEX.128.F3.0F38.W0 26 /r`
22305	///
22306	/// `AVX512VL and AVX512BW`
22307	///
22308	/// `16/32/64-bit`
22309	EVEX_Vptestnmb_kr_k1_xmm_xmmm128 = 2789,
22310	/// `VPTESTNMB k2 {k1}, ymm2, ymm3/m256`
22311	///
22312	/// `EVEX.256.F3.0F38.W0 26 /r`
22313	///
22314	/// `AVX512VL and AVX512BW`
22315	///
22316	/// `16/32/64-bit`
22317	EVEX_Vptestnmb_kr_k1_ymm_ymmm256 = 2790,
22318	/// `VPTESTNMB k2 {k1}, zmm2, zmm3/m512`
22319	///
22320	/// `EVEX.512.F3.0F38.W0 26 /r`
22321	///
22322	/// `AVX512BW`
22323	///
22324	/// `16/32/64-bit`
22325	EVEX_Vptestnmb_kr_k1_zmm_zmmm512 = 2791,
22326	/// `VPTESTNMW k2 {k1}, xmm2, xmm3/m128`
22327	///
22328	/// `EVEX.128.F3.0F38.W1 26 /r`
22329	///
22330	/// `AVX512VL and AVX512BW`
22331	///
22332	/// `16/32/64-bit`
22333	EVEX_Vptestnmw_kr_k1_xmm_xmmm128 = 2792,
22334	/// `VPTESTNMW k2 {k1}, ymm2, ymm3/m256`
22335	///
22336	/// `EVEX.256.F3.0F38.W1 26 /r`
22337	///
22338	/// `AVX512VL and AVX512BW`
22339	///
22340	/// `16/32/64-bit`
22341	EVEX_Vptestnmw_kr_k1_ymm_ymmm256 = 2793,
22342	/// `VPTESTNMW k2 {k1}, zmm2, zmm3/m512`
22343	///
22344	/// `EVEX.512.F3.0F38.W1 26 /r`
22345	///
22346	/// `AVX512BW`
22347	///
22348	/// `16/32/64-bit`
22349	EVEX_Vptestnmw_kr_k1_zmm_zmmm512 = 2794,
22350	/// `VPTESTMD k2 {k1}, xmm2, xmm3/m128/m32bcst`
22351	///
22352	/// `EVEX.128.66.0F38.W0 27 /r`
22353	///
22354	/// `AVX512VL and AVX512F`
22355	///
22356	/// `16/32/64-bit`
22357	EVEX_Vptestmd_kr_k1_xmm_xmmm128b32 = 2795,
22358	/// `VPTESTMD k2 {k1}, ymm2, ymm3/m256/m32bcst`
22359	///
22360	/// `EVEX.256.66.0F38.W0 27 /r`
22361	///
22362	/// `AVX512VL and AVX512F`
22363	///
22364	/// `16/32/64-bit`
22365	EVEX_Vptestmd_kr_k1_ymm_ymmm256b32 = 2796,
22366	/// `VPTESTMD k2 {k1}, zmm2, zmm3/m512/m32bcst`
22367	///
22368	/// `EVEX.512.66.0F38.W0 27 /r`
22369	///
22370	/// `AVX512F`
22371	///
22372	/// `16/32/64-bit`
22373	EVEX_Vptestmd_kr_k1_zmm_zmmm512b32 = 2797,
22374	/// `VPTESTMQ k2 {k1}, xmm2, xmm3/m128/m64bcst`
22375	///
22376	/// `EVEX.128.66.0F38.W1 27 /r`
22377	///
22378	/// `AVX512VL and AVX512F`
22379	///
22380	/// `16/32/64-bit`
22381	EVEX_Vptestmq_kr_k1_xmm_xmmm128b64 = 2798,
22382	/// `VPTESTMQ k2 {k1}, ymm2, ymm3/m256/m64bcst`
22383	///
22384	/// `EVEX.256.66.0F38.W1 27 /r`
22385	///
22386	/// `AVX512VL and AVX512F`
22387	///
22388	/// `16/32/64-bit`
22389	EVEX_Vptestmq_kr_k1_ymm_ymmm256b64 = 2799,
22390	/// `VPTESTMQ k2 {k1}, zmm2, zmm3/m512/m64bcst`
22391	///
22392	/// `EVEX.512.66.0F38.W1 27 /r`
22393	///
22394	/// `AVX512F`
22395	///
22396	/// `16/32/64-bit`
22397	EVEX_Vptestmq_kr_k1_zmm_zmmm512b64 = 2800,
22398	/// `VPTESTNMD k2 {k1}, xmm2, xmm3/m128/m32bcst`
22399	///
22400	/// `EVEX.128.F3.0F38.W0 27 /r`
22401	///
22402	/// `AVX512VL and AVX512F`
22403	///
22404	/// `16/32/64-bit`
22405	EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32 = 2801,
22406	/// `VPTESTNMD k2 {k1}, ymm2, ymm3/m256/m32bcst`
22407	///
22408	/// `EVEX.256.F3.0F38.W0 27 /r`
22409	///
22410	/// `AVX512VL and AVX512F`
22411	///
22412	/// `16/32/64-bit`
22413	EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32 = 2802,
22414	/// `VPTESTNMD k2 {k1}, zmm2, zmm3/m512/m32bcst`
22415	///
22416	/// `EVEX.512.F3.0F38.W0 27 /r`
22417	///
22418	/// `AVX512F`
22419	///
22420	/// `16/32/64-bit`
22421	EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32 = 2803,
22422	/// `VPTESTNMQ k2 {k1}, xmm2, xmm3/m128/m64bcst`
22423	///
22424	/// `EVEX.128.F3.0F38.W1 27 /r`
22425	///
22426	/// `AVX512VL and AVX512F`
22427	///
22428	/// `16/32/64-bit`
22429	EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64 = 2804,
22430	/// `VPTESTNMQ k2 {k1}, ymm2, ymm3/m256/m64bcst`
22431	///
22432	/// `EVEX.256.F3.0F38.W1 27 /r`
22433	///
22434	/// `AVX512VL and AVX512F`
22435	///
22436	/// `16/32/64-bit`
22437	EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64 = 2805,
22438	/// `VPTESTNMQ k2 {k1}, zmm2, zmm3/m512/m64bcst`
22439	///
22440	/// `EVEX.512.F3.0F38.W1 27 /r`
22441	///
22442	/// `AVX512F`
22443	///
22444	/// `16/32/64-bit`
22445	EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64 = 2806,
22446	/// `PMULDQ xmm1, xmm2/m128`
22447	///
22448	/// `66 0F 38 28 /r`
22449	///
22450	/// `SSE4.1`
22451	///
22452	/// `16/32/64-bit`
22453	Pmuldq_xmm_xmmm128 = 2807,
22454	/// `VPMULDQ xmm1, xmm2, xmm3/m128`
22455	///
22456	/// `VEX.128.66.0F38.WIG 28 /r`
22457	///
22458	/// `AVX`
22459	///
22460	/// `16/32/64-bit`
22461	VEX_Vpmuldq_xmm_xmm_xmmm128 = 2808,
22462	/// `VPMULDQ ymm1, ymm2, ymm3/m256`
22463	///
22464	/// `VEX.256.66.0F38.WIG 28 /r`
22465	///
22466	/// `AVX2`
22467	///
22468	/// `16/32/64-bit`
22469	VEX_Vpmuldq_ymm_ymm_ymmm256 = 2809,
22470	/// `VPMULDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
22471	///
22472	/// `EVEX.128.66.0F38.W1 28 /r`
22473	///
22474	/// `AVX512VL and AVX512F`
22475	///
22476	/// `16/32/64-bit`
22477	EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64 = 2810,
22478	/// `VPMULDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
22479	///
22480	/// `EVEX.256.66.0F38.W1 28 /r`
22481	///
22482	/// `AVX512VL and AVX512F`
22483	///
22484	/// `16/32/64-bit`
22485	EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64 = 2811,
22486	/// `VPMULDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
22487	///
22488	/// `EVEX.512.66.0F38.W1 28 /r`
22489	///
22490	/// `AVX512F`
22491	///
22492	/// `16/32/64-bit`
22493	EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64 = 2812,
22494	/// `VPMOVM2B xmm1, k1`
22495	///
22496	/// `EVEX.128.F3.0F38.W0 28 /r`
22497	///
22498	/// `AVX512VL and AVX512BW`
22499	///
22500	/// `16/32/64-bit`
22501	EVEX_Vpmovm2b_xmm_kr = 2813,
22502	/// `VPMOVM2B ymm1, k1`
22503	///
22504	/// `EVEX.256.F3.0F38.W0 28 /r`
22505	///
22506	/// `AVX512VL and AVX512BW`
22507	///
22508	/// `16/32/64-bit`
22509	EVEX_Vpmovm2b_ymm_kr = 2814,
22510	/// `VPMOVM2B zmm1, k1`
22511	///
22512	/// `EVEX.512.F3.0F38.W0 28 /r`
22513	///
22514	/// `AVX512BW`
22515	///
22516	/// `16/32/64-bit`
22517	EVEX_Vpmovm2b_zmm_kr = 2815,
22518	/// `VPMOVM2W xmm1, k1`
22519	///
22520	/// `EVEX.128.F3.0F38.W1 28 /r`
22521	///
22522	/// `AVX512VL and AVX512BW`
22523	///
22524	/// `16/32/64-bit`
22525	EVEX_Vpmovm2w_xmm_kr = 2816,
22526	/// `VPMOVM2W ymm1, k1`
22527	///
22528	/// `EVEX.256.F3.0F38.W1 28 /r`
22529	///
22530	/// `AVX512VL and AVX512BW`
22531	///
22532	/// `16/32/64-bit`
22533	EVEX_Vpmovm2w_ymm_kr = 2817,
22534	/// `VPMOVM2W zmm1, k1`
22535	///
22536	/// `EVEX.512.F3.0F38.W1 28 /r`
22537	///
22538	/// `AVX512BW`
22539	///
22540	/// `16/32/64-bit`
22541	EVEX_Vpmovm2w_zmm_kr = 2818,
22542	/// `PCMPEQQ xmm1, xmm2/m128`
22543	///
22544	/// `66 0F 38 29 /r`
22545	///
22546	/// `SSE4.1`
22547	///
22548	/// `16/32/64-bit`
22549	Pcmpeqq_xmm_xmmm128 = 2819,
22550	/// `VPCMPEQQ xmm1, xmm2, xmm3/m128`
22551	///
22552	/// `VEX.128.66.0F38.WIG 29 /r`
22553	///
22554	/// `AVX`
22555	///
22556	/// `16/32/64-bit`
22557	VEX_Vpcmpeqq_xmm_xmm_xmmm128 = 2820,
22558	/// `VPCMPEQQ ymm1, ymm2, ymm3/m256`
22559	///
22560	/// `VEX.256.66.0F38.WIG 29 /r`
22561	///
22562	/// `AVX2`
22563	///
22564	/// `16/32/64-bit`
22565	VEX_Vpcmpeqq_ymm_ymm_ymmm256 = 2821,
22566	/// `VPCMPEQQ k1 {k2}, xmm2, xmm3/m128/m64bcst`
22567	///
22568	/// `EVEX.128.66.0F38.W1 29 /r`
22569	///
22570	/// `AVX512VL and AVX512F`
22571	///
22572	/// `16/32/64-bit`
22573	EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64 = 2822,
22574	/// `VPCMPEQQ k1 {k2}, ymm2, ymm3/m256/m64bcst`
22575	///
22576	/// `EVEX.256.66.0F38.W1 29 /r`
22577	///
22578	/// `AVX512VL and AVX512F`
22579	///
22580	/// `16/32/64-bit`
22581	EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64 = 2823,
22582	/// `VPCMPEQQ k1 {k2}, zmm2, zmm3/m512/m64bcst`
22583	///
22584	/// `EVEX.512.66.0F38.W1 29 /r`
22585	///
22586	/// `AVX512F`
22587	///
22588	/// `16/32/64-bit`
22589	EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64 = 2824,
22590	/// `VPMOVB2M k1, xmm1`
22591	///
22592	/// `EVEX.128.F3.0F38.W0 29 /r`
22593	///
22594	/// `AVX512VL and AVX512BW`
22595	///
22596	/// `16/32/64-bit`
22597	EVEX_Vpmovb2m_kr_xmm = 2825,
22598	/// `VPMOVB2M k1, ymm1`
22599	///
22600	/// `EVEX.256.F3.0F38.W0 29 /r`
22601	///
22602	/// `AVX512VL and AVX512BW`
22603	///
22604	/// `16/32/64-bit`
22605	EVEX_Vpmovb2m_kr_ymm = 2826,
22606	/// `VPMOVB2M k1, zmm1`
22607	///
22608	/// `EVEX.512.F3.0F38.W0 29 /r`
22609	///
22610	/// `AVX512BW`
22611	///
22612	/// `16/32/64-bit`
22613	EVEX_Vpmovb2m_kr_zmm = 2827,
22614	/// `VPMOVW2M k1, xmm1`
22615	///
22616	/// `EVEX.128.F3.0F38.W1 29 /r`
22617	///
22618	/// `AVX512VL and AVX512BW`
22619	///
22620	/// `16/32/64-bit`
22621	EVEX_Vpmovw2m_kr_xmm = 2828,
22622	/// `VPMOVW2M k1, ymm1`
22623	///
22624	/// `EVEX.256.F3.0F38.W1 29 /r`
22625	///
22626	/// `AVX512VL and AVX512BW`
22627	///
22628	/// `16/32/64-bit`
22629	EVEX_Vpmovw2m_kr_ymm = 2829,
22630	/// `VPMOVW2M k1, zmm1`
22631	///
22632	/// `EVEX.512.F3.0F38.W1 29 /r`
22633	///
22634	/// `AVX512BW`
22635	///
22636	/// `16/32/64-bit`
22637	EVEX_Vpmovw2m_kr_zmm = 2830,
22638	/// `MOVNTDQA xmm1, m128`
22639	///
22640	/// `66 0F 38 2A /r`
22641	///
22642	/// `SSE4.1`
22643	///
22644	/// `16/32/64-bit`
22645	Movntdqa_xmm_m128 = 2831,
22646	/// `VMOVNTDQA xmm1, m128`
22647	///
22648	/// `VEX.128.66.0F38.WIG 2A /r`
22649	///
22650	/// `AVX`
22651	///
22652	/// `16/32/64-bit`
22653	VEX_Vmovntdqa_xmm_m128 = 2832,
22654	/// `VMOVNTDQA ymm1, m256`
22655	///
22656	/// `VEX.256.66.0F38.WIG 2A /r`
22657	///
22658	/// `AVX2`
22659	///
22660	/// `16/32/64-bit`
22661	VEX_Vmovntdqa_ymm_m256 = 2833,
22662	/// `VMOVNTDQA xmm1, m128`
22663	///
22664	/// `EVEX.128.66.0F38.W0 2A /r`
22665	///
22666	/// `AVX512VL and AVX512F`
22667	///
22668	/// `16/32/64-bit`
22669	EVEX_Vmovntdqa_xmm_m128 = 2834,
22670	/// `VMOVNTDQA ymm1, m256`
22671	///
22672	/// `EVEX.256.66.0F38.W0 2A /r`
22673	///
22674	/// `AVX512VL and AVX512F`
22675	///
22676	/// `16/32/64-bit`
22677	EVEX_Vmovntdqa_ymm_m256 = 2835,
22678	/// `VMOVNTDQA zmm1, m512`
22679	///
22680	/// `EVEX.512.66.0F38.W0 2A /r`
22681	///
22682	/// `AVX512F`
22683	///
22684	/// `16/32/64-bit`
22685	EVEX_Vmovntdqa_zmm_m512 = 2836,
22686	/// `VPBROADCASTMB2Q xmm1, k1`
22687	///
22688	/// `EVEX.128.F3.0F38.W1 2A /r`
22689	///
22690	/// `AVX512VL and AVX512CD`
22691	///
22692	/// `16/32/64-bit`
22693	EVEX_Vpbroadcastmb2q_xmm_kr = 2837,
22694	/// `VPBROADCASTMB2Q ymm1, k1`
22695	///
22696	/// `EVEX.256.F3.0F38.W1 2A /r`
22697	///
22698	/// `AVX512VL and AVX512CD`
22699	///
22700	/// `16/32/64-bit`
22701	EVEX_Vpbroadcastmb2q_ymm_kr = 2838,
22702	/// `VPBROADCASTMB2Q zmm1, k1`
22703	///
22704	/// `EVEX.512.F3.0F38.W1 2A /r`
22705	///
22706	/// `AVX512CD`
22707	///
22708	/// `16/32/64-bit`
22709	EVEX_Vpbroadcastmb2q_zmm_kr = 2839,
22710	/// `PACKUSDW xmm1, xmm2/m128`
22711	///
22712	/// `66 0F 38 2B /r`
22713	///
22714	/// `SSE4.1`
22715	///
22716	/// `16/32/64-bit`
22717	Packusdw_xmm_xmmm128 = 2840,
22718	/// `VPACKUSDW xmm1, xmm2, xmm3/m128`
22719	///
22720	/// `VEX.128.66.0F38.WIG 2B /r`
22721	///
22722	/// `AVX`
22723	///
22724	/// `16/32/64-bit`
22725	VEX_Vpackusdw_xmm_xmm_xmmm128 = 2841,
22726	/// `VPACKUSDW ymm1, ymm2, ymm3/m256`
22727	///
22728	/// `VEX.256.66.0F38.WIG 2B /r`
22729	///
22730	/// `AVX2`
22731	///
22732	/// `16/32/64-bit`
22733	VEX_Vpackusdw_ymm_ymm_ymmm256 = 2842,
22734	/// `VPACKUSDW xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
22735	///
22736	/// `EVEX.128.66.0F38.W0 2B /r`
22737	///
22738	/// `AVX512VL and AVX512BW`
22739	///
22740	/// `16/32/64-bit`
22741	EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32 = 2843,
22742	/// `VPACKUSDW ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
22743	///
22744	/// `EVEX.256.66.0F38.W0 2B /r`
22745	///
22746	/// `AVX512VL and AVX512BW`
22747	///
22748	/// `16/32/64-bit`
22749	EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32 = 2844,
22750	/// `VPACKUSDW zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
22751	///
22752	/// `EVEX.512.66.0F38.W0 2B /r`
22753	///
22754	/// `AVX512BW`
22755	///
22756	/// `16/32/64-bit`
22757	EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32 = 2845,
22758	/// `VMASKMOVPS xmm1, xmm2, m128`
22759	///
22760	/// `VEX.128.66.0F38.W0 2C /r`
22761	///
22762	/// `AVX`
22763	///
22764	/// `16/32/64-bit`
22765	VEX_Vmaskmovps_xmm_xmm_m128 = 2846,
22766	/// `VMASKMOVPS ymm1, ymm2, m256`
22767	///
22768	/// `VEX.256.66.0F38.W0 2C /r`
22769	///
22770	/// `AVX`
22771	///
22772	/// `16/32/64-bit`
22773	VEX_Vmaskmovps_ymm_ymm_m256 = 2847,
22774	/// `VSCALEFPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
22775	///
22776	/// `EVEX.128.66.0F38.W0 2C /r`
22777	///
22778	/// `AVX512VL and AVX512F`
22779	///
22780	/// `16/32/64-bit`
22781	EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32 = 2848,
22782	/// `VSCALEFPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
22783	///
22784	/// `EVEX.256.66.0F38.W0 2C /r`
22785	///
22786	/// `AVX512VL and AVX512F`
22787	///
22788	/// `16/32/64-bit`
22789	EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32 = 2849,
22790	/// `VSCALEFPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
22791	///
22792	/// `EVEX.512.66.0F38.W0 2C /r`
22793	///
22794	/// `AVX512F`
22795	///
22796	/// `16/32/64-bit`
22797	EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er = 2850,
22798	/// `VSCALEFPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
22799	///
22800	/// `EVEX.128.66.0F38.W1 2C /r`
22801	///
22802	/// `AVX512VL and AVX512F`
22803	///
22804	/// `16/32/64-bit`
22805	EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64 = 2851,
22806	/// `VSCALEFPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
22807	///
22808	/// `EVEX.256.66.0F38.W1 2C /r`
22809	///
22810	/// `AVX512VL and AVX512F`
22811	///
22812	/// `16/32/64-bit`
22813	EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64 = 2852,
22814	/// `VSCALEFPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
22815	///
22816	/// `EVEX.512.66.0F38.W1 2C /r`
22817	///
22818	/// `AVX512F`
22819	///
22820	/// `16/32/64-bit`
22821	EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er = 2853,
22822	/// `VMASKMOVPD xmm1, xmm2, m128`
22823	///
22824	/// `VEX.128.66.0F38.W0 2D /r`
22825	///
22826	/// `AVX`
22827	///
22828	/// `16/32/64-bit`
22829	VEX_Vmaskmovpd_xmm_xmm_m128 = 2854,
22830	/// `VMASKMOVPD ymm1, ymm2, m256`
22831	///
22832	/// `VEX.256.66.0F38.W0 2D /r`
22833	///
22834	/// `AVX`
22835	///
22836	/// `16/32/64-bit`
22837	VEX_Vmaskmovpd_ymm_ymm_m256 = 2855,
22838	/// `VSCALEFSS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
22839	///
22840	/// `EVEX.LIG.66.0F38.W0 2D /r`
22841	///
22842	/// `AVX512F`
22843	///
22844	/// `16/32/64-bit`
22845	EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er = 2856,
22846	/// `VSCALEFSD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
22847	///
22848	/// `EVEX.LIG.66.0F38.W1 2D /r`
22849	///
22850	/// `AVX512F`
22851	///
22852	/// `16/32/64-bit`
22853	EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er = 2857,
22854	/// `VMASKMOVPS m128, xmm1, xmm2`
22855	///
22856	/// `VEX.128.66.0F38.W0 2E /r`
22857	///
22858	/// `AVX`
22859	///
22860	/// `16/32/64-bit`
22861	VEX_Vmaskmovps_m128_xmm_xmm = 2858,
22862	/// `VMASKMOVPS m256, ymm1, ymm2`
22863	///
22864	/// `VEX.256.66.0F38.W0 2E /r`
22865	///
22866	/// `AVX`
22867	///
22868	/// `16/32/64-bit`
22869	VEX_Vmaskmovps_m256_ymm_ymm = 2859,
22870	/// `VMASKMOVPD m128, xmm1, xmm2`
22871	///
22872	/// `VEX.128.66.0F38.W0 2F /r`
22873	///
22874	/// `AVX`
22875	///
22876	/// `16/32/64-bit`
22877	VEX_Vmaskmovpd_m128_xmm_xmm = 2860,
22878	/// `VMASKMOVPD m256, ymm1, ymm2`
22879	///
22880	/// `VEX.256.66.0F38.W0 2F /r`
22881	///
22882	/// `AVX`
22883	///
22884	/// `16/32/64-bit`
22885	VEX_Vmaskmovpd_m256_ymm_ymm = 2861,
22886	/// `PMOVZXBW xmm1, xmm2/m64`
22887	///
22888	/// `66 0F 38 30 /r`
22889	///
22890	/// `SSE4.1`
22891	///
22892	/// `16/32/64-bit`
22893	Pmovzxbw_xmm_xmmm64 = 2862,
22894	/// `VPMOVZXBW xmm1, xmm2/m64`
22895	///
22896	/// `VEX.128.66.0F38.WIG 30 /r`
22897	///
22898	/// `AVX`
22899	///
22900	/// `16/32/64-bit`
22901	VEX_Vpmovzxbw_xmm_xmmm64 = 2863,
22902	/// `VPMOVZXBW ymm1, xmm2/m128`
22903	///
22904	/// `VEX.256.66.0F38.WIG 30 /r`
22905	///
22906	/// `AVX2`
22907	///
22908	/// `16/32/64-bit`
22909	VEX_Vpmovzxbw_ymm_xmmm128 = 2864,
22910	/// `VPMOVZXBW xmm1 {k1}{z}, xmm2/m64`
22911	///
22912	/// `EVEX.128.66.0F38.WIG 30 /r`
22913	///
22914	/// `AVX512VL and AVX512BW`
22915	///
22916	/// `16/32/64-bit`
22917	EVEX_Vpmovzxbw_xmm_k1z_xmmm64 = 2865,
22918	/// `VPMOVZXBW ymm1 {k1}{z}, xmm2/m128`
22919	///
22920	/// `EVEX.256.66.0F38.WIG 30 /r`
22921	///
22922	/// `AVX512VL and AVX512BW`
22923	///
22924	/// `16/32/64-bit`
22925	EVEX_Vpmovzxbw_ymm_k1z_xmmm128 = 2866,
22926	/// `VPMOVZXBW zmm1 {k1}{z}, ymm2/m256`
22927	///
22928	/// `EVEX.512.66.0F38.WIG 30 /r`
22929	///
22930	/// `AVX512BW`
22931	///
22932	/// `16/32/64-bit`
22933	EVEX_Vpmovzxbw_zmm_k1z_ymmm256 = 2867,
22934	/// `VPMOVWB xmm1/m64 {k1}{z}, xmm2`
22935	///
22936	/// `EVEX.128.F3.0F38.W0 30 /r`
22937	///
22938	/// `AVX512VL and AVX512BW`
22939	///
22940	/// `16/32/64-bit`
22941	EVEX_Vpmovwb_xmmm64_k1z_xmm = 2868,
22942	/// `VPMOVWB xmm1/m128 {k1}{z}, ymm2`
22943	///
22944	/// `EVEX.256.F3.0F38.W0 30 /r`
22945	///
22946	/// `AVX512VL and AVX512BW`
22947	///
22948	/// `16/32/64-bit`
22949	EVEX_Vpmovwb_xmmm128_k1z_ymm = 2869,
22950	/// `VPMOVWB ymm1/m256 {k1}{z}, zmm2`
22951	///
22952	/// `EVEX.512.F3.0F38.W0 30 /r`
22953	///
22954	/// `AVX512BW`
22955	///
22956	/// `16/32/64-bit`
22957	EVEX_Vpmovwb_ymmm256_k1z_zmm = 2870,
22958	/// `PMOVZXBD xmm1, xmm2/m32`
22959	///
22960	/// `66 0F 38 31 /r`
22961	///
22962	/// `SSE4.1`
22963	///
22964	/// `16/32/64-bit`
22965	Pmovzxbd_xmm_xmmm32 = 2871,
22966	/// `VPMOVZXBD xmm1, xmm2/m32`
22967	///
22968	/// `VEX.128.66.0F38.WIG 31 /r`
22969	///
22970	/// `AVX`
22971	///
22972	/// `16/32/64-bit`
22973	VEX_Vpmovzxbd_xmm_xmmm32 = 2872,
22974	/// `VPMOVZXBD ymm1, xmm2/m64`
22975	///
22976	/// `VEX.256.66.0F38.WIG 31 /r`
22977	///
22978	/// `AVX2`
22979	///
22980	/// `16/32/64-bit`
22981	VEX_Vpmovzxbd_ymm_xmmm64 = 2873,
22982	/// `VPMOVZXBD xmm1 {k1}{z}, xmm2/m32`
22983	///
22984	/// `EVEX.128.66.0F38.WIG 31 /r`
22985	///
22986	/// `AVX512VL and AVX512F`
22987	///
22988	/// `16/32/64-bit`
22989	EVEX_Vpmovzxbd_xmm_k1z_xmmm32 = 2874,
22990	/// `VPMOVZXBD ymm1 {k1}{z}, xmm2/m64`
22991	///
22992	/// `EVEX.256.66.0F38.WIG 31 /r`
22993	///
22994	/// `AVX512VL and AVX512F`
22995	///
22996	/// `16/32/64-bit`
22997	EVEX_Vpmovzxbd_ymm_k1z_xmmm64 = 2875,
22998	/// `VPMOVZXBD zmm1 {k1}{z}, xmm2/m128`
22999	///
23000	/// `EVEX.512.66.0F38.WIG 31 /r`
23001	///
23002	/// `AVX512F`
23003	///
23004	/// `16/32/64-bit`
23005	EVEX_Vpmovzxbd_zmm_k1z_xmmm128 = 2876,
23006	/// `VPMOVDB xmm1/m32 {k1}{z}, xmm2`
23007	///
23008	/// `EVEX.128.F3.0F38.W0 31 /r`
23009	///
23010	/// `AVX512VL and AVX512F`
23011	///
23012	/// `16/32/64-bit`
23013	EVEX_Vpmovdb_xmmm32_k1z_xmm = 2877,
23014	/// `VPMOVDB xmm1/m64 {k1}{z}, ymm2`
23015	///
23016	/// `EVEX.256.F3.0F38.W0 31 /r`
23017	///
23018	/// `AVX512VL and AVX512F`
23019	///
23020	/// `16/32/64-bit`
23021	EVEX_Vpmovdb_xmmm64_k1z_ymm = 2878,
23022	/// `VPMOVDB xmm1/m128 {k1}{z}, zmm2`
23023	///
23024	/// `EVEX.512.F3.0F38.W0 31 /r`
23025	///
23026	/// `AVX512F`
23027	///
23028	/// `16/32/64-bit`
23029	EVEX_Vpmovdb_xmmm128_k1z_zmm = 2879,
23030	/// `PMOVZXBQ xmm1, xmm2/m16`
23031	///
23032	/// `66 0F 38 32 /r`
23033	///
23034	/// `SSE4.1`
23035	///
23036	/// `16/32/64-bit`
23037	Pmovzxbq_xmm_xmmm16 = 2880,
23038	/// `VPMOVZXBQ xmm1, xmm2/m16`
23039	///
23040	/// `VEX.128.66.0F38.WIG 32 /r`
23041	///
23042	/// `AVX`
23043	///
23044	/// `16/32/64-bit`
23045	VEX_Vpmovzxbq_xmm_xmmm16 = 2881,
23046	/// `VPMOVZXBQ ymm1, xmm2/m32`
23047	///
23048	/// `VEX.256.66.0F38.WIG 32 /r`
23049	///
23050	/// `AVX2`
23051	///
23052	/// `16/32/64-bit`
23053	VEX_Vpmovzxbq_ymm_xmmm32 = 2882,
23054	/// `VPMOVZXBQ xmm1 {k1}{z}, xmm2/m16`
23055	///
23056	/// `EVEX.128.66.0F38.WIG 32 /r`
23057	///
23058	/// `AVX512VL and AVX512F`
23059	///
23060	/// `16/32/64-bit`
23061	EVEX_Vpmovzxbq_xmm_k1z_xmmm16 = 2883,
23062	/// `VPMOVZXBQ ymm1 {k1}{z}, xmm2/m32`
23063	///
23064	/// `EVEX.256.66.0F38.WIG 32 /r`
23065	///
23066	/// `AVX512VL and AVX512F`
23067	///
23068	/// `16/32/64-bit`
23069	EVEX_Vpmovzxbq_ymm_k1z_xmmm32 = 2884,
23070	/// `VPMOVZXBQ zmm1 {k1}{z}, xmm2/m64`
23071	///
23072	/// `EVEX.512.66.0F38.WIG 32 /r`
23073	///
23074	/// `AVX512F`
23075	///
23076	/// `16/32/64-bit`
23077	EVEX_Vpmovzxbq_zmm_k1z_xmmm64 = 2885,
23078	/// `VPMOVQB xmm1/m16 {k1}{z}, xmm2`
23079	///
23080	/// `EVEX.128.F3.0F38.W0 32 /r`
23081	///
23082	/// `AVX512VL and AVX512F`
23083	///
23084	/// `16/32/64-bit`
23085	EVEX_Vpmovqb_xmmm16_k1z_xmm = 2886,
23086	/// `VPMOVQB xmm1/m32 {k1}{z}, ymm2`
23087	///
23088	/// `EVEX.256.F3.0F38.W0 32 /r`
23089	///
23090	/// `AVX512VL and AVX512F`
23091	///
23092	/// `16/32/64-bit`
23093	EVEX_Vpmovqb_xmmm32_k1z_ymm = 2887,
23094	/// `VPMOVQB xmm1/m64 {k1}{z}, zmm2`
23095	///
23096	/// `EVEX.512.F3.0F38.W0 32 /r`
23097	///
23098	/// `AVX512F`
23099	///
23100	/// `16/32/64-bit`
23101	EVEX_Vpmovqb_xmmm64_k1z_zmm = 2888,
23102	/// `PMOVZXWD xmm1, xmm2/m64`
23103	///
23104	/// `66 0F 38 33 /r`
23105	///
23106	/// `SSE4.1`
23107	///
23108	/// `16/32/64-bit`
23109	Pmovzxwd_xmm_xmmm64 = 2889,
23110	/// `VPMOVZXWD xmm1, xmm2/m64`
23111	///
23112	/// `VEX.128.66.0F38.WIG 33 /r`
23113	///
23114	/// `AVX`
23115	///
23116	/// `16/32/64-bit`
23117	VEX_Vpmovzxwd_xmm_xmmm64 = 2890,
23118	/// `VPMOVZXWD ymm1, xmm2/m128`
23119	///
23120	/// `VEX.256.66.0F38.WIG 33 /r`
23121	///
23122	/// `AVX2`
23123	///
23124	/// `16/32/64-bit`
23125	VEX_Vpmovzxwd_ymm_xmmm128 = 2891,
23126	/// `VPMOVZXWD xmm1 {k1}{z}, xmm2/m64`
23127	///
23128	/// `EVEX.128.66.0F38.WIG 33 /r`
23129	///
23130	/// `AVX512VL and AVX512F`
23131	///
23132	/// `16/32/64-bit`
23133	EVEX_Vpmovzxwd_xmm_k1z_xmmm64 = 2892,
23134	/// `VPMOVZXWD ymm1 {k1}{z}, xmm2/m128`
23135	///
23136	/// `EVEX.256.66.0F38.WIG 33 /r`
23137	///
23138	/// `AVX512VL and AVX512F`
23139	///
23140	/// `16/32/64-bit`
23141	EVEX_Vpmovzxwd_ymm_k1z_xmmm128 = 2893,
23142	/// `VPMOVZXWD zmm1 {k1}{z}, ymm2/m256`
23143	///
23144	/// `EVEX.512.66.0F38.WIG 33 /r`
23145	///
23146	/// `AVX512F`
23147	///
23148	/// `16/32/64-bit`
23149	EVEX_Vpmovzxwd_zmm_k1z_ymmm256 = 2894,
23150	/// `VPMOVDW xmm1/m64 {k1}{z}, xmm2`
23151	///
23152	/// `EVEX.128.F3.0F38.W0 33 /r`
23153	///
23154	/// `AVX512VL and AVX512F`
23155	///
23156	/// `16/32/64-bit`
23157	EVEX_Vpmovdw_xmmm64_k1z_xmm = 2895,
23158	/// `VPMOVDW xmm1/m128 {k1}{z}, ymm2`
23159	///
23160	/// `EVEX.256.F3.0F38.W0 33 /r`
23161	///
23162	/// `AVX512VL and AVX512F`
23163	///
23164	/// `16/32/64-bit`
23165	EVEX_Vpmovdw_xmmm128_k1z_ymm = 2896,
23166	/// `VPMOVDW ymm1/m256 {k1}{z}, zmm2`
23167	///
23168	/// `EVEX.512.F3.0F38.W0 33 /r`
23169	///
23170	/// `AVX512F`
23171	///
23172	/// `16/32/64-bit`
23173	EVEX_Vpmovdw_ymmm256_k1z_zmm = 2897,
23174	/// `PMOVZXWQ xmm1, xmm2/m32`
23175	///
23176	/// `66 0F 38 34 /r`
23177	///
23178	/// `SSE4.1`
23179	///
23180	/// `16/32/64-bit`
23181	Pmovzxwq_xmm_xmmm32 = 2898,
23182	/// `VPMOVZXWQ xmm1, xmm2/m32`
23183	///
23184	/// `VEX.128.66.0F38.WIG 34 /r`
23185	///
23186	/// `AVX`
23187	///
23188	/// `16/32/64-bit`
23189	VEX_Vpmovzxwq_xmm_xmmm32 = 2899,
23190	/// `VPMOVZXWQ ymm1, xmm2/m64`
23191	///
23192	/// `VEX.256.66.0F38.WIG 34 /r`
23193	///
23194	/// `AVX2`
23195	///
23196	/// `16/32/64-bit`
23197	VEX_Vpmovzxwq_ymm_xmmm64 = 2900,
23198	/// `VPMOVZXWQ xmm1 {k1}{z}, xmm2/m32`
23199	///
23200	/// `EVEX.128.66.0F38.WIG 34 /r`
23201	///
23202	/// `AVX512VL and AVX512F`
23203	///
23204	/// `16/32/64-bit`
23205	EVEX_Vpmovzxwq_xmm_k1z_xmmm32 = 2901,
23206	/// `VPMOVZXWQ ymm1 {k1}{z}, xmm2/m64`
23207	///
23208	/// `EVEX.256.66.0F38.WIG 34 /r`
23209	///
23210	/// `AVX512VL and AVX512F`
23211	///
23212	/// `16/32/64-bit`
23213	EVEX_Vpmovzxwq_ymm_k1z_xmmm64 = 2902,
23214	/// `VPMOVZXWQ zmm1 {k1}{z}, xmm2/m128`
23215	///
23216	/// `EVEX.512.66.0F38.WIG 34 /r`
23217	///
23218	/// `AVX512F`
23219	///
23220	/// `16/32/64-bit`
23221	EVEX_Vpmovzxwq_zmm_k1z_xmmm128 = 2903,
23222	/// `VPMOVQW xmm1/m32 {k1}{z}, xmm2`
23223	///
23224	/// `EVEX.128.F3.0F38.W0 34 /r`
23225	///
23226	/// `AVX512VL and AVX512F`
23227	///
23228	/// `16/32/64-bit`
23229	EVEX_Vpmovqw_xmmm32_k1z_xmm = 2904,
23230	/// `VPMOVQW xmm1/m64 {k1}{z}, ymm2`
23231	///
23232	/// `EVEX.256.F3.0F38.W0 34 /r`
23233	///
23234	/// `AVX512VL and AVX512F`
23235	///
23236	/// `16/32/64-bit`
23237	EVEX_Vpmovqw_xmmm64_k1z_ymm = 2905,
23238	/// `VPMOVQW xmm1/m128 {k1}{z}, zmm2`
23239	///
23240	/// `EVEX.512.F3.0F38.W0 34 /r`
23241	///
23242	/// `AVX512F`
23243	///
23244	/// `16/32/64-bit`
23245	EVEX_Vpmovqw_xmmm128_k1z_zmm = 2906,
23246	/// `PMOVZXDQ xmm1, xmm2/m64`
23247	///
23248	/// `66 0F 38 35 /r`
23249	///
23250	/// `SSE4.1`
23251	///
23252	/// `16/32/64-bit`
23253	Pmovzxdq_xmm_xmmm64 = 2907,
23254	/// `VPMOVZXDQ xmm1, xmm2/m64`
23255	///
23256	/// `VEX.128.66.0F38.WIG 35 /r`
23257	///
23258	/// `AVX`
23259	///
23260	/// `16/32/64-bit`
23261	VEX_Vpmovzxdq_xmm_xmmm64 = 2908,
23262	/// `VPMOVZXDQ ymm1, xmm2/m128`
23263	///
23264	/// `VEX.256.66.0F38.WIG 35 /r`
23265	///
23266	/// `AVX2`
23267	///
23268	/// `16/32/64-bit`
23269	VEX_Vpmovzxdq_ymm_xmmm128 = 2909,
23270	/// `VPMOVZXDQ xmm1 {k1}{z}, xmm2/m64`
23271	///
23272	/// `EVEX.128.66.0F38.W0 35 /r`
23273	///
23274	/// `AVX512VL and AVX512F`
23275	///
23276	/// `16/32/64-bit`
23277	EVEX_Vpmovzxdq_xmm_k1z_xmmm64 = 2910,
23278	/// `VPMOVZXDQ ymm1 {k1}{z}, xmm2/m128`
23279	///
23280	/// `EVEX.256.66.0F38.W0 35 /r`
23281	///
23282	/// `AVX512VL and AVX512F`
23283	///
23284	/// `16/32/64-bit`
23285	EVEX_Vpmovzxdq_ymm_k1z_xmmm128 = 2911,
23286	/// `VPMOVZXDQ zmm1 {k1}{z}, ymm2/m256`
23287	///
23288	/// `EVEX.512.66.0F38.W0 35 /r`
23289	///
23290	/// `AVX512F`
23291	///
23292	/// `16/32/64-bit`
23293	EVEX_Vpmovzxdq_zmm_k1z_ymmm256 = 2912,
23294	/// `VPMOVQD xmm1/m64 {k1}{z}, xmm2`
23295	///
23296	/// `EVEX.128.F3.0F38.W0 35 /r`
23297	///
23298	/// `AVX512VL and AVX512F`
23299	///
23300	/// `16/32/64-bit`
23301	EVEX_Vpmovqd_xmmm64_k1z_xmm = 2913,
23302	/// `VPMOVQD xmm1/m128 {k1}{z}, ymm2`
23303	///
23304	/// `EVEX.256.F3.0F38.W0 35 /r`
23305	///
23306	/// `AVX512VL and AVX512F`
23307	///
23308	/// `16/32/64-bit`
23309	EVEX_Vpmovqd_xmmm128_k1z_ymm = 2914,
23310	/// `VPMOVQD ymm1/m256 {k1}{z}, zmm2`
23311	///
23312	/// `EVEX.512.F3.0F38.W0 35 /r`
23313	///
23314	/// `AVX512F`
23315	///
23316	/// `16/32/64-bit`
23317	EVEX_Vpmovqd_ymmm256_k1z_zmm = 2915,
23318	/// `VPERMD ymm1, ymm2, ymm3/m256`
23319	///
23320	/// `VEX.256.66.0F38.W0 36 /r`
23321	///
23322	/// `AVX2`
23323	///
23324	/// `16/32/64-bit`
23325	VEX_Vpermd_ymm_ymm_ymmm256 = 2916,
23326	/// `VPERMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
23327	///
23328	/// `EVEX.256.66.0F38.W0 36 /r`
23329	///
23330	/// `AVX512VL and AVX512F`
23331	///
23332	/// `16/32/64-bit`
23333	EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32 = 2917,
23334	/// `VPERMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
23335	///
23336	/// `EVEX.512.66.0F38.W0 36 /r`
23337	///
23338	/// `AVX512F`
23339	///
23340	/// `16/32/64-bit`
23341	EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32 = 2918,
23342	/// `VPERMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
23343	///
23344	/// `EVEX.256.66.0F38.W1 36 /r`
23345	///
23346	/// `AVX512VL and AVX512F`
23347	///
23348	/// `16/32/64-bit`
23349	EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64 = 2919,
23350	/// `VPERMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
23351	///
23352	/// `EVEX.512.66.0F38.W1 36 /r`
23353	///
23354	/// `AVX512F`
23355	///
23356	/// `16/32/64-bit`
23357	EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64 = 2920,
23358	/// `PCMPGTQ xmm1, xmm2/m128`
23359	///
23360	/// `66 0F 38 37 /r`
23361	///
23362	/// `SSE4.2`
23363	///
23364	/// `16/32/64-bit`
23365	Pcmpgtq_xmm_xmmm128 = 2921,
23366	/// `VPCMPGTQ xmm1, xmm2, xmm3/m128`
23367	///
23368	/// `VEX.128.66.0F38.WIG 37 /r`
23369	///
23370	/// `AVX`
23371	///
23372	/// `16/32/64-bit`
23373	VEX_Vpcmpgtq_xmm_xmm_xmmm128 = 2922,
23374	/// `VPCMPGTQ ymm1, ymm2, ymm3/m256`
23375	///
23376	/// `VEX.256.66.0F38.WIG 37 /r`
23377	///
23378	/// `AVX2`
23379	///
23380	/// `16/32/64-bit`
23381	VEX_Vpcmpgtq_ymm_ymm_ymmm256 = 2923,
23382	/// `VPCMPGTQ k1 {k2}, xmm2, xmm3/m128/m64bcst`
23383	///
23384	/// `EVEX.128.66.0F38.W1 37 /r`
23385	///
23386	/// `AVX512VL and AVX512F`
23387	///
23388	/// `16/32/64-bit`
23389	EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64 = 2924,
23390	/// `VPCMPGTQ k1 {k2}, ymm2, ymm3/m256/m64bcst`
23391	///
23392	/// `EVEX.256.66.0F38.W1 37 /r`
23393	///
23394	/// `AVX512VL and AVX512F`
23395	///
23396	/// `16/32/64-bit`
23397	EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64 = 2925,
23398	/// `VPCMPGTQ k1 {k2}, zmm2, zmm3/m512/m64bcst`
23399	///
23400	/// `EVEX.512.66.0F38.W1 37 /r`
23401	///
23402	/// `AVX512F`
23403	///
23404	/// `16/32/64-bit`
23405	EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64 = 2926,
23406	/// `PMINSB xmm1, xmm2/m128`
23407	///
23408	/// `66 0F 38 38 /r`
23409	///
23410	/// `SSE4.1`
23411	///
23412	/// `16/32/64-bit`
23413	Pminsb_xmm_xmmm128 = 2927,
23414	/// `VPMINSB xmm1, xmm2, xmm3/m128`
23415	///
23416	/// `VEX.128.66.0F38.WIG 38 /r`
23417	///
23418	/// `AVX`
23419	///
23420	/// `16/32/64-bit`
23421	VEX_Vpminsb_xmm_xmm_xmmm128 = 2928,
23422	/// `VPMINSB ymm1, ymm2, ymm3/m256`
23423	///
23424	/// `VEX.256.66.0F38.WIG 38 /r`
23425	///
23426	/// `AVX2`
23427	///
23428	/// `16/32/64-bit`
23429	VEX_Vpminsb_ymm_ymm_ymmm256 = 2929,
23430	/// `VPMINSB xmm1 {k1}{z}, xmm2, xmm3/m128`
23431	///
23432	/// `EVEX.128.66.0F38.WIG 38 /r`
23433	///
23434	/// `AVX512VL and AVX512BW`
23435	///
23436	/// `16/32/64-bit`
23437	EVEX_Vpminsb_xmm_k1z_xmm_xmmm128 = 2930,
23438	/// `VPMINSB ymm1 {k1}{z}, ymm2, ymm3/m256`
23439	///
23440	/// `EVEX.256.66.0F38.WIG 38 /r`
23441	///
23442	/// `AVX512VL and AVX512BW`
23443	///
23444	/// `16/32/64-bit`
23445	EVEX_Vpminsb_ymm_k1z_ymm_ymmm256 = 2931,
23446	/// `VPMINSB zmm1 {k1}{z}, zmm2, zmm3/m512`
23447	///
23448	/// `EVEX.512.66.0F38.WIG 38 /r`
23449	///
23450	/// `AVX512BW`
23451	///
23452	/// `16/32/64-bit`
23453	EVEX_Vpminsb_zmm_k1z_zmm_zmmm512 = 2932,
23454	/// `VPMOVM2D xmm1, k1`
23455	///
23456	/// `EVEX.128.F3.0F38.W0 38 /r`
23457	///
23458	/// `AVX512VL and AVX512DQ`
23459	///
23460	/// `16/32/64-bit`
23461	EVEX_Vpmovm2d_xmm_kr = 2933,
23462	/// `VPMOVM2D ymm1, k1`
23463	///
23464	/// `EVEX.256.F3.0F38.W0 38 /r`
23465	///
23466	/// `AVX512VL and AVX512DQ`
23467	///
23468	/// `16/32/64-bit`
23469	EVEX_Vpmovm2d_ymm_kr = 2934,
23470	/// `VPMOVM2D zmm1, k1`
23471	///
23472	/// `EVEX.512.F3.0F38.W0 38 /r`
23473	///
23474	/// `AVX512DQ`
23475	///
23476	/// `16/32/64-bit`
23477	EVEX_Vpmovm2d_zmm_kr = 2935,
23478	/// `VPMOVM2Q xmm1, k1`
23479	///
23480	/// `EVEX.128.F3.0F38.W1 38 /r`
23481	///
23482	/// `AVX512VL and AVX512DQ`
23483	///
23484	/// `16/32/64-bit`
23485	EVEX_Vpmovm2q_xmm_kr = 2936,
23486	/// `VPMOVM2Q ymm1, k1`
23487	///
23488	/// `EVEX.256.F3.0F38.W1 38 /r`
23489	///
23490	/// `AVX512VL and AVX512DQ`
23491	///
23492	/// `16/32/64-bit`
23493	EVEX_Vpmovm2q_ymm_kr = 2937,
23494	/// `VPMOVM2Q zmm1, k1`
23495	///
23496	/// `EVEX.512.F3.0F38.W1 38 /r`
23497	///
23498	/// `AVX512DQ`
23499	///
23500	/// `16/32/64-bit`
23501	EVEX_Vpmovm2q_zmm_kr = 2938,
23502	/// `PMINSD xmm1, xmm2/m128`
23503	///
23504	/// `66 0F 38 39 /r`
23505	///
23506	/// `SSE4.1`
23507	///
23508	/// `16/32/64-bit`
23509	Pminsd_xmm_xmmm128 = 2939,
23510	/// `VPMINSD xmm1, xmm2, xmm3/m128`
23511	///
23512	/// `VEX.128.66.0F38.WIG 39 /r`
23513	///
23514	/// `AVX`
23515	///
23516	/// `16/32/64-bit`
23517	VEX_Vpminsd_xmm_xmm_xmmm128 = 2940,
23518	/// `VPMINSD ymm1, ymm2, ymm3/m256`
23519	///
23520	/// `VEX.256.66.0F38.WIG 39 /r`
23521	///
23522	/// `AVX2`
23523	///
23524	/// `16/32/64-bit`
23525	VEX_Vpminsd_ymm_ymm_ymmm256 = 2941,
23526	/// `VPMINSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
23527	///
23528	/// `EVEX.128.66.0F38.W0 39 /r`
23529	///
23530	/// `AVX512VL and AVX512F`
23531	///
23532	/// `16/32/64-bit`
23533	EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32 = 2942,
23534	/// `VPMINSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
23535	///
23536	/// `EVEX.256.66.0F38.W0 39 /r`
23537	///
23538	/// `AVX512VL and AVX512F`
23539	///
23540	/// `16/32/64-bit`
23541	EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32 = 2943,
23542	/// `VPMINSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
23543	///
23544	/// `EVEX.512.66.0F38.W0 39 /r`
23545	///
23546	/// `AVX512F`
23547	///
23548	/// `16/32/64-bit`
23549	EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32 = 2944,
23550	/// `VPMINSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
23551	///
23552	/// `EVEX.128.66.0F38.W1 39 /r`
23553	///
23554	/// `AVX512VL and AVX512F`
23555	///
23556	/// `16/32/64-bit`
23557	EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64 = 2945,
23558	/// `VPMINSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
23559	///
23560	/// `EVEX.256.66.0F38.W1 39 /r`
23561	///
23562	/// `AVX512VL and AVX512F`
23563	///
23564	/// `16/32/64-bit`
23565	EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64 = 2946,
23566	/// `VPMINSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
23567	///
23568	/// `EVEX.512.66.0F38.W1 39 /r`
23569	///
23570	/// `AVX512F`
23571	///
23572	/// `16/32/64-bit`
23573	EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64 = 2947,
23574	/// `VPMOVD2M k1, xmm1`
23575	///
23576	/// `EVEX.128.F3.0F38.W0 39 /r`
23577	///
23578	/// `AVX512VL and AVX512DQ`
23579	///
23580	/// `16/32/64-bit`
23581	EVEX_Vpmovd2m_kr_xmm = 2948,
23582	/// `VPMOVD2M k1, ymm1`
23583	///
23584	/// `EVEX.256.F3.0F38.W0 39 /r`
23585	///
23586	/// `AVX512VL and AVX512DQ`
23587	///
23588	/// `16/32/64-bit`
23589	EVEX_Vpmovd2m_kr_ymm = 2949,
23590	/// `VPMOVD2M k1, zmm1`
23591	///
23592	/// `EVEX.512.F3.0F38.W0 39 /r`
23593	///
23594	/// `AVX512DQ`
23595	///
23596	/// `16/32/64-bit`
23597	EVEX_Vpmovd2m_kr_zmm = 2950,
23598	/// `VPMOVQ2M k1, xmm1`
23599	///
23600	/// `EVEX.128.F3.0F38.W1 39 /r`
23601	///
23602	/// `AVX512VL and AVX512DQ`
23603	///
23604	/// `16/32/64-bit`
23605	EVEX_Vpmovq2m_kr_xmm = 2951,
23606	/// `VPMOVQ2M k1, ymm1`
23607	///
23608	/// `EVEX.256.F3.0F38.W1 39 /r`
23609	///
23610	/// `AVX512VL and AVX512DQ`
23611	///
23612	/// `16/32/64-bit`
23613	EVEX_Vpmovq2m_kr_ymm = 2952,
23614	/// `VPMOVQ2M k1, zmm1`
23615	///
23616	/// `EVEX.512.F3.0F38.W1 39 /r`
23617	///
23618	/// `AVX512DQ`
23619	///
23620	/// `16/32/64-bit`
23621	EVEX_Vpmovq2m_kr_zmm = 2953,
23622	/// `PMINUW xmm1, xmm2/m128`
23623	///
23624	/// `66 0F 38 3A /r`
23625	///
23626	/// `SSE4.1`
23627	///
23628	/// `16/32/64-bit`
23629	Pminuw_xmm_xmmm128 = 2954,
23630	/// `VPMINUW xmm1, xmm2, xmm3/m128`
23631	///
23632	/// `VEX.128.66.0F38.WIG 3A /r`
23633	///
23634	/// `AVX`
23635	///
23636	/// `16/32/64-bit`
23637	VEX_Vpminuw_xmm_xmm_xmmm128 = 2955,
23638	/// `VPMINUW ymm1, ymm2, ymm3/m256`
23639	///
23640	/// `VEX.256.66.0F38.WIG 3A /r`
23641	///
23642	/// `AVX2`
23643	///
23644	/// `16/32/64-bit`
23645	VEX_Vpminuw_ymm_ymm_ymmm256 = 2956,
23646	/// `VPMINUW xmm1 {k1}{z}, xmm2, xmm3/m128`
23647	///
23648	/// `EVEX.128.66.0F38.WIG 3A /r`
23649	///
23650	/// `AVX512VL and AVX512BW`
23651	///
23652	/// `16/32/64-bit`
23653	EVEX_Vpminuw_xmm_k1z_xmm_xmmm128 = 2957,
23654	/// `VPMINUW ymm1 {k1}{z}, ymm2, ymm3/m256`
23655	///
23656	/// `EVEX.256.66.0F38.WIG 3A /r`
23657	///
23658	/// `AVX512VL and AVX512BW`
23659	///
23660	/// `16/32/64-bit`
23661	EVEX_Vpminuw_ymm_k1z_ymm_ymmm256 = 2958,
23662	/// `VPMINUW zmm1 {k1}{z}, zmm2, zmm3/m512`
23663	///
23664	/// `EVEX.512.66.0F38.WIG 3A /r`
23665	///
23666	/// `AVX512BW`
23667	///
23668	/// `16/32/64-bit`
23669	EVEX_Vpminuw_zmm_k1z_zmm_zmmm512 = 2959,
23670	/// `VPBROADCASTMW2D xmm1, k1`
23671	///
23672	/// `EVEX.128.F3.0F38.W0 3A /r`
23673	///
23674	/// `AVX512VL and AVX512CD`
23675	///
23676	/// `16/32/64-bit`
23677	EVEX_Vpbroadcastmw2d_xmm_kr = 2960,
23678	/// `VPBROADCASTMW2D ymm1, k1`
23679	///
23680	/// `EVEX.256.F3.0F38.W0 3A /r`
23681	///
23682	/// `AVX512VL and AVX512CD`
23683	///
23684	/// `16/32/64-bit`
23685	EVEX_Vpbroadcastmw2d_ymm_kr = 2961,
23686	/// `VPBROADCASTMW2D zmm1, k1`
23687	///
23688	/// `EVEX.512.F3.0F38.W0 3A /r`
23689	///
23690	/// `AVX512CD`
23691	///
23692	/// `16/32/64-bit`
23693	EVEX_Vpbroadcastmw2d_zmm_kr = 2962,
23694	/// `PMINUD xmm1, xmm2/m128`
23695	///
23696	/// `66 0F 38 3B /r`
23697	///
23698	/// `SSE4.1`
23699	///
23700	/// `16/32/64-bit`
23701	Pminud_xmm_xmmm128 = 2963,
23702	/// `VPMINUD xmm1, xmm2, xmm3/m128`
23703	///
23704	/// `VEX.128.66.0F38.WIG 3B /r`
23705	///
23706	/// `AVX`
23707	///
23708	/// `16/32/64-bit`
23709	VEX_Vpminud_xmm_xmm_xmmm128 = 2964,
23710	/// `VPMINUD ymm1, ymm2, ymm3/m256`
23711	///
23712	/// `VEX.256.66.0F38.WIG 3B /r`
23713	///
23714	/// `AVX2`
23715	///
23716	/// `16/32/64-bit`
23717	VEX_Vpminud_ymm_ymm_ymmm256 = 2965,
23718	/// `VPMINUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
23719	///
23720	/// `EVEX.128.66.0F38.W0 3B /r`
23721	///
23722	/// `AVX512VL and AVX512F`
23723	///
23724	/// `16/32/64-bit`
23725	EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32 = 2966,
23726	/// `VPMINUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
23727	///
23728	/// `EVEX.256.66.0F38.W0 3B /r`
23729	///
23730	/// `AVX512VL and AVX512F`
23731	///
23732	/// `16/32/64-bit`
23733	EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32 = 2967,
23734	/// `VPMINUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
23735	///
23736	/// `EVEX.512.66.0F38.W0 3B /r`
23737	///
23738	/// `AVX512F`
23739	///
23740	/// `16/32/64-bit`
23741	EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32 = 2968,
23742	/// `VPMINUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
23743	///
23744	/// `EVEX.128.66.0F38.W1 3B /r`
23745	///
23746	/// `AVX512VL and AVX512F`
23747	///
23748	/// `16/32/64-bit`
23749	EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64 = 2969,
23750	/// `VPMINUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
23751	///
23752	/// `EVEX.256.66.0F38.W1 3B /r`
23753	///
23754	/// `AVX512VL and AVX512F`
23755	///
23756	/// `16/32/64-bit`
23757	EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64 = 2970,
23758	/// `VPMINUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
23759	///
23760	/// `EVEX.512.66.0F38.W1 3B /r`
23761	///
23762	/// `AVX512F`
23763	///
23764	/// `16/32/64-bit`
23765	EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64 = 2971,
23766	/// `PMAXSB xmm1, xmm2/m128`
23767	///
23768	/// `66 0F 38 3C /r`
23769	///
23770	/// `SSE4.1`
23771	///
23772	/// `16/32/64-bit`
23773	Pmaxsb_xmm_xmmm128 = 2972,
23774	/// `VPMAXSB xmm1, xmm2, xmm3/m128`
23775	///
23776	/// `VEX.128.66.0F38.WIG 3C /r`
23777	///
23778	/// `AVX`
23779	///
23780	/// `16/32/64-bit`
23781	VEX_Vpmaxsb_xmm_xmm_xmmm128 = 2973,
23782	/// `VPMAXSB ymm1, ymm2, ymm3/m256`
23783	///
23784	/// `VEX.256.66.0F38.WIG 3C /r`
23785	///
23786	/// `AVX2`
23787	///
23788	/// `16/32/64-bit`
23789	VEX_Vpmaxsb_ymm_ymm_ymmm256 = 2974,
23790	/// `VPMAXSB xmm1 {k1}{z}, xmm2, xmm3/m128`
23791	///
23792	/// `EVEX.128.66.0F38.WIG 3C /r`
23793	///
23794	/// `AVX512VL and AVX512BW`
23795	///
23796	/// `16/32/64-bit`
23797	EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128 = 2975,
23798	/// `VPMAXSB ymm1 {k1}{z}, ymm2, ymm3/m256`
23799	///
23800	/// `EVEX.256.66.0F38.WIG 3C /r`
23801	///
23802	/// `AVX512VL and AVX512BW`
23803	///
23804	/// `16/32/64-bit`
23805	EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256 = 2976,
23806	/// `VPMAXSB zmm1 {k1}{z}, zmm2, zmm3/m512`
23807	///
23808	/// `EVEX.512.66.0F38.WIG 3C /r`
23809	///
23810	/// `AVX512BW`
23811	///
23812	/// `16/32/64-bit`
23813	EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512 = 2977,
23814	/// `PMAXSD xmm1, xmm2/m128`
23815	///
23816	/// `66 0F 38 3D /r`
23817	///
23818	/// `SSE4.1`
23819	///
23820	/// `16/32/64-bit`
23821	Pmaxsd_xmm_xmmm128 = 2978,
23822	/// `VPMAXSD xmm1, xmm2, xmm3/m128`
23823	///
23824	/// `VEX.128.66.0F38.WIG 3D /r`
23825	///
23826	/// `AVX`
23827	///
23828	/// `16/32/64-bit`
23829	VEX_Vpmaxsd_xmm_xmm_xmmm128 = 2979,
23830	/// `VPMAXSD ymm1, ymm2, ymm3/m256`
23831	///
23832	/// `VEX.256.66.0F38.WIG 3D /r`
23833	///
23834	/// `AVX2`
23835	///
23836	/// `16/32/64-bit`
23837	VEX_Vpmaxsd_ymm_ymm_ymmm256 = 2980,
23838	/// `VPMAXSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
23839	///
23840	/// `EVEX.128.66.0F38.W0 3D /r`
23841	///
23842	/// `AVX512VL and AVX512F`
23843	///
23844	/// `16/32/64-bit`
23845	EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32 = 2981,
23846	/// `VPMAXSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
23847	///
23848	/// `EVEX.256.66.0F38.W0 3D /r`
23849	///
23850	/// `AVX512VL and AVX512F`
23851	///
23852	/// `16/32/64-bit`
23853	EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32 = 2982,
23854	/// `VPMAXSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
23855	///
23856	/// `EVEX.512.66.0F38.W0 3D /r`
23857	///
23858	/// `AVX512F`
23859	///
23860	/// `16/32/64-bit`
23861	EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32 = 2983,
23862	/// `VPMAXSQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
23863	///
23864	/// `EVEX.128.66.0F38.W1 3D /r`
23865	///
23866	/// `AVX512VL and AVX512F`
23867	///
23868	/// `16/32/64-bit`
23869	EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64 = 2984,
23870	/// `VPMAXSQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
23871	///
23872	/// `EVEX.256.66.0F38.W1 3D /r`
23873	///
23874	/// `AVX512VL and AVX512F`
23875	///
23876	/// `16/32/64-bit`
23877	EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64 = 2985,
23878	/// `VPMAXSQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
23879	///
23880	/// `EVEX.512.66.0F38.W1 3D /r`
23881	///
23882	/// `AVX512F`
23883	///
23884	/// `16/32/64-bit`
23885	EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64 = 2986,
23886	/// `PMAXUW xmm1, xmm2/m128`
23887	///
23888	/// `66 0F 38 3E /r`
23889	///
23890	/// `SSE4.1`
23891	///
23892	/// `16/32/64-bit`
23893	Pmaxuw_xmm_xmmm128 = 2987,
23894	/// `VPMAXUW xmm1, xmm2, xmm3/m128`
23895	///
23896	/// `VEX.128.66.0F38.WIG 3E /r`
23897	///
23898	/// `AVX`
23899	///
23900	/// `16/32/64-bit`
23901	VEX_Vpmaxuw_xmm_xmm_xmmm128 = 2988,
23902	/// `VPMAXUW ymm1, ymm2, ymm3/m256`
23903	///
23904	/// `VEX.256.66.0F38.WIG 3E /r`
23905	///
23906	/// `AVX2`
23907	///
23908	/// `16/32/64-bit`
23909	VEX_Vpmaxuw_ymm_ymm_ymmm256 = 2989,
23910	/// `VPMAXUW xmm1 {k1}{z}, xmm2, xmm3/m128`
23911	///
23912	/// `EVEX.128.66.0F38.WIG 3E /r`
23913	///
23914	/// `AVX512VL and AVX512BW`
23915	///
23916	/// `16/32/64-bit`
23917	EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128 = 2990,
23918	/// `VPMAXUW ymm1 {k1}{z}, ymm2, ymm3/m256`
23919	///
23920	/// `EVEX.256.66.0F38.WIG 3E /r`
23921	///
23922	/// `AVX512VL and AVX512BW`
23923	///
23924	/// `16/32/64-bit`
23925	EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256 = 2991,
23926	/// `VPMAXUW zmm1 {k1}{z}, zmm2, zmm3/m512`
23927	///
23928	/// `EVEX.512.66.0F38.WIG 3E /r`
23929	///
23930	/// `AVX512BW`
23931	///
23932	/// `16/32/64-bit`
23933	EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512 = 2992,
23934	/// `PMAXUD xmm1, xmm2/m128`
23935	///
23936	/// `66 0F 38 3F /r`
23937	///
23938	/// `SSE4.1`
23939	///
23940	/// `16/32/64-bit`
23941	Pmaxud_xmm_xmmm128 = 2993,
23942	/// `VPMAXUD xmm1, xmm2, xmm3/m128`
23943	///
23944	/// `VEX.128.66.0F38.WIG 3F /r`
23945	///
23946	/// `AVX`
23947	///
23948	/// `16/32/64-bit`
23949	VEX_Vpmaxud_xmm_xmm_xmmm128 = 2994,
23950	/// `VPMAXUD ymm1, ymm2, ymm3/m256`
23951	///
23952	/// `VEX.256.66.0F38.WIG 3F /r`
23953	///
23954	/// `AVX2`
23955	///
23956	/// `16/32/64-bit`
23957	VEX_Vpmaxud_ymm_ymm_ymmm256 = 2995,
23958	/// `VPMAXUD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
23959	///
23960	/// `EVEX.128.66.0F38.W0 3F /r`
23961	///
23962	/// `AVX512VL and AVX512F`
23963	///
23964	/// `16/32/64-bit`
23965	EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32 = 2996,
23966	/// `VPMAXUD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
23967	///
23968	/// `EVEX.256.66.0F38.W0 3F /r`
23969	///
23970	/// `AVX512VL and AVX512F`
23971	///
23972	/// `16/32/64-bit`
23973	EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32 = 2997,
23974	/// `VPMAXUD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
23975	///
23976	/// `EVEX.512.66.0F38.W0 3F /r`
23977	///
23978	/// `AVX512F`
23979	///
23980	/// `16/32/64-bit`
23981	EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32 = 2998,
23982	/// `VPMAXUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
23983	///
23984	/// `EVEX.128.66.0F38.W1 3F /r`
23985	///
23986	/// `AVX512VL and AVX512F`
23987	///
23988	/// `16/32/64-bit`
23989	EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64 = 2999,
23990	/// `VPMAXUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
23991	///
23992	/// `EVEX.256.66.0F38.W1 3F /r`
23993	///
23994	/// `AVX512VL and AVX512F`
23995	///
23996	/// `16/32/64-bit`
23997	EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64 = 3000,
23998	/// `VPMAXUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
23999	///
24000	/// `EVEX.512.66.0F38.W1 3F /r`
24001	///
24002	/// `AVX512F`
24003	///
24004	/// `16/32/64-bit`
24005	EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64 = 3001,
24006	/// `PMULLD xmm1, xmm2/m128`
24007	///
24008	/// `66 0F 38 40 /r`
24009	///
24010	/// `SSE4.1`
24011	///
24012	/// `16/32/64-bit`
24013	Pmulld_xmm_xmmm128 = 3002,
24014	/// `VPMULLD xmm1, xmm2, xmm3/m128`
24015	///
24016	/// `VEX.128.66.0F38.WIG 40 /r`
24017	///
24018	/// `AVX`
24019	///
24020	/// `16/32/64-bit`
24021	VEX_Vpmulld_xmm_xmm_xmmm128 = 3003,
24022	/// `VPMULLD ymm1, ymm2, ymm3/m256`
24023	///
24024	/// `VEX.256.66.0F38.WIG 40 /r`
24025	///
24026	/// `AVX2`
24027	///
24028	/// `16/32/64-bit`
24029	VEX_Vpmulld_ymm_ymm_ymmm256 = 3004,
24030	/// `VPMULLD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24031	///
24032	/// `EVEX.128.66.0F38.W0 40 /r`
24033	///
24034	/// `AVX512VL and AVX512F`
24035	///
24036	/// `16/32/64-bit`
24037	EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32 = 3005,
24038	/// `VPMULLD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24039	///
24040	/// `EVEX.256.66.0F38.W0 40 /r`
24041	///
24042	/// `AVX512VL and AVX512F`
24043	///
24044	/// `16/32/64-bit`
24045	EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32 = 3006,
24046	/// `VPMULLD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24047	///
24048	/// `EVEX.512.66.0F38.W0 40 /r`
24049	///
24050	/// `AVX512F`
24051	///
24052	/// `16/32/64-bit`
24053	EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32 = 3007,
24054	/// `VPMULLQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
24055	///
24056	/// `EVEX.128.66.0F38.W1 40 /r`
24057	///
24058	/// `AVX512VL and AVX512DQ`
24059	///
24060	/// `16/32/64-bit`
24061	EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64 = 3008,
24062	/// `VPMULLQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
24063	///
24064	/// `EVEX.256.66.0F38.W1 40 /r`
24065	///
24066	/// `AVX512VL and AVX512DQ`
24067	///
24068	/// `16/32/64-bit`
24069	EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64 = 3009,
24070	/// `VPMULLQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
24071	///
24072	/// `EVEX.512.66.0F38.W1 40 /r`
24073	///
24074	/// `AVX512DQ`
24075	///
24076	/// `16/32/64-bit`
24077	EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64 = 3010,
24078	/// `PHMINPOSUW xmm1, xmm2/m128`
24079	///
24080	/// `66 0F 38 41 /r`
24081	///
24082	/// `SSE4.1`
24083	///
24084	/// `16/32/64-bit`
24085	Phminposuw_xmm_xmmm128 = 3011,
24086	/// `VPHMINPOSUW xmm1, xmm2/m128`
24087	///
24088	/// `VEX.128.66.0F38.WIG 41 /r`
24089	///
24090	/// `AVX`
24091	///
24092	/// `16/32/64-bit`
24093	VEX_Vphminposuw_xmm_xmmm128 = 3012,
24094	/// `VGETEXPPS xmm1 {k1}{z}, xmm2/m128/m32bcst`
24095	///
24096	/// `EVEX.128.66.0F38.W0 42 /r`
24097	///
24098	/// `AVX512VL and AVX512F`
24099	///
24100	/// `16/32/64-bit`
24101	EVEX_Vgetexpps_xmm_k1z_xmmm128b32 = 3013,
24102	/// `VGETEXPPS ymm1 {k1}{z}, ymm2/m256/m32bcst`
24103	///
24104	/// `EVEX.256.66.0F38.W0 42 /r`
24105	///
24106	/// `AVX512VL and AVX512F`
24107	///
24108	/// `16/32/64-bit`
24109	EVEX_Vgetexpps_ymm_k1z_ymmm256b32 = 3014,
24110	/// `VGETEXPPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
24111	///
24112	/// `EVEX.512.66.0F38.W0 42 /r`
24113	///
24114	/// `AVX512F`
24115	///
24116	/// `16/32/64-bit`
24117	EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae = 3015,
24118	/// `VGETEXPPD xmm1 {k1}{z}, xmm2/m128/m64bcst`
24119	///
24120	/// `EVEX.128.66.0F38.W1 42 /r`
24121	///
24122	/// `AVX512VL and AVX512F`
24123	///
24124	/// `16/32/64-bit`
24125	EVEX_Vgetexppd_xmm_k1z_xmmm128b64 = 3016,
24126	/// `VGETEXPPD ymm1 {k1}{z}, ymm2/m256/m64bcst`
24127	///
24128	/// `EVEX.256.66.0F38.W1 42 /r`
24129	///
24130	/// `AVX512VL and AVX512F`
24131	///
24132	/// `16/32/64-bit`
24133	EVEX_Vgetexppd_ymm_k1z_ymmm256b64 = 3017,
24134	/// `VGETEXPPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
24135	///
24136	/// `EVEX.512.66.0F38.W1 42 /r`
24137	///
24138	/// `AVX512F`
24139	///
24140	/// `16/32/64-bit`
24141	EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae = 3018,
24142	/// `VGETEXPSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
24143	///
24144	/// `EVEX.LIG.66.0F38.W0 43 /r`
24145	///
24146	/// `AVX512F`
24147	///
24148	/// `16/32/64-bit`
24149	EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae = 3019,
24150	/// `VGETEXPSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}`
24151	///
24152	/// `EVEX.LIG.66.0F38.W1 43 /r`
24153	///
24154	/// `AVX512F`
24155	///
24156	/// `16/32/64-bit`
24157	EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae = 3020,
24158	/// `VPLZCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst`
24159	///
24160	/// `EVEX.128.66.0F38.W0 44 /r`
24161	///
24162	/// `AVX512VL and AVX512CD`
24163	///
24164	/// `16/32/64-bit`
24165	EVEX_Vplzcntd_xmm_k1z_xmmm128b32 = 3021,
24166	/// `VPLZCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst`
24167	///
24168	/// `EVEX.256.66.0F38.W0 44 /r`
24169	///
24170	/// `AVX512VL and AVX512CD`
24171	///
24172	/// `16/32/64-bit`
24173	EVEX_Vplzcntd_ymm_k1z_ymmm256b32 = 3022,
24174	/// `VPLZCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst`
24175	///
24176	/// `EVEX.512.66.0F38.W0 44 /r`
24177	///
24178	/// `AVX512CD`
24179	///
24180	/// `16/32/64-bit`
24181	EVEX_Vplzcntd_zmm_k1z_zmmm512b32 = 3023,
24182	/// `VPLZCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
24183	///
24184	/// `EVEX.128.66.0F38.W1 44 /r`
24185	///
24186	/// `AVX512VL and AVX512CD`
24187	///
24188	/// `16/32/64-bit`
24189	EVEX_Vplzcntq_xmm_k1z_xmmm128b64 = 3024,
24190	/// `VPLZCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
24191	///
24192	/// `EVEX.256.66.0F38.W1 44 /r`
24193	///
24194	/// `AVX512VL and AVX512CD`
24195	///
24196	/// `16/32/64-bit`
24197	EVEX_Vplzcntq_ymm_k1z_ymmm256b64 = 3025,
24198	/// `VPLZCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst`
24199	///
24200	/// `EVEX.512.66.0F38.W1 44 /r`
24201	///
24202	/// `AVX512CD`
24203	///
24204	/// `16/32/64-bit`
24205	EVEX_Vplzcntq_zmm_k1z_zmmm512b64 = 3026,
24206	/// `VPSRLVD xmm1, xmm2, xmm3/m128`
24207	///
24208	/// `VEX.128.66.0F38.W0 45 /r`
24209	///
24210	/// `AVX2`
24211	///
24212	/// `16/32/64-bit`
24213	VEX_Vpsrlvd_xmm_xmm_xmmm128 = 3027,
24214	/// `VPSRLVD ymm1, ymm2, ymm3/m256`
24215	///
24216	/// `VEX.256.66.0F38.W0 45 /r`
24217	///
24218	/// `AVX2`
24219	///
24220	/// `16/32/64-bit`
24221	VEX_Vpsrlvd_ymm_ymm_ymmm256 = 3028,
24222	/// `VPSRLVQ xmm1, xmm2, xmm3/m128`
24223	///
24224	/// `VEX.128.66.0F38.W1 45 /r`
24225	///
24226	/// `AVX2`
24227	///
24228	/// `16/32/64-bit`
24229	VEX_Vpsrlvq_xmm_xmm_xmmm128 = 3029,
24230	/// `VPSRLVQ ymm1, ymm2, ymm3/m256`
24231	///
24232	/// `VEX.256.66.0F38.W1 45 /r`
24233	///
24234	/// `AVX2`
24235	///
24236	/// `16/32/64-bit`
24237	VEX_Vpsrlvq_ymm_ymm_ymmm256 = 3030,
24238	/// `VPSRLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24239	///
24240	/// `EVEX.128.66.0F38.W0 45 /r`
24241	///
24242	/// `AVX512VL and AVX512F`
24243	///
24244	/// `16/32/64-bit`
24245	EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32 = 3031,
24246	/// `VPSRLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24247	///
24248	/// `EVEX.256.66.0F38.W0 45 /r`
24249	///
24250	/// `AVX512VL and AVX512F`
24251	///
24252	/// `16/32/64-bit`
24253	EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32 = 3032,
24254	/// `VPSRLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24255	///
24256	/// `EVEX.512.66.0F38.W0 45 /r`
24257	///
24258	/// `AVX512F`
24259	///
24260	/// `16/32/64-bit`
24261	EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32 = 3033,
24262	/// `VPSRLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
24263	///
24264	/// `EVEX.128.66.0F38.W1 45 /r`
24265	///
24266	/// `AVX512VL and AVX512F`
24267	///
24268	/// `16/32/64-bit`
24269	EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64 = 3034,
24270	/// `VPSRLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
24271	///
24272	/// `EVEX.256.66.0F38.W1 45 /r`
24273	///
24274	/// `AVX512VL and AVX512F`
24275	///
24276	/// `16/32/64-bit`
24277	EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64 = 3035,
24278	/// `VPSRLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
24279	///
24280	/// `EVEX.512.66.0F38.W1 45 /r`
24281	///
24282	/// `AVX512F`
24283	///
24284	/// `16/32/64-bit`
24285	EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64 = 3036,
24286	/// `VPSRAVD xmm1, xmm2, xmm3/m128`
24287	///
24288	/// `VEX.128.66.0F38.W0 46 /r`
24289	///
24290	/// `AVX2`
24291	///
24292	/// `16/32/64-bit`
24293	VEX_Vpsravd_xmm_xmm_xmmm128 = 3037,
24294	/// `VPSRAVD ymm1, ymm2, ymm3/m256`
24295	///
24296	/// `VEX.256.66.0F38.W0 46 /r`
24297	///
24298	/// `AVX2`
24299	///
24300	/// `16/32/64-bit`
24301	VEX_Vpsravd_ymm_ymm_ymmm256 = 3038,
24302	/// `VPSRAVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24303	///
24304	/// `EVEX.128.66.0F38.W0 46 /r`
24305	///
24306	/// `AVX512VL and AVX512F`
24307	///
24308	/// `16/32/64-bit`
24309	EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32 = 3039,
24310	/// `VPSRAVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24311	///
24312	/// `EVEX.256.66.0F38.W0 46 /r`
24313	///
24314	/// `AVX512VL and AVX512F`
24315	///
24316	/// `16/32/64-bit`
24317	EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32 = 3040,
24318	/// `VPSRAVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24319	///
24320	/// `EVEX.512.66.0F38.W0 46 /r`
24321	///
24322	/// `AVX512F`
24323	///
24324	/// `16/32/64-bit`
24325	EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32 = 3041,
24326	/// `VPSRAVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
24327	///
24328	/// `EVEX.128.66.0F38.W1 46 /r`
24329	///
24330	/// `AVX512VL and AVX512F`
24331	///
24332	/// `16/32/64-bit`
24333	EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64 = 3042,
24334	/// `VPSRAVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
24335	///
24336	/// `EVEX.256.66.0F38.W1 46 /r`
24337	///
24338	/// `AVX512VL and AVX512F`
24339	///
24340	/// `16/32/64-bit`
24341	EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64 = 3043,
24342	/// `VPSRAVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
24343	///
24344	/// `EVEX.512.66.0F38.W1 46 /r`
24345	///
24346	/// `AVX512F`
24347	///
24348	/// `16/32/64-bit`
24349	EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64 = 3044,
24350	/// `VPSLLVD xmm1, xmm2, xmm3/m128`
24351	///
24352	/// `VEX.128.66.0F38.W0 47 /r`
24353	///
24354	/// `AVX2`
24355	///
24356	/// `16/32/64-bit`
24357	VEX_Vpsllvd_xmm_xmm_xmmm128 = 3045,
24358	/// `VPSLLVD ymm1, ymm2, ymm3/m256`
24359	///
24360	/// `VEX.256.66.0F38.W0 47 /r`
24361	///
24362	/// `AVX2`
24363	///
24364	/// `16/32/64-bit`
24365	VEX_Vpsllvd_ymm_ymm_ymmm256 = 3046,
24366	/// `VPSLLVQ xmm1, xmm2, xmm3/m128`
24367	///
24368	/// `VEX.128.66.0F38.W1 47 /r`
24369	///
24370	/// `AVX2`
24371	///
24372	/// `16/32/64-bit`
24373	VEX_Vpsllvq_xmm_xmm_xmmm128 = 3047,
24374	/// `VPSLLVQ ymm1, ymm2, ymm3/m256`
24375	///
24376	/// `VEX.256.66.0F38.W1 47 /r`
24377	///
24378	/// `AVX2`
24379	///
24380	/// `16/32/64-bit`
24381	VEX_Vpsllvq_ymm_ymm_ymmm256 = 3048,
24382	/// `VPSLLVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24383	///
24384	/// `EVEX.128.66.0F38.W0 47 /r`
24385	///
24386	/// `AVX512VL and AVX512F`
24387	///
24388	/// `16/32/64-bit`
24389	EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32 = 3049,
24390	/// `VPSLLVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24391	///
24392	/// `EVEX.256.66.0F38.W0 47 /r`
24393	///
24394	/// `AVX512VL and AVX512F`
24395	///
24396	/// `16/32/64-bit`
24397	EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32 = 3050,
24398	/// `VPSLLVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24399	///
24400	/// `EVEX.512.66.0F38.W0 47 /r`
24401	///
24402	/// `AVX512F`
24403	///
24404	/// `16/32/64-bit`
24405	EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32 = 3051,
24406	/// `VPSLLVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
24407	///
24408	/// `EVEX.128.66.0F38.W1 47 /r`
24409	///
24410	/// `AVX512VL and AVX512F`
24411	///
24412	/// `16/32/64-bit`
24413	EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64 = 3052,
24414	/// `VPSLLVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
24415	///
24416	/// `EVEX.256.66.0F38.W1 47 /r`
24417	///
24418	/// `AVX512VL and AVX512F`
24419	///
24420	/// `16/32/64-bit`
24421	EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64 = 3053,
24422	/// `VPSLLVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
24423	///
24424	/// `EVEX.512.66.0F38.W1 47 /r`
24425	///
24426	/// `AVX512F`
24427	///
24428	/// `16/32/64-bit`
24429	EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64 = 3054,
24430	/// `VRCP14PS xmm1 {k1}{z}, xmm2/m128/m32bcst`
24431	///
24432	/// `EVEX.128.66.0F38.W0 4C /r`
24433	///
24434	/// `AVX512VL and AVX512F`
24435	///
24436	/// `16/32/64-bit`
24437	EVEX_Vrcp14ps_xmm_k1z_xmmm128b32 = 3055,
24438	/// `VRCP14PS ymm1 {k1}{z}, ymm2/m256/m32bcst`
24439	///
24440	/// `EVEX.256.66.0F38.W0 4C /r`
24441	///
24442	/// `AVX512VL and AVX512F`
24443	///
24444	/// `16/32/64-bit`
24445	EVEX_Vrcp14ps_ymm_k1z_ymmm256b32 = 3056,
24446	/// `VRCP14PS zmm1 {k1}{z}, zmm2/m512/m32bcst`
24447	///
24448	/// `EVEX.512.66.0F38.W0 4C /r`
24449	///
24450	/// `AVX512F`
24451	///
24452	/// `16/32/64-bit`
24453	EVEX_Vrcp14ps_zmm_k1z_zmmm512b32 = 3057,
24454	/// `VRCP14PD xmm1 {k1}{z}, xmm2/m128/m64bcst`
24455	///
24456	/// `EVEX.128.66.0F38.W1 4C /r`
24457	///
24458	/// `AVX512VL and AVX512F`
24459	///
24460	/// `16/32/64-bit`
24461	EVEX_Vrcp14pd_xmm_k1z_xmmm128b64 = 3058,
24462	/// `VRCP14PD ymm1 {k1}{z}, ymm2/m256/m64bcst`
24463	///
24464	/// `EVEX.256.66.0F38.W1 4C /r`
24465	///
24466	/// `AVX512VL and AVX512F`
24467	///
24468	/// `16/32/64-bit`
24469	EVEX_Vrcp14pd_ymm_k1z_ymmm256b64 = 3059,
24470	/// `VRCP14PD zmm1 {k1}{z}, zmm2/m512/m64bcst`
24471	///
24472	/// `EVEX.512.66.0F38.W1 4C /r`
24473	///
24474	/// `AVX512F`
24475	///
24476	/// `16/32/64-bit`
24477	EVEX_Vrcp14pd_zmm_k1z_zmmm512b64 = 3060,
24478	/// `VRCP14SS xmm1 {k1}{z}, xmm2, xmm3/m32`
24479	///
24480	/// `EVEX.LIG.66.0F38.W0 4D /r`
24481	///
24482	/// `AVX512F`
24483	///
24484	/// `16/32/64-bit`
24485	EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32 = 3061,
24486	/// `VRCP14SD xmm1 {k1}{z}, xmm2, xmm3/m64`
24487	///
24488	/// `EVEX.LIG.66.0F38.W1 4D /r`
24489	///
24490	/// `AVX512F`
24491	///
24492	/// `16/32/64-bit`
24493	EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64 = 3062,
24494	/// `VRSQRT14PS xmm1 {k1}{z}, xmm2/m128/m32bcst`
24495	///
24496	/// `EVEX.128.66.0F38.W0 4E /r`
24497	///
24498	/// `AVX512VL and AVX512F`
24499	///
24500	/// `16/32/64-bit`
24501	EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32 = 3063,
24502	/// `VRSQRT14PS ymm1 {k1}{z}, ymm2/m256/m32bcst`
24503	///
24504	/// `EVEX.256.66.0F38.W0 4E /r`
24505	///
24506	/// `AVX512VL and AVX512F`
24507	///
24508	/// `16/32/64-bit`
24509	EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32 = 3064,
24510	/// `VRSQRT14PS zmm1 {k1}{z}, zmm2/m512/m32bcst`
24511	///
24512	/// `EVEX.512.66.0F38.W0 4E /r`
24513	///
24514	/// `AVX512F`
24515	///
24516	/// `16/32/64-bit`
24517	EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32 = 3065,
24518	/// `VRSQRT14PD xmm1 {k1}{z}, xmm2/m128/m64bcst`
24519	///
24520	/// `EVEX.128.66.0F38.W1 4E /r`
24521	///
24522	/// `AVX512VL and AVX512F`
24523	///
24524	/// `16/32/64-bit`
24525	EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64 = 3066,
24526	/// `VRSQRT14PD ymm1 {k1}{z}, ymm2/m256/m64bcst`
24527	///
24528	/// `EVEX.256.66.0F38.W1 4E /r`
24529	///
24530	/// `AVX512VL and AVX512F`
24531	///
24532	/// `16/32/64-bit`
24533	EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64 = 3067,
24534	/// `VRSQRT14PD zmm1 {k1}{z}, zmm2/m512/m64bcst`
24535	///
24536	/// `EVEX.512.66.0F38.W1 4E /r`
24537	///
24538	/// `AVX512F`
24539	///
24540	/// `16/32/64-bit`
24541	EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64 = 3068,
24542	/// `VRSQRT14SS xmm1 {k1}{z}, xmm2, xmm3/m32`
24543	///
24544	/// `EVEX.LIG.66.0F38.W0 4F /r`
24545	///
24546	/// `AVX512F`
24547	///
24548	/// `16/32/64-bit`
24549	EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32 = 3069,
24550	/// `VRSQRT14SD xmm1 {k1}{z}, xmm2, xmm3/m64`
24551	///
24552	/// `EVEX.LIG.66.0F38.W1 4F /r`
24553	///
24554	/// `AVX512F`
24555	///
24556	/// `16/32/64-bit`
24557	EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64 = 3070,
24558	/// `VPDPBUSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24559	///
24560	/// `EVEX.128.66.0F38.W0 50 /r`
24561	///
24562	/// `AVX512VL and AVX512_VNNI`
24563	///
24564	/// `16/32/64-bit`
24565	EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32 = 3071,
24566	/// `VPDPBUSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24567	///
24568	/// `EVEX.256.66.0F38.W0 50 /r`
24569	///
24570	/// `AVX512VL and AVX512_VNNI`
24571	///
24572	/// `16/32/64-bit`
24573	EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32 = 3072,
24574	/// `VPDPBUSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24575	///
24576	/// `EVEX.512.66.0F38.W0 50 /r`
24577	///
24578	/// `AVX512_VNNI`
24579	///
24580	/// `16/32/64-bit`
24581	EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32 = 3073,
24582	/// `VPDPBUSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24583	///
24584	/// `EVEX.128.66.0F38.W0 51 /r`
24585	///
24586	/// `AVX512VL and AVX512_VNNI`
24587	///
24588	/// `16/32/64-bit`
24589	EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32 = 3074,
24590	/// `VPDPBUSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24591	///
24592	/// `EVEX.256.66.0F38.W0 51 /r`
24593	///
24594	/// `AVX512VL and AVX512_VNNI`
24595	///
24596	/// `16/32/64-bit`
24597	EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32 = 3075,
24598	/// `VPDPBUSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24599	///
24600	/// `EVEX.512.66.0F38.W0 51 /r`
24601	///
24602	/// `AVX512_VNNI`
24603	///
24604	/// `16/32/64-bit`
24605	EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32 = 3076,
24606	/// `VPDPWSSD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24607	///
24608	/// `EVEX.128.66.0F38.W0 52 /r`
24609	///
24610	/// `AVX512VL and AVX512_VNNI`
24611	///
24612	/// `16/32/64-bit`
24613	EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32 = 3077,
24614	/// `VPDPWSSD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24615	///
24616	/// `EVEX.256.66.0F38.W0 52 /r`
24617	///
24618	/// `AVX512VL and AVX512_VNNI`
24619	///
24620	/// `16/32/64-bit`
24621	EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32 = 3078,
24622	/// `VPDPWSSD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24623	///
24624	/// `EVEX.512.66.0F38.W0 52 /r`
24625	///
24626	/// `AVX512_VNNI`
24627	///
24628	/// `16/32/64-bit`
24629	EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32 = 3079,
24630	/// `VDPBF16PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24631	///
24632	/// `EVEX.128.F3.0F38.W0 52 /r`
24633	///
24634	/// `AVX512VL and AVX512_BF16`
24635	///
24636	/// `16/32/64-bit`
24637	EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32 = 3080,
24638	/// `VDPBF16PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24639	///
24640	/// `EVEX.256.F3.0F38.W0 52 /r`
24641	///
24642	/// `AVX512VL and AVX512_BF16`
24643	///
24644	/// `16/32/64-bit`
24645	EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32 = 3081,
24646	/// `VDPBF16PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24647	///
24648	/// `EVEX.512.F3.0F38.W0 52 /r`
24649	///
24650	/// `AVX512F and AVX512_BF16`
24651	///
24652	/// `16/32/64-bit`
24653	EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32 = 3082,
24654	/// `VP4DPWSSD zmm1 {k1}{z}, zmm2+3, m128`
24655	///
24656	/// `EVEX.512.F2.0F38.W0 52 /r`
24657	///
24658	/// `AVX512_4VNNIW`
24659	///
24660	/// `16/32/64-bit`
24661	EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128 = 3083,
24662	/// `VPDPWSSDS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
24663	///
24664	/// `EVEX.128.66.0F38.W0 53 /r`
24665	///
24666	/// `AVX512VL and AVX512_VNNI`
24667	///
24668	/// `16/32/64-bit`
24669	EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32 = 3084,
24670	/// `VPDPWSSDS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
24671	///
24672	/// `EVEX.256.66.0F38.W0 53 /r`
24673	///
24674	/// `AVX512VL and AVX512_VNNI`
24675	///
24676	/// `16/32/64-bit`
24677	EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32 = 3085,
24678	/// `VPDPWSSDS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
24679	///
24680	/// `EVEX.512.66.0F38.W0 53 /r`
24681	///
24682	/// `AVX512_VNNI`
24683	///
24684	/// `16/32/64-bit`
24685	EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32 = 3086,
24686	/// `VP4DPWSSDS zmm1 {k1}{z}, zmm2+3, m128`
24687	///
24688	/// `EVEX.512.F2.0F38.W0 53 /r`
24689	///
24690	/// `AVX512_4VNNIW`
24691	///
24692	/// `16/32/64-bit`
24693	EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128 = 3087,
24694	/// `VPOPCNTB xmm1 {k1}{z}, xmm2/m128`
24695	///
24696	/// `EVEX.128.66.0F38.W0 54 /r`
24697	///
24698	/// `AVX512VL and AVX512_BITALG`
24699	///
24700	/// `16/32/64-bit`
24701	EVEX_Vpopcntb_xmm_k1z_xmmm128 = 3088,
24702	/// `VPOPCNTB ymm1 {k1}{z}, ymm2/m256`
24703	///
24704	/// `EVEX.256.66.0F38.W0 54 /r`
24705	///
24706	/// `AVX512VL and AVX512_BITALG`
24707	///
24708	/// `16/32/64-bit`
24709	EVEX_Vpopcntb_ymm_k1z_ymmm256 = 3089,
24710	/// `VPOPCNTB zmm1 {k1}{z}, zmm2/m512`
24711	///
24712	/// `EVEX.512.66.0F38.W0 54 /r`
24713	///
24714	/// `AVX512_BITALG`
24715	///
24716	/// `16/32/64-bit`
24717	EVEX_Vpopcntb_zmm_k1z_zmmm512 = 3090,
24718	/// `VPOPCNTW xmm1 {k1}{z}, xmm2/m128`
24719	///
24720	/// `EVEX.128.66.0F38.W1 54 /r`
24721	///
24722	/// `AVX512VL and AVX512_BITALG`
24723	///
24724	/// `16/32/64-bit`
24725	EVEX_Vpopcntw_xmm_k1z_xmmm128 = 3091,
24726	/// `VPOPCNTW ymm1 {k1}{z}, ymm2/m256`
24727	///
24728	/// `EVEX.256.66.0F38.W1 54 /r`
24729	///
24730	/// `AVX512VL and AVX512_BITALG`
24731	///
24732	/// `16/32/64-bit`
24733	EVEX_Vpopcntw_ymm_k1z_ymmm256 = 3092,
24734	/// `VPOPCNTW zmm1 {k1}{z}, zmm2/m512`
24735	///
24736	/// `EVEX.512.66.0F38.W1 54 /r`
24737	///
24738	/// `AVX512_BITALG`
24739	///
24740	/// `16/32/64-bit`
24741	EVEX_Vpopcntw_zmm_k1z_zmmm512 = 3093,
24742	/// `VPOPCNTD xmm1 {k1}{z}, xmm2/m128/m32bcst`
24743	///
24744	/// `EVEX.128.66.0F38.W0 55 /r`
24745	///
24746	/// `AVX512VL and AVX512_VPOPCNTDQ`
24747	///
24748	/// `16/32/64-bit`
24749	EVEX_Vpopcntd_xmm_k1z_xmmm128b32 = 3094,
24750	/// `VPOPCNTD ymm1 {k1}{z}, ymm2/m256/m32bcst`
24751	///
24752	/// `EVEX.256.66.0F38.W0 55 /r`
24753	///
24754	/// `AVX512VL and AVX512_VPOPCNTDQ`
24755	///
24756	/// `16/32/64-bit`
24757	EVEX_Vpopcntd_ymm_k1z_ymmm256b32 = 3095,
24758	/// `VPOPCNTD zmm1 {k1}{z}, zmm2/m512/m32bcst`
24759	///
24760	/// `EVEX.512.66.0F38.W0 55 /r`
24761	///
24762	/// `AVX512_VPOPCNTDQ`
24763	///
24764	/// `16/32/64-bit`
24765	EVEX_Vpopcntd_zmm_k1z_zmmm512b32 = 3096,
24766	/// `VPOPCNTQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
24767	///
24768	/// `EVEX.128.66.0F38.W1 55 /r`
24769	///
24770	/// `AVX512VL and AVX512_VPOPCNTDQ`
24771	///
24772	/// `16/32/64-bit`
24773	EVEX_Vpopcntq_xmm_k1z_xmmm128b64 = 3097,
24774	/// `VPOPCNTQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
24775	///
24776	/// `EVEX.256.66.0F38.W1 55 /r`
24777	///
24778	/// `AVX512VL and AVX512_VPOPCNTDQ`
24779	///
24780	/// `16/32/64-bit`
24781	EVEX_Vpopcntq_ymm_k1z_ymmm256b64 = 3098,
24782	/// `VPOPCNTQ zmm1 {k1}{z}, zmm2/m512/m64bcst`
24783	///
24784	/// `EVEX.512.66.0F38.W1 55 /r`
24785	///
24786	/// `AVX512_VPOPCNTDQ`
24787	///
24788	/// `16/32/64-bit`
24789	EVEX_Vpopcntq_zmm_k1z_zmmm512b64 = 3099,
24790	/// `VPBROADCASTD xmm1, xmm2/m32`
24791	///
24792	/// `VEX.128.66.0F38.W0 58 /r`
24793	///
24794	/// `AVX2`
24795	///
24796	/// `16/32/64-bit`
24797	VEX_Vpbroadcastd_xmm_xmmm32 = 3100,
24798	/// `VPBROADCASTD ymm1, xmm2/m32`
24799	///
24800	/// `VEX.256.66.0F38.W0 58 /r`
24801	///
24802	/// `AVX2`
24803	///
24804	/// `16/32/64-bit`
24805	VEX_Vpbroadcastd_ymm_xmmm32 = 3101,
24806	/// `VPBROADCASTD xmm1 {k1}{z}, xmm2/m32`
24807	///
24808	/// `EVEX.128.66.0F38.W0 58 /r`
24809	///
24810	/// `AVX512VL and AVX512F`
24811	///
24812	/// `16/32/64-bit`
24813	EVEX_Vpbroadcastd_xmm_k1z_xmmm32 = 3102,
24814	/// `VPBROADCASTD ymm1 {k1}{z}, xmm2/m32`
24815	///
24816	/// `EVEX.256.66.0F38.W0 58 /r`
24817	///
24818	/// `AVX512VL and AVX512F`
24819	///
24820	/// `16/32/64-bit`
24821	EVEX_Vpbroadcastd_ymm_k1z_xmmm32 = 3103,
24822	/// `VPBROADCASTD zmm1 {k1}{z}, xmm2/m32`
24823	///
24824	/// `EVEX.512.66.0F38.W0 58 /r`
24825	///
24826	/// `AVX512F`
24827	///
24828	/// `16/32/64-bit`
24829	EVEX_Vpbroadcastd_zmm_k1z_xmmm32 = 3104,
24830	/// `VPBROADCASTQ xmm1, xmm2/m64`
24831	///
24832	/// `VEX.128.66.0F38.W0 59 /r`
24833	///
24834	/// `AVX2`
24835	///
24836	/// `16/32/64-bit`
24837	VEX_Vpbroadcastq_xmm_xmmm64 = 3105,
24838	/// `VPBROADCASTQ ymm1, xmm2/m64`
24839	///
24840	/// `VEX.256.66.0F38.W0 59 /r`
24841	///
24842	/// `AVX2`
24843	///
24844	/// `16/32/64-bit`
24845	VEX_Vpbroadcastq_ymm_xmmm64 = 3106,
24846	/// `VBROADCASTI32X2 xmm1 {k1}{z}, xmm2/m64`
24847	///
24848	/// `EVEX.128.66.0F38.W0 59 /r`
24849	///
24850	/// `AVX512VL and AVX512DQ`
24851	///
24852	/// `16/32/64-bit`
24853	EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64 = 3107,
24854	/// `VBROADCASTI32X2 ymm1 {k1}{z}, xmm2/m64`
24855	///
24856	/// `EVEX.256.66.0F38.W0 59 /r`
24857	///
24858	/// `AVX512VL and AVX512DQ`
24859	///
24860	/// `16/32/64-bit`
24861	EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64 = 3108,
24862	/// `VBROADCASTI32X2 zmm1 {k1}{z}, xmm2/m64`
24863	///
24864	/// `EVEX.512.66.0F38.W0 59 /r`
24865	///
24866	/// `AVX512DQ`
24867	///
24868	/// `16/32/64-bit`
24869	EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64 = 3109,
24870	/// `VPBROADCASTQ xmm1 {k1}{z}, xmm2/m64`
24871	///
24872	/// `EVEX.128.66.0F38.W1 59 /r`
24873	///
24874	/// `AVX512VL and AVX512F`
24875	///
24876	/// `16/32/64-bit`
24877	EVEX_Vpbroadcastq_xmm_k1z_xmmm64 = 3110,
24878	/// `VPBROADCASTQ ymm1 {k1}{z}, xmm2/m64`
24879	///
24880	/// `EVEX.256.66.0F38.W1 59 /r`
24881	///
24882	/// `AVX512VL and AVX512F`
24883	///
24884	/// `16/32/64-bit`
24885	EVEX_Vpbroadcastq_ymm_k1z_xmmm64 = 3111,
24886	/// `VPBROADCASTQ zmm1 {k1}{z}, xmm2/m64`
24887	///
24888	/// `EVEX.512.66.0F38.W1 59 /r`
24889	///
24890	/// `AVX512F`
24891	///
24892	/// `16/32/64-bit`
24893	EVEX_Vpbroadcastq_zmm_k1z_xmmm64 = 3112,
24894	/// `VBROADCASTI128 ymm1, m128`
24895	///
24896	/// `VEX.256.66.0F38.W0 5A /r`
24897	///
24898	/// `AVX2`
24899	///
24900	/// `16/32/64-bit`
24901	VEX_Vbroadcasti128_ymm_m128 = 3113,
24902	/// `VBROADCASTI32X4 ymm1 {k1}{z}, m128`
24903	///
24904	/// `EVEX.256.66.0F38.W0 5A /r`
24905	///
24906	/// `AVX512VL and AVX512F`
24907	///
24908	/// `16/32/64-bit`
24909	EVEX_Vbroadcasti32x4_ymm_k1z_m128 = 3114,
24910	/// `VBROADCASTI32X4 zmm1 {k1}{z}, m128`
24911	///
24912	/// `EVEX.512.66.0F38.W0 5A /r`
24913	///
24914	/// `AVX512F`
24915	///
24916	/// `16/32/64-bit`
24917	EVEX_Vbroadcasti32x4_zmm_k1z_m128 = 3115,
24918	/// `VBROADCASTI64X2 ymm1 {k1}{z}, m128`
24919	///
24920	/// `EVEX.256.66.0F38.W1 5A /r`
24921	///
24922	/// `AVX512VL and AVX512DQ`
24923	///
24924	/// `16/32/64-bit`
24925	EVEX_Vbroadcasti64x2_ymm_k1z_m128 = 3116,
24926	/// `VBROADCASTI64X2 zmm1 {k1}{z}, m128`
24927	///
24928	/// `EVEX.512.66.0F38.W1 5A /r`
24929	///
24930	/// `AVX512DQ`
24931	///
24932	/// `16/32/64-bit`
24933	EVEX_Vbroadcasti64x2_zmm_k1z_m128 = 3117,
24934	/// `VBROADCASTI32X8 zmm1 {k1}{z}, m256`
24935	///
24936	/// `EVEX.512.66.0F38.W0 5B /r`
24937	///
24938	/// `AVX512DQ`
24939	///
24940	/// `16/32/64-bit`
24941	EVEX_Vbroadcasti32x8_zmm_k1z_m256 = 3118,
24942	/// `VBROADCASTI64X4 zmm1 {k1}{z}, m256`
24943	///
24944	/// `EVEX.512.66.0F38.W1 5B /r`
24945	///
24946	/// `AVX512F`
24947	///
24948	/// `16/32/64-bit`
24949	EVEX_Vbroadcasti64x4_zmm_k1z_m256 = 3119,
24950	/// `VPEXPANDB xmm1 {k1}{z}, xmm2/m128`
24951	///
24952	/// `EVEX.128.66.0F38.W0 62 /r`
24953	///
24954	/// `AVX512VL and AVX512_VBMI2`
24955	///
24956	/// `16/32/64-bit`
24957	EVEX_Vpexpandb_xmm_k1z_xmmm128 = 3120,
24958	/// `VPEXPANDB ymm1 {k1}{z}, ymm2/m256`
24959	///
24960	/// `EVEX.256.66.0F38.W0 62 /r`
24961	///
24962	/// `AVX512VL and AVX512_VBMI2`
24963	///
24964	/// `16/32/64-bit`
24965	EVEX_Vpexpandb_ymm_k1z_ymmm256 = 3121,
24966	/// `VPEXPANDB zmm1 {k1}{z}, zmm2/m512`
24967	///
24968	/// `EVEX.512.66.0F38.W0 62 /r`
24969	///
24970	/// `AVX512_VBMI2`
24971	///
24972	/// `16/32/64-bit`
24973	EVEX_Vpexpandb_zmm_k1z_zmmm512 = 3122,
24974	/// `VPEXPANDW xmm1 {k1}{z}, xmm2/m128`
24975	///
24976	/// `EVEX.128.66.0F38.W1 62 /r`
24977	///
24978	/// `AVX512VL and AVX512_VBMI2`
24979	///
24980	/// `16/32/64-bit`
24981	EVEX_Vpexpandw_xmm_k1z_xmmm128 = 3123,
24982	/// `VPEXPANDW ymm1 {k1}{z}, ymm2/m256`
24983	///
24984	/// `EVEX.256.66.0F38.W1 62 /r`
24985	///
24986	/// `AVX512VL and AVX512_VBMI2`
24987	///
24988	/// `16/32/64-bit`
24989	EVEX_Vpexpandw_ymm_k1z_ymmm256 = 3124,
24990	/// `VPEXPANDW zmm1 {k1}{z}, zmm2/m512`
24991	///
24992	/// `EVEX.512.66.0F38.W1 62 /r`
24993	///
24994	/// `AVX512_VBMI2`
24995	///
24996	/// `16/32/64-bit`
24997	EVEX_Vpexpandw_zmm_k1z_zmmm512 = 3125,
24998	/// `VPCOMPRESSB xmm1/m128 {k1}{z}, xmm2`
24999	///
25000	/// `EVEX.128.66.0F38.W0 63 /r`
25001	///
25002	/// `AVX512VL and AVX512_VBMI2`
25003	///
25004	/// `16/32/64-bit`
25005	EVEX_Vpcompressb_xmmm128_k1z_xmm = 3126,
25006	/// `VPCOMPRESSB ymm1/m256 {k1}{z}, ymm2`
25007	///
25008	/// `EVEX.256.66.0F38.W0 63 /r`
25009	///
25010	/// `AVX512VL and AVX512_VBMI2`
25011	///
25012	/// `16/32/64-bit`
25013	EVEX_Vpcompressb_ymmm256_k1z_ymm = 3127,
25014	/// `VPCOMPRESSB zmm1/m512 {k1}{z}, zmm2`
25015	///
25016	/// `EVEX.512.66.0F38.W0 63 /r`
25017	///
25018	/// `AVX512_VBMI2`
25019	///
25020	/// `16/32/64-bit`
25021	EVEX_Vpcompressb_zmmm512_k1z_zmm = 3128,
25022	/// `VPCOMPRESSW xmm1/m128 {k1}{z}, xmm2`
25023	///
25024	/// `EVEX.128.66.0F38.W1 63 /r`
25025	///
25026	/// `AVX512VL and AVX512_VBMI2`
25027	///
25028	/// `16/32/64-bit`
25029	EVEX_Vpcompressw_xmmm128_k1z_xmm = 3129,
25030	/// `VPCOMPRESSW ymm1/m256 {k1}{z}, ymm2`
25031	///
25032	/// `EVEX.256.66.0F38.W1 63 /r`
25033	///
25034	/// `AVX512VL and AVX512_VBMI2`
25035	///
25036	/// `16/32/64-bit`
25037	EVEX_Vpcompressw_ymmm256_k1z_ymm = 3130,
25038	/// `VPCOMPRESSW zmm1/m512 {k1}{z}, zmm2`
25039	///
25040	/// `EVEX.512.66.0F38.W1 63 /r`
25041	///
25042	/// `AVX512_VBMI2`
25043	///
25044	/// `16/32/64-bit`
25045	EVEX_Vpcompressw_zmmm512_k1z_zmm = 3131,
25046	/// `VPBLENDMD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25047	///
25048	/// `EVEX.128.66.0F38.W0 64 /r`
25049	///
25050	/// `AVX512VL and AVX512F`
25051	///
25052	/// `16/32/64-bit`
25053	EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32 = 3132,
25054	/// `VPBLENDMD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25055	///
25056	/// `EVEX.256.66.0F38.W0 64 /r`
25057	///
25058	/// `AVX512VL and AVX512F`
25059	///
25060	/// `16/32/64-bit`
25061	EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32 = 3133,
25062	/// `VPBLENDMD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25063	///
25064	/// `EVEX.512.66.0F38.W0 64 /r`
25065	///
25066	/// `AVX512F`
25067	///
25068	/// `16/32/64-bit`
25069	EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32 = 3134,
25070	/// `VPBLENDMQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25071	///
25072	/// `EVEX.128.66.0F38.W1 64 /r`
25073	///
25074	/// `AVX512VL and AVX512F`
25075	///
25076	/// `16/32/64-bit`
25077	EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64 = 3135,
25078	/// `VPBLENDMQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25079	///
25080	/// `EVEX.256.66.0F38.W1 64 /r`
25081	///
25082	/// `AVX512VL and AVX512F`
25083	///
25084	/// `16/32/64-bit`
25085	EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64 = 3136,
25086	/// `VPBLENDMQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25087	///
25088	/// `EVEX.512.66.0F38.W1 64 /r`
25089	///
25090	/// `AVX512F`
25091	///
25092	/// `16/32/64-bit`
25093	EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64 = 3137,
25094	/// `VBLENDMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25095	///
25096	/// `EVEX.128.66.0F38.W0 65 /r`
25097	///
25098	/// `AVX512VL and AVX512F`
25099	///
25100	/// `16/32/64-bit`
25101	EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32 = 3138,
25102	/// `VBLENDMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25103	///
25104	/// `EVEX.256.66.0F38.W0 65 /r`
25105	///
25106	/// `AVX512VL and AVX512F`
25107	///
25108	/// `16/32/64-bit`
25109	EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32 = 3139,
25110	/// `VBLENDMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25111	///
25112	/// `EVEX.512.66.0F38.W0 65 /r`
25113	///
25114	/// `AVX512F`
25115	///
25116	/// `16/32/64-bit`
25117	EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32 = 3140,
25118	/// `VBLENDMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25119	///
25120	/// `EVEX.128.66.0F38.W1 65 /r`
25121	///
25122	/// `AVX512VL and AVX512F`
25123	///
25124	/// `16/32/64-bit`
25125	EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64 = 3141,
25126	/// `VBLENDMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25127	///
25128	/// `EVEX.256.66.0F38.W1 65 /r`
25129	///
25130	/// `AVX512VL and AVX512F`
25131	///
25132	/// `16/32/64-bit`
25133	EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64 = 3142,
25134	/// `VBLENDMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25135	///
25136	/// `EVEX.512.66.0F38.W1 65 /r`
25137	///
25138	/// `AVX512F`
25139	///
25140	/// `16/32/64-bit`
25141	EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64 = 3143,
25142	/// `VPBLENDMB xmm1 {k1}{z}, xmm2, xmm3/m128`
25143	///
25144	/// `EVEX.128.66.0F38.W0 66 /r`
25145	///
25146	/// `AVX512VL and AVX512BW`
25147	///
25148	/// `16/32/64-bit`
25149	EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128 = 3144,
25150	/// `VPBLENDMB ymm1 {k1}{z}, ymm2, ymm3/m256`
25151	///
25152	/// `EVEX.256.66.0F38.W0 66 /r`
25153	///
25154	/// `AVX512VL and AVX512BW`
25155	///
25156	/// `16/32/64-bit`
25157	EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256 = 3145,
25158	/// `VPBLENDMB zmm1 {k1}{z}, zmm2, zmm3/m512`
25159	///
25160	/// `EVEX.512.66.0F38.W0 66 /r`
25161	///
25162	/// `AVX512BW`
25163	///
25164	/// `16/32/64-bit`
25165	EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512 = 3146,
25166	/// `VPBLENDMW xmm1 {k1}{z}, xmm2, xmm3/m128`
25167	///
25168	/// `EVEX.128.66.0F38.W1 66 /r`
25169	///
25170	/// `AVX512VL and AVX512BW`
25171	///
25172	/// `16/32/64-bit`
25173	EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128 = 3147,
25174	/// `VPBLENDMW ymm1 {k1}{z}, ymm2, ymm3/m256`
25175	///
25176	/// `EVEX.256.66.0F38.W1 66 /r`
25177	///
25178	/// `AVX512VL and AVX512BW`
25179	///
25180	/// `16/32/64-bit`
25181	EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256 = 3148,
25182	/// `VPBLENDMW zmm1 {k1}{z}, zmm2, zmm3/m512`
25183	///
25184	/// `EVEX.512.66.0F38.W1 66 /r`
25185	///
25186	/// `AVX512BW`
25187	///
25188	/// `16/32/64-bit`
25189	EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512 = 3149,
25190	/// `VP2INTERSECTD k1+1, xmm2, xmm3/m128/m32bcst`
25191	///
25192	/// `EVEX.128.F2.0F38.W0 68 /r`
25193	///
25194	/// `AVX512VL and AVX512_VP2INTERSECT`
25195	///
25196	/// `16/32/64-bit`
25197	EVEX_Vp2intersectd_kp1_xmm_xmmm128b32 = 3150,
25198	/// `VP2INTERSECTD k1+1, ymm2, ymm3/m256/m32bcst`
25199	///
25200	/// `EVEX.256.F2.0F38.W0 68 /r`
25201	///
25202	/// `AVX512VL and AVX512_VP2INTERSECT`
25203	///
25204	/// `16/32/64-bit`
25205	EVEX_Vp2intersectd_kp1_ymm_ymmm256b32 = 3151,
25206	/// `VP2INTERSECTD k1+1, zmm2, zmm3/m512/m32bcst`
25207	///
25208	/// `EVEX.512.F2.0F38.W0 68 /r`
25209	///
25210	/// `AVX512F and AVX512_VP2INTERSECT`
25211	///
25212	/// `16/32/64-bit`
25213	EVEX_Vp2intersectd_kp1_zmm_zmmm512b32 = 3152,
25214	/// `VP2INTERSECTQ k1+1, xmm2, xmm3/m128/m64bcst`
25215	///
25216	/// `EVEX.128.F2.0F38.W1 68 /r`
25217	///
25218	/// `AVX512VL and AVX512_VP2INTERSECT`
25219	///
25220	/// `16/32/64-bit`
25221	EVEX_Vp2intersectq_kp1_xmm_xmmm128b64 = 3153,
25222	/// `VP2INTERSECTQ k1+1, ymm2, ymm3/m256/m64bcst`
25223	///
25224	/// `EVEX.256.F2.0F38.W1 68 /r`
25225	///
25226	/// `AVX512VL and AVX512_VP2INTERSECT`
25227	///
25228	/// `16/32/64-bit`
25229	EVEX_Vp2intersectq_kp1_ymm_ymmm256b64 = 3154,
25230	/// `VP2INTERSECTQ k1+1, zmm2, zmm3/m512/m64bcst`
25231	///
25232	/// `EVEX.512.F2.0F38.W1 68 /r`
25233	///
25234	/// `AVX512F and AVX512_VP2INTERSECT`
25235	///
25236	/// `16/32/64-bit`
25237	EVEX_Vp2intersectq_kp1_zmm_zmmm512b64 = 3155,
25238	/// `VPSHLDVW xmm1 {k1}{z}, xmm2, xmm3/m128`
25239	///
25240	/// `EVEX.128.66.0F38.W1 70 /r`
25241	///
25242	/// `AVX512VL and AVX512_VBMI2`
25243	///
25244	/// `16/32/64-bit`
25245	EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128 = 3156,
25246	/// `VPSHLDVW ymm1 {k1}{z}, ymm2, ymm3/m256`
25247	///
25248	/// `EVEX.256.66.0F38.W1 70 /r`
25249	///
25250	/// `AVX512VL and AVX512_VBMI2`
25251	///
25252	/// `16/32/64-bit`
25253	EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256 = 3157,
25254	/// `VPSHLDVW zmm1 {k1}{z}, zmm2, zmm3/m512`
25255	///
25256	/// `EVEX.512.66.0F38.W1 70 /r`
25257	///
25258	/// `AVX512_VBMI2`
25259	///
25260	/// `16/32/64-bit`
25261	EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512 = 3158,
25262	/// `VPSHLDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25263	///
25264	/// `EVEX.128.66.0F38.W0 71 /r`
25265	///
25266	/// `AVX512VL and AVX512_VBMI2`
25267	///
25268	/// `16/32/64-bit`
25269	EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32 = 3159,
25270	/// `VPSHLDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25271	///
25272	/// `EVEX.256.66.0F38.W0 71 /r`
25273	///
25274	/// `AVX512VL and AVX512_VBMI2`
25275	///
25276	/// `16/32/64-bit`
25277	EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32 = 3160,
25278	/// `VPSHLDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25279	///
25280	/// `EVEX.512.66.0F38.W0 71 /r`
25281	///
25282	/// `AVX512_VBMI2`
25283	///
25284	/// `16/32/64-bit`
25285	EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32 = 3161,
25286	/// `VPSHLDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25287	///
25288	/// `EVEX.128.66.0F38.W1 71 /r`
25289	///
25290	/// `AVX512VL and AVX512_VBMI2`
25291	///
25292	/// `16/32/64-bit`
25293	EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64 = 3162,
25294	/// `VPSHLDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25295	///
25296	/// `EVEX.256.66.0F38.W1 71 /r`
25297	///
25298	/// `AVX512VL and AVX512_VBMI2`
25299	///
25300	/// `16/32/64-bit`
25301	EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64 = 3163,
25302	/// `VPSHLDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25303	///
25304	/// `EVEX.512.66.0F38.W1 71 /r`
25305	///
25306	/// `AVX512_VBMI2`
25307	///
25308	/// `16/32/64-bit`
25309	EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64 = 3164,
25310	/// `VPSHRDVW xmm1 {k1}{z}, xmm2, xmm3/m128`
25311	///
25312	/// `EVEX.128.66.0F38.W1 72 /r`
25313	///
25314	/// `AVX512VL and AVX512_VBMI2`
25315	///
25316	/// `16/32/64-bit`
25317	EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128 = 3165,
25318	/// `VPSHRDVW ymm1 {k1}{z}, ymm2, ymm3/m256`
25319	///
25320	/// `EVEX.256.66.0F38.W1 72 /r`
25321	///
25322	/// `AVX512VL and AVX512_VBMI2`
25323	///
25324	/// `16/32/64-bit`
25325	EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256 = 3166,
25326	/// `VPSHRDVW zmm1 {k1}{z}, zmm2, zmm3/m512`
25327	///
25328	/// `EVEX.512.66.0F38.W1 72 /r`
25329	///
25330	/// `AVX512_VBMI2`
25331	///
25332	/// `16/32/64-bit`
25333	EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512 = 3167,
25334	/// `VCVTNEPS2BF16 xmm1 {k1}{z}, xmm2/m128/m32bcst`
25335	///
25336	/// `EVEX.128.F3.0F38.W0 72 /r`
25337	///
25338	/// `AVX512VL and AVX512_BF16`
25339	///
25340	/// `16/32/64-bit`
25341	EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32 = 3168,
25342	/// `VCVTNEPS2BF16 xmm1 {k1}{z}, ymm2/m256/m32bcst`
25343	///
25344	/// `EVEX.256.F3.0F38.W0 72 /r`
25345	///
25346	/// `AVX512VL and AVX512_BF16`
25347	///
25348	/// `16/32/64-bit`
25349	EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32 = 3169,
25350	/// `VCVTNEPS2BF16 ymm1 {k1}{z}, zmm2/m512/m32bcst`
25351	///
25352	/// `EVEX.512.F3.0F38.W0 72 /r`
25353	///
25354	/// `AVX512F and AVX512_BF16`
25355	///
25356	/// `16/32/64-bit`
25357	EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32 = 3170,
25358	/// `VCVTNE2PS2BF16 xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25359	///
25360	/// `EVEX.128.F2.0F38.W0 72 /r`
25361	///
25362	/// `AVX512VL and AVX512_BF16`
25363	///
25364	/// `16/32/64-bit`
25365	EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32 = 3171,
25366	/// `VCVTNE2PS2BF16 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25367	///
25368	/// `EVEX.256.F2.0F38.W0 72 /r`
25369	///
25370	/// `AVX512VL and AVX512_BF16`
25371	///
25372	/// `16/32/64-bit`
25373	EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32 = 3172,
25374	/// `VCVTNE2PS2BF16 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25375	///
25376	/// `EVEX.512.F2.0F38.W0 72 /r`
25377	///
25378	/// `AVX512F and AVX512_BF16`
25379	///
25380	/// `16/32/64-bit`
25381	EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32 = 3173,
25382	/// `VPSHRDVD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25383	///
25384	/// `EVEX.128.66.0F38.W0 73 /r`
25385	///
25386	/// `AVX512VL and AVX512_VBMI2`
25387	///
25388	/// `16/32/64-bit`
25389	EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32 = 3174,
25390	/// `VPSHRDVD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25391	///
25392	/// `EVEX.256.66.0F38.W0 73 /r`
25393	///
25394	/// `AVX512VL and AVX512_VBMI2`
25395	///
25396	/// `16/32/64-bit`
25397	EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32 = 3175,
25398	/// `VPSHRDVD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25399	///
25400	/// `EVEX.512.66.0F38.W0 73 /r`
25401	///
25402	/// `AVX512_VBMI2`
25403	///
25404	/// `16/32/64-bit`
25405	EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32 = 3176,
25406	/// `VPSHRDVQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25407	///
25408	/// `EVEX.128.66.0F38.W1 73 /r`
25409	///
25410	/// `AVX512VL and AVX512_VBMI2`
25411	///
25412	/// `16/32/64-bit`
25413	EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64 = 3177,
25414	/// `VPSHRDVQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25415	///
25416	/// `EVEX.256.66.0F38.W1 73 /r`
25417	///
25418	/// `AVX512VL and AVX512_VBMI2`
25419	///
25420	/// `16/32/64-bit`
25421	EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64 = 3178,
25422	/// `VPSHRDVQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25423	///
25424	/// `EVEX.512.66.0F38.W1 73 /r`
25425	///
25426	/// `AVX512_VBMI2`
25427	///
25428	/// `16/32/64-bit`
25429	EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64 = 3179,
25430	/// `VPERMI2B xmm1 {k1}{z}, xmm2, xmm3/m128`
25431	///
25432	/// `EVEX.128.66.0F38.W0 75 /r`
25433	///
25434	/// `AVX512VL and AVX512_VBMI`
25435	///
25436	/// `16/32/64-bit`
25437	EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128 = 3180,
25438	/// `VPERMI2B ymm1 {k1}{z}, ymm2, ymm3/m256`
25439	///
25440	/// `EVEX.256.66.0F38.W0 75 /r`
25441	///
25442	/// `AVX512VL and AVX512_VBMI`
25443	///
25444	/// `16/32/64-bit`
25445	EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256 = 3181,
25446	/// `VPERMI2B zmm1 {k1}{z}, zmm2, zmm3/m512`
25447	///
25448	/// `EVEX.512.66.0F38.W0 75 /r`
25449	///
25450	/// `AVX512_VBMI`
25451	///
25452	/// `16/32/64-bit`
25453	EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512 = 3182,
25454	/// `VPERMI2W xmm1 {k1}{z}, xmm2, xmm3/m128`
25455	///
25456	/// `EVEX.128.66.0F38.W1 75 /r`
25457	///
25458	/// `AVX512VL and AVX512BW`
25459	///
25460	/// `16/32/64-bit`
25461	EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128 = 3183,
25462	/// `VPERMI2W ymm1 {k1}{z}, ymm2, ymm3/m256`
25463	///
25464	/// `EVEX.256.66.0F38.W1 75 /r`
25465	///
25466	/// `AVX512VL and AVX512BW`
25467	///
25468	/// `16/32/64-bit`
25469	EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256 = 3184,
25470	/// `VPERMI2W zmm1 {k1}{z}, zmm2, zmm3/m512`
25471	///
25472	/// `EVEX.512.66.0F38.W1 75 /r`
25473	///
25474	/// `AVX512BW`
25475	///
25476	/// `16/32/64-bit`
25477	EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512 = 3185,
25478	/// `VPERMI2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25479	///
25480	/// `EVEX.128.66.0F38.W0 76 /r`
25481	///
25482	/// `AVX512VL and AVX512F`
25483	///
25484	/// `16/32/64-bit`
25485	EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32 = 3186,
25486	/// `VPERMI2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25487	///
25488	/// `EVEX.256.66.0F38.W0 76 /r`
25489	///
25490	/// `AVX512VL and AVX512F`
25491	///
25492	/// `16/32/64-bit`
25493	EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32 = 3187,
25494	/// `VPERMI2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25495	///
25496	/// `EVEX.512.66.0F38.W0 76 /r`
25497	///
25498	/// `AVX512F`
25499	///
25500	/// `16/32/64-bit`
25501	EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32 = 3188,
25502	/// `VPERMI2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25503	///
25504	/// `EVEX.128.66.0F38.W1 76 /r`
25505	///
25506	/// `AVX512VL and AVX512F`
25507	///
25508	/// `16/32/64-bit`
25509	EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64 = 3189,
25510	/// `VPERMI2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25511	///
25512	/// `EVEX.256.66.0F38.W1 76 /r`
25513	///
25514	/// `AVX512VL and AVX512F`
25515	///
25516	/// `16/32/64-bit`
25517	EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64 = 3190,
25518	/// `VPERMI2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25519	///
25520	/// `EVEX.512.66.0F38.W1 76 /r`
25521	///
25522	/// `AVX512F`
25523	///
25524	/// `16/32/64-bit`
25525	EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64 = 3191,
25526	/// `VPERMI2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25527	///
25528	/// `EVEX.128.66.0F38.W0 77 /r`
25529	///
25530	/// `AVX512VL and AVX512F`
25531	///
25532	/// `16/32/64-bit`
25533	EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32 = 3192,
25534	/// `VPERMI2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25535	///
25536	/// `EVEX.256.66.0F38.W0 77 /r`
25537	///
25538	/// `AVX512VL and AVX512F`
25539	///
25540	/// `16/32/64-bit`
25541	EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32 = 3193,
25542	/// `VPERMI2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25543	///
25544	/// `EVEX.512.66.0F38.W0 77 /r`
25545	///
25546	/// `AVX512F`
25547	///
25548	/// `16/32/64-bit`
25549	EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32 = 3194,
25550	/// `VPERMI2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25551	///
25552	/// `EVEX.128.66.0F38.W1 77 /r`
25553	///
25554	/// `AVX512VL and AVX512F`
25555	///
25556	/// `16/32/64-bit`
25557	EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64 = 3195,
25558	/// `VPERMI2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25559	///
25560	/// `EVEX.256.66.0F38.W1 77 /r`
25561	///
25562	/// `AVX512VL and AVX512F`
25563	///
25564	/// `16/32/64-bit`
25565	EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64 = 3196,
25566	/// `VPERMI2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25567	///
25568	/// `EVEX.512.66.0F38.W1 77 /r`
25569	///
25570	/// `AVX512F`
25571	///
25572	/// `16/32/64-bit`
25573	EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64 = 3197,
25574	/// `VPBROADCASTB xmm1, xmm2/m8`
25575	///
25576	/// `VEX.128.66.0F38.W0 78 /r`
25577	///
25578	/// `AVX2`
25579	///
25580	/// `16/32/64-bit`
25581	VEX_Vpbroadcastb_xmm_xmmm8 = 3198,
25582	/// `VPBROADCASTB ymm1, xmm2/m8`
25583	///
25584	/// `VEX.256.66.0F38.W0 78 /r`
25585	///
25586	/// `AVX2`
25587	///
25588	/// `16/32/64-bit`
25589	VEX_Vpbroadcastb_ymm_xmmm8 = 3199,
25590	/// `VPBROADCASTB xmm1 {k1}{z}, xmm2/m8`
25591	///
25592	/// `EVEX.128.66.0F38.W0 78 /r`
25593	///
25594	/// `AVX512VL and AVX512BW`
25595	///
25596	/// `16/32/64-bit`
25597	EVEX_Vpbroadcastb_xmm_k1z_xmmm8 = 3200,
25598	/// `VPBROADCASTB ymm1 {k1}{z}, xmm2/m8`
25599	///
25600	/// `EVEX.256.66.0F38.W0 78 /r`
25601	///
25602	/// `AVX512VL and AVX512BW`
25603	///
25604	/// `16/32/64-bit`
25605	EVEX_Vpbroadcastb_ymm_k1z_xmmm8 = 3201,
25606	/// `VPBROADCASTB zmm1 {k1}{z}, xmm2/m8`
25607	///
25608	/// `EVEX.512.66.0F38.W0 78 /r`
25609	///
25610	/// `AVX512BW`
25611	///
25612	/// `16/32/64-bit`
25613	EVEX_Vpbroadcastb_zmm_k1z_xmmm8 = 3202,
25614	/// `VPBROADCASTW xmm1, xmm2/m16`
25615	///
25616	/// `VEX.128.66.0F38.W0 79 /r`
25617	///
25618	/// `AVX2`
25619	///
25620	/// `16/32/64-bit`
25621	VEX_Vpbroadcastw_xmm_xmmm16 = 3203,
25622	/// `VPBROADCASTW ymm1, xmm2/m16`
25623	///
25624	/// `VEX.256.66.0F38.W0 79 /r`
25625	///
25626	/// `AVX2`
25627	///
25628	/// `16/32/64-bit`
25629	VEX_Vpbroadcastw_ymm_xmmm16 = 3204,
25630	/// `VPBROADCASTW xmm1 {k1}{z}, xmm2/m16`
25631	///
25632	/// `EVEX.128.66.0F38.W0 79 /r`
25633	///
25634	/// `AVX512VL and AVX512BW`
25635	///
25636	/// `16/32/64-bit`
25637	EVEX_Vpbroadcastw_xmm_k1z_xmmm16 = 3205,
25638	/// `VPBROADCASTW ymm1 {k1}{z}, xmm2/m16`
25639	///
25640	/// `EVEX.256.66.0F38.W0 79 /r`
25641	///
25642	/// `AVX512VL and AVX512BW`
25643	///
25644	/// `16/32/64-bit`
25645	EVEX_Vpbroadcastw_ymm_k1z_xmmm16 = 3206,
25646	/// `VPBROADCASTW zmm1 {k1}{z}, xmm2/m16`
25647	///
25648	/// `EVEX.512.66.0F38.W0 79 /r`
25649	///
25650	/// `AVX512BW`
25651	///
25652	/// `16/32/64-bit`
25653	EVEX_Vpbroadcastw_zmm_k1z_xmmm16 = 3207,
25654	/// `VPBROADCASTB xmm1 {k1}{z}, r32`
25655	///
25656	/// `EVEX.128.66.0F38.W0 7A /r`
25657	///
25658	/// `AVX512VL and AVX512BW`
25659	///
25660	/// `16/32/64-bit`
25661	EVEX_Vpbroadcastb_xmm_k1z_r32 = 3208,
25662	/// `VPBROADCASTB ymm1 {k1}{z}, r32`
25663	///
25664	/// `EVEX.256.66.0F38.W0 7A /r`
25665	///
25666	/// `AVX512VL and AVX512BW`
25667	///
25668	/// `16/32/64-bit`
25669	EVEX_Vpbroadcastb_ymm_k1z_r32 = 3209,
25670	/// `VPBROADCASTB zmm1 {k1}{z}, r32`
25671	///
25672	/// `EVEX.512.66.0F38.W0 7A /r`
25673	///
25674	/// `AVX512BW`
25675	///
25676	/// `16/32/64-bit`
25677	EVEX_Vpbroadcastb_zmm_k1z_r32 = 3210,
25678	/// `VPBROADCASTW xmm1 {k1}{z}, r32`
25679	///
25680	/// `EVEX.128.66.0F38.W0 7B /r`
25681	///
25682	/// `AVX512VL and AVX512BW`
25683	///
25684	/// `16/32/64-bit`
25685	EVEX_Vpbroadcastw_xmm_k1z_r32 = 3211,
25686	/// `VPBROADCASTW ymm1 {k1}{z}, r32`
25687	///
25688	/// `EVEX.256.66.0F38.W0 7B /r`
25689	///
25690	/// `AVX512VL and AVX512BW`
25691	///
25692	/// `16/32/64-bit`
25693	EVEX_Vpbroadcastw_ymm_k1z_r32 = 3212,
25694	/// `VPBROADCASTW zmm1 {k1}{z}, r32`
25695	///
25696	/// `EVEX.512.66.0F38.W0 7B /r`
25697	///
25698	/// `AVX512BW`
25699	///
25700	/// `16/32/64-bit`
25701	EVEX_Vpbroadcastw_zmm_k1z_r32 = 3213,
25702	/// `VPBROADCASTD xmm1 {k1}{z}, r32`
25703	///
25704	/// `EVEX.128.66.0F38.W0 7C /r`
25705	///
25706	/// `AVX512VL and AVX512F`
25707	///
25708	/// `16/32/64-bit`
25709	EVEX_Vpbroadcastd_xmm_k1z_r32 = 3214,
25710	/// `VPBROADCASTD ymm1 {k1}{z}, r32`
25711	///
25712	/// `EVEX.256.66.0F38.W0 7C /r`
25713	///
25714	/// `AVX512VL and AVX512F`
25715	///
25716	/// `16/32/64-bit`
25717	EVEX_Vpbroadcastd_ymm_k1z_r32 = 3215,
25718	/// `VPBROADCASTD zmm1 {k1}{z}, r32`
25719	///
25720	/// `EVEX.512.66.0F38.W0 7C /r`
25721	///
25722	/// `AVX512F`
25723	///
25724	/// `16/32/64-bit`
25725	EVEX_Vpbroadcastd_zmm_k1z_r32 = 3216,
25726	/// `VPBROADCASTQ xmm1 {k1}{z}, r64`
25727	///
25728	/// `EVEX.128.66.0F38.W1 7C /r`
25729	///
25730	/// `AVX512VL and AVX512F`
25731	///
25732	/// `64-bit`
25733	EVEX_Vpbroadcastq_xmm_k1z_r64 = 3217,
25734	/// `VPBROADCASTQ ymm1 {k1}{z}, r64`
25735	///
25736	/// `EVEX.256.66.0F38.W1 7C /r`
25737	///
25738	/// `AVX512VL and AVX512F`
25739	///
25740	/// `64-bit`
25741	EVEX_Vpbroadcastq_ymm_k1z_r64 = 3218,
25742	/// `VPBROADCASTQ zmm1 {k1}{z}, r64`
25743	///
25744	/// `EVEX.512.66.0F38.W1 7C /r`
25745	///
25746	/// `AVX512F`
25747	///
25748	/// `64-bit`
25749	EVEX_Vpbroadcastq_zmm_k1z_r64 = 3219,
25750	/// `VPERMT2B xmm1 {k1}{z}, xmm2, xmm3/m128`
25751	///
25752	/// `EVEX.128.66.0F38.W0 7D /r`
25753	///
25754	/// `AVX512VL and AVX512_VBMI`
25755	///
25756	/// `16/32/64-bit`
25757	EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128 = 3220,
25758	/// `VPERMT2B ymm1 {k1}{z}, ymm2, ymm3/m256`
25759	///
25760	/// `EVEX.256.66.0F38.W0 7D /r`
25761	///
25762	/// `AVX512VL and AVX512_VBMI`
25763	///
25764	/// `16/32/64-bit`
25765	EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256 = 3221,
25766	/// `VPERMT2B zmm1 {k1}{z}, zmm2, zmm3/m512`
25767	///
25768	/// `EVEX.512.66.0F38.W0 7D /r`
25769	///
25770	/// `AVX512_VBMI`
25771	///
25772	/// `16/32/64-bit`
25773	EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512 = 3222,
25774	/// `VPERMT2W xmm1 {k1}{z}, xmm2, xmm3/m128`
25775	///
25776	/// `EVEX.128.66.0F38.W1 7D /r`
25777	///
25778	/// `AVX512VL and AVX512BW`
25779	///
25780	/// `16/32/64-bit`
25781	EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128 = 3223,
25782	/// `VPERMT2W ymm1 {k1}{z}, ymm2, ymm3/m256`
25783	///
25784	/// `EVEX.256.66.0F38.W1 7D /r`
25785	///
25786	/// `AVX512VL and AVX512BW`
25787	///
25788	/// `16/32/64-bit`
25789	EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256 = 3224,
25790	/// `VPERMT2W zmm1 {k1}{z}, zmm2, zmm3/m512`
25791	///
25792	/// `EVEX.512.66.0F38.W1 7D /r`
25793	///
25794	/// `AVX512BW`
25795	///
25796	/// `16/32/64-bit`
25797	EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512 = 3225,
25798	/// `VPERMT2D xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25799	///
25800	/// `EVEX.128.66.0F38.W0 7E /r`
25801	///
25802	/// `AVX512VL and AVX512F`
25803	///
25804	/// `16/32/64-bit`
25805	EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32 = 3226,
25806	/// `VPERMT2D ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25807	///
25808	/// `EVEX.256.66.0F38.W0 7E /r`
25809	///
25810	/// `AVX512VL and AVX512F`
25811	///
25812	/// `16/32/64-bit`
25813	EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32 = 3227,
25814	/// `VPERMT2D zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25815	///
25816	/// `EVEX.512.66.0F38.W0 7E /r`
25817	///
25818	/// `AVX512F`
25819	///
25820	/// `16/32/64-bit`
25821	EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32 = 3228,
25822	/// `VPERMT2Q xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25823	///
25824	/// `EVEX.128.66.0F38.W1 7E /r`
25825	///
25826	/// `AVX512VL and AVX512F`
25827	///
25828	/// `16/32/64-bit`
25829	EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64 = 3229,
25830	/// `VPERMT2Q ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25831	///
25832	/// `EVEX.256.66.0F38.W1 7E /r`
25833	///
25834	/// `AVX512VL and AVX512F`
25835	///
25836	/// `16/32/64-bit`
25837	EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64 = 3230,
25838	/// `VPERMT2Q zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25839	///
25840	/// `EVEX.512.66.0F38.W1 7E /r`
25841	///
25842	/// `AVX512F`
25843	///
25844	/// `16/32/64-bit`
25845	EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64 = 3231,
25846	/// `VPERMT2PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
25847	///
25848	/// `EVEX.128.66.0F38.W0 7F /r`
25849	///
25850	/// `AVX512VL and AVX512F`
25851	///
25852	/// `16/32/64-bit`
25853	EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32 = 3232,
25854	/// `VPERMT2PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
25855	///
25856	/// `EVEX.256.66.0F38.W0 7F /r`
25857	///
25858	/// `AVX512VL and AVX512F`
25859	///
25860	/// `16/32/64-bit`
25861	EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32 = 3233,
25862	/// `VPERMT2PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst`
25863	///
25864	/// `EVEX.512.66.0F38.W0 7F /r`
25865	///
25866	/// `AVX512F`
25867	///
25868	/// `16/32/64-bit`
25869	EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32 = 3234,
25870	/// `VPERMT2PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25871	///
25872	/// `EVEX.128.66.0F38.W1 7F /r`
25873	///
25874	/// `AVX512VL and AVX512F`
25875	///
25876	/// `16/32/64-bit`
25877	EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64 = 3235,
25878	/// `VPERMT2PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25879	///
25880	/// `EVEX.256.66.0F38.W1 7F /r`
25881	///
25882	/// `AVX512VL and AVX512F`
25883	///
25884	/// `16/32/64-bit`
25885	EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64 = 3236,
25886	/// `VPERMT2PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25887	///
25888	/// `EVEX.512.66.0F38.W1 7F /r`
25889	///
25890	/// `AVX512F`
25891	///
25892	/// `16/32/64-bit`
25893	EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64 = 3237,
25894	/// `INVEPT r32, m128`
25895	///
25896	/// `66 0F 38 80 /r`
25897	///
25898	/// `VMX and IA32_VMX_EPT_VPID_CAP[bit 20]`
25899	///
25900	/// `16/32-bit`
25901	Invept_r32_m128 = 3238,
25902	/// `INVEPT r64, m128`
25903	///
25904	/// `66 0F 38 80 /r`
25905	///
25906	/// `VMX and IA32_VMX_EPT_VPID_CAP[bit 20]`
25907	///
25908	/// `64-bit`
25909	Invept_r64_m128 = 3239,
25910	/// `INVVPID r32, m128`
25911	///
25912	/// `66 0F 38 81 /r`
25913	///
25914	/// `VMX and IA32_VMX_EPT_VPID_CAP[bit 32]`
25915	///
25916	/// `16/32-bit`
25917	Invvpid_r32_m128 = 3240,
25918	/// `INVVPID r64, m128`
25919	///
25920	/// `66 0F 38 81 /r`
25921	///
25922	/// `VMX and IA32_VMX_EPT_VPID_CAP[bit 32]`
25923	///
25924	/// `64-bit`
25925	Invvpid_r64_m128 = 3241,
25926	/// `INVPCID r32, m128`
25927	///
25928	/// `66 0F 38 82 /r`
25929	///
25930	/// `INVPCID`
25931	///
25932	/// `16/32-bit`
25933	Invpcid_r32_m128 = 3242,
25934	/// `INVPCID r64, m128`
25935	///
25936	/// `66 0F 38 82 /r`
25937	///
25938	/// `INVPCID`
25939	///
25940	/// `64-bit`
25941	Invpcid_r64_m128 = 3243,
25942	/// `VPMULTISHIFTQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
25943	///
25944	/// `EVEX.128.66.0F38.W1 83 /r`
25945	///
25946	/// `AVX512VL and AVX512_VBMI`
25947	///
25948	/// `16/32/64-bit`
25949	EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64 = 3244,
25950	/// `VPMULTISHIFTQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
25951	///
25952	/// `EVEX.256.66.0F38.W1 83 /r`
25953	///
25954	/// `AVX512VL and AVX512_VBMI`
25955	///
25956	/// `16/32/64-bit`
25957	EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64 = 3245,
25958	/// `VPMULTISHIFTQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
25959	///
25960	/// `EVEX.512.66.0F38.W1 83 /r`
25961	///
25962	/// `AVX512_VBMI`
25963	///
25964	/// `16/32/64-bit`
25965	EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64 = 3246,
25966	/// `VEXPANDPS xmm1 {k1}{z}, xmm2/m128`
25967	///
25968	/// `EVEX.128.66.0F38.W0 88 /r`
25969	///
25970	/// `AVX512VL and AVX512F`
25971	///
25972	/// `16/32/64-bit`
25973	EVEX_Vexpandps_xmm_k1z_xmmm128 = 3247,
25974	/// `VEXPANDPS ymm1 {k1}{z}, ymm2/m256`
25975	///
25976	/// `EVEX.256.66.0F38.W0 88 /r`
25977	///
25978	/// `AVX512VL and AVX512F`
25979	///
25980	/// `16/32/64-bit`
25981	EVEX_Vexpandps_ymm_k1z_ymmm256 = 3248,
25982	/// `VEXPANDPS zmm1 {k1}{z}, zmm2/m512`
25983	///
25984	/// `EVEX.512.66.0F38.W0 88 /r`
25985	///
25986	/// `AVX512F`
25987	///
25988	/// `16/32/64-bit`
25989	EVEX_Vexpandps_zmm_k1z_zmmm512 = 3249,
25990	/// `VEXPANDPD xmm1 {k1}{z}, xmm2/m128`
25991	///
25992	/// `EVEX.128.66.0F38.W1 88 /r`
25993	///
25994	/// `AVX512VL and AVX512F`
25995	///
25996	/// `16/32/64-bit`
25997	EVEX_Vexpandpd_xmm_k1z_xmmm128 = 3250,
25998	/// `VEXPANDPD ymm1 {k1}{z}, ymm2/m256`
25999	///
26000	/// `EVEX.256.66.0F38.W1 88 /r`
26001	///
26002	/// `AVX512VL and AVX512F`
26003	///
26004	/// `16/32/64-bit`
26005	EVEX_Vexpandpd_ymm_k1z_ymmm256 = 3251,
26006	/// `VEXPANDPD zmm1 {k1}{z}, zmm2/m512`
26007	///
26008	/// `EVEX.512.66.0F38.W1 88 /r`
26009	///
26010	/// `AVX512F`
26011	///
26012	/// `16/32/64-bit`
26013	EVEX_Vexpandpd_zmm_k1z_zmmm512 = 3252,
26014	/// `VPEXPANDD xmm1 {k1}{z}, xmm2/m128`
26015	///
26016	/// `EVEX.128.66.0F38.W0 89 /r`
26017	///
26018	/// `AVX512VL and AVX512F`
26019	///
26020	/// `16/32/64-bit`
26021	EVEX_Vpexpandd_xmm_k1z_xmmm128 = 3253,
26022	/// `VPEXPANDD ymm1 {k1}{z}, ymm2/m256`
26023	///
26024	/// `EVEX.256.66.0F38.W0 89 /r`
26025	///
26026	/// `AVX512VL and AVX512F`
26027	///
26028	/// `16/32/64-bit`
26029	EVEX_Vpexpandd_ymm_k1z_ymmm256 = 3254,
26030	/// `VPEXPANDD zmm1 {k1}{z}, zmm2/m512`
26031	///
26032	/// `EVEX.512.66.0F38.W0 89 /r`
26033	///
26034	/// `AVX512F`
26035	///
26036	/// `16/32/64-bit`
26037	EVEX_Vpexpandd_zmm_k1z_zmmm512 = 3255,
26038	/// `VPEXPANDQ xmm1 {k1}{z}, xmm2/m128`
26039	///
26040	/// `EVEX.128.66.0F38.W1 89 /r`
26041	///
26042	/// `AVX512VL and AVX512F`
26043	///
26044	/// `16/32/64-bit`
26045	EVEX_Vpexpandq_xmm_k1z_xmmm128 = 3256,
26046	/// `VPEXPANDQ ymm1 {k1}{z}, ymm2/m256`
26047	///
26048	/// `EVEX.256.66.0F38.W1 89 /r`
26049	///
26050	/// `AVX512VL and AVX512F`
26051	///
26052	/// `16/32/64-bit`
26053	EVEX_Vpexpandq_ymm_k1z_ymmm256 = 3257,
26054	/// `VPEXPANDQ zmm1 {k1}{z}, zmm2/m512`
26055	///
26056	/// `EVEX.512.66.0F38.W1 89 /r`
26057	///
26058	/// `AVX512F`
26059	///
26060	/// `16/32/64-bit`
26061	EVEX_Vpexpandq_zmm_k1z_zmmm512 = 3258,
26062	/// `VCOMPRESSPS xmm1/m128 {k1}{z}, xmm2`
26063	///
26064	/// `EVEX.128.66.0F38.W0 8A /r`
26065	///
26066	/// `AVX512VL and AVX512F`
26067	///
26068	/// `16/32/64-bit`
26069	EVEX_Vcompressps_xmmm128_k1z_xmm = 3259,
26070	/// `VCOMPRESSPS ymm1/m256 {k1}{z}, ymm2`
26071	///
26072	/// `EVEX.256.66.0F38.W0 8A /r`
26073	///
26074	/// `AVX512VL and AVX512F`
26075	///
26076	/// `16/32/64-bit`
26077	EVEX_Vcompressps_ymmm256_k1z_ymm = 3260,
26078	/// `VCOMPRESSPS zmm1/m512 {k1}{z}, zmm2`
26079	///
26080	/// `EVEX.512.66.0F38.W0 8A /r`
26081	///
26082	/// `AVX512F`
26083	///
26084	/// `16/32/64-bit`
26085	EVEX_Vcompressps_zmmm512_k1z_zmm = 3261,
26086	/// `VCOMPRESSPD xmm1/m128 {k1}{z}, xmm2`
26087	///
26088	/// `EVEX.128.66.0F38.W1 8A /r`
26089	///
26090	/// `AVX512VL and AVX512F`
26091	///
26092	/// `16/32/64-bit`
26093	EVEX_Vcompresspd_xmmm128_k1z_xmm = 3262,
26094	/// `VCOMPRESSPD ymm1/m256 {k1}{z}, ymm2`
26095	///
26096	/// `EVEX.256.66.0F38.W1 8A /r`
26097	///
26098	/// `AVX512VL and AVX512F`
26099	///
26100	/// `16/32/64-bit`
26101	EVEX_Vcompresspd_ymmm256_k1z_ymm = 3263,
26102	/// `VCOMPRESSPD zmm1/m512 {k1}{z}, zmm2`
26103	///
26104	/// `EVEX.512.66.0F38.W1 8A /r`
26105	///
26106	/// `AVX512F`
26107	///
26108	/// `16/32/64-bit`
26109	EVEX_Vcompresspd_zmmm512_k1z_zmm = 3264,
26110	/// `VPCOMPRESSD xmm1/m128 {k1}{z}, xmm2`
26111	///
26112	/// `EVEX.128.66.0F38.W0 8B /r`
26113	///
26114	/// `AVX512VL and AVX512F`
26115	///
26116	/// `16/32/64-bit`
26117	EVEX_Vpcompressd_xmmm128_k1z_xmm = 3265,
26118	/// `VPCOMPRESSD ymm1/m256 {k1}{z}, ymm2`
26119	///
26120	/// `EVEX.256.66.0F38.W0 8B /r`
26121	///
26122	/// `AVX512VL and AVX512F`
26123	///
26124	/// `16/32/64-bit`
26125	EVEX_Vpcompressd_ymmm256_k1z_ymm = 3266,
26126	/// `VPCOMPRESSD zmm1/m512 {k1}{z}, zmm2`
26127	///
26128	/// `EVEX.512.66.0F38.W0 8B /r`
26129	///
26130	/// `AVX512F`
26131	///
26132	/// `16/32/64-bit`
26133	EVEX_Vpcompressd_zmmm512_k1z_zmm = 3267,
26134	/// `VPCOMPRESSQ xmm1/m128 {k1}{z}, xmm2`
26135	///
26136	/// `EVEX.128.66.0F38.W1 8B /r`
26137	///
26138	/// `AVX512VL and AVX512F`
26139	///
26140	/// `16/32/64-bit`
26141	EVEX_Vpcompressq_xmmm128_k1z_xmm = 3268,
26142	/// `VPCOMPRESSQ ymm1/m256 {k1}{z}, ymm2`
26143	///
26144	/// `EVEX.256.66.0F38.W1 8B /r`
26145	///
26146	/// `AVX512VL and AVX512F`
26147	///
26148	/// `16/32/64-bit`
26149	EVEX_Vpcompressq_ymmm256_k1z_ymm = 3269,
26150	/// `VPCOMPRESSQ zmm1/m512 {k1}{z}, zmm2`
26151	///
26152	/// `EVEX.512.66.0F38.W1 8B /r`
26153	///
26154	/// `AVX512F`
26155	///
26156	/// `16/32/64-bit`
26157	EVEX_Vpcompressq_zmmm512_k1z_zmm = 3270,
26158	/// `VPMASKMOVD xmm1, xmm2, m128`
26159	///
26160	/// `VEX.128.66.0F38.W0 8C /r`
26161	///
26162	/// `AVX2`
26163	///
26164	/// `16/32/64-bit`
26165	VEX_Vpmaskmovd_xmm_xmm_m128 = 3271,
26166	/// `VPMASKMOVD ymm1, ymm2, m256`
26167	///
26168	/// `VEX.256.66.0F38.W0 8C /r`
26169	///
26170	/// `AVX2`
26171	///
26172	/// `16/32/64-bit`
26173	VEX_Vpmaskmovd_ymm_ymm_m256 = 3272,
26174	/// `VPMASKMOVQ xmm1, xmm2, m128`
26175	///
26176	/// `VEX.128.66.0F38.W1 8C /r`
26177	///
26178	/// `AVX2`
26179	///
26180	/// `16/32/64-bit`
26181	VEX_Vpmaskmovq_xmm_xmm_m128 = 3273,
26182	/// `VPMASKMOVQ ymm1, ymm2, m256`
26183	///
26184	/// `VEX.256.66.0F38.W1 8C /r`
26185	///
26186	/// `AVX2`
26187	///
26188	/// `16/32/64-bit`
26189	VEX_Vpmaskmovq_ymm_ymm_m256 = 3274,
26190	/// `VPERMB xmm1 {k1}{z}, xmm2, xmm3/m128`
26191	///
26192	/// `EVEX.128.66.0F38.W0 8D /r`
26193	///
26194	/// `AVX512VL and AVX512_VBMI`
26195	///
26196	/// `16/32/64-bit`
26197	EVEX_Vpermb_xmm_k1z_xmm_xmmm128 = 3275,
26198	/// `VPERMB ymm1 {k1}{z}, ymm2, ymm3/m256`
26199	///
26200	/// `EVEX.256.66.0F38.W0 8D /r`
26201	///
26202	/// `AVX512VL and AVX512_VBMI`
26203	///
26204	/// `16/32/64-bit`
26205	EVEX_Vpermb_ymm_k1z_ymm_ymmm256 = 3276,
26206	/// `VPERMB zmm1 {k1}{z}, zmm2, zmm3/m512`
26207	///
26208	/// `EVEX.512.66.0F38.W0 8D /r`
26209	///
26210	/// `AVX512_VBMI`
26211	///
26212	/// `16/32/64-bit`
26213	EVEX_Vpermb_zmm_k1z_zmm_zmmm512 = 3277,
26214	/// `VPERMW xmm1 {k1}{z}, xmm2, xmm3/m128`
26215	///
26216	/// `EVEX.128.66.0F38.W1 8D /r`
26217	///
26218	/// `AVX512VL and AVX512BW`
26219	///
26220	/// `16/32/64-bit`
26221	EVEX_Vpermw_xmm_k1z_xmm_xmmm128 = 3278,
26222	/// `VPERMW ymm1 {k1}{z}, ymm2, ymm3/m256`
26223	///
26224	/// `EVEX.256.66.0F38.W1 8D /r`
26225	///
26226	/// `AVX512VL and AVX512BW`
26227	///
26228	/// `16/32/64-bit`
26229	EVEX_Vpermw_ymm_k1z_ymm_ymmm256 = 3279,
26230	/// `VPERMW zmm1 {k1}{z}, zmm2, zmm3/m512`
26231	///
26232	/// `EVEX.512.66.0F38.W1 8D /r`
26233	///
26234	/// `AVX512BW`
26235	///
26236	/// `16/32/64-bit`
26237	EVEX_Vpermw_zmm_k1z_zmm_zmmm512 = 3280,
26238	/// `VPMASKMOVD m128, xmm1, xmm2`
26239	///
26240	/// `VEX.128.66.0F38.W0 8E /r`
26241	///
26242	/// `AVX2`
26243	///
26244	/// `16/32/64-bit`
26245	VEX_Vpmaskmovd_m128_xmm_xmm = 3281,
26246	/// `VPMASKMOVD m256, ymm1, ymm2`
26247	///
26248	/// `VEX.256.66.0F38.W0 8E /r`
26249	///
26250	/// `AVX2`
26251	///
26252	/// `16/32/64-bit`
26253	VEX_Vpmaskmovd_m256_ymm_ymm = 3282,
26254	/// `VPMASKMOVQ m128, xmm1, xmm2`
26255	///
26256	/// `VEX.128.66.0F38.W1 8E /r`
26257	///
26258	/// `AVX2`
26259	///
26260	/// `16/32/64-bit`
26261	VEX_Vpmaskmovq_m128_xmm_xmm = 3283,
26262	/// `VPMASKMOVQ m256, ymm1, ymm2`
26263	///
26264	/// `VEX.256.66.0F38.W1 8E /r`
26265	///
26266	/// `AVX2`
26267	///
26268	/// `16/32/64-bit`
26269	VEX_Vpmaskmovq_m256_ymm_ymm = 3284,
26270	/// `VPSHUFBITQMB k1 {k2}, xmm2, xmm3/m128`
26271	///
26272	/// `EVEX.128.66.0F38.W0 8F /r`
26273	///
26274	/// `AVX512VL and AVX512_BITALG`
26275	///
26276	/// `16/32/64-bit`
26277	EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128 = 3285,
26278	/// `VPSHUFBITQMB k1 {k2}, ymm2, ymm3/m256`
26279	///
26280	/// `EVEX.256.66.0F38.W0 8F /r`
26281	///
26282	/// `AVX512VL and AVX512_BITALG`
26283	///
26284	/// `16/32/64-bit`
26285	EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256 = 3286,
26286	/// `VPSHUFBITQMB k1 {k2}, zmm2, zmm3/m512`
26287	///
26288	/// `EVEX.512.66.0F38.W0 8F /r`
26289	///
26290	/// `AVX512_BITALG`
26291	///
26292	/// `16/32/64-bit`
26293	EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512 = 3287,
26294	/// `VPGATHERDD xmm1, vm32x, xmm2`
26295	///
26296	/// `VEX.128.66.0F38.W0 90 /r`
26297	///
26298	/// `AVX2`
26299	///
26300	/// `16/32/64-bit`
26301	VEX_Vpgatherdd_xmm_vm32x_xmm = 3288,
26302	/// `VPGATHERDD ymm1, vm32y, ymm2`
26303	///
26304	/// `VEX.256.66.0F38.W0 90 /r`
26305	///
26306	/// `AVX2`
26307	///
26308	/// `16/32/64-bit`
26309	VEX_Vpgatherdd_ymm_vm32y_ymm = 3289,
26310	/// `VPGATHERDQ xmm1, vm32x, xmm2`
26311	///
26312	/// `VEX.128.66.0F38.W1 90 /r`
26313	///
26314	/// `AVX2`
26315	///
26316	/// `16/32/64-bit`
26317	VEX_Vpgatherdq_xmm_vm32x_xmm = 3290,
26318	/// `VPGATHERDQ ymm1, vm32x, ymm2`
26319	///
26320	/// `VEX.256.66.0F38.W1 90 /r`
26321	///
26322	/// `AVX2`
26323	///
26324	/// `16/32/64-bit`
26325	VEX_Vpgatherdq_ymm_vm32x_ymm = 3291,
26326	/// `VPGATHERDD xmm1 {k1}, vm32x`
26327	///
26328	/// `EVEX.128.66.0F38.W0 90 /vsib`
26329	///
26330	/// `AVX512VL and AVX512F`
26331	///
26332	/// `16/32/64-bit`
26333	EVEX_Vpgatherdd_xmm_k1_vm32x = 3292,
26334	/// `VPGATHERDD ymm1 {k1}, vm32y`
26335	///
26336	/// `EVEX.256.66.0F38.W0 90 /vsib`
26337	///
26338	/// `AVX512VL and AVX512F`
26339	///
26340	/// `16/32/64-bit`
26341	EVEX_Vpgatherdd_ymm_k1_vm32y = 3293,
26342	/// `VPGATHERDD zmm1 {k1}, vm32z`
26343	///
26344	/// `EVEX.512.66.0F38.W0 90 /vsib`
26345	///
26346	/// `AVX512F`
26347	///
26348	/// `16/32/64-bit`
26349	EVEX_Vpgatherdd_zmm_k1_vm32z = 3294,
26350	/// `VPGATHERDQ xmm1 {k1}, vm32x`
26351	///
26352	/// `EVEX.128.66.0F38.W1 90 /vsib`
26353	///
26354	/// `AVX512VL and AVX512F`
26355	///
26356	/// `16/32/64-bit`
26357	EVEX_Vpgatherdq_xmm_k1_vm32x = 3295,
26358	/// `VPGATHERDQ ymm1 {k1}, vm32x`
26359	///
26360	/// `EVEX.256.66.0F38.W1 90 /vsib`
26361	///
26362	/// `AVX512VL and AVX512F`
26363	///
26364	/// `16/32/64-bit`
26365	EVEX_Vpgatherdq_ymm_k1_vm32x = 3296,
26366	/// `VPGATHERDQ zmm1 {k1}, vm32y`
26367	///
26368	/// `EVEX.512.66.0F38.W1 90 /vsib`
26369	///
26370	/// `AVX512F`
26371	///
26372	/// `16/32/64-bit`
26373	EVEX_Vpgatherdq_zmm_k1_vm32y = 3297,
26374	/// `VPGATHERQD xmm1, vm64x, xmm2`
26375	///
26376	/// `VEX.128.66.0F38.W0 91 /r`
26377	///
26378	/// `AVX2`
26379	///
26380	/// `16/32/64-bit`
26381	VEX_Vpgatherqd_xmm_vm64x_xmm = 3298,
26382	/// `VPGATHERQD xmm1, vm64y, xmm2`
26383	///
26384	/// `VEX.256.66.0F38.W0 91 /r`
26385	///
26386	/// `AVX2`
26387	///
26388	/// `16/32/64-bit`
26389	VEX_Vpgatherqd_xmm_vm64y_xmm = 3299,
26390	/// `VPGATHERQQ xmm1, vm64x, xmm2`
26391	///
26392	/// `VEX.128.66.0F38.W1 91 /r`
26393	///
26394	/// `AVX2`
26395	///
26396	/// `16/32/64-bit`
26397	VEX_Vpgatherqq_xmm_vm64x_xmm = 3300,
26398	/// `VPGATHERQQ ymm1, vm64y, ymm2`
26399	///
26400	/// `VEX.256.66.0F38.W1 91 /r`
26401	///
26402	/// `AVX2`
26403	///
26404	/// `16/32/64-bit`
26405	VEX_Vpgatherqq_ymm_vm64y_ymm = 3301,
26406	/// `VPGATHERQD xmm1 {k1}, vm64x`
26407	///
26408	/// `EVEX.128.66.0F38.W0 91 /vsib`
26409	///
26410	/// `AVX512VL and AVX512F`
26411	///
26412	/// `16/32/64-bit`
26413	EVEX_Vpgatherqd_xmm_k1_vm64x = 3302,
26414	/// `VPGATHERQD xmm1 {k1}, vm64y`
26415	///
26416	/// `EVEX.256.66.0F38.W0 91 /vsib`
26417	///
26418	/// `AVX512VL and AVX512F`
26419	///
26420	/// `16/32/64-bit`
26421	EVEX_Vpgatherqd_xmm_k1_vm64y = 3303,
26422	/// `VPGATHERQD ymm1 {k1}, vm64z`
26423	///
26424	/// `EVEX.512.66.0F38.W0 91 /vsib`
26425	///
26426	/// `AVX512F`
26427	///
26428	/// `16/32/64-bit`
26429	EVEX_Vpgatherqd_ymm_k1_vm64z = 3304,
26430	/// `VPGATHERQQ xmm1 {k1}, vm64x`
26431	///
26432	/// `EVEX.128.66.0F38.W1 91 /vsib`
26433	///
26434	/// `AVX512VL and AVX512F`
26435	///
26436	/// `16/32/64-bit`
26437	EVEX_Vpgatherqq_xmm_k1_vm64x = 3305,
26438	/// `VPGATHERQQ ymm1 {k1}, vm64y`
26439	///
26440	/// `EVEX.256.66.0F38.W1 91 /vsib`
26441	///
26442	/// `AVX512VL and AVX512F`
26443	///
26444	/// `16/32/64-bit`
26445	EVEX_Vpgatherqq_ymm_k1_vm64y = 3306,
26446	/// `VPGATHERQQ zmm1 {k1}, vm64z`
26447	///
26448	/// `EVEX.512.66.0F38.W1 91 /vsib`
26449	///
26450	/// `AVX512F`
26451	///
26452	/// `16/32/64-bit`
26453	EVEX_Vpgatherqq_zmm_k1_vm64z = 3307,
26454	/// `VGATHERDPS xmm1, vm32x, xmm2`
26455	///
26456	/// `VEX.128.66.0F38.W0 92 /r`
26457	///
26458	/// `AVX2`
26459	///
26460	/// `16/32/64-bit`
26461	VEX_Vgatherdps_xmm_vm32x_xmm = 3308,
26462	/// `VGATHERDPS ymm1, vm32y, ymm2`
26463	///
26464	/// `VEX.256.66.0F38.W0 92 /r`
26465	///
26466	/// `AVX2`
26467	///
26468	/// `16/32/64-bit`
26469	VEX_Vgatherdps_ymm_vm32y_ymm = 3309,
26470	/// `VGATHERDPD xmm1, vm32x, xmm2`
26471	///
26472	/// `VEX.128.66.0F38.W1 92 /r`
26473	///
26474	/// `AVX2`
26475	///
26476	/// `16/32/64-bit`
26477	VEX_Vgatherdpd_xmm_vm32x_xmm = 3310,
26478	/// `VGATHERDPD ymm1, vm32x, ymm2`
26479	///
26480	/// `VEX.256.66.0F38.W1 92 /r`
26481	///
26482	/// `AVX2`
26483	///
26484	/// `16/32/64-bit`
26485	VEX_Vgatherdpd_ymm_vm32x_ymm = 3311,
26486	/// `VGATHERDPS xmm1 {k1}, vm32x`
26487	///
26488	/// `EVEX.128.66.0F38.W0 92 /vsib`
26489	///
26490	/// `AVX512VL and AVX512F`
26491	///
26492	/// `16/32/64-bit`
26493	EVEX_Vgatherdps_xmm_k1_vm32x = 3312,
26494	/// `VGATHERDPS ymm1 {k1}, vm32y`
26495	///
26496	/// `EVEX.256.66.0F38.W0 92 /vsib`
26497	///
26498	/// `AVX512VL and AVX512F`
26499	///
26500	/// `16/32/64-bit`
26501	EVEX_Vgatherdps_ymm_k1_vm32y = 3313,
26502	/// `VGATHERDPS zmm1 {k1}, vm32z`
26503	///
26504	/// `EVEX.512.66.0F38.W0 92 /vsib`
26505	///
26506	/// `AVX512F`
26507	///
26508	/// `16/32/64-bit`
26509	EVEX_Vgatherdps_zmm_k1_vm32z = 3314,
26510	/// `VGATHERDPD xmm1 {k1}, vm32x`
26511	///
26512	/// `EVEX.128.66.0F38.W1 92 /vsib`
26513	///
26514	/// `AVX512VL and AVX512F`
26515	///
26516	/// `16/32/64-bit`
26517	EVEX_Vgatherdpd_xmm_k1_vm32x = 3315,
26518	/// `VGATHERDPD ymm1 {k1}, vm32x`
26519	///
26520	/// `EVEX.256.66.0F38.W1 92 /vsib`
26521	///
26522	/// `AVX512VL and AVX512F`
26523	///
26524	/// `16/32/64-bit`
26525	EVEX_Vgatherdpd_ymm_k1_vm32x = 3316,
26526	/// `VGATHERDPD zmm1 {k1}, vm32y`
26527	///
26528	/// `EVEX.512.66.0F38.W1 92 /vsib`
26529	///
26530	/// `AVX512F`
26531	///
26532	/// `16/32/64-bit`
26533	EVEX_Vgatherdpd_zmm_k1_vm32y = 3317,
26534	/// `VGATHERQPS xmm1, vm64x, xmm2`
26535	///
26536	/// `VEX.128.66.0F38.W0 93 /r`
26537	///
26538	/// `AVX2`
26539	///
26540	/// `16/32/64-bit`
26541	VEX_Vgatherqps_xmm_vm64x_xmm = 3318,
26542	/// `VGATHERQPS xmm1, vm64y, xmm2`
26543	///
26544	/// `VEX.256.66.0F38.W0 93 /r`
26545	///
26546	/// `AVX2`
26547	///
26548	/// `16/32/64-bit`
26549	VEX_Vgatherqps_xmm_vm64y_xmm = 3319,
26550	/// `VGATHERQPD xmm1, vm64x, xmm2`
26551	///
26552	/// `VEX.128.66.0F38.W1 93 /r`
26553	///
26554	/// `AVX2`
26555	///
26556	/// `16/32/64-bit`
26557	VEX_Vgatherqpd_xmm_vm64x_xmm = 3320,
26558	/// `VGATHERQPD ymm1, vm64y, ymm2`
26559	///
26560	/// `VEX.256.66.0F38.W1 93 /r`
26561	///
26562	/// `AVX2`
26563	///
26564	/// `16/32/64-bit`
26565	VEX_Vgatherqpd_ymm_vm64y_ymm = 3321,
26566	/// `VGATHERQPS xmm1 {k1}, vm64x`
26567	///
26568	/// `EVEX.128.66.0F38.W0 93 /vsib`
26569	///
26570	/// `AVX512VL and AVX512F`
26571	///
26572	/// `16/32/64-bit`
26573	EVEX_Vgatherqps_xmm_k1_vm64x = 3322,
26574	/// `VGATHERQPS xmm1 {k1}, vm64y`
26575	///
26576	/// `EVEX.256.66.0F38.W0 93 /vsib`
26577	///
26578	/// `AVX512VL and AVX512F`
26579	///
26580	/// `16/32/64-bit`
26581	EVEX_Vgatherqps_xmm_k1_vm64y = 3323,
26582	/// `VGATHERQPS ymm1 {k1}, vm64z`
26583	///
26584	/// `EVEX.512.66.0F38.W0 93 /vsib`
26585	///
26586	/// `AVX512F`
26587	///
26588	/// `16/32/64-bit`
26589	EVEX_Vgatherqps_ymm_k1_vm64z = 3324,
26590	/// `VGATHERQPD xmm1 {k1}, vm64x`
26591	///
26592	/// `EVEX.128.66.0F38.W1 93 /vsib`
26593	///
26594	/// `AVX512VL and AVX512F`
26595	///
26596	/// `16/32/64-bit`
26597	EVEX_Vgatherqpd_xmm_k1_vm64x = 3325,
26598	/// `VGATHERQPD ymm1 {k1}, vm64y`
26599	///
26600	/// `EVEX.256.66.0F38.W1 93 /vsib`
26601	///
26602	/// `AVX512VL and AVX512F`
26603	///
26604	/// `16/32/64-bit`
26605	EVEX_Vgatherqpd_ymm_k1_vm64y = 3326,
26606	/// `VGATHERQPD zmm1 {k1}, vm64z`
26607	///
26608	/// `EVEX.512.66.0F38.W1 93 /vsib`
26609	///
26610	/// `AVX512F`
26611	///
26612	/// `16/32/64-bit`
26613	EVEX_Vgatherqpd_zmm_k1_vm64z = 3327,
26614	/// `VFMADDSUB132PS xmm1, xmm2, xmm3/m128`
26615	///
26616	/// `VEX.128.66.0F38.W0 96 /r`
26617	///
26618	/// `FMA`
26619	///
26620	/// `16/32/64-bit`
26621	VEX_Vfmaddsub132ps_xmm_xmm_xmmm128 = 3328,
26622	/// `VFMADDSUB132PS ymm1, ymm2, ymm3/m256`
26623	///
26624	/// `VEX.256.66.0F38.W0 96 /r`
26625	///
26626	/// `FMA`
26627	///
26628	/// `16/32/64-bit`
26629	VEX_Vfmaddsub132ps_ymm_ymm_ymmm256 = 3329,
26630	/// `VFMADDSUB132PD xmm1, xmm2, xmm3/m128`
26631	///
26632	/// `VEX.128.66.0F38.W1 96 /r`
26633	///
26634	/// `FMA`
26635	///
26636	/// `16/32/64-bit`
26637	VEX_Vfmaddsub132pd_xmm_xmm_xmmm128 = 3330,
26638	/// `VFMADDSUB132PD ymm1, ymm2, ymm3/m256`
26639	///
26640	/// `VEX.256.66.0F38.W1 96 /r`
26641	///
26642	/// `FMA`
26643	///
26644	/// `16/32/64-bit`
26645	VEX_Vfmaddsub132pd_ymm_ymm_ymmm256 = 3331,
26646	/// `VFMADDSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
26647	///
26648	/// `EVEX.128.66.0F38.W0 96 /r`
26649	///
26650	/// `AVX512VL and AVX512F`
26651	///
26652	/// `16/32/64-bit`
26653	EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32 = 3332,
26654	/// `VFMADDSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
26655	///
26656	/// `EVEX.256.66.0F38.W0 96 /r`
26657	///
26658	/// `AVX512VL and AVX512F`
26659	///
26660	/// `16/32/64-bit`
26661	EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32 = 3333,
26662	/// `VFMADDSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
26663	///
26664	/// `EVEX.512.66.0F38.W0 96 /r`
26665	///
26666	/// `AVX512F`
26667	///
26668	/// `16/32/64-bit`
26669	EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3334,
26670	/// `VFMADDSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
26671	///
26672	/// `EVEX.128.66.0F38.W1 96 /r`
26673	///
26674	/// `AVX512VL and AVX512F`
26675	///
26676	/// `16/32/64-bit`
26677	EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64 = 3335,
26678	/// `VFMADDSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
26679	///
26680	/// `EVEX.256.66.0F38.W1 96 /r`
26681	///
26682	/// `AVX512VL and AVX512F`
26683	///
26684	/// `16/32/64-bit`
26685	EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64 = 3336,
26686	/// `VFMADDSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
26687	///
26688	/// `EVEX.512.66.0F38.W1 96 /r`
26689	///
26690	/// `AVX512F`
26691	///
26692	/// `16/32/64-bit`
26693	EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3337,
26694	/// `VFMSUBADD132PS xmm1, xmm2, xmm3/m128`
26695	///
26696	/// `VEX.128.66.0F38.W0 97 /r`
26697	///
26698	/// `FMA`
26699	///
26700	/// `16/32/64-bit`
26701	VEX_Vfmsubadd132ps_xmm_xmm_xmmm128 = 3338,
26702	/// `VFMSUBADD132PS ymm1, ymm2, ymm3/m256`
26703	///
26704	/// `VEX.256.66.0F38.W0 97 /r`
26705	///
26706	/// `FMA`
26707	///
26708	/// `16/32/64-bit`
26709	VEX_Vfmsubadd132ps_ymm_ymm_ymmm256 = 3339,
26710	/// `VFMSUBADD132PD xmm1, xmm2, xmm3/m128`
26711	///
26712	/// `VEX.128.66.0F38.W1 97 /r`
26713	///
26714	/// `FMA`
26715	///
26716	/// `16/32/64-bit`
26717	VEX_Vfmsubadd132pd_xmm_xmm_xmmm128 = 3340,
26718	/// `VFMSUBADD132PD ymm1, ymm2, ymm3/m256`
26719	///
26720	/// `VEX.256.66.0F38.W1 97 /r`
26721	///
26722	/// `FMA`
26723	///
26724	/// `16/32/64-bit`
26725	VEX_Vfmsubadd132pd_ymm_ymm_ymmm256 = 3341,
26726	/// `VFMSUBADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
26727	///
26728	/// `EVEX.128.66.0F38.W0 97 /r`
26729	///
26730	/// `AVX512VL and AVX512F`
26731	///
26732	/// `16/32/64-bit`
26733	EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32 = 3342,
26734	/// `VFMSUBADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
26735	///
26736	/// `EVEX.256.66.0F38.W0 97 /r`
26737	///
26738	/// `AVX512VL and AVX512F`
26739	///
26740	/// `16/32/64-bit`
26741	EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32 = 3343,
26742	/// `VFMSUBADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
26743	///
26744	/// `EVEX.512.66.0F38.W0 97 /r`
26745	///
26746	/// `AVX512F`
26747	///
26748	/// `16/32/64-bit`
26749	EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3344,
26750	/// `VFMSUBADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
26751	///
26752	/// `EVEX.128.66.0F38.W1 97 /r`
26753	///
26754	/// `AVX512VL and AVX512F`
26755	///
26756	/// `16/32/64-bit`
26757	EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64 = 3345,
26758	/// `VFMSUBADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
26759	///
26760	/// `EVEX.256.66.0F38.W1 97 /r`
26761	///
26762	/// `AVX512VL and AVX512F`
26763	///
26764	/// `16/32/64-bit`
26765	EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64 = 3346,
26766	/// `VFMSUBADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
26767	///
26768	/// `EVEX.512.66.0F38.W1 97 /r`
26769	///
26770	/// `AVX512F`
26771	///
26772	/// `16/32/64-bit`
26773	EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3347,
26774	/// `VFMADD132PS xmm1, xmm2, xmm3/m128`
26775	///
26776	/// `VEX.128.66.0F38.W0 98 /r`
26777	///
26778	/// `FMA`
26779	///
26780	/// `16/32/64-bit`
26781	VEX_Vfmadd132ps_xmm_xmm_xmmm128 = 3348,
26782	/// `VFMADD132PS ymm1, ymm2, ymm3/m256`
26783	///
26784	/// `VEX.256.66.0F38.W0 98 /r`
26785	///
26786	/// `FMA`
26787	///
26788	/// `16/32/64-bit`
26789	VEX_Vfmadd132ps_ymm_ymm_ymmm256 = 3349,
26790	/// `VFMADD132PD xmm1, xmm2, xmm3/m128`
26791	///
26792	/// `VEX.128.66.0F38.W1 98 /r`
26793	///
26794	/// `FMA`
26795	///
26796	/// `16/32/64-bit`
26797	VEX_Vfmadd132pd_xmm_xmm_xmmm128 = 3350,
26798	/// `VFMADD132PD ymm1, ymm2, ymm3/m256`
26799	///
26800	/// `VEX.256.66.0F38.W1 98 /r`
26801	///
26802	/// `FMA`
26803	///
26804	/// `16/32/64-bit`
26805	VEX_Vfmadd132pd_ymm_ymm_ymmm256 = 3351,
26806	/// `VFMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
26807	///
26808	/// `EVEX.128.66.0F38.W0 98 /r`
26809	///
26810	/// `AVX512VL and AVX512F`
26811	///
26812	/// `16/32/64-bit`
26813	EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32 = 3352,
26814	/// `VFMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
26815	///
26816	/// `EVEX.256.66.0F38.W0 98 /r`
26817	///
26818	/// `AVX512VL and AVX512F`
26819	///
26820	/// `16/32/64-bit`
26821	EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32 = 3353,
26822	/// `VFMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
26823	///
26824	/// `EVEX.512.66.0F38.W0 98 /r`
26825	///
26826	/// `AVX512F`
26827	///
26828	/// `16/32/64-bit`
26829	EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3354,
26830	/// `VFMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
26831	///
26832	/// `EVEX.128.66.0F38.W1 98 /r`
26833	///
26834	/// `AVX512VL and AVX512F`
26835	///
26836	/// `16/32/64-bit`
26837	EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64 = 3355,
26838	/// `VFMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
26839	///
26840	/// `EVEX.256.66.0F38.W1 98 /r`
26841	///
26842	/// `AVX512VL and AVX512F`
26843	///
26844	/// `16/32/64-bit`
26845	EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64 = 3356,
26846	/// `VFMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
26847	///
26848	/// `EVEX.512.66.0F38.W1 98 /r`
26849	///
26850	/// `AVX512F`
26851	///
26852	/// `16/32/64-bit`
26853	EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3357,
26854	/// `VFMADD132SS xmm1, xmm2, xmm3/m32`
26855	///
26856	/// `VEX.LIG.66.0F38.W0 99 /r`
26857	///
26858	/// `FMA`
26859	///
26860	/// `16/32/64-bit`
26861	VEX_Vfmadd132ss_xmm_xmm_xmmm32 = 3358,
26862	/// `VFMADD132SD xmm1, xmm2, xmm3/m64`
26863	///
26864	/// `VEX.LIG.66.0F38.W1 99 /r`
26865	///
26866	/// `FMA`
26867	///
26868	/// `16/32/64-bit`
26869	VEX_Vfmadd132sd_xmm_xmm_xmmm64 = 3359,
26870	/// `VFMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
26871	///
26872	/// `EVEX.LIG.66.0F38.W0 99 /r`
26873	///
26874	/// `AVX512F`
26875	///
26876	/// `16/32/64-bit`
26877	EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er = 3360,
26878	/// `VFMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
26879	///
26880	/// `EVEX.LIG.66.0F38.W1 99 /r`
26881	///
26882	/// `AVX512F`
26883	///
26884	/// `16/32/64-bit`
26885	EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er = 3361,
26886	/// `VFMSUB132PS xmm1, xmm2, xmm3/m128`
26887	///
26888	/// `VEX.128.66.0F38.W0 9A /r`
26889	///
26890	/// `FMA`
26891	///
26892	/// `16/32/64-bit`
26893	VEX_Vfmsub132ps_xmm_xmm_xmmm128 = 3362,
26894	/// `VFMSUB132PS ymm1, ymm2, ymm3/m256`
26895	///
26896	/// `VEX.256.66.0F38.W0 9A /r`
26897	///
26898	/// `FMA`
26899	///
26900	/// `16/32/64-bit`
26901	VEX_Vfmsub132ps_ymm_ymm_ymmm256 = 3363,
26902	/// `VFMSUB132PD xmm1, xmm2, xmm3/m128`
26903	///
26904	/// `VEX.128.66.0F38.W1 9A /r`
26905	///
26906	/// `FMA`
26907	///
26908	/// `16/32/64-bit`
26909	VEX_Vfmsub132pd_xmm_xmm_xmmm128 = 3364,
26910	/// `VFMSUB132PD ymm1, ymm2, ymm3/m256`
26911	///
26912	/// `VEX.256.66.0F38.W1 9A /r`
26913	///
26914	/// `FMA`
26915	///
26916	/// `16/32/64-bit`
26917	VEX_Vfmsub132pd_ymm_ymm_ymmm256 = 3365,
26918	/// `VFMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
26919	///
26920	/// `EVEX.128.66.0F38.W0 9A /r`
26921	///
26922	/// `AVX512VL and AVX512F`
26923	///
26924	/// `16/32/64-bit`
26925	EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32 = 3366,
26926	/// `VFMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
26927	///
26928	/// `EVEX.256.66.0F38.W0 9A /r`
26929	///
26930	/// `AVX512VL and AVX512F`
26931	///
26932	/// `16/32/64-bit`
26933	EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32 = 3367,
26934	/// `VFMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
26935	///
26936	/// `EVEX.512.66.0F38.W0 9A /r`
26937	///
26938	/// `AVX512F`
26939	///
26940	/// `16/32/64-bit`
26941	EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3368,
26942	/// `VFMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
26943	///
26944	/// `EVEX.128.66.0F38.W1 9A /r`
26945	///
26946	/// `AVX512VL and AVX512F`
26947	///
26948	/// `16/32/64-bit`
26949	EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64 = 3369,
26950	/// `VFMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
26951	///
26952	/// `EVEX.256.66.0F38.W1 9A /r`
26953	///
26954	/// `AVX512VL and AVX512F`
26955	///
26956	/// `16/32/64-bit`
26957	EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64 = 3370,
26958	/// `VFMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
26959	///
26960	/// `EVEX.512.66.0F38.W1 9A /r`
26961	///
26962	/// `AVX512F`
26963	///
26964	/// `16/32/64-bit`
26965	EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3371,
26966	/// `V4FMADDPS zmm1 {k1}{z}, zmm2+3, m128`
26967	///
26968	/// `EVEX.512.F2.0F38.W0 9A /r`
26969	///
26970	/// `AVX512_4FMAPS`
26971	///
26972	/// `16/32/64-bit`
26973	EVEX_V4fmaddps_zmm_k1z_zmmp3_m128 = 3372,
26974	/// `VFMSUB132SS xmm1, xmm2, xmm3/m32`
26975	///
26976	/// `VEX.LIG.66.0F38.W0 9B /r`
26977	///
26978	/// `FMA`
26979	///
26980	/// `16/32/64-bit`
26981	VEX_Vfmsub132ss_xmm_xmm_xmmm32 = 3373,
26982	/// `VFMSUB132SD xmm1, xmm2, xmm3/m64`
26983	///
26984	/// `VEX.LIG.66.0F38.W1 9B /r`
26985	///
26986	/// `FMA`
26987	///
26988	/// `16/32/64-bit`
26989	VEX_Vfmsub132sd_xmm_xmm_xmmm64 = 3374,
26990	/// `VFMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
26991	///
26992	/// `EVEX.LIG.66.0F38.W0 9B /r`
26993	///
26994	/// `AVX512F`
26995	///
26996	/// `16/32/64-bit`
26997	EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er = 3375,
26998	/// `VFMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
26999	///
27000	/// `EVEX.LIG.66.0F38.W1 9B /r`
27001	///
27002	/// `AVX512F`
27003	///
27004	/// `16/32/64-bit`
27005	EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er = 3376,
27006	/// `V4FMADDSS xmm1 {k1}{z}, xmm2+3, m128`
27007	///
27008	/// `EVEX.LIG.F2.0F38.W0 9B /r`
27009	///
27010	/// `AVX512_4FMAPS`
27011	///
27012	/// `16/32/64-bit`
27013	EVEX_V4fmaddss_xmm_k1z_xmmp3_m128 = 3377,
27014	/// `VFNMADD132PS xmm1, xmm2, xmm3/m128`
27015	///
27016	/// `VEX.128.66.0F38.W0 9C /r`
27017	///
27018	/// `FMA`
27019	///
27020	/// `16/32/64-bit`
27021	VEX_Vfnmadd132ps_xmm_xmm_xmmm128 = 3378,
27022	/// `VFNMADD132PS ymm1, ymm2, ymm3/m256`
27023	///
27024	/// `VEX.256.66.0F38.W0 9C /r`
27025	///
27026	/// `FMA`
27027	///
27028	/// `16/32/64-bit`
27029	VEX_Vfnmadd132ps_ymm_ymm_ymmm256 = 3379,
27030	/// `VFNMADD132PD xmm1, xmm2, xmm3/m128`
27031	///
27032	/// `VEX.128.66.0F38.W1 9C /r`
27033	///
27034	/// `FMA`
27035	///
27036	/// `16/32/64-bit`
27037	VEX_Vfnmadd132pd_xmm_xmm_xmmm128 = 3380,
27038	/// `VFNMADD132PD ymm1, ymm2, ymm3/m256`
27039	///
27040	/// `VEX.256.66.0F38.W1 9C /r`
27041	///
27042	/// `FMA`
27043	///
27044	/// `16/32/64-bit`
27045	VEX_Vfnmadd132pd_ymm_ymm_ymmm256 = 3381,
27046	/// `VFNMADD132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27047	///
27048	/// `EVEX.128.66.0F38.W0 9C /r`
27049	///
27050	/// `AVX512VL and AVX512F`
27051	///
27052	/// `16/32/64-bit`
27053	EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32 = 3382,
27054	/// `VFNMADD132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27055	///
27056	/// `EVEX.256.66.0F38.W0 9C /r`
27057	///
27058	/// `AVX512VL and AVX512F`
27059	///
27060	/// `16/32/64-bit`
27061	EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32 = 3383,
27062	/// `VFNMADD132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27063	///
27064	/// `EVEX.512.66.0F38.W0 9C /r`
27065	///
27066	/// `AVX512F`
27067	///
27068	/// `16/32/64-bit`
27069	EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er = 3384,
27070	/// `VFNMADD132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27071	///
27072	/// `EVEX.128.66.0F38.W1 9C /r`
27073	///
27074	/// `AVX512VL and AVX512F`
27075	///
27076	/// `16/32/64-bit`
27077	EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64 = 3385,
27078	/// `VFNMADD132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27079	///
27080	/// `EVEX.256.66.0F38.W1 9C /r`
27081	///
27082	/// `AVX512VL and AVX512F`
27083	///
27084	/// `16/32/64-bit`
27085	EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64 = 3386,
27086	/// `VFNMADD132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27087	///
27088	/// `EVEX.512.66.0F38.W1 9C /r`
27089	///
27090	/// `AVX512F`
27091	///
27092	/// `16/32/64-bit`
27093	EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er = 3387,
27094	/// `VFNMADD132SS xmm1, xmm2, xmm3/m32`
27095	///
27096	/// `VEX.LIG.66.0F38.W0 9D /r`
27097	///
27098	/// `FMA`
27099	///
27100	/// `16/32/64-bit`
27101	VEX_Vfnmadd132ss_xmm_xmm_xmmm32 = 3388,
27102	/// `VFNMADD132SD xmm1, xmm2, xmm3/m64`
27103	///
27104	/// `VEX.LIG.66.0F38.W1 9D /r`
27105	///
27106	/// `FMA`
27107	///
27108	/// `16/32/64-bit`
27109	VEX_Vfnmadd132sd_xmm_xmm_xmmm64 = 3389,
27110	/// `VFNMADD132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
27111	///
27112	/// `EVEX.LIG.66.0F38.W0 9D /r`
27113	///
27114	/// `AVX512F`
27115	///
27116	/// `16/32/64-bit`
27117	EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er = 3390,
27118	/// `VFNMADD132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
27119	///
27120	/// `EVEX.LIG.66.0F38.W1 9D /r`
27121	///
27122	/// `AVX512F`
27123	///
27124	/// `16/32/64-bit`
27125	EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er = 3391,
27126	/// `VFNMSUB132PS xmm1, xmm2, xmm3/m128`
27127	///
27128	/// `VEX.128.66.0F38.W0 9E /r`
27129	///
27130	/// `FMA`
27131	///
27132	/// `16/32/64-bit`
27133	VEX_Vfnmsub132ps_xmm_xmm_xmmm128 = 3392,
27134	/// `VFNMSUB132PS ymm1, ymm2, ymm3/m256`
27135	///
27136	/// `VEX.256.66.0F38.W0 9E /r`
27137	///
27138	/// `FMA`
27139	///
27140	/// `16/32/64-bit`
27141	VEX_Vfnmsub132ps_ymm_ymm_ymmm256 = 3393,
27142	/// `VFNMSUB132PD xmm1, xmm2, xmm3/m128`
27143	///
27144	/// `VEX.128.66.0F38.W1 9E /r`
27145	///
27146	/// `FMA`
27147	///
27148	/// `16/32/64-bit`
27149	VEX_Vfnmsub132pd_xmm_xmm_xmmm128 = 3394,
27150	/// `VFNMSUB132PD ymm1, ymm2, ymm3/m256`
27151	///
27152	/// `VEX.256.66.0F38.W1 9E /r`
27153	///
27154	/// `FMA`
27155	///
27156	/// `16/32/64-bit`
27157	VEX_Vfnmsub132pd_ymm_ymm_ymmm256 = 3395,
27158	/// `VFNMSUB132PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27159	///
27160	/// `EVEX.128.66.0F38.W0 9E /r`
27161	///
27162	/// `AVX512VL and AVX512F`
27163	///
27164	/// `16/32/64-bit`
27165	EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32 = 3396,
27166	/// `VFNMSUB132PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27167	///
27168	/// `EVEX.256.66.0F38.W0 9E /r`
27169	///
27170	/// `AVX512VL and AVX512F`
27171	///
27172	/// `16/32/64-bit`
27173	EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32 = 3397,
27174	/// `VFNMSUB132PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27175	///
27176	/// `EVEX.512.66.0F38.W0 9E /r`
27177	///
27178	/// `AVX512F`
27179	///
27180	/// `16/32/64-bit`
27181	EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er = 3398,
27182	/// `VFNMSUB132PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27183	///
27184	/// `EVEX.128.66.0F38.W1 9E /r`
27185	///
27186	/// `AVX512VL and AVX512F`
27187	///
27188	/// `16/32/64-bit`
27189	EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64 = 3399,
27190	/// `VFNMSUB132PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27191	///
27192	/// `EVEX.256.66.0F38.W1 9E /r`
27193	///
27194	/// `AVX512VL and AVX512F`
27195	///
27196	/// `16/32/64-bit`
27197	EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64 = 3400,
27198	/// `VFNMSUB132PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27199	///
27200	/// `EVEX.512.66.0F38.W1 9E /r`
27201	///
27202	/// `AVX512F`
27203	///
27204	/// `16/32/64-bit`
27205	EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er = 3401,
27206	/// `VFNMSUB132SS xmm1, xmm2, xmm3/m32`
27207	///
27208	/// `VEX.LIG.66.0F38.W0 9F /r`
27209	///
27210	/// `FMA`
27211	///
27212	/// `16/32/64-bit`
27213	VEX_Vfnmsub132ss_xmm_xmm_xmmm32 = 3402,
27214	/// `VFNMSUB132SD xmm1, xmm2, xmm3/m64`
27215	///
27216	/// `VEX.LIG.66.0F38.W1 9F /r`
27217	///
27218	/// `FMA`
27219	///
27220	/// `16/32/64-bit`
27221	VEX_Vfnmsub132sd_xmm_xmm_xmmm64 = 3403,
27222	/// `VFNMSUB132SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
27223	///
27224	/// `EVEX.LIG.66.0F38.W0 9F /r`
27225	///
27226	/// `AVX512F`
27227	///
27228	/// `16/32/64-bit`
27229	EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er = 3404,
27230	/// `VFNMSUB132SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
27231	///
27232	/// `EVEX.LIG.66.0F38.W1 9F /r`
27233	///
27234	/// `AVX512F`
27235	///
27236	/// `16/32/64-bit`
27237	EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er = 3405,
27238	/// `VPSCATTERDD vm32x {k1}, xmm1`
27239	///
27240	/// `EVEX.128.66.0F38.W0 A0 /vsib`
27241	///
27242	/// `AVX512VL and AVX512F`
27243	///
27244	/// `16/32/64-bit`
27245	EVEX_Vpscatterdd_vm32x_k1_xmm = 3406,
27246	/// `VPSCATTERDD vm32y {k1}, ymm1`
27247	///
27248	/// `EVEX.256.66.0F38.W0 A0 /vsib`
27249	///
27250	/// `AVX512VL and AVX512F`
27251	///
27252	/// `16/32/64-bit`
27253	EVEX_Vpscatterdd_vm32y_k1_ymm = 3407,
27254	/// `VPSCATTERDD vm32z {k1}, zmm1`
27255	///
27256	/// `EVEX.512.66.0F38.W0 A0 /vsib`
27257	///
27258	/// `AVX512F`
27259	///
27260	/// `16/32/64-bit`
27261	EVEX_Vpscatterdd_vm32z_k1_zmm = 3408,
27262	/// `VPSCATTERDQ vm32x {k1}, xmm1`
27263	///
27264	/// `EVEX.128.66.0F38.W1 A0 /vsib`
27265	///
27266	/// `AVX512VL and AVX512F`
27267	///
27268	/// `16/32/64-bit`
27269	EVEX_Vpscatterdq_vm32x_k1_xmm = 3409,
27270	/// `VPSCATTERDQ vm32x {k1}, ymm1`
27271	///
27272	/// `EVEX.256.66.0F38.W1 A0 /vsib`
27273	///
27274	/// `AVX512VL and AVX512F`
27275	///
27276	/// `16/32/64-bit`
27277	EVEX_Vpscatterdq_vm32x_k1_ymm = 3410,
27278	/// `VPSCATTERDQ vm32y {k1}, zmm1`
27279	///
27280	/// `EVEX.512.66.0F38.W1 A0 /vsib`
27281	///
27282	/// `AVX512F`
27283	///
27284	/// `16/32/64-bit`
27285	EVEX_Vpscatterdq_vm32y_k1_zmm = 3411,
27286	/// `VPSCATTERQD vm64x {k1}, xmm1`
27287	///
27288	/// `EVEX.128.66.0F38.W0 A1 /vsib`
27289	///
27290	/// `AVX512VL and AVX512F`
27291	///
27292	/// `16/32/64-bit`
27293	EVEX_Vpscatterqd_vm64x_k1_xmm = 3412,
27294	/// `VPSCATTERQD vm64y {k1}, xmm1`
27295	///
27296	/// `EVEX.256.66.0F38.W0 A1 /vsib`
27297	///
27298	/// `AVX512VL and AVX512F`
27299	///
27300	/// `16/32/64-bit`
27301	EVEX_Vpscatterqd_vm64y_k1_xmm = 3413,
27302	/// `VPSCATTERQD vm64z {k1}, ymm1`
27303	///
27304	/// `EVEX.512.66.0F38.W0 A1 /vsib`
27305	///
27306	/// `AVX512F`
27307	///
27308	/// `16/32/64-bit`
27309	EVEX_Vpscatterqd_vm64z_k1_ymm = 3414,
27310	/// `VPSCATTERQQ vm64x {k1}, xmm1`
27311	///
27312	/// `EVEX.128.66.0F38.W1 A1 /vsib`
27313	///
27314	/// `AVX512VL and AVX512F`
27315	///
27316	/// `16/32/64-bit`
27317	EVEX_Vpscatterqq_vm64x_k1_xmm = 3415,
27318	/// `VPSCATTERQQ vm64y {k1}, ymm1`
27319	///
27320	/// `EVEX.256.66.0F38.W1 A1 /vsib`
27321	///
27322	/// `AVX512VL and AVX512F`
27323	///
27324	/// `16/32/64-bit`
27325	EVEX_Vpscatterqq_vm64y_k1_ymm = 3416,
27326	/// `VPSCATTERQQ vm64z {k1}, zmm1`
27327	///
27328	/// `EVEX.512.66.0F38.W1 A1 /vsib`
27329	///
27330	/// `AVX512F`
27331	///
27332	/// `16/32/64-bit`
27333	EVEX_Vpscatterqq_vm64z_k1_zmm = 3417,
27334	/// `VSCATTERDPS vm32x {k1}, xmm1`
27335	///
27336	/// `EVEX.128.66.0F38.W0 A2 /vsib`
27337	///
27338	/// `AVX512VL and AVX512F`
27339	///
27340	/// `16/32/64-bit`
27341	EVEX_Vscatterdps_vm32x_k1_xmm = 3418,
27342	/// `VSCATTERDPS vm32y {k1}, ymm1`
27343	///
27344	/// `EVEX.256.66.0F38.W0 A2 /vsib`
27345	///
27346	/// `AVX512VL and AVX512F`
27347	///
27348	/// `16/32/64-bit`
27349	EVEX_Vscatterdps_vm32y_k1_ymm = 3419,
27350	/// `VSCATTERDPS vm32z {k1}, zmm1`
27351	///
27352	/// `EVEX.512.66.0F38.W0 A2 /vsib`
27353	///
27354	/// `AVX512F`
27355	///
27356	/// `16/32/64-bit`
27357	EVEX_Vscatterdps_vm32z_k1_zmm = 3420,
27358	/// `VSCATTERDPD vm32x {k1}, xmm1`
27359	///
27360	/// `EVEX.128.66.0F38.W1 A2 /vsib`
27361	///
27362	/// `AVX512VL and AVX512F`
27363	///
27364	/// `16/32/64-bit`
27365	EVEX_Vscatterdpd_vm32x_k1_xmm = 3421,
27366	/// `VSCATTERDPD vm32x {k1}, ymm1`
27367	///
27368	/// `EVEX.256.66.0F38.W1 A2 /vsib`
27369	///
27370	/// `AVX512VL and AVX512F`
27371	///
27372	/// `16/32/64-bit`
27373	EVEX_Vscatterdpd_vm32x_k1_ymm = 3422,
27374	/// `VSCATTERDPD vm32y {k1}, zmm1`
27375	///
27376	/// `EVEX.512.66.0F38.W1 A2 /vsib`
27377	///
27378	/// `AVX512F`
27379	///
27380	/// `16/32/64-bit`
27381	EVEX_Vscatterdpd_vm32y_k1_zmm = 3423,
27382	/// `VSCATTERQPS vm64x {k1}, xmm1`
27383	///
27384	/// `EVEX.128.66.0F38.W0 A3 /vsib`
27385	///
27386	/// `AVX512VL and AVX512F`
27387	///
27388	/// `16/32/64-bit`
27389	EVEX_Vscatterqps_vm64x_k1_xmm = 3424,
27390	/// `VSCATTERQPS vm64y {k1}, xmm1`
27391	///
27392	/// `EVEX.256.66.0F38.W0 A3 /vsib`
27393	///
27394	/// `AVX512VL and AVX512F`
27395	///
27396	/// `16/32/64-bit`
27397	EVEX_Vscatterqps_vm64y_k1_xmm = 3425,
27398	/// `VSCATTERQPS vm64z {k1}, ymm1`
27399	///
27400	/// `EVEX.512.66.0F38.W0 A3 /vsib`
27401	///
27402	/// `AVX512F`
27403	///
27404	/// `16/32/64-bit`
27405	EVEX_Vscatterqps_vm64z_k1_ymm = 3426,
27406	/// `VSCATTERQPD vm64x {k1}, xmm1`
27407	///
27408	/// `EVEX.128.66.0F38.W1 A3 /vsib`
27409	///
27410	/// `AVX512VL and AVX512F`
27411	///
27412	/// `16/32/64-bit`
27413	EVEX_Vscatterqpd_vm64x_k1_xmm = 3427,
27414	/// `VSCATTERQPD vm64y {k1}, ymm1`
27415	///
27416	/// `EVEX.256.66.0F38.W1 A3 /vsib`
27417	///
27418	/// `AVX512VL and AVX512F`
27419	///
27420	/// `16/32/64-bit`
27421	EVEX_Vscatterqpd_vm64y_k1_ymm = 3428,
27422	/// `VSCATTERQPD vm64z {k1}, zmm1`
27423	///
27424	/// `EVEX.512.66.0F38.W1 A3 /vsib`
27425	///
27426	/// `AVX512F`
27427	///
27428	/// `16/32/64-bit`
27429	EVEX_Vscatterqpd_vm64z_k1_zmm = 3429,
27430	/// `VFMADDSUB213PS xmm1, xmm2, xmm3/m128`
27431	///
27432	/// `VEX.128.66.0F38.W0 A6 /r`
27433	///
27434	/// `FMA`
27435	///
27436	/// `16/32/64-bit`
27437	VEX_Vfmaddsub213ps_xmm_xmm_xmmm128 = 3430,
27438	/// `VFMADDSUB213PS ymm1, ymm2, ymm3/m256`
27439	///
27440	/// `VEX.256.66.0F38.W0 A6 /r`
27441	///
27442	/// `FMA`
27443	///
27444	/// `16/32/64-bit`
27445	VEX_Vfmaddsub213ps_ymm_ymm_ymmm256 = 3431,
27446	/// `VFMADDSUB213PD xmm1, xmm2, xmm3/m128`
27447	///
27448	/// `VEX.128.66.0F38.W1 A6 /r`
27449	///
27450	/// `FMA`
27451	///
27452	/// `16/32/64-bit`
27453	VEX_Vfmaddsub213pd_xmm_xmm_xmmm128 = 3432,
27454	/// `VFMADDSUB213PD ymm1, ymm2, ymm3/m256`
27455	///
27456	/// `VEX.256.66.0F38.W1 A6 /r`
27457	///
27458	/// `FMA`
27459	///
27460	/// `16/32/64-bit`
27461	VEX_Vfmaddsub213pd_ymm_ymm_ymmm256 = 3433,
27462	/// `VFMADDSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27463	///
27464	/// `EVEX.128.66.0F38.W0 A6 /r`
27465	///
27466	/// `AVX512VL and AVX512F`
27467	///
27468	/// `16/32/64-bit`
27469	EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32 = 3434,
27470	/// `VFMADDSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27471	///
27472	/// `EVEX.256.66.0F38.W0 A6 /r`
27473	///
27474	/// `AVX512VL and AVX512F`
27475	///
27476	/// `16/32/64-bit`
27477	EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32 = 3435,
27478	/// `VFMADDSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27479	///
27480	/// `EVEX.512.66.0F38.W0 A6 /r`
27481	///
27482	/// `AVX512F`
27483	///
27484	/// `16/32/64-bit`
27485	EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3436,
27486	/// `VFMADDSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27487	///
27488	/// `EVEX.128.66.0F38.W1 A6 /r`
27489	///
27490	/// `AVX512VL and AVX512F`
27491	///
27492	/// `16/32/64-bit`
27493	EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64 = 3437,
27494	/// `VFMADDSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27495	///
27496	/// `EVEX.256.66.0F38.W1 A6 /r`
27497	///
27498	/// `AVX512VL and AVX512F`
27499	///
27500	/// `16/32/64-bit`
27501	EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64 = 3438,
27502	/// `VFMADDSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27503	///
27504	/// `EVEX.512.66.0F38.W1 A6 /r`
27505	///
27506	/// `AVX512F`
27507	///
27508	/// `16/32/64-bit`
27509	EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3439,
27510	/// `VFMSUBADD213PS xmm1, xmm2, xmm3/m128`
27511	///
27512	/// `VEX.128.66.0F38.W0 A7 /r`
27513	///
27514	/// `FMA`
27515	///
27516	/// `16/32/64-bit`
27517	VEX_Vfmsubadd213ps_xmm_xmm_xmmm128 = 3440,
27518	/// `VFMSUBADD213PS ymm1, ymm2, ymm3/m256`
27519	///
27520	/// `VEX.256.66.0F38.W0 A7 /r`
27521	///
27522	/// `FMA`
27523	///
27524	/// `16/32/64-bit`
27525	VEX_Vfmsubadd213ps_ymm_ymm_ymmm256 = 3441,
27526	/// `VFMSUBADD213PD xmm1, xmm2, xmm3/m128`
27527	///
27528	/// `VEX.128.66.0F38.W1 A7 /r`
27529	///
27530	/// `FMA`
27531	///
27532	/// `16/32/64-bit`
27533	VEX_Vfmsubadd213pd_xmm_xmm_xmmm128 = 3442,
27534	/// `VFMSUBADD213PD ymm1, ymm2, ymm3/m256`
27535	///
27536	/// `VEX.256.66.0F38.W1 A7 /r`
27537	///
27538	/// `FMA`
27539	///
27540	/// `16/32/64-bit`
27541	VEX_Vfmsubadd213pd_ymm_ymm_ymmm256 = 3443,
27542	/// `VFMSUBADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27543	///
27544	/// `EVEX.128.66.0F38.W0 A7 /r`
27545	///
27546	/// `AVX512VL and AVX512F`
27547	///
27548	/// `16/32/64-bit`
27549	EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32 = 3444,
27550	/// `VFMSUBADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27551	///
27552	/// `EVEX.256.66.0F38.W0 A7 /r`
27553	///
27554	/// `AVX512VL and AVX512F`
27555	///
27556	/// `16/32/64-bit`
27557	EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32 = 3445,
27558	/// `VFMSUBADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27559	///
27560	/// `EVEX.512.66.0F38.W0 A7 /r`
27561	///
27562	/// `AVX512F`
27563	///
27564	/// `16/32/64-bit`
27565	EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3446,
27566	/// `VFMSUBADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27567	///
27568	/// `EVEX.128.66.0F38.W1 A7 /r`
27569	///
27570	/// `AVX512VL and AVX512F`
27571	///
27572	/// `16/32/64-bit`
27573	EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64 = 3447,
27574	/// `VFMSUBADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27575	///
27576	/// `EVEX.256.66.0F38.W1 A7 /r`
27577	///
27578	/// `AVX512VL and AVX512F`
27579	///
27580	/// `16/32/64-bit`
27581	EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64 = 3448,
27582	/// `VFMSUBADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27583	///
27584	/// `EVEX.512.66.0F38.W1 A7 /r`
27585	///
27586	/// `AVX512F`
27587	///
27588	/// `16/32/64-bit`
27589	EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3449,
27590	/// `VFMADD213PS xmm1, xmm2, xmm3/m128`
27591	///
27592	/// `VEX.128.66.0F38.W0 A8 /r`
27593	///
27594	/// `FMA`
27595	///
27596	/// `16/32/64-bit`
27597	VEX_Vfmadd213ps_xmm_xmm_xmmm128 = 3450,
27598	/// `VFMADD213PS ymm1, ymm2, ymm3/m256`
27599	///
27600	/// `VEX.256.66.0F38.W0 A8 /r`
27601	///
27602	/// `FMA`
27603	///
27604	/// `16/32/64-bit`
27605	VEX_Vfmadd213ps_ymm_ymm_ymmm256 = 3451,
27606	/// `VFMADD213PD xmm1, xmm2, xmm3/m128`
27607	///
27608	/// `VEX.128.66.0F38.W1 A8 /r`
27609	///
27610	/// `FMA`
27611	///
27612	/// `16/32/64-bit`
27613	VEX_Vfmadd213pd_xmm_xmm_xmmm128 = 3452,
27614	/// `VFMADD213PD ymm1, ymm2, ymm3/m256`
27615	///
27616	/// `VEX.256.66.0F38.W1 A8 /r`
27617	///
27618	/// `FMA`
27619	///
27620	/// `16/32/64-bit`
27621	VEX_Vfmadd213pd_ymm_ymm_ymmm256 = 3453,
27622	/// `VFMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27623	///
27624	/// `EVEX.128.66.0F38.W0 A8 /r`
27625	///
27626	/// `AVX512VL and AVX512F`
27627	///
27628	/// `16/32/64-bit`
27629	EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32 = 3454,
27630	/// `VFMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27631	///
27632	/// `EVEX.256.66.0F38.W0 A8 /r`
27633	///
27634	/// `AVX512VL and AVX512F`
27635	///
27636	/// `16/32/64-bit`
27637	EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32 = 3455,
27638	/// `VFMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27639	///
27640	/// `EVEX.512.66.0F38.W0 A8 /r`
27641	///
27642	/// `AVX512F`
27643	///
27644	/// `16/32/64-bit`
27645	EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3456,
27646	/// `VFMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27647	///
27648	/// `EVEX.128.66.0F38.W1 A8 /r`
27649	///
27650	/// `AVX512VL and AVX512F`
27651	///
27652	/// `16/32/64-bit`
27653	EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64 = 3457,
27654	/// `VFMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27655	///
27656	/// `EVEX.256.66.0F38.W1 A8 /r`
27657	///
27658	/// `AVX512VL and AVX512F`
27659	///
27660	/// `16/32/64-bit`
27661	EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64 = 3458,
27662	/// `VFMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27663	///
27664	/// `EVEX.512.66.0F38.W1 A8 /r`
27665	///
27666	/// `AVX512F`
27667	///
27668	/// `16/32/64-bit`
27669	EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3459,
27670	/// `VFMADD213SS xmm1, xmm2, xmm3/m32`
27671	///
27672	/// `VEX.LIG.66.0F38.W0 A9 /r`
27673	///
27674	/// `FMA`
27675	///
27676	/// `16/32/64-bit`
27677	VEX_Vfmadd213ss_xmm_xmm_xmmm32 = 3460,
27678	/// `VFMADD213SD xmm1, xmm2, xmm3/m64`
27679	///
27680	/// `VEX.LIG.66.0F38.W1 A9 /r`
27681	///
27682	/// `FMA`
27683	///
27684	/// `16/32/64-bit`
27685	VEX_Vfmadd213sd_xmm_xmm_xmmm64 = 3461,
27686	/// `VFMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
27687	///
27688	/// `EVEX.LIG.66.0F38.W0 A9 /r`
27689	///
27690	/// `AVX512F`
27691	///
27692	/// `16/32/64-bit`
27693	EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er = 3462,
27694	/// `VFMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
27695	///
27696	/// `EVEX.LIG.66.0F38.W1 A9 /r`
27697	///
27698	/// `AVX512F`
27699	///
27700	/// `16/32/64-bit`
27701	EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er = 3463,
27702	/// `VFMSUB213PS xmm1, xmm2, xmm3/m128`
27703	///
27704	/// `VEX.128.66.0F38.W0 AA /r`
27705	///
27706	/// `FMA`
27707	///
27708	/// `16/32/64-bit`
27709	VEX_Vfmsub213ps_xmm_xmm_xmmm128 = 3464,
27710	/// `VFMSUB213PS ymm1, ymm2, ymm3/m256`
27711	///
27712	/// `VEX.256.66.0F38.W0 AA /r`
27713	///
27714	/// `FMA`
27715	///
27716	/// `16/32/64-bit`
27717	VEX_Vfmsub213ps_ymm_ymm_ymmm256 = 3465,
27718	/// `VFMSUB213PD xmm1, xmm2, xmm3/m128`
27719	///
27720	/// `VEX.128.66.0F38.W1 AA /r`
27721	///
27722	/// `FMA`
27723	///
27724	/// `16/32/64-bit`
27725	VEX_Vfmsub213pd_xmm_xmm_xmmm128 = 3466,
27726	/// `VFMSUB213PD ymm1, ymm2, ymm3/m256`
27727	///
27728	/// `VEX.256.66.0F38.W1 AA /r`
27729	///
27730	/// `FMA`
27731	///
27732	/// `16/32/64-bit`
27733	VEX_Vfmsub213pd_ymm_ymm_ymmm256 = 3467,
27734	/// `VFMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27735	///
27736	/// `EVEX.128.66.0F38.W0 AA /r`
27737	///
27738	/// `AVX512VL and AVX512F`
27739	///
27740	/// `16/32/64-bit`
27741	EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32 = 3468,
27742	/// `VFMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27743	///
27744	/// `EVEX.256.66.0F38.W0 AA /r`
27745	///
27746	/// `AVX512VL and AVX512F`
27747	///
27748	/// `16/32/64-bit`
27749	EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32 = 3469,
27750	/// `VFMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27751	///
27752	/// `EVEX.512.66.0F38.W0 AA /r`
27753	///
27754	/// `AVX512F`
27755	///
27756	/// `16/32/64-bit`
27757	EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3470,
27758	/// `VFMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27759	///
27760	/// `EVEX.128.66.0F38.W1 AA /r`
27761	///
27762	/// `AVX512VL and AVX512F`
27763	///
27764	/// `16/32/64-bit`
27765	EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64 = 3471,
27766	/// `VFMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27767	///
27768	/// `EVEX.256.66.0F38.W1 AA /r`
27769	///
27770	/// `AVX512VL and AVX512F`
27771	///
27772	/// `16/32/64-bit`
27773	EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64 = 3472,
27774	/// `VFMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27775	///
27776	/// `EVEX.512.66.0F38.W1 AA /r`
27777	///
27778	/// `AVX512F`
27779	///
27780	/// `16/32/64-bit`
27781	EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3473,
27782	/// `V4FNMADDPS zmm1 {k1}{z}, zmm2+3, m128`
27783	///
27784	/// `EVEX.512.F2.0F38.W0 AA /r`
27785	///
27786	/// `AVX512_4FMAPS`
27787	///
27788	/// `16/32/64-bit`
27789	EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128 = 3474,
27790	/// `VFMSUB213SS xmm1, xmm2, xmm3/m32`
27791	///
27792	/// `VEX.LIG.66.0F38.W0 AB /r`
27793	///
27794	/// `FMA`
27795	///
27796	/// `16/32/64-bit`
27797	VEX_Vfmsub213ss_xmm_xmm_xmmm32 = 3475,
27798	/// `VFMSUB213SD xmm1, xmm2, xmm3/m64`
27799	///
27800	/// `VEX.LIG.66.0F38.W1 AB /r`
27801	///
27802	/// `FMA`
27803	///
27804	/// `16/32/64-bit`
27805	VEX_Vfmsub213sd_xmm_xmm_xmmm64 = 3476,
27806	/// `VFMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
27807	///
27808	/// `EVEX.LIG.66.0F38.W0 AB /r`
27809	///
27810	/// `AVX512F`
27811	///
27812	/// `16/32/64-bit`
27813	EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er = 3477,
27814	/// `VFMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
27815	///
27816	/// `EVEX.LIG.66.0F38.W1 AB /r`
27817	///
27818	/// `AVX512F`
27819	///
27820	/// `16/32/64-bit`
27821	EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er = 3478,
27822	/// `V4FNMADDSS xmm1 {k1}{z}, xmm2+3, m128`
27823	///
27824	/// `EVEX.LIG.F2.0F38.W0 AB /r`
27825	///
27826	/// `AVX512_4FMAPS`
27827	///
27828	/// `16/32/64-bit`
27829	EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128 = 3479,
27830	/// `VFNMADD213PS xmm1, xmm2, xmm3/m128`
27831	///
27832	/// `VEX.128.66.0F38.W0 AC /r`
27833	///
27834	/// `FMA`
27835	///
27836	/// `16/32/64-bit`
27837	VEX_Vfnmadd213ps_xmm_xmm_xmmm128 = 3480,
27838	/// `VFNMADD213PS ymm1, ymm2, ymm3/m256`
27839	///
27840	/// `VEX.256.66.0F38.W0 AC /r`
27841	///
27842	/// `FMA`
27843	///
27844	/// `16/32/64-bit`
27845	VEX_Vfnmadd213ps_ymm_ymm_ymmm256 = 3481,
27846	/// `VFNMADD213PD xmm1, xmm2, xmm3/m128`
27847	///
27848	/// `VEX.128.66.0F38.W1 AC /r`
27849	///
27850	/// `FMA`
27851	///
27852	/// `16/32/64-bit`
27853	VEX_Vfnmadd213pd_xmm_xmm_xmmm128 = 3482,
27854	/// `VFNMADD213PD ymm1, ymm2, ymm3/m256`
27855	///
27856	/// `VEX.256.66.0F38.W1 AC /r`
27857	///
27858	/// `FMA`
27859	///
27860	/// `16/32/64-bit`
27861	VEX_Vfnmadd213pd_ymm_ymm_ymmm256 = 3483,
27862	/// `VFNMADD213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27863	///
27864	/// `EVEX.128.66.0F38.W0 AC /r`
27865	///
27866	/// `AVX512VL and AVX512F`
27867	///
27868	/// `16/32/64-bit`
27869	EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32 = 3484,
27870	/// `VFNMADD213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27871	///
27872	/// `EVEX.256.66.0F38.W0 AC /r`
27873	///
27874	/// `AVX512VL and AVX512F`
27875	///
27876	/// `16/32/64-bit`
27877	EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32 = 3485,
27878	/// `VFNMADD213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27879	///
27880	/// `EVEX.512.66.0F38.W0 AC /r`
27881	///
27882	/// `AVX512F`
27883	///
27884	/// `16/32/64-bit`
27885	EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er = 3486,
27886	/// `VFNMADD213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27887	///
27888	/// `EVEX.128.66.0F38.W1 AC /r`
27889	///
27890	/// `AVX512VL and AVX512F`
27891	///
27892	/// `16/32/64-bit`
27893	EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64 = 3487,
27894	/// `VFNMADD213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
27895	///
27896	/// `EVEX.256.66.0F38.W1 AC /r`
27897	///
27898	/// `AVX512VL and AVX512F`
27899	///
27900	/// `16/32/64-bit`
27901	EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64 = 3488,
27902	/// `VFNMADD213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
27903	///
27904	/// `EVEX.512.66.0F38.W1 AC /r`
27905	///
27906	/// `AVX512F`
27907	///
27908	/// `16/32/64-bit`
27909	EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er = 3489,
27910	/// `VFNMADD213SS xmm1, xmm2, xmm3/m32`
27911	///
27912	/// `VEX.LIG.66.0F38.W0 AD /r`
27913	///
27914	/// `FMA`
27915	///
27916	/// `16/32/64-bit`
27917	VEX_Vfnmadd213ss_xmm_xmm_xmmm32 = 3490,
27918	/// `VFNMADD213SD xmm1, xmm2, xmm3/m64`
27919	///
27920	/// `VEX.LIG.66.0F38.W1 AD /r`
27921	///
27922	/// `FMA`
27923	///
27924	/// `16/32/64-bit`
27925	VEX_Vfnmadd213sd_xmm_xmm_xmmm64 = 3491,
27926	/// `VFNMADD213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
27927	///
27928	/// `EVEX.LIG.66.0F38.W0 AD /r`
27929	///
27930	/// `AVX512F`
27931	///
27932	/// `16/32/64-bit`
27933	EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er = 3492,
27934	/// `VFNMADD213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
27935	///
27936	/// `EVEX.LIG.66.0F38.W1 AD /r`
27937	///
27938	/// `AVX512F`
27939	///
27940	/// `16/32/64-bit`
27941	EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er = 3493,
27942	/// `VFNMSUB213PS xmm1, xmm2, xmm3/m128`
27943	///
27944	/// `VEX.128.66.0F38.W0 AE /r`
27945	///
27946	/// `FMA`
27947	///
27948	/// `16/32/64-bit`
27949	VEX_Vfnmsub213ps_xmm_xmm_xmmm128 = 3494,
27950	/// `VFNMSUB213PS ymm1, ymm2, ymm3/m256`
27951	///
27952	/// `VEX.256.66.0F38.W0 AE /r`
27953	///
27954	/// `FMA`
27955	///
27956	/// `16/32/64-bit`
27957	VEX_Vfnmsub213ps_ymm_ymm_ymmm256 = 3495,
27958	/// `VFNMSUB213PD xmm1, xmm2, xmm3/m128`
27959	///
27960	/// `VEX.128.66.0F38.W1 AE /r`
27961	///
27962	/// `FMA`
27963	///
27964	/// `16/32/64-bit`
27965	VEX_Vfnmsub213pd_xmm_xmm_xmmm128 = 3496,
27966	/// `VFNMSUB213PD ymm1, ymm2, ymm3/m256`
27967	///
27968	/// `VEX.256.66.0F38.W1 AE /r`
27969	///
27970	/// `FMA`
27971	///
27972	/// `16/32/64-bit`
27973	VEX_Vfnmsub213pd_ymm_ymm_ymmm256 = 3497,
27974	/// `VFNMSUB213PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
27975	///
27976	/// `EVEX.128.66.0F38.W0 AE /r`
27977	///
27978	/// `AVX512VL and AVX512F`
27979	///
27980	/// `16/32/64-bit`
27981	EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32 = 3498,
27982	/// `VFNMSUB213PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
27983	///
27984	/// `EVEX.256.66.0F38.W0 AE /r`
27985	///
27986	/// `AVX512VL and AVX512F`
27987	///
27988	/// `16/32/64-bit`
27989	EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32 = 3499,
27990	/// `VFNMSUB213PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
27991	///
27992	/// `EVEX.512.66.0F38.W0 AE /r`
27993	///
27994	/// `AVX512F`
27995	///
27996	/// `16/32/64-bit`
27997	EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er = 3500,
27998	/// `VFNMSUB213PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
27999	///
28000	/// `EVEX.128.66.0F38.W1 AE /r`
28001	///
28002	/// `AVX512VL and AVX512F`
28003	///
28004	/// `16/32/64-bit`
28005	EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64 = 3501,
28006	/// `VFNMSUB213PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28007	///
28008	/// `EVEX.256.66.0F38.W1 AE /r`
28009	///
28010	/// `AVX512VL and AVX512F`
28011	///
28012	/// `16/32/64-bit`
28013	EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64 = 3502,
28014	/// `VFNMSUB213PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28015	///
28016	/// `EVEX.512.66.0F38.W1 AE /r`
28017	///
28018	/// `AVX512F`
28019	///
28020	/// `16/32/64-bit`
28021	EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er = 3503,
28022	/// `VFNMSUB213SS xmm1, xmm2, xmm3/m32`
28023	///
28024	/// `VEX.LIG.66.0F38.W0 AF /r`
28025	///
28026	/// `FMA`
28027	///
28028	/// `16/32/64-bit`
28029	VEX_Vfnmsub213ss_xmm_xmm_xmmm32 = 3504,
28030	/// `VFNMSUB213SD xmm1, xmm2, xmm3/m64`
28031	///
28032	/// `VEX.LIG.66.0F38.W1 AF /r`
28033	///
28034	/// `FMA`
28035	///
28036	/// `16/32/64-bit`
28037	VEX_Vfnmsub213sd_xmm_xmm_xmmm64 = 3505,
28038	/// `VFNMSUB213SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
28039	///
28040	/// `EVEX.LIG.66.0F38.W0 AF /r`
28041	///
28042	/// `AVX512F`
28043	///
28044	/// `16/32/64-bit`
28045	EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er = 3506,
28046	/// `VFNMSUB213SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
28047	///
28048	/// `EVEX.LIG.66.0F38.W1 AF /r`
28049	///
28050	/// `AVX512F`
28051	///
28052	/// `16/32/64-bit`
28053	EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er = 3507,
28054	/// `VPMADD52LUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28055	///
28056	/// `EVEX.128.66.0F38.W1 B4 /r`
28057	///
28058	/// `AVX512VL and AVX512_IFMA`
28059	///
28060	/// `16/32/64-bit`
28061	EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64 = 3508,
28062	/// `VPMADD52LUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28063	///
28064	/// `EVEX.256.66.0F38.W1 B4 /r`
28065	///
28066	/// `AVX512VL and AVX512_IFMA`
28067	///
28068	/// `16/32/64-bit`
28069	EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64 = 3509,
28070	/// `VPMADD52LUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
28071	///
28072	/// `EVEX.512.66.0F38.W1 B4 /r`
28073	///
28074	/// `AVX512_IFMA`
28075	///
28076	/// `16/32/64-bit`
28077	EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64 = 3510,
28078	/// `VPMADD52HUQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28079	///
28080	/// `EVEX.128.66.0F38.W1 B5 /r`
28081	///
28082	/// `AVX512VL and AVX512_IFMA`
28083	///
28084	/// `16/32/64-bit`
28085	EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64 = 3511,
28086	/// `VPMADD52HUQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28087	///
28088	/// `EVEX.256.66.0F38.W1 B5 /r`
28089	///
28090	/// `AVX512VL and AVX512_IFMA`
28091	///
28092	/// `16/32/64-bit`
28093	EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64 = 3512,
28094	/// `VPMADD52HUQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst`
28095	///
28096	/// `EVEX.512.66.0F38.W1 B5 /r`
28097	///
28098	/// `AVX512_IFMA`
28099	///
28100	/// `16/32/64-bit`
28101	EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64 = 3513,
28102	/// `VFMADDSUB231PS xmm1, xmm2, xmm3/m128`
28103	///
28104	/// `VEX.128.66.0F38.W0 B6 /r`
28105	///
28106	/// `FMA`
28107	///
28108	/// `16/32/64-bit`
28109	VEX_Vfmaddsub231ps_xmm_xmm_xmmm128 = 3514,
28110	/// `VFMADDSUB231PS ymm1, ymm2, ymm3/m256`
28111	///
28112	/// `VEX.256.66.0F38.W0 B6 /r`
28113	///
28114	/// `FMA`
28115	///
28116	/// `16/32/64-bit`
28117	VEX_Vfmaddsub231ps_ymm_ymm_ymmm256 = 3515,
28118	/// `VFMADDSUB231PD xmm1, xmm2, xmm3/m128`
28119	///
28120	/// `VEX.128.66.0F38.W1 B6 /r`
28121	///
28122	/// `FMA`
28123	///
28124	/// `16/32/64-bit`
28125	VEX_Vfmaddsub231pd_xmm_xmm_xmmm128 = 3516,
28126	/// `VFMADDSUB231PD ymm1, ymm2, ymm3/m256`
28127	///
28128	/// `VEX.256.66.0F38.W1 B6 /r`
28129	///
28130	/// `FMA`
28131	///
28132	/// `16/32/64-bit`
28133	VEX_Vfmaddsub231pd_ymm_ymm_ymmm256 = 3517,
28134	/// `VFMADDSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28135	///
28136	/// `EVEX.128.66.0F38.W0 B6 /r`
28137	///
28138	/// `AVX512VL and AVX512F`
28139	///
28140	/// `16/32/64-bit`
28141	EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32 = 3518,
28142	/// `VFMADDSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28143	///
28144	/// `EVEX.256.66.0F38.W0 B6 /r`
28145	///
28146	/// `AVX512VL and AVX512F`
28147	///
28148	/// `16/32/64-bit`
28149	EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32 = 3519,
28150	/// `VFMADDSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28151	///
28152	/// `EVEX.512.66.0F38.W0 B6 /r`
28153	///
28154	/// `AVX512F`
28155	///
28156	/// `16/32/64-bit`
28157	EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3520,
28158	/// `VFMADDSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28159	///
28160	/// `EVEX.128.66.0F38.W1 B6 /r`
28161	///
28162	/// `AVX512VL and AVX512F`
28163	///
28164	/// `16/32/64-bit`
28165	EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64 = 3521,
28166	/// `VFMADDSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28167	///
28168	/// `EVEX.256.66.0F38.W1 B6 /r`
28169	///
28170	/// `AVX512VL and AVX512F`
28171	///
28172	/// `16/32/64-bit`
28173	EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64 = 3522,
28174	/// `VFMADDSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28175	///
28176	/// `EVEX.512.66.0F38.W1 B6 /r`
28177	///
28178	/// `AVX512F`
28179	///
28180	/// `16/32/64-bit`
28181	EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3523,
28182	/// `VFMSUBADD231PS xmm1, xmm2, xmm3/m128`
28183	///
28184	/// `VEX.128.66.0F38.W0 B7 /r`
28185	///
28186	/// `FMA`
28187	///
28188	/// `16/32/64-bit`
28189	VEX_Vfmsubadd231ps_xmm_xmm_xmmm128 = 3524,
28190	/// `VFMSUBADD231PS ymm1, ymm2, ymm3/m256`
28191	///
28192	/// `VEX.256.66.0F38.W0 B7 /r`
28193	///
28194	/// `FMA`
28195	///
28196	/// `16/32/64-bit`
28197	VEX_Vfmsubadd231ps_ymm_ymm_ymmm256 = 3525,
28198	/// `VFMSUBADD231PD xmm1, xmm2, xmm3/m128`
28199	///
28200	/// `VEX.128.66.0F38.W1 B7 /r`
28201	///
28202	/// `FMA`
28203	///
28204	/// `16/32/64-bit`
28205	VEX_Vfmsubadd231pd_xmm_xmm_xmmm128 = 3526,
28206	/// `VFMSUBADD231PD ymm1, ymm2, ymm3/m256`
28207	///
28208	/// `VEX.256.66.0F38.W1 B7 /r`
28209	///
28210	/// `FMA`
28211	///
28212	/// `16/32/64-bit`
28213	VEX_Vfmsubadd231pd_ymm_ymm_ymmm256 = 3527,
28214	/// `VFMSUBADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28215	///
28216	/// `EVEX.128.66.0F38.W0 B7 /r`
28217	///
28218	/// `AVX512VL and AVX512F`
28219	///
28220	/// `16/32/64-bit`
28221	EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32 = 3528,
28222	/// `VFMSUBADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28223	///
28224	/// `EVEX.256.66.0F38.W0 B7 /r`
28225	///
28226	/// `AVX512VL and AVX512F`
28227	///
28228	/// `16/32/64-bit`
28229	EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32 = 3529,
28230	/// `VFMSUBADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28231	///
28232	/// `EVEX.512.66.0F38.W0 B7 /r`
28233	///
28234	/// `AVX512F`
28235	///
28236	/// `16/32/64-bit`
28237	EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3530,
28238	/// `VFMSUBADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28239	///
28240	/// `EVEX.128.66.0F38.W1 B7 /r`
28241	///
28242	/// `AVX512VL and AVX512F`
28243	///
28244	/// `16/32/64-bit`
28245	EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64 = 3531,
28246	/// `VFMSUBADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28247	///
28248	/// `EVEX.256.66.0F38.W1 B7 /r`
28249	///
28250	/// `AVX512VL and AVX512F`
28251	///
28252	/// `16/32/64-bit`
28253	EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64 = 3532,
28254	/// `VFMSUBADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28255	///
28256	/// `EVEX.512.66.0F38.W1 B7 /r`
28257	///
28258	/// `AVX512F`
28259	///
28260	/// `16/32/64-bit`
28261	EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3533,
28262	/// `VFMADD231PS xmm1, xmm2, xmm3/m128`
28263	///
28264	/// `VEX.128.66.0F38.W0 B8 /r`
28265	///
28266	/// `FMA`
28267	///
28268	/// `16/32/64-bit`
28269	VEX_Vfmadd231ps_xmm_xmm_xmmm128 = 3534,
28270	/// `VFMADD231PS ymm1, ymm2, ymm3/m256`
28271	///
28272	/// `VEX.256.66.0F38.W0 B8 /r`
28273	///
28274	/// `FMA`
28275	///
28276	/// `16/32/64-bit`
28277	VEX_Vfmadd231ps_ymm_ymm_ymmm256 = 3535,
28278	/// `VFMADD231PD xmm1, xmm2, xmm3/m128`
28279	///
28280	/// `VEX.128.66.0F38.W1 B8 /r`
28281	///
28282	/// `FMA`
28283	///
28284	/// `16/32/64-bit`
28285	VEX_Vfmadd231pd_xmm_xmm_xmmm128 = 3536,
28286	/// `VFMADD231PD ymm1, ymm2, ymm3/m256`
28287	///
28288	/// `VEX.256.66.0F38.W1 B8 /r`
28289	///
28290	/// `FMA`
28291	///
28292	/// `16/32/64-bit`
28293	VEX_Vfmadd231pd_ymm_ymm_ymmm256 = 3537,
28294	/// `VFMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28295	///
28296	/// `EVEX.128.66.0F38.W0 B8 /r`
28297	///
28298	/// `AVX512VL and AVX512F`
28299	///
28300	/// `16/32/64-bit`
28301	EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32 = 3538,
28302	/// `VFMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28303	///
28304	/// `EVEX.256.66.0F38.W0 B8 /r`
28305	///
28306	/// `AVX512VL and AVX512F`
28307	///
28308	/// `16/32/64-bit`
28309	EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32 = 3539,
28310	/// `VFMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28311	///
28312	/// `EVEX.512.66.0F38.W0 B8 /r`
28313	///
28314	/// `AVX512F`
28315	///
28316	/// `16/32/64-bit`
28317	EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3540,
28318	/// `VFMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28319	///
28320	/// `EVEX.128.66.0F38.W1 B8 /r`
28321	///
28322	/// `AVX512VL and AVX512F`
28323	///
28324	/// `16/32/64-bit`
28325	EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64 = 3541,
28326	/// `VFMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28327	///
28328	/// `EVEX.256.66.0F38.W1 B8 /r`
28329	///
28330	/// `AVX512VL and AVX512F`
28331	///
28332	/// `16/32/64-bit`
28333	EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64 = 3542,
28334	/// `VFMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28335	///
28336	/// `EVEX.512.66.0F38.W1 B8 /r`
28337	///
28338	/// `AVX512F`
28339	///
28340	/// `16/32/64-bit`
28341	EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3543,
28342	/// `VFMADD231SS xmm1, xmm2, xmm3/m32`
28343	///
28344	/// `VEX.LIG.66.0F38.W0 B9 /r`
28345	///
28346	/// `FMA`
28347	///
28348	/// `16/32/64-bit`
28349	VEX_Vfmadd231ss_xmm_xmm_xmmm32 = 3544,
28350	/// `VFMADD231SD xmm1, xmm2, xmm3/m64`
28351	///
28352	/// `VEX.LIG.66.0F38.W1 B9 /r`
28353	///
28354	/// `FMA`
28355	///
28356	/// `16/32/64-bit`
28357	VEX_Vfmadd231sd_xmm_xmm_xmmm64 = 3545,
28358	/// `VFMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
28359	///
28360	/// `EVEX.LIG.66.0F38.W0 B9 /r`
28361	///
28362	/// `AVX512F`
28363	///
28364	/// `16/32/64-bit`
28365	EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er = 3546,
28366	/// `VFMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
28367	///
28368	/// `EVEX.LIG.66.0F38.W1 B9 /r`
28369	///
28370	/// `AVX512F`
28371	///
28372	/// `16/32/64-bit`
28373	EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er = 3547,
28374	/// `VFMSUB231PS xmm1, xmm2, xmm3/m128`
28375	///
28376	/// `VEX.128.66.0F38.W0 BA /r`
28377	///
28378	/// `FMA`
28379	///
28380	/// `16/32/64-bit`
28381	VEX_Vfmsub231ps_xmm_xmm_xmmm128 = 3548,
28382	/// `VFMSUB231PS ymm1, ymm2, ymm3/m256`
28383	///
28384	/// `VEX.256.66.0F38.W0 BA /r`
28385	///
28386	/// `FMA`
28387	///
28388	/// `16/32/64-bit`
28389	VEX_Vfmsub231ps_ymm_ymm_ymmm256 = 3549,
28390	/// `VFMSUB231PD xmm1, xmm2, xmm3/m128`
28391	///
28392	/// `VEX.128.66.0F38.W1 BA /r`
28393	///
28394	/// `FMA`
28395	///
28396	/// `16/32/64-bit`
28397	VEX_Vfmsub231pd_xmm_xmm_xmmm128 = 3550,
28398	/// `VFMSUB231PD ymm1, ymm2, ymm3/m256`
28399	///
28400	/// `VEX.256.66.0F38.W1 BA /r`
28401	///
28402	/// `FMA`
28403	///
28404	/// `16/32/64-bit`
28405	VEX_Vfmsub231pd_ymm_ymm_ymmm256 = 3551,
28406	/// `VFMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28407	///
28408	/// `EVEX.128.66.0F38.W0 BA /r`
28409	///
28410	/// `AVX512VL and AVX512F`
28411	///
28412	/// `16/32/64-bit`
28413	EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32 = 3552,
28414	/// `VFMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28415	///
28416	/// `EVEX.256.66.0F38.W0 BA /r`
28417	///
28418	/// `AVX512VL and AVX512F`
28419	///
28420	/// `16/32/64-bit`
28421	EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32 = 3553,
28422	/// `VFMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28423	///
28424	/// `EVEX.512.66.0F38.W0 BA /r`
28425	///
28426	/// `AVX512F`
28427	///
28428	/// `16/32/64-bit`
28429	EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3554,
28430	/// `VFMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28431	///
28432	/// `EVEX.128.66.0F38.W1 BA /r`
28433	///
28434	/// `AVX512VL and AVX512F`
28435	///
28436	/// `16/32/64-bit`
28437	EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64 = 3555,
28438	/// `VFMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28439	///
28440	/// `EVEX.256.66.0F38.W1 BA /r`
28441	///
28442	/// `AVX512VL and AVX512F`
28443	///
28444	/// `16/32/64-bit`
28445	EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64 = 3556,
28446	/// `VFMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28447	///
28448	/// `EVEX.512.66.0F38.W1 BA /r`
28449	///
28450	/// `AVX512F`
28451	///
28452	/// `16/32/64-bit`
28453	EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3557,
28454	/// `VFMSUB231SS xmm1, xmm2, xmm3/m32`
28455	///
28456	/// `VEX.LIG.66.0F38.W0 BB /r`
28457	///
28458	/// `FMA`
28459	///
28460	/// `16/32/64-bit`
28461	VEX_Vfmsub231ss_xmm_xmm_xmmm32 = 3558,
28462	/// `VFMSUB231SD xmm1, xmm2, xmm3/m64`
28463	///
28464	/// `VEX.LIG.66.0F38.W1 BB /r`
28465	///
28466	/// `FMA`
28467	///
28468	/// `16/32/64-bit`
28469	VEX_Vfmsub231sd_xmm_xmm_xmmm64 = 3559,
28470	/// `VFMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
28471	///
28472	/// `EVEX.LIG.66.0F38.W0 BB /r`
28473	///
28474	/// `AVX512F`
28475	///
28476	/// `16/32/64-bit`
28477	EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er = 3560,
28478	/// `VFMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
28479	///
28480	/// `EVEX.LIG.66.0F38.W1 BB /r`
28481	///
28482	/// `AVX512F`
28483	///
28484	/// `16/32/64-bit`
28485	EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er = 3561,
28486	/// `VFNMADD231PS xmm1, xmm2, xmm3/m128`
28487	///
28488	/// `VEX.128.66.0F38.W0 BC /r`
28489	///
28490	/// `FMA`
28491	///
28492	/// `16/32/64-bit`
28493	VEX_Vfnmadd231ps_xmm_xmm_xmmm128 = 3562,
28494	/// `VFNMADD231PS ymm1, ymm2, ymm3/m256`
28495	///
28496	/// `VEX.256.66.0F38.W0 BC /r`
28497	///
28498	/// `FMA`
28499	///
28500	/// `16/32/64-bit`
28501	VEX_Vfnmadd231ps_ymm_ymm_ymmm256 = 3563,
28502	/// `VFNMADD231PD xmm1, xmm2, xmm3/m128`
28503	///
28504	/// `VEX.128.66.0F38.W1 BC /r`
28505	///
28506	/// `FMA`
28507	///
28508	/// `16/32/64-bit`
28509	VEX_Vfnmadd231pd_xmm_xmm_xmmm128 = 3564,
28510	/// `VFNMADD231PD ymm1, ymm2, ymm3/m256`
28511	///
28512	/// `VEX.256.66.0F38.W1 BC /r`
28513	///
28514	/// `FMA`
28515	///
28516	/// `16/32/64-bit`
28517	VEX_Vfnmadd231pd_ymm_ymm_ymmm256 = 3565,
28518	/// `VFNMADD231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28519	///
28520	/// `EVEX.128.66.0F38.W0 BC /r`
28521	///
28522	/// `AVX512VL and AVX512F`
28523	///
28524	/// `16/32/64-bit`
28525	EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32 = 3566,
28526	/// `VFNMADD231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28527	///
28528	/// `EVEX.256.66.0F38.W0 BC /r`
28529	///
28530	/// `AVX512VL and AVX512F`
28531	///
28532	/// `16/32/64-bit`
28533	EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32 = 3567,
28534	/// `VFNMADD231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28535	///
28536	/// `EVEX.512.66.0F38.W0 BC /r`
28537	///
28538	/// `AVX512F`
28539	///
28540	/// `16/32/64-bit`
28541	EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er = 3568,
28542	/// `VFNMADD231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28543	///
28544	/// `EVEX.128.66.0F38.W1 BC /r`
28545	///
28546	/// `AVX512VL and AVX512F`
28547	///
28548	/// `16/32/64-bit`
28549	EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64 = 3569,
28550	/// `VFNMADD231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28551	///
28552	/// `EVEX.256.66.0F38.W1 BC /r`
28553	///
28554	/// `AVX512VL and AVX512F`
28555	///
28556	/// `16/32/64-bit`
28557	EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64 = 3570,
28558	/// `VFNMADD231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28559	///
28560	/// `EVEX.512.66.0F38.W1 BC /r`
28561	///
28562	/// `AVX512F`
28563	///
28564	/// `16/32/64-bit`
28565	EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er = 3571,
28566	/// `VFNMADD231SS xmm1, xmm2, xmm3/m32`
28567	///
28568	/// `VEX.LIG.66.0F38.W0 BD /r`
28569	///
28570	/// `FMA`
28571	///
28572	/// `16/32/64-bit`
28573	VEX_Vfnmadd231ss_xmm_xmm_xmmm32 = 3572,
28574	/// `VFNMADD231SD xmm1, xmm2, xmm3/m64`
28575	///
28576	/// `VEX.LIG.66.0F38.W1 BD /r`
28577	///
28578	/// `FMA`
28579	///
28580	/// `16/32/64-bit`
28581	VEX_Vfnmadd231sd_xmm_xmm_xmmm64 = 3573,
28582	/// `VFNMADD231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
28583	///
28584	/// `EVEX.LIG.66.0F38.W0 BD /r`
28585	///
28586	/// `AVX512F`
28587	///
28588	/// `16/32/64-bit`
28589	EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er = 3574,
28590	/// `VFNMADD231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
28591	///
28592	/// `EVEX.LIG.66.0F38.W1 BD /r`
28593	///
28594	/// `AVX512F`
28595	///
28596	/// `16/32/64-bit`
28597	EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er = 3575,
28598	/// `VFNMSUB231PS xmm1, xmm2, xmm3/m128`
28599	///
28600	/// `VEX.128.66.0F38.W0 BE /r`
28601	///
28602	/// `FMA`
28603	///
28604	/// `16/32/64-bit`
28605	VEX_Vfnmsub231ps_xmm_xmm_xmmm128 = 3576,
28606	/// `VFNMSUB231PS ymm1, ymm2, ymm3/m256`
28607	///
28608	/// `VEX.256.66.0F38.W0 BE /r`
28609	///
28610	/// `FMA`
28611	///
28612	/// `16/32/64-bit`
28613	VEX_Vfnmsub231ps_ymm_ymm_ymmm256 = 3577,
28614	/// `VFNMSUB231PD xmm1, xmm2, xmm3/m128`
28615	///
28616	/// `VEX.128.66.0F38.W1 BE /r`
28617	///
28618	/// `FMA`
28619	///
28620	/// `16/32/64-bit`
28621	VEX_Vfnmsub231pd_xmm_xmm_xmmm128 = 3578,
28622	/// `VFNMSUB231PD ymm1, ymm2, ymm3/m256`
28623	///
28624	/// `VEX.256.66.0F38.W1 BE /r`
28625	///
28626	/// `FMA`
28627	///
28628	/// `16/32/64-bit`
28629	VEX_Vfnmsub231pd_ymm_ymm_ymmm256 = 3579,
28630	/// `VFNMSUB231PS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
28631	///
28632	/// `EVEX.128.66.0F38.W0 BE /r`
28633	///
28634	/// `AVX512VL and AVX512F`
28635	///
28636	/// `16/32/64-bit`
28637	EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32 = 3580,
28638	/// `VFNMSUB231PS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
28639	///
28640	/// `EVEX.256.66.0F38.W0 BE /r`
28641	///
28642	/// `AVX512VL and AVX512F`
28643	///
28644	/// `16/32/64-bit`
28645	EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32 = 3581,
28646	/// `VFNMSUB231PS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
28647	///
28648	/// `EVEX.512.66.0F38.W0 BE /r`
28649	///
28650	/// `AVX512F`
28651	///
28652	/// `16/32/64-bit`
28653	EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er = 3582,
28654	/// `VFNMSUB231PD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst`
28655	///
28656	/// `EVEX.128.66.0F38.W1 BE /r`
28657	///
28658	/// `AVX512VL and AVX512F`
28659	///
28660	/// `16/32/64-bit`
28661	EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64 = 3583,
28662	/// `VFNMSUB231PD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst`
28663	///
28664	/// `EVEX.256.66.0F38.W1 BE /r`
28665	///
28666	/// `AVX512VL and AVX512F`
28667	///
28668	/// `16/32/64-bit`
28669	EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64 = 3584,
28670	/// `VFNMSUB231PD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{er}`
28671	///
28672	/// `EVEX.512.66.0F38.W1 BE /r`
28673	///
28674	/// `AVX512F`
28675	///
28676	/// `16/32/64-bit`
28677	EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er = 3585,
28678	/// `VFNMSUB231SS xmm1, xmm2, xmm3/m32`
28679	///
28680	/// `VEX.LIG.66.0F38.W0 BF /r`
28681	///
28682	/// `FMA`
28683	///
28684	/// `16/32/64-bit`
28685	VEX_Vfnmsub231ss_xmm_xmm_xmmm32 = 3586,
28686	/// `VFNMSUB231SD xmm1, xmm2, xmm3/m64`
28687	///
28688	/// `VEX.LIG.66.0F38.W1 BF /r`
28689	///
28690	/// `FMA`
28691	///
28692	/// `16/32/64-bit`
28693	VEX_Vfnmsub231sd_xmm_xmm_xmmm64 = 3587,
28694	/// `VFNMSUB231SS xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
28695	///
28696	/// `EVEX.LIG.66.0F38.W0 BF /r`
28697	///
28698	/// `AVX512F`
28699	///
28700	/// `16/32/64-bit`
28701	EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er = 3588,
28702	/// `VFNMSUB231SD xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
28703	///
28704	/// `EVEX.LIG.66.0F38.W1 BF /r`
28705	///
28706	/// `AVX512F`
28707	///
28708	/// `16/32/64-bit`
28709	EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er = 3589,
28710	/// `VPCONFLICTD xmm1 {k1}{z}, xmm2/m128/m32bcst`
28711	///
28712	/// `EVEX.128.66.0F38.W0 C4 /r`
28713	///
28714	/// `AVX512VL and AVX512CD`
28715	///
28716	/// `16/32/64-bit`
28717	EVEX_Vpconflictd_xmm_k1z_xmmm128b32 = 3590,
28718	/// `VPCONFLICTD ymm1 {k1}{z}, ymm2/m256/m32bcst`
28719	///
28720	/// `EVEX.256.66.0F38.W0 C4 /r`
28721	///
28722	/// `AVX512VL and AVX512CD`
28723	///
28724	/// `16/32/64-bit`
28725	EVEX_Vpconflictd_ymm_k1z_ymmm256b32 = 3591,
28726	/// `VPCONFLICTD zmm1 {k1}{z}, zmm2/m512/m32bcst`
28727	///
28728	/// `EVEX.512.66.0F38.W0 C4 /r`
28729	///
28730	/// `AVX512CD`
28731	///
28732	/// `16/32/64-bit`
28733	EVEX_Vpconflictd_zmm_k1z_zmmm512b32 = 3592,
28734	/// `VPCONFLICTQ xmm1 {k1}{z}, xmm2/m128/m64bcst`
28735	///
28736	/// `EVEX.128.66.0F38.W1 C4 /r`
28737	///
28738	/// `AVX512VL and AVX512CD`
28739	///
28740	/// `16/32/64-bit`
28741	EVEX_Vpconflictq_xmm_k1z_xmmm128b64 = 3593,
28742	/// `VPCONFLICTQ ymm1 {k1}{z}, ymm2/m256/m64bcst`
28743	///
28744	/// `EVEX.256.66.0F38.W1 C4 /r`
28745	///
28746	/// `AVX512VL and AVX512CD`
28747	///
28748	/// `16/32/64-bit`
28749	EVEX_Vpconflictq_ymm_k1z_ymmm256b64 = 3594,
28750	/// `VPCONFLICTQ zmm1 {k1}{z}, zmm2/m512/m64bcst`
28751	///
28752	/// `EVEX.512.66.0F38.W1 C4 /r`
28753	///
28754	/// `AVX512CD`
28755	///
28756	/// `16/32/64-bit`
28757	EVEX_Vpconflictq_zmm_k1z_zmmm512b64 = 3595,
28758	/// `VGATHERPF0DPS vm32z {k1}`
28759	///
28760	/// `EVEX.512.66.0F38.W0 C6 /1 /vsib`
28761	///
28762	/// `AVX512PF`
28763	///
28764	/// `16/32/64-bit`
28765	EVEX_Vgatherpf0dps_vm32z_k1 = 3596,
28766	/// `VGATHERPF0DPD vm32y {k1}`
28767	///
28768	/// `EVEX.512.66.0F38.W1 C6 /1 /vsib`
28769	///
28770	/// `AVX512PF`
28771	///
28772	/// `16/32/64-bit`
28773	EVEX_Vgatherpf0dpd_vm32y_k1 = 3597,
28774	/// `VGATHERPF1DPS vm32z {k1}`
28775	///
28776	/// `EVEX.512.66.0F38.W0 C6 /2 /vsib`
28777	///
28778	/// `AVX512PF`
28779	///
28780	/// `16/32/64-bit`
28781	EVEX_Vgatherpf1dps_vm32z_k1 = 3598,
28782	/// `VGATHERPF1DPD vm32y {k1}`
28783	///
28784	/// `EVEX.512.66.0F38.W1 C6 /2 /vsib`
28785	///
28786	/// `AVX512PF`
28787	///
28788	/// `16/32/64-bit`
28789	EVEX_Vgatherpf1dpd_vm32y_k1 = 3599,
28790	/// `VSCATTERPF0DPS vm32z {k1}`
28791	///
28792	/// `EVEX.512.66.0F38.W0 C6 /5 /vsib`
28793	///
28794	/// `AVX512PF`
28795	///
28796	/// `16/32/64-bit`
28797	EVEX_Vscatterpf0dps_vm32z_k1 = 3600,
28798	/// `VSCATTERPF0DPD vm32y {k1}`
28799	///
28800	/// `EVEX.512.66.0F38.W1 C6 /5 /vsib`
28801	///
28802	/// `AVX512PF`
28803	///
28804	/// `16/32/64-bit`
28805	EVEX_Vscatterpf0dpd_vm32y_k1 = 3601,
28806	/// `VSCATTERPF1DPS vm32z {k1}`
28807	///
28808	/// `EVEX.512.66.0F38.W0 C6 /6 /vsib`
28809	///
28810	/// `AVX512PF`
28811	///
28812	/// `16/32/64-bit`
28813	EVEX_Vscatterpf1dps_vm32z_k1 = 3602,
28814	/// `VSCATTERPF1DPD vm32y {k1}`
28815	///
28816	/// `EVEX.512.66.0F38.W1 C6 /6 /vsib`
28817	///
28818	/// `AVX512PF`
28819	///
28820	/// `16/32/64-bit`
28821	EVEX_Vscatterpf1dpd_vm32y_k1 = 3603,
28822	/// `VGATHERPF0QPS vm64z {k1}`
28823	///
28824	/// `EVEX.512.66.0F38.W0 C7 /1 /vsib`
28825	///
28826	/// `AVX512PF`
28827	///
28828	/// `16/32/64-bit`
28829	EVEX_Vgatherpf0qps_vm64z_k1 = 3604,
28830	/// `VGATHERPF0QPD vm64z {k1}`
28831	///
28832	/// `EVEX.512.66.0F38.W1 C7 /1 /vsib`
28833	///
28834	/// `AVX512PF`
28835	///
28836	/// `16/32/64-bit`
28837	EVEX_Vgatherpf0qpd_vm64z_k1 = 3605,
28838	/// `VGATHERPF1QPS vm64z {k1}`
28839	///
28840	/// `EVEX.512.66.0F38.W0 C7 /2 /vsib`
28841	///
28842	/// `AVX512PF`
28843	///
28844	/// `16/32/64-bit`
28845	EVEX_Vgatherpf1qps_vm64z_k1 = 3606,
28846	/// `VGATHERPF1QPD vm64z {k1}`
28847	///
28848	/// `EVEX.512.66.0F38.W1 C7 /2 /vsib`
28849	///
28850	/// `AVX512PF`
28851	///
28852	/// `16/32/64-bit`
28853	EVEX_Vgatherpf1qpd_vm64z_k1 = 3607,
28854	/// `VSCATTERPF0QPS vm64z {k1}`
28855	///
28856	/// `EVEX.512.66.0F38.W0 C7 /5 /vsib`
28857	///
28858	/// `AVX512PF`
28859	///
28860	/// `16/32/64-bit`
28861	EVEX_Vscatterpf0qps_vm64z_k1 = 3608,
28862	/// `VSCATTERPF0QPD vm64z {k1}`
28863	///
28864	/// `EVEX.512.66.0F38.W1 C7 /5 /vsib`
28865	///
28866	/// `AVX512PF`
28867	///
28868	/// `16/32/64-bit`
28869	EVEX_Vscatterpf0qpd_vm64z_k1 = 3609,
28870	/// `VSCATTERPF1QPS vm64z {k1}`
28871	///
28872	/// `EVEX.512.66.0F38.W0 C7 /6 /vsib`
28873	///
28874	/// `AVX512PF`
28875	///
28876	/// `16/32/64-bit`
28877	EVEX_Vscatterpf1qps_vm64z_k1 = 3610,
28878	/// `VSCATTERPF1QPD vm64z {k1}`
28879	///
28880	/// `EVEX.512.66.0F38.W1 C7 /6 /vsib`
28881	///
28882	/// `AVX512PF`
28883	///
28884	/// `16/32/64-bit`
28885	EVEX_Vscatterpf1qpd_vm64z_k1 = 3611,
28886	/// `SHA1NEXTE xmm1, xmm2/m128`
28887	///
28888	/// `NP 0F 38 C8 /r`
28889	///
28890	/// `SHA`
28891	///
28892	/// `16/32/64-bit`
28893	Sha1nexte_xmm_xmmm128 = 3612,
28894	/// `VEXP2PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
28895	///
28896	/// `EVEX.512.66.0F38.W0 C8 /r`
28897	///
28898	/// `AVX512ER`
28899	///
28900	/// `16/32/64-bit`
28901	EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae = 3613,
28902	/// `VEXP2PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
28903	///
28904	/// `EVEX.512.66.0F38.W1 C8 /r`
28905	///
28906	/// `AVX512ER`
28907	///
28908	/// `16/32/64-bit`
28909	EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae = 3614,
28910	/// `SHA1MSG1 xmm1, xmm2/m128`
28911	///
28912	/// `NP 0F 38 C9 /r`
28913	///
28914	/// `SHA`
28915	///
28916	/// `16/32/64-bit`
28917	Sha1msg1_xmm_xmmm128 = 3615,
28918	/// `SHA1MSG2 xmm1, xmm2/m128`
28919	///
28920	/// `NP 0F 38 CA /r`
28921	///
28922	/// `SHA`
28923	///
28924	/// `16/32/64-bit`
28925	Sha1msg2_xmm_xmmm128 = 3616,
28926	/// `VRCP28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
28927	///
28928	/// `EVEX.512.66.0F38.W0 CA /r`
28929	///
28930	/// `AVX512ER`
28931	///
28932	/// `16/32/64-bit`
28933	EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae = 3617,
28934	/// `VRCP28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
28935	///
28936	/// `EVEX.512.66.0F38.W1 CA /r`
28937	///
28938	/// `AVX512ER`
28939	///
28940	/// `16/32/64-bit`
28941	EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae = 3618,
28942	/// `SHA256RNDS2 xmm1, xmm2/m128, <XMM0>`
28943	///
28944	/// `NP 0F 38 CB /r`
28945	///
28946	/// `SHA`
28947	///
28948	/// `16/32/64-bit`
28949	Sha256rnds2_xmm_xmmm128 = 3619,
28950	/// `VRCP28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
28951	///
28952	/// `EVEX.LIG.66.0F38.W0 CB /r`
28953	///
28954	/// `AVX512ER`
28955	///
28956	/// `16/32/64-bit`
28957	EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae = 3620,
28958	/// `VRCP28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}`
28959	///
28960	/// `EVEX.LIG.66.0F38.W1 CB /r`
28961	///
28962	/// `AVX512ER`
28963	///
28964	/// `16/32/64-bit`
28965	EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae = 3621,
28966	/// `SHA256MSG1 xmm1, xmm2/m128`
28967	///
28968	/// `NP 0F 38 CC /r`
28969	///
28970	/// `SHA`
28971	///
28972	/// `16/32/64-bit`
28973	Sha256msg1_xmm_xmmm128 = 3622,
28974	/// `VRSQRT28PS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}`
28975	///
28976	/// `EVEX.512.66.0F38.W0 CC /r`
28977	///
28978	/// `AVX512ER`
28979	///
28980	/// `16/32/64-bit`
28981	EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae = 3623,
28982	/// `VRSQRT28PD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}`
28983	///
28984	/// `EVEX.512.66.0F38.W1 CC /r`
28985	///
28986	/// `AVX512ER`
28987	///
28988	/// `16/32/64-bit`
28989	EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae = 3624,
28990	/// `SHA256MSG2 xmm1, xmm2/m128`
28991	///
28992	/// `NP 0F 38 CD /r`
28993	///
28994	/// `SHA`
28995	///
28996	/// `16/32/64-bit`
28997	Sha256msg2_xmm_xmmm128 = 3625,
28998	/// `VRSQRT28SS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}`
28999	///
29000	/// `EVEX.LIG.66.0F38.W0 CD /r`
29001	///
29002	/// `AVX512ER`
29003	///
29004	/// `16/32/64-bit`
29005	EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae = 3626,
29006	/// `VRSQRT28SD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}`
29007	///
29008	/// `EVEX.LIG.66.0F38.W1 CD /r`
29009	///
29010	/// `AVX512ER`
29011	///
29012	/// `16/32/64-bit`
29013	EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae = 3627,
29014	/// `GF2P8MULB xmm1, xmm2/m128`
29015	///
29016	/// `66 0F 38 CF /r`
29017	///
29018	/// `GFNI`
29019	///
29020	/// `16/32/64-bit`
29021	Gf2p8mulb_xmm_xmmm128 = 3628,
29022	/// `VGF2P8MULB xmm1, xmm2, xmm3/m128`
29023	///
29024	/// `VEX.128.66.0F38.W0 CF /r`
29025	///
29026	/// `AVX and GFNI`
29027	///
29028	/// `16/32/64-bit`
29029	VEX_Vgf2p8mulb_xmm_xmm_xmmm128 = 3629,
29030	/// `VGF2P8MULB ymm1, ymm2, ymm3/m256`
29031	///
29032	/// `VEX.256.66.0F38.W0 CF /r`
29033	///
29034	/// `AVX and GFNI`
29035	///
29036	/// `16/32/64-bit`
29037	VEX_Vgf2p8mulb_ymm_ymm_ymmm256 = 3630,
29038	/// `VGF2P8MULB xmm1 {k1}{z}, xmm2, xmm3/m128`
29039	///
29040	/// `EVEX.128.66.0F38.W0 CF /r`
29041	///
29042	/// `AVX512VL and GFNI`
29043	///
29044	/// `16/32/64-bit`
29045	EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128 = 3631,
29046	/// `VGF2P8MULB ymm1 {k1}{z}, ymm2, ymm3/m256`
29047	///
29048	/// `EVEX.256.66.0F38.W0 CF /r`
29049	///
29050	/// `AVX512VL and GFNI`
29051	///
29052	/// `16/32/64-bit`
29053	EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256 = 3632,
29054	/// `VGF2P8MULB zmm1 {k1}{z}, zmm2, zmm3/m512`
29055	///
29056	/// `EVEX.512.66.0F38.W0 CF /r`
29057	///
29058	/// `AVX512F and GFNI`
29059	///
29060	/// `16/32/64-bit`
29061	EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512 = 3633,
29062	/// `AESIMC xmm1, xmm2/m128`
29063	///
29064	/// `66 0F 38 DB /r`
29065	///
29066	/// `AES`
29067	///
29068	/// `16/32/64-bit`
29069	Aesimc_xmm_xmmm128 = 3634,
29070	/// `VAESIMC xmm1, xmm2/m128`
29071	///
29072	/// `VEX.128.66.0F38.WIG DB /r`
29073	///
29074	/// `AES and AVX`
29075	///
29076	/// `16/32/64-bit`
29077	VEX_Vaesimc_xmm_xmmm128 = 3635,
29078	/// `AESENC xmm1, xmm2/m128`
29079	///
29080	/// `66 0F 38 DC /r`
29081	///
29082	/// `AES`
29083	///
29084	/// `16/32/64-bit`
29085	Aesenc_xmm_xmmm128 = 3636,
29086	/// `VAESENC xmm1, xmm2, xmm3/m128`
29087	///
29088	/// `VEX.128.66.0F38.WIG DC /r`
29089	///
29090	/// `AES and AVX`
29091	///
29092	/// `16/32/64-bit`
29093	VEX_Vaesenc_xmm_xmm_xmmm128 = 3637,
29094	/// `VAESENC ymm1, ymm2, ymm3/m256`
29095	///
29096	/// `VEX.256.66.0F38.WIG DC /r`
29097	///
29098	/// `VAES`
29099	///
29100	/// `16/32/64-bit`
29101	VEX_Vaesenc_ymm_ymm_ymmm256 = 3638,
29102	/// `VAESENC xmm1, xmm2, xmm3/m128`
29103	///
29104	/// `EVEX.128.66.0F38.WIG DC /r`
29105	///
29106	/// `AVX512VL and VAES`
29107	///
29108	/// `16/32/64-bit`
29109	EVEX_Vaesenc_xmm_xmm_xmmm128 = 3639,
29110	/// `VAESENC ymm1, ymm2, ymm3/m256`
29111	///
29112	/// `EVEX.256.66.0F38.WIG DC /r`
29113	///
29114	/// `AVX512VL and VAES`
29115	///
29116	/// `16/32/64-bit`
29117	EVEX_Vaesenc_ymm_ymm_ymmm256 = 3640,
29118	/// `VAESENC zmm1, zmm2, zmm3/m512`
29119	///
29120	/// `EVEX.512.66.0F38.WIG DC /r`
29121	///
29122	/// `AVX512F and VAES`
29123	///
29124	/// `16/32/64-bit`
29125	EVEX_Vaesenc_zmm_zmm_zmmm512 = 3641,
29126	/// `AESENCLAST xmm1, xmm2/m128`
29127	///
29128	/// `66 0F 38 DD /r`
29129	///
29130	/// `AES`
29131	///
29132	/// `16/32/64-bit`
29133	Aesenclast_xmm_xmmm128 = 3642,
29134	/// `VAESENCLAST xmm1, xmm2, xmm3/m128`
29135	///
29136	/// `VEX.128.66.0F38.WIG DD /r`
29137	///
29138	/// `AES and AVX`
29139	///
29140	/// `16/32/64-bit`
29141	VEX_Vaesenclast_xmm_xmm_xmmm128 = 3643,
29142	/// `VAESENCLAST ymm1, ymm2, ymm3/m256`
29143	///
29144	/// `VEX.256.66.0F38.WIG DD /r`
29145	///
29146	/// `VAES`
29147	///
29148	/// `16/32/64-bit`
29149	VEX_Vaesenclast_ymm_ymm_ymmm256 = 3644,
29150	/// `VAESENCLAST xmm1, xmm2, xmm3/m128`
29151	///
29152	/// `EVEX.128.66.0F38.WIG DD /r`
29153	///
29154	/// `AVX512VL and VAES`
29155	///
29156	/// `16/32/64-bit`
29157	EVEX_Vaesenclast_xmm_xmm_xmmm128 = 3645,
29158	/// `VAESENCLAST ymm1, ymm2, ymm3/m256`
29159	///
29160	/// `EVEX.256.66.0F38.WIG DD /r`
29161	///
29162	/// `AVX512VL and VAES`
29163	///
29164	/// `16/32/64-bit`
29165	EVEX_Vaesenclast_ymm_ymm_ymmm256 = 3646,
29166	/// `VAESENCLAST zmm1, zmm2, zmm3/m512`
29167	///
29168	/// `EVEX.512.66.0F38.WIG DD /r`
29169	///
29170	/// `AVX512F and VAES`
29171	///
29172	/// `16/32/64-bit`
29173	EVEX_Vaesenclast_zmm_zmm_zmmm512 = 3647,
29174	/// `AESDEC xmm1, xmm2/m128`
29175	///
29176	/// `66 0F 38 DE /r`
29177	///
29178	/// `AES`
29179	///
29180	/// `16/32/64-bit`
29181	Aesdec_xmm_xmmm128 = 3648,
29182	/// `VAESDEC xmm1, xmm2, xmm3/m128`
29183	///
29184	/// `VEX.128.66.0F38.WIG DE /r`
29185	///
29186	/// `AES and AVX`
29187	///
29188	/// `16/32/64-bit`
29189	VEX_Vaesdec_xmm_xmm_xmmm128 = 3649,
29190	/// `VAESDEC ymm1, ymm2, ymm3/m256`
29191	///
29192	/// `VEX.256.66.0F38.WIG DE /r`
29193	///
29194	/// `VAES`
29195	///
29196	/// `16/32/64-bit`
29197	VEX_Vaesdec_ymm_ymm_ymmm256 = 3650,
29198	/// `VAESDEC xmm1, xmm2, xmm3/m128`
29199	///
29200	/// `EVEX.128.66.0F38.WIG DE /r`
29201	///
29202	/// `AVX512VL and VAES`
29203	///
29204	/// `16/32/64-bit`
29205	EVEX_Vaesdec_xmm_xmm_xmmm128 = 3651,
29206	/// `VAESDEC ymm1, ymm2, ymm3/m256`
29207	///
29208	/// `EVEX.256.66.0F38.WIG DE /r`
29209	///
29210	/// `AVX512VL and VAES`
29211	///
29212	/// `16/32/64-bit`
29213	EVEX_Vaesdec_ymm_ymm_ymmm256 = 3652,
29214	/// `VAESDEC zmm1, zmm2, zmm3/m512`
29215	///
29216	/// `EVEX.512.66.0F38.WIG DE /r`
29217	///
29218	/// `AVX512F and VAES`
29219	///
29220	/// `16/32/64-bit`
29221	EVEX_Vaesdec_zmm_zmm_zmmm512 = 3653,
29222	/// `AESDECLAST xmm1, xmm2/m128`
29223	///
29224	/// `66 0F 38 DF /r`
29225	///
29226	/// `AES`
29227	///
29228	/// `16/32/64-bit`
29229	Aesdeclast_xmm_xmmm128 = 3654,
29230	/// `VAESDECLAST xmm1, xmm2, xmm3/m128`
29231	///
29232	/// `VEX.128.66.0F38.WIG DF /r`
29233	///
29234	/// `AES and AVX`
29235	///
29236	/// `16/32/64-bit`
29237	VEX_Vaesdeclast_xmm_xmm_xmmm128 = 3655,
29238	/// `VAESDECLAST ymm1, ymm2, ymm3/m256`
29239	///
29240	/// `VEX.256.66.0F38.WIG DF /r`
29241	///
29242	/// `VAES`
29243	///
29244	/// `16/32/64-bit`
29245	VEX_Vaesdeclast_ymm_ymm_ymmm256 = 3656,
29246	/// `VAESDECLAST xmm1, xmm2, xmm3/m128`
29247	///
29248	/// `EVEX.128.66.0F38.WIG DF /r`
29249	///
29250	/// `AVX512VL and VAES`
29251	///
29252	/// `16/32/64-bit`
29253	EVEX_Vaesdeclast_xmm_xmm_xmmm128 = 3657,
29254	/// `VAESDECLAST ymm1, ymm2, ymm3/m256`
29255	///
29256	/// `EVEX.256.66.0F38.WIG DF /r`
29257	///
29258	/// `AVX512VL and VAES`
29259	///
29260	/// `16/32/64-bit`
29261	EVEX_Vaesdeclast_ymm_ymm_ymmm256 = 3658,
29262	/// `VAESDECLAST zmm1, zmm2, zmm3/m512`
29263	///
29264	/// `EVEX.512.66.0F38.WIG DF /r`
29265	///
29266	/// `AVX512F and VAES`
29267	///
29268	/// `16/32/64-bit`
29269	EVEX_Vaesdeclast_zmm_zmm_zmmm512 = 3659,
29270	/// `MOVBE r16, m16`
29271	///
29272	/// `o16 0F 38 F0 /r`
29273	///
29274	/// `MOVBE`
29275	///
29276	/// `16/32/64-bit`
29277	Movbe_r16_m16 = 3660,
29278	/// `MOVBE r32, m32`
29279	///
29280	/// `o32 0F 38 F0 /r`
29281	///
29282	/// `MOVBE`
29283	///
29284	/// `16/32/64-bit`
29285	Movbe_r32_m32 = 3661,
29286	/// `MOVBE r64, m64`
29287	///
29288	/// `o64 0F 38 F0 /r`
29289	///
29290	/// `MOVBE`
29291	///
29292	/// `64-bit`
29293	Movbe_r64_m64 = 3662,
29294	/// `CRC32 r32, r/m8`
29295	///
29296	/// `F2 0F 38 F0 /r`
29297	///
29298	/// `SSE4.2`
29299	///
29300	/// `16/32/64-bit`
29301	Crc32_r32_rm8 = 3663,
29302	/// `CRC32 r64, r/m8`
29303	///
29304	/// `F2 o64 0F 38 F0 /r`
29305	///
29306	/// `SSE4.2`
29307	///
29308	/// `64-bit`
29309	Crc32_r64_rm8 = 3664,
29310	/// `MOVBE m16, r16`
29311	///
29312	/// `o16 0F 38 F1 /r`
29313	///
29314	/// `MOVBE`
29315	///
29316	/// `16/32/64-bit`
29317	Movbe_m16_r16 = 3665,
29318	/// `MOVBE m32, r32`
29319	///
29320	/// `o32 0F 38 F1 /r`
29321	///
29322	/// `MOVBE`
29323	///
29324	/// `16/32/64-bit`
29325	Movbe_m32_r32 = 3666,
29326	/// `MOVBE m64, r64`
29327	///
29328	/// `o64 0F 38 F1 /r`
29329	///
29330	/// `MOVBE`
29331	///
29332	/// `64-bit`
29333	Movbe_m64_r64 = 3667,
29334	/// `CRC32 r32, r/m16`
29335	///
29336	/// `o16 F2 0F 38 F1 /r`
29337	///
29338	/// `SSE4.2`
29339	///
29340	/// `16/32/64-bit`
29341	Crc32_r32_rm16 = 3668,
29342	/// `CRC32 r32, r/m32`
29343	///
29344	/// `o32 F2 0F 38 F1 /r`
29345	///
29346	/// `SSE4.2`
29347	///
29348	/// `16/32/64-bit`
29349	Crc32_r32_rm32 = 3669,
29350	/// `CRC32 r64, r/m64`
29351	///
29352	/// `F2 o64 0F 38 F1 /r`
29353	///
29354	/// `SSE4.2`
29355	///
29356	/// `64-bit`
29357	Crc32_r64_rm64 = 3670,
29358	/// `ANDN r32a, r32b, r/m32`
29359	///
29360	/// `VEX.LZ.0F38.W0 F2 /r`
29361	///
29362	/// `BMI1`
29363	///
29364	/// `16/32/64-bit`
29365	VEX_Andn_r32_r32_rm32 = 3671,
29366	/// `ANDN r64a, r64b, r/m64`
29367	///
29368	/// `VEX.LZ.0F38.W1 F2 /r`
29369	///
29370	/// `BMI1`
29371	///
29372	/// `64-bit`
29373	VEX_Andn_r64_r64_rm64 = 3672,
29374	/// `BLSR r32, r/m32`
29375	///
29376	/// `VEX.LZ.0F38.W0 F3 /1`
29377	///
29378	/// `BMI1`
29379	///
29380	/// `16/32/64-bit`
29381	VEX_Blsr_r32_rm32 = 3673,
29382	/// `BLSR r64, r/m64`
29383	///
29384	/// `VEX.LZ.0F38.W1 F3 /1`
29385	///
29386	/// `BMI1`
29387	///
29388	/// `64-bit`
29389	VEX_Blsr_r64_rm64 = 3674,
29390	/// `BLSMSK r32, r/m32`
29391	///
29392	/// `VEX.LZ.0F38.W0 F3 /2`
29393	///
29394	/// `BMI1`
29395	///
29396	/// `16/32/64-bit`
29397	VEX_Blsmsk_r32_rm32 = 3675,
29398	/// `BLSMSK r64, r/m64`
29399	///
29400	/// `VEX.LZ.0F38.W1 F3 /2`
29401	///
29402	/// `BMI1`
29403	///
29404	/// `64-bit`
29405	VEX_Blsmsk_r64_rm64 = 3676,
29406	/// `BLSI r32, r/m32`
29407	///
29408	/// `VEX.LZ.0F38.W0 F3 /3`
29409	///
29410	/// `BMI1`
29411	///
29412	/// `16/32/64-bit`
29413	VEX_Blsi_r32_rm32 = 3677,
29414	/// `BLSI r64, r/m64`
29415	///
29416	/// `VEX.LZ.0F38.W1 F3 /3`
29417	///
29418	/// `BMI1`
29419	///
29420	/// `64-bit`
29421	VEX_Blsi_r64_rm64 = 3678,
29422	/// `BZHI r32a, r/m32, r32b`
29423	///
29424	/// `VEX.LZ.0F38.W0 F5 /r`
29425	///
29426	/// `BMI2`
29427	///
29428	/// `16/32/64-bit`
29429	VEX_Bzhi_r32_rm32_r32 = 3679,
29430	/// `BZHI r64a, r/m64, r64b`
29431	///
29432	/// `VEX.LZ.0F38.W1 F5 /r`
29433	///
29434	/// `BMI2`
29435	///
29436	/// `64-bit`
29437	VEX_Bzhi_r64_rm64_r64 = 3680,
29438	/// `WRUSSD m32, r32`
29439	///
29440	/// `66 0F 38 F5 /r`
29441	///
29442	/// `CET_SS`
29443	///
29444	/// `16/32/64-bit`
29445	Wrussd_m32_r32 = 3681,
29446	/// `WRUSSQ m64, r64`
29447	///
29448	/// `66 o64 0F 38 F5 /r`
29449	///
29450	/// `CET_SS`
29451	///
29452	/// `64-bit`
29453	Wrussq_m64_r64 = 3682,
29454	/// `PEXT r32a, r32b, r/m32`
29455	///
29456	/// `VEX.LZ.F3.0F38.W0 F5 /r`
29457	///
29458	/// `BMI2`
29459	///
29460	/// `16/32/64-bit`
29461	VEX_Pext_r32_r32_rm32 = 3683,
29462	/// `PEXT r64a, r64b, r/m64`
29463	///
29464	/// `VEX.LZ.F3.0F38.W1 F5 /r`
29465	///
29466	/// `BMI2`
29467	///
29468	/// `64-bit`
29469	VEX_Pext_r64_r64_rm64 = 3684,
29470	/// `PDEP r32a, r32b, r/m32`
29471	///
29472	/// `VEX.LZ.F2.0F38.W0 F5 /r`
29473	///
29474	/// `BMI2`
29475	///
29476	/// `16/32/64-bit`
29477	VEX_Pdep_r32_r32_rm32 = 3685,
29478	/// `PDEP r64a, r64b, r/m64`
29479	///
29480	/// `VEX.LZ.F2.0F38.W1 F5 /r`
29481	///
29482	/// `BMI2`
29483	///
29484	/// `64-bit`
29485	VEX_Pdep_r64_r64_rm64 = 3686,
29486	/// `WRSSD m32, r32`
29487	///
29488	/// `NP 0F 38 F6 /r`
29489	///
29490	/// `CET_SS`
29491	///
29492	/// `16/32/64-bit`
29493	Wrssd_m32_r32 = 3687,
29494	/// `WRSSQ m64, r64`
29495	///
29496	/// `NP o64 0F 38 F6 /r`
29497	///
29498	/// `CET_SS`
29499	///
29500	/// `64-bit`
29501	Wrssq_m64_r64 = 3688,
29502	/// `ADCX r32, r/m32`
29503	///
29504	/// `66 0F 38 F6 /r`
29505	///
29506	/// `ADX`
29507	///
29508	/// `16/32/64-bit`
29509	Adcx_r32_rm32 = 3689,
29510	/// `ADCX r64, r/m64`
29511	///
29512	/// `66 o64 0F 38 F6 /r`
29513	///
29514	/// `ADX`
29515	///
29516	/// `64-bit`
29517	Adcx_r64_rm64 = 3690,
29518	/// `ADOX r32, r/m32`
29519	///
29520	/// `F3 0F 38 F6 /r`
29521	///
29522	/// `ADX`
29523	///
29524	/// `16/32/64-bit`
29525	Adox_r32_rm32 = 3691,
29526	/// `ADOX r64, r/m64`
29527	///
29528	/// `F3 o64 0F 38 F6 /r`
29529	///
29530	/// `ADX`
29531	///
29532	/// `64-bit`
29533	Adox_r64_rm64 = 3692,
29534	/// `MULX r32a, r32b, r/m32`
29535	///
29536	/// `VEX.LZ.F2.0F38.W0 F6 /r`
29537	///
29538	/// `BMI2`
29539	///
29540	/// `16/32/64-bit`
29541	VEX_Mulx_r32_r32_rm32 = 3693,
29542	/// `MULX r64a, r64b, r/m64`
29543	///
29544	/// `VEX.LZ.F2.0F38.W1 F6 /r`
29545	///
29546	/// `BMI2`
29547	///
29548	/// `64-bit`
29549	VEX_Mulx_r64_r64_rm64 = 3694,
29550	/// `BEXTR r32a, r/m32, r32b`
29551	///
29552	/// `VEX.LZ.0F38.W0 F7 /r`
29553	///
29554	/// `BMI1`
29555	///
29556	/// `16/32/64-bit`
29557	VEX_Bextr_r32_rm32_r32 = 3695,
29558	/// `BEXTR r64a, r/m64, r64b`
29559	///
29560	/// `VEX.LZ.0F38.W1 F7 /r`
29561	///
29562	/// `BMI1`
29563	///
29564	/// `64-bit`
29565	VEX_Bextr_r64_rm64_r64 = 3696,
29566	/// `SHLX r32a, r/m32, r32b`
29567	///
29568	/// `VEX.LZ.66.0F38.W0 F7 /r`
29569	///
29570	/// `BMI2`
29571	///
29572	/// `16/32/64-bit`
29573	VEX_Shlx_r32_rm32_r32 = 3697,
29574	/// `SHLX r64a, r/m64, r64b`
29575	///
29576	/// `VEX.LZ.66.0F38.W1 F7 /r`
29577	///
29578	/// `BMI2`
29579	///
29580	/// `64-bit`
29581	VEX_Shlx_r64_rm64_r64 = 3698,
29582	/// `SARX r32a, r/m32, r32b`
29583	///
29584	/// `VEX.LZ.F3.0F38.W0 F7 /r`
29585	///
29586	/// `BMI2`
29587	///
29588	/// `16/32/64-bit`
29589	VEX_Sarx_r32_rm32_r32 = 3699,
29590	/// `SARX r64a, r/m64, r64b`
29591	///
29592	/// `VEX.LZ.F3.0F38.W1 F7 /r`
29593	///
29594	/// `BMI2`
29595	///
29596	/// `64-bit`
29597	VEX_Sarx_r64_rm64_r64 = 3700,
29598	/// `SHRX r32a, r/m32, r32b`
29599	///
29600	/// `VEX.LZ.F2.0F38.W0 F7 /r`
29601	///
29602	/// `BMI2`
29603	///
29604	/// `16/32/64-bit`
29605	VEX_Shrx_r32_rm32_r32 = 3701,
29606	/// `SHRX r64a, r/m64, r64b`
29607	///
29608	/// `VEX.LZ.F2.0F38.W1 F7 /r`
29609	///
29610	/// `BMI2`
29611	///
29612	/// `64-bit`
29613	VEX_Shrx_r64_rm64_r64 = 3702,
29614	/// `MOVDIR64B r16, m512`
29615	///
29616	/// `a16 66 0F 38 F8 /r`
29617	///
29618	/// `MOVDIR64B`
29619	///
29620	/// `16/32-bit`
29621	Movdir64b_r16_m512 = 3703,
29622	/// `MOVDIR64B r32, m512`
29623	///
29624	/// `a32 66 0F 38 F8 /r`
29625	///
29626	/// `MOVDIR64B`
29627	///
29628	/// `16/32/64-bit`
29629	Movdir64b_r32_m512 = 3704,
29630	/// `MOVDIR64B r64, m512`
29631	///
29632	/// `a64 66 0F 38 F8 /r`
29633	///
29634	/// `MOVDIR64B`
29635	///
29636	/// `64-bit`
29637	Movdir64b_r64_m512 = 3705,
29638	/// `ENQCMDS r16, m512`
29639	///
29640	/// `a16 F3 0F 38 F8 !(11):rrr:bbb`
29641	///
29642	/// `ENQCMD`
29643	///
29644	/// `16/32-bit`
29645	Enqcmds_r16_m512 = 3706,
29646	/// `ENQCMDS r32, m512`
29647	///
29648	/// `a32 F3 0F 38 F8 !(11):rrr:bbb`
29649	///
29650	/// `ENQCMD`
29651	///
29652	/// `16/32/64-bit`
29653	Enqcmds_r32_m512 = 3707,
29654	/// `ENQCMDS r64, m512`
29655	///
29656	/// `a64 F3 0F 38 F8 !(11):rrr:bbb`
29657	///
29658	/// `ENQCMD`
29659	///
29660	/// `64-bit`
29661	Enqcmds_r64_m512 = 3708,
29662	/// `ENQCMD r16, m512`
29663	///
29664	/// `a16 F2 0F 38 F8 !(11):rrr:bbb`
29665	///
29666	/// `ENQCMD`
29667	///
29668	/// `16/32-bit`
29669	Enqcmd_r16_m512 = 3709,
29670	/// `ENQCMD r32, m512`
29671	///
29672	/// `a32 F2 0F 38 F8 !(11):rrr:bbb`
29673	///
29674	/// `ENQCMD`
29675	///
29676	/// `16/32/64-bit`
29677	Enqcmd_r32_m512 = 3710,
29678	/// `ENQCMD r64, m512`
29679	///
29680	/// `a64 F2 0F 38 F8 !(11):rrr:bbb`
29681	///
29682	/// `ENQCMD`
29683	///
29684	/// `64-bit`
29685	Enqcmd_r64_m512 = 3711,
29686	/// `MOVDIRI m32, r32`
29687	///
29688	/// `NP 0F 38 F9 /r`
29689	///
29690	/// `MOVDIRI`
29691	///
29692	/// `16/32/64-bit`
29693	Movdiri_m32_r32 = 3712,
29694	/// `MOVDIRI m64, r64`
29695	///
29696	/// `NP o64 0F 38 F9 /r`
29697	///
29698	/// `MOVDIRI`
29699	///
29700	/// `64-bit`
29701	Movdiri_m64_r64 = 3713,
29702	/// `VPERMQ ymm1, ymm2/m256, imm8`
29703	///
29704	/// `VEX.256.66.0F3A.W1 00 /r ib`
29705	///
29706	/// `AVX2`
29707	///
29708	/// `16/32/64-bit`
29709	VEX_Vpermq_ymm_ymmm256_imm8 = 3714,
29710	/// `VPERMQ ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
29711	///
29712	/// `EVEX.256.66.0F3A.W1 00 /r ib`
29713	///
29714	/// `AVX512VL and AVX512F`
29715	///
29716	/// `16/32/64-bit`
29717	EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8 = 3715,
29718	/// `VPERMQ zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
29719	///
29720	/// `EVEX.512.66.0F3A.W1 00 /r ib`
29721	///
29722	/// `AVX512F`
29723	///
29724	/// `16/32/64-bit`
29725	EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8 = 3716,
29726	/// `VPERMPD ymm1, ymm2/m256, imm8`
29727	///
29728	/// `VEX.256.66.0F3A.W1 01 /r ib`
29729	///
29730	/// `AVX2`
29731	///
29732	/// `16/32/64-bit`
29733	VEX_Vpermpd_ymm_ymmm256_imm8 = 3717,
29734	/// `VPERMPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
29735	///
29736	/// `EVEX.256.66.0F3A.W1 01 /r ib`
29737	///
29738	/// `AVX512VL and AVX512F`
29739	///
29740	/// `16/32/64-bit`
29741	EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8 = 3718,
29742	/// `VPERMPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
29743	///
29744	/// `EVEX.512.66.0F3A.W1 01 /r ib`
29745	///
29746	/// `AVX512F`
29747	///
29748	/// `16/32/64-bit`
29749	EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8 = 3719,
29750	/// `VPBLENDD xmm1, xmm2, xmm3/m128, imm8`
29751	///
29752	/// `VEX.128.66.0F3A.W0 02 /r ib`
29753	///
29754	/// `AVX2`
29755	///
29756	/// `16/32/64-bit`
29757	VEX_Vpblendd_xmm_xmm_xmmm128_imm8 = 3720,
29758	/// `VPBLENDD ymm1, ymm2, ymm3/m256, imm8`
29759	///
29760	/// `VEX.256.66.0F3A.W0 02 /r ib`
29761	///
29762	/// `AVX2`
29763	///
29764	/// `16/32/64-bit`
29765	VEX_Vpblendd_ymm_ymm_ymmm256_imm8 = 3721,
29766	/// `VALIGND xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
29767	///
29768	/// `EVEX.128.66.0F3A.W0 03 /r ib`
29769	///
29770	/// `AVX512VL and AVX512F`
29771	///
29772	/// `16/32/64-bit`
29773	EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8 = 3722,
29774	/// `VALIGND ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
29775	///
29776	/// `EVEX.256.66.0F3A.W0 03 /r ib`
29777	///
29778	/// `AVX512VL and AVX512F`
29779	///
29780	/// `16/32/64-bit`
29781	EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8 = 3723,
29782	/// `VALIGND zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
29783	///
29784	/// `EVEX.512.66.0F3A.W0 03 /r ib`
29785	///
29786	/// `AVX512F`
29787	///
29788	/// `16/32/64-bit`
29789	EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8 = 3724,
29790	/// `VALIGNQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
29791	///
29792	/// `EVEX.128.66.0F3A.W1 03 /r ib`
29793	///
29794	/// `AVX512VL and AVX512F`
29795	///
29796	/// `16/32/64-bit`
29797	EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8 = 3725,
29798	/// `VALIGNQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
29799	///
29800	/// `EVEX.256.66.0F3A.W1 03 /r ib`
29801	///
29802	/// `AVX512VL and AVX512F`
29803	///
29804	/// `16/32/64-bit`
29805	EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8 = 3726,
29806	/// `VALIGNQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
29807	///
29808	/// `EVEX.512.66.0F3A.W1 03 /r ib`
29809	///
29810	/// `AVX512F`
29811	///
29812	/// `16/32/64-bit`
29813	EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8 = 3727,
29814	/// `VPERMILPS xmm1, xmm2/m128, imm8`
29815	///
29816	/// `VEX.128.66.0F3A.W0 04 /r ib`
29817	///
29818	/// `AVX`
29819	///
29820	/// `16/32/64-bit`
29821	VEX_Vpermilps_xmm_xmmm128_imm8 = 3728,
29822	/// `VPERMILPS ymm1, ymm2/m256, imm8`
29823	///
29824	/// `VEX.256.66.0F3A.W0 04 /r ib`
29825	///
29826	/// `AVX`
29827	///
29828	/// `16/32/64-bit`
29829	VEX_Vpermilps_ymm_ymmm256_imm8 = 3729,
29830	/// `VPERMILPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
29831	///
29832	/// `EVEX.128.66.0F3A.W0 04 /r ib`
29833	///
29834	/// `AVX512VL and AVX512F`
29835	///
29836	/// `16/32/64-bit`
29837	EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8 = 3730,
29838	/// `VPERMILPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
29839	///
29840	/// `EVEX.256.66.0F3A.W0 04 /r ib`
29841	///
29842	/// `AVX512VL and AVX512F`
29843	///
29844	/// `16/32/64-bit`
29845	EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8 = 3731,
29846	/// `VPERMILPS zmm1 {k1}{z}, zmm2/m512/m32bcst, imm8`
29847	///
29848	/// `EVEX.512.66.0F3A.W0 04 /r ib`
29849	///
29850	/// `AVX512F`
29851	///
29852	/// `16/32/64-bit`
29853	EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8 = 3732,
29854	/// `VPERMILPD xmm1, xmm2/m128, imm8`
29855	///
29856	/// `VEX.128.66.0F3A.W0 05 /r ib`
29857	///
29858	/// `AVX`
29859	///
29860	/// `16/32/64-bit`
29861	VEX_Vpermilpd_xmm_xmmm128_imm8 = 3733,
29862	/// `VPERMILPD ymm1, ymm2/m256, imm8`
29863	///
29864	/// `VEX.256.66.0F3A.W0 05 /r ib`
29865	///
29866	/// `AVX`
29867	///
29868	/// `16/32/64-bit`
29869	VEX_Vpermilpd_ymm_ymmm256_imm8 = 3734,
29870	/// `VPERMILPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
29871	///
29872	/// `EVEX.128.66.0F3A.W1 05 /r ib`
29873	///
29874	/// `AVX512VL and AVX512F`
29875	///
29876	/// `16/32/64-bit`
29877	EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8 = 3735,
29878	/// `VPERMILPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
29879	///
29880	/// `EVEX.256.66.0F3A.W1 05 /r ib`
29881	///
29882	/// `AVX512VL and AVX512F`
29883	///
29884	/// `16/32/64-bit`
29885	EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8 = 3736,
29886	/// `VPERMILPD zmm1 {k1}{z}, zmm2/m512/m64bcst, imm8`
29887	///
29888	/// `EVEX.512.66.0F3A.W1 05 /r ib`
29889	///
29890	/// `AVX512F`
29891	///
29892	/// `16/32/64-bit`
29893	EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8 = 3737,
29894	/// `VPERM2F128 ymm1, ymm2, ymm3/m256, imm8`
29895	///
29896	/// `VEX.256.66.0F3A.W0 06 /r ib`
29897	///
29898	/// `AVX`
29899	///
29900	/// `16/32/64-bit`
29901	VEX_Vperm2f128_ymm_ymm_ymmm256_imm8 = 3738,
29902	/// `ROUNDPS xmm1, xmm2/m128, imm8`
29903	///
29904	/// `66 0F 3A 08 /r ib`
29905	///
29906	/// `SSE4.1`
29907	///
29908	/// `16/32/64-bit`
29909	Roundps_xmm_xmmm128_imm8 = 3739,
29910	/// `VROUNDPS xmm1, xmm2/m128, imm8`
29911	///
29912	/// `VEX.128.66.0F3A.WIG 08 /r ib`
29913	///
29914	/// `AVX`
29915	///
29916	/// `16/32/64-bit`
29917	VEX_Vroundps_xmm_xmmm128_imm8 = 3740,
29918	/// `VROUNDPS ymm1, ymm2/m256, imm8`
29919	///
29920	/// `VEX.256.66.0F3A.WIG 08 /r ib`
29921	///
29922	/// `AVX`
29923	///
29924	/// `16/32/64-bit`
29925	VEX_Vroundps_ymm_ymmm256_imm8 = 3741,
29926	/// `VRNDSCALEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
29927	///
29928	/// `EVEX.128.66.0F3A.W0 08 /r ib`
29929	///
29930	/// `AVX512VL and AVX512F`
29931	///
29932	/// `16/32/64-bit`
29933	EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8 = 3742,
29934	/// `VRNDSCALEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
29935	///
29936	/// `EVEX.256.66.0F3A.W0 08 /r ib`
29937	///
29938	/// `AVX512VL and AVX512F`
29939	///
29940	/// `16/32/64-bit`
29941	EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8 = 3743,
29942	/// `VRNDSCALEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8`
29943	///
29944	/// `EVEX.512.66.0F3A.W0 08 /r ib`
29945	///
29946	/// `AVX512F`
29947	///
29948	/// `16/32/64-bit`
29949	EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae = 3744,
29950	/// `ROUNDPD xmm1, xmm2/m128, imm8`
29951	///
29952	/// `66 0F 3A 09 /r ib`
29953	///
29954	/// `SSE4.1`
29955	///
29956	/// `16/32/64-bit`
29957	Roundpd_xmm_xmmm128_imm8 = 3745,
29958	/// `VROUNDPD xmm1, xmm2/m128, imm8`
29959	///
29960	/// `VEX.128.66.0F3A.WIG 09 /r ib`
29961	///
29962	/// `AVX`
29963	///
29964	/// `16/32/64-bit`
29965	VEX_Vroundpd_xmm_xmmm128_imm8 = 3746,
29966	/// `VROUNDPD ymm1, ymm2/m256, imm8`
29967	///
29968	/// `VEX.256.66.0F3A.WIG 09 /r ib`
29969	///
29970	/// `AVX`
29971	///
29972	/// `16/32/64-bit`
29973	VEX_Vroundpd_ymm_ymmm256_imm8 = 3747,
29974	/// `VRNDSCALEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
29975	///
29976	/// `EVEX.128.66.0F3A.W1 09 /r ib`
29977	///
29978	/// `AVX512VL and AVX512F`
29979	///
29980	/// `16/32/64-bit`
29981	EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8 = 3748,
29982	/// `VRNDSCALEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
29983	///
29984	/// `EVEX.256.66.0F3A.W1 09 /r ib`
29985	///
29986	/// `AVX512VL and AVX512F`
29987	///
29988	/// `16/32/64-bit`
29989	EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8 = 3749,
29990	/// `VRNDSCALEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8`
29991	///
29992	/// `EVEX.512.66.0F3A.W1 09 /r ib`
29993	///
29994	/// `AVX512F`
29995	///
29996	/// `16/32/64-bit`
29997	EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae = 3750,
29998	/// `ROUNDSS xmm1, xmm2/m32, imm8`
29999	///
30000	/// `66 0F 3A 0A /r ib`
30001	///
30002	/// `SSE4.1`
30003	///
30004	/// `16/32/64-bit`
30005	Roundss_xmm_xmmm32_imm8 = 3751,
30006	/// `VROUNDSS xmm1, xmm2, xmm3/m32, imm8`
30007	///
30008	/// `VEX.LIG.66.0F3A.WIG 0A /r ib`
30009	///
30010	/// `AVX`
30011	///
30012	/// `16/32/64-bit`
30013	VEX_Vroundss_xmm_xmm_xmmm32_imm8 = 3752,
30014	/// `VRNDSCALESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8`
30015	///
30016	/// `EVEX.LIG.66.0F3A.W0 0A /r ib`
30017	///
30018	/// `AVX512F`
30019	///
30020	/// `16/32/64-bit`
30021	EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae = 3753,
30022	/// `ROUNDSD xmm1, xmm2/m64, imm8`
30023	///
30024	/// `66 0F 3A 0B /r ib`
30025	///
30026	/// `SSE4.1`
30027	///
30028	/// `16/32/64-bit`
30029	Roundsd_xmm_xmmm64_imm8 = 3754,
30030	/// `VROUNDSD xmm1, xmm2, xmm3/m64, imm8`
30031	///
30032	/// `VEX.LIG.66.0F3A.WIG 0B /r ib`
30033	///
30034	/// `AVX`
30035	///
30036	/// `16/32/64-bit`
30037	VEX_Vroundsd_xmm_xmm_xmmm64_imm8 = 3755,
30038	/// `VRNDSCALESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8`
30039	///
30040	/// `EVEX.LIG.66.0F3A.W1 0B /r ib`
30041	///
30042	/// `AVX512F`
30043	///
30044	/// `16/32/64-bit`
30045	EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3756,
30046	/// `BLENDPS xmm1, xmm2/m128, imm8`
30047	///
30048	/// `66 0F 3A 0C /r ib`
30049	///
30050	/// `SSE4.1`
30051	///
30052	/// `16/32/64-bit`
30053	Blendps_xmm_xmmm128_imm8 = 3757,
30054	/// `VBLENDPS xmm1, xmm2, xmm3/m128, imm8`
30055	///
30056	/// `VEX.128.66.0F3A.WIG 0C /r ib`
30057	///
30058	/// `AVX`
30059	///
30060	/// `16/32/64-bit`
30061	VEX_Vblendps_xmm_xmm_xmmm128_imm8 = 3758,
30062	/// `VBLENDPS ymm1, ymm2, ymm3/m256, imm8`
30063	///
30064	/// `VEX.256.66.0F3A.WIG 0C /r ib`
30065	///
30066	/// `AVX`
30067	///
30068	/// `16/32/64-bit`
30069	VEX_Vblendps_ymm_ymm_ymmm256_imm8 = 3759,
30070	/// `BLENDPD xmm1, xmm2/m128, imm8`
30071	///
30072	/// `66 0F 3A 0D /r ib`
30073	///
30074	/// `SSE4.1`
30075	///
30076	/// `16/32/64-bit`
30077	Blendpd_xmm_xmmm128_imm8 = 3760,
30078	/// `VBLENDPD xmm1, xmm2, xmm3/m128, imm8`
30079	///
30080	/// `VEX.128.66.0F3A.WIG 0D /r ib`
30081	///
30082	/// `AVX`
30083	///
30084	/// `16/32/64-bit`
30085	VEX_Vblendpd_xmm_xmm_xmmm128_imm8 = 3761,
30086	/// `VBLENDPD ymm1, ymm2, ymm3/m256, imm8`
30087	///
30088	/// `VEX.256.66.0F3A.WIG 0D /r ib`
30089	///
30090	/// `AVX`
30091	///
30092	/// `16/32/64-bit`
30093	VEX_Vblendpd_ymm_ymm_ymmm256_imm8 = 3762,
30094	/// `PBLENDW xmm1, xmm2/m128, imm8`
30095	///
30096	/// `66 0F 3A 0E /r ib`
30097	///
30098	/// `SSE4.1`
30099	///
30100	/// `16/32/64-bit`
30101	Pblendw_xmm_xmmm128_imm8 = 3763,
30102	/// `VPBLENDW xmm1, xmm2, xmm3/m128, imm8`
30103	///
30104	/// `VEX.128.66.0F3A.WIG 0E /r ib`
30105	///
30106	/// `AVX`
30107	///
30108	/// `16/32/64-bit`
30109	VEX_Vpblendw_xmm_xmm_xmmm128_imm8 = 3764,
30110	/// `VPBLENDW ymm1, ymm2, ymm3/m256, imm8`
30111	///
30112	/// `VEX.256.66.0F3A.WIG 0E /r ib`
30113	///
30114	/// `AVX2`
30115	///
30116	/// `16/32/64-bit`
30117	VEX_Vpblendw_ymm_ymm_ymmm256_imm8 = 3765,
30118	/// `PALIGNR mm1, mm2/m64, imm8`
30119	///
30120	/// `NP 0F 3A 0F /r ib`
30121	///
30122	/// `SSSE3`
30123	///
30124	/// `16/32/64-bit`
30125	Palignr_mm_mmm64_imm8 = 3766,
30126	/// `PALIGNR xmm1, xmm2/m128, imm8`
30127	///
30128	/// `66 0F 3A 0F /r ib`
30129	///
30130	/// `SSSE3`
30131	///
30132	/// `16/32/64-bit`
30133	Palignr_xmm_xmmm128_imm8 = 3767,
30134	/// `VPALIGNR xmm1, xmm2, xmm3/m128, imm8`
30135	///
30136	/// `VEX.128.66.0F3A.WIG 0F /r ib`
30137	///
30138	/// `AVX`
30139	///
30140	/// `16/32/64-bit`
30141	VEX_Vpalignr_xmm_xmm_xmmm128_imm8 = 3768,
30142	/// `VPALIGNR ymm1, ymm2, ymm3/m256, imm8`
30143	///
30144	/// `VEX.256.66.0F3A.WIG 0F /r ib`
30145	///
30146	/// `AVX2`
30147	///
30148	/// `16/32/64-bit`
30149	VEX_Vpalignr_ymm_ymm_ymmm256_imm8 = 3769,
30150	/// `VPALIGNR xmm1 {k1}{z}, xmm2, xmm3/m128, imm8`
30151	///
30152	/// `EVEX.128.66.0F3A.WIG 0F /r ib`
30153	///
30154	/// `AVX512VL and AVX512BW`
30155	///
30156	/// `16/32/64-bit`
30157	EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8 = 3770,
30158	/// `VPALIGNR ymm1 {k1}{z}, ymm2, ymm3/m256, imm8`
30159	///
30160	/// `EVEX.256.66.0F3A.WIG 0F /r ib`
30161	///
30162	/// `AVX512VL and AVX512BW`
30163	///
30164	/// `16/32/64-bit`
30165	EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8 = 3771,
30166	/// `VPALIGNR zmm1 {k1}{z}, zmm2, zmm3/m512, imm8`
30167	///
30168	/// `EVEX.512.66.0F3A.WIG 0F /r ib`
30169	///
30170	/// `AVX512BW`
30171	///
30172	/// `16/32/64-bit`
30173	EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8 = 3772,
30174	/// `PEXTRB r32/m8, xmm2, imm8`
30175	///
30176	/// `66 0F 3A 14 /r ib`
30177	///
30178	/// `SSE4.1`
30179	///
30180	/// `16/32/64-bit`
30181	Pextrb_r32m8_xmm_imm8 = 3773,
30182	/// `PEXTRB r64/m8, xmm2, imm8`
30183	///
30184	/// `66 o64 0F 3A 14 /r ib`
30185	///
30186	/// `SSE4.1`
30187	///
30188	/// `64-bit`
30189	Pextrb_r64m8_xmm_imm8 = 3774,
30190	/// `VPEXTRB r32/m8, xmm2, imm8`
30191	///
30192	/// `VEX.128.66.0F3A.W0 14 /r ib`
30193	///
30194	/// `AVX`
30195	///
30196	/// `16/32/64-bit`
30197	VEX_Vpextrb_r32m8_xmm_imm8 = 3775,
30198	/// `VPEXTRB r64/m8, xmm2, imm8`
30199	///
30200	/// `VEX.128.66.0F3A.W1 14 /r ib`
30201	///
30202	/// `AVX`
30203	///
30204	/// `64-bit`
30205	VEX_Vpextrb_r64m8_xmm_imm8 = 3776,
30206	/// `VPEXTRB r32/m8, xmm2, imm8`
30207	///
30208	/// `EVEX.128.66.0F3A.W0 14 /r ib`
30209	///
30210	/// `AVX512BW`
30211	///
30212	/// `16/32/64-bit`
30213	EVEX_Vpextrb_r32m8_xmm_imm8 = 3777,
30214	/// `VPEXTRB r64/m8, xmm2, imm8`
30215	///
30216	/// `EVEX.128.66.0F3A.W1 14 /r ib`
30217	///
30218	/// `AVX512BW`
30219	///
30220	/// `64-bit`
30221	EVEX_Vpextrb_r64m8_xmm_imm8 = 3778,
30222	/// `PEXTRW r32/m16, xmm, imm8`
30223	///
30224	/// `66 0F 3A 15 /r ib`
30225	///
30226	/// `SSE4.1`
30227	///
30228	/// `16/32/64-bit`
30229	Pextrw_r32m16_xmm_imm8 = 3779,
30230	/// `PEXTRW r64/m16, xmm, imm8`
30231	///
30232	/// `66 o64 0F 3A 15 /r ib`
30233	///
30234	/// `SSE4.1`
30235	///
30236	/// `64-bit`
30237	Pextrw_r64m16_xmm_imm8 = 3780,
30238	/// `VPEXTRW r32/m16, xmm2, imm8`
30239	///
30240	/// `VEX.128.66.0F3A.W0 15 /r ib`
30241	///
30242	/// `AVX`
30243	///
30244	/// `16/32/64-bit`
30245	VEX_Vpextrw_r32m16_xmm_imm8 = 3781,
30246	/// `VPEXTRW r64/m16, xmm2, imm8`
30247	///
30248	/// `VEX.128.66.0F3A.W1 15 /r ib`
30249	///
30250	/// `AVX`
30251	///
30252	/// `64-bit`
30253	VEX_Vpextrw_r64m16_xmm_imm8 = 3782,
30254	/// `VPEXTRW r32/m16, xmm2, imm8`
30255	///
30256	/// `EVEX.128.66.0F3A.W0 15 /r ib`
30257	///
30258	/// `AVX512BW`
30259	///
30260	/// `16/32/64-bit`
30261	EVEX_Vpextrw_r32m16_xmm_imm8 = 3783,
30262	/// `VPEXTRW r64/m16, xmm2, imm8`
30263	///
30264	/// `EVEX.128.66.0F3A.W1 15 /r ib`
30265	///
30266	/// `AVX512BW`
30267	///
30268	/// `64-bit`
30269	EVEX_Vpextrw_r64m16_xmm_imm8 = 3784,
30270	/// `PEXTRD r/m32, xmm2, imm8`
30271	///
30272	/// `66 0F 3A 16 /r ib`
30273	///
30274	/// `SSE4.1`
30275	///
30276	/// `16/32/64-bit`
30277	Pextrd_rm32_xmm_imm8 = 3785,
30278	/// `PEXTRQ r/m64, xmm2, imm8`
30279	///
30280	/// `66 o64 0F 3A 16 /r ib`
30281	///
30282	/// `SSE4.1`
30283	///
30284	/// `64-bit`
30285	Pextrq_rm64_xmm_imm8 = 3786,
30286	/// `VPEXTRD r/m32, xmm2, imm8`
30287	///
30288	/// `VEX.128.66.0F3A.W0 16 /r ib`
30289	///
30290	/// `AVX`
30291	///
30292	/// `16/32/64-bit`
30293	VEX_Vpextrd_rm32_xmm_imm8 = 3787,
30294	/// `VPEXTRQ r/m64, xmm2, imm8`
30295	///
30296	/// `VEX.128.66.0F3A.W1 16 /r ib`
30297	///
30298	/// `AVX`
30299	///
30300	/// `64-bit`
30301	VEX_Vpextrq_rm64_xmm_imm8 = 3788,
30302	/// `VPEXTRD r/m32, xmm2, imm8`
30303	///
30304	/// `EVEX.128.66.0F3A.W0 16 /r ib`
30305	///
30306	/// `AVX512DQ`
30307	///
30308	/// `16/32/64-bit`
30309	EVEX_Vpextrd_rm32_xmm_imm8 = 3789,
30310	/// `VPEXTRQ r/m64, xmm2, imm8`
30311	///
30312	/// `EVEX.128.66.0F3A.W1 16 /r ib`
30313	///
30314	/// `AVX512DQ`
30315	///
30316	/// `64-bit`
30317	EVEX_Vpextrq_rm64_xmm_imm8 = 3790,
30318	/// `EXTRACTPS r/m32, xmm1, imm8`
30319	///
30320	/// `66 0F 3A 17 /r ib`
30321	///
30322	/// `SSE4.1`
30323	///
30324	/// `16/32/64-bit`
30325	Extractps_rm32_xmm_imm8 = 3791,
30326	/// `EXTRACTPS r64/m32, xmm1, imm8`
30327	///
30328	/// `66 o64 0F 3A 17 /r ib`
30329	///
30330	/// `SSE4.1`
30331	///
30332	/// `64-bit`
30333	Extractps_r64m32_xmm_imm8 = 3792,
30334	/// `VEXTRACTPS r/m32, xmm1, imm8`
30335	///
30336	/// `VEX.128.66.0F3A.W0 17 /r ib`
30337	///
30338	/// `AVX`
30339	///
30340	/// `16/32/64-bit`
30341	VEX_Vextractps_rm32_xmm_imm8 = 3793,
30342	/// `VEXTRACTPS r64/m32, xmm1, imm8`
30343	///
30344	/// `VEX.128.66.0F3A.W1 17 /r ib`
30345	///
30346	/// `AVX`
30347	///
30348	/// `64-bit`
30349	VEX_Vextractps_r64m32_xmm_imm8 = 3794,
30350	/// `VEXTRACTPS r/m32, xmm1, imm8`
30351	///
30352	/// `EVEX.128.66.0F3A.W0 17 /r ib`
30353	///
30354	/// `AVX512F`
30355	///
30356	/// `16/32/64-bit`
30357	EVEX_Vextractps_rm32_xmm_imm8 = 3795,
30358	/// `VEXTRACTPS r64/m32, xmm1, imm8`
30359	///
30360	/// `EVEX.128.66.0F3A.W1 17 /r ib`
30361	///
30362	/// `AVX512F`
30363	///
30364	/// `64-bit`
30365	EVEX_Vextractps_r64m32_xmm_imm8 = 3796,
30366	/// `VINSERTF128 ymm1, ymm2, xmm3/m128, imm8`
30367	///
30368	/// `VEX.256.66.0F3A.W0 18 /r ib`
30369	///
30370	/// `AVX`
30371	///
30372	/// `16/32/64-bit`
30373	VEX_Vinsertf128_ymm_ymm_xmmm128_imm8 = 3797,
30374	/// `VINSERTF32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8`
30375	///
30376	/// `EVEX.256.66.0F3A.W0 18 /r ib`
30377	///
30378	/// `AVX512VL and AVX512F`
30379	///
30380	/// `16/32/64-bit`
30381	EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8 = 3798,
30382	/// `VINSERTF32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8`
30383	///
30384	/// `EVEX.512.66.0F3A.W0 18 /r ib`
30385	///
30386	/// `AVX512F`
30387	///
30388	/// `16/32/64-bit`
30389	EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8 = 3799,
30390	/// `VINSERTF64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8`
30391	///
30392	/// `EVEX.256.66.0F3A.W1 18 /r ib`
30393	///
30394	/// `AVX512VL and AVX512DQ`
30395	///
30396	/// `16/32/64-bit`
30397	EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8 = 3800,
30398	/// `VINSERTF64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8`
30399	///
30400	/// `EVEX.512.66.0F3A.W1 18 /r ib`
30401	///
30402	/// `AVX512DQ`
30403	///
30404	/// `16/32/64-bit`
30405	EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8 = 3801,
30406	/// `VEXTRACTF128 xmm1/m128, ymm2, imm8`
30407	///
30408	/// `VEX.256.66.0F3A.W0 19 /r ib`
30409	///
30410	/// `AVX`
30411	///
30412	/// `16/32/64-bit`
30413	VEX_Vextractf128_xmmm128_ymm_imm8 = 3802,
30414	/// `VEXTRACTF32X4 xmm1/m128 {k1}{z}, ymm2, imm8`
30415	///
30416	/// `EVEX.256.66.0F3A.W0 19 /r ib`
30417	///
30418	/// `AVX512VL and AVX512F`
30419	///
30420	/// `16/32/64-bit`
30421	EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8 = 3803,
30422	/// `VEXTRACTF32X4 xmm1/m128 {k1}{z}, zmm2, imm8`
30423	///
30424	/// `EVEX.512.66.0F3A.W0 19 /r ib`
30425	///
30426	/// `AVX512F`
30427	///
30428	/// `16/32/64-bit`
30429	EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8 = 3804,
30430	/// `VEXTRACTF64X2 xmm1/m128 {k1}{z}, ymm2, imm8`
30431	///
30432	/// `EVEX.256.66.0F3A.W1 19 /r ib`
30433	///
30434	/// `AVX512VL and AVX512DQ`
30435	///
30436	/// `16/32/64-bit`
30437	EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8 = 3805,
30438	/// `VEXTRACTF64X2 xmm1/m128 {k1}{z}, zmm2, imm8`
30439	///
30440	/// `EVEX.512.66.0F3A.W1 19 /r ib`
30441	///
30442	/// `AVX512DQ`
30443	///
30444	/// `16/32/64-bit`
30445	EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8 = 3806,
30446	/// `VINSERTF32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8`
30447	///
30448	/// `EVEX.512.66.0F3A.W0 1A /r ib`
30449	///
30450	/// `AVX512DQ`
30451	///
30452	/// `16/32/64-bit`
30453	EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8 = 3807,
30454	/// `VINSERTF64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8`
30455	///
30456	/// `EVEX.512.66.0F3A.W1 1A /r ib`
30457	///
30458	/// `AVX512F`
30459	///
30460	/// `16/32/64-bit`
30461	EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8 = 3808,
30462	/// `VEXTRACTF32X8 ymm1/m256 {k1}{z}, zmm2, imm8`
30463	///
30464	/// `EVEX.512.66.0F3A.W0 1B /r ib`
30465	///
30466	/// `AVX512DQ`
30467	///
30468	/// `16/32/64-bit`
30469	EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8 = 3809,
30470	/// `VEXTRACTF64X4 ymm1/m256 {k1}{z}, zmm2, imm8`
30471	///
30472	/// `EVEX.512.66.0F3A.W1 1B /r ib`
30473	///
30474	/// `AVX512F`
30475	///
30476	/// `16/32/64-bit`
30477	EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8 = 3810,
30478	/// `VCVTPS2PH xmm1/m64, xmm2, imm8`
30479	///
30480	/// `VEX.128.66.0F3A.W0 1D /r ib`
30481	///
30482	/// `F16C`
30483	///
30484	/// `16/32/64-bit`
30485	VEX_Vcvtps2ph_xmmm64_xmm_imm8 = 3811,
30486	/// `VCVTPS2PH xmm1/m128, ymm2, imm8`
30487	///
30488	/// `VEX.256.66.0F3A.W0 1D /r ib`
30489	///
30490	/// `F16C`
30491	///
30492	/// `16/32/64-bit`
30493	VEX_Vcvtps2ph_xmmm128_ymm_imm8 = 3812,
30494	/// `VCVTPS2PH xmm1/m64 {k1}{z}, xmm2, imm8`
30495	///
30496	/// `EVEX.128.66.0F3A.W0 1D /r ib`
30497	///
30498	/// `AVX512VL and AVX512F`
30499	///
30500	/// `16/32/64-bit`
30501	EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8 = 3813,
30502	/// `VCVTPS2PH xmm1/m128 {k1}{z}, ymm2, imm8`
30503	///
30504	/// `EVEX.256.66.0F3A.W0 1D /r ib`
30505	///
30506	/// `AVX512VL and AVX512F`
30507	///
30508	/// `16/32/64-bit`
30509	EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8 = 3814,
30510	/// `VCVTPS2PH ymm1/m256 {k1}{z}, zmm2{sae}, imm8`
30511	///
30512	/// `EVEX.512.66.0F3A.W0 1D /r ib`
30513	///
30514	/// `AVX512F`
30515	///
30516	/// `16/32/64-bit`
30517	EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae = 3815,
30518	/// `VPCMPUD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8`
30519	///
30520	/// `EVEX.128.66.0F3A.W0 1E /r ib`
30521	///
30522	/// `AVX512VL and AVX512F`
30523	///
30524	/// `16/32/64-bit`
30525	EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8 = 3816,
30526	/// `VPCMPUD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8`
30527	///
30528	/// `EVEX.256.66.0F3A.W0 1E /r ib`
30529	///
30530	/// `AVX512VL and AVX512F`
30531	///
30532	/// `16/32/64-bit`
30533	EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8 = 3817,
30534	/// `VPCMPUD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8`
30535	///
30536	/// `EVEX.512.66.0F3A.W0 1E /r ib`
30537	///
30538	/// `AVX512F`
30539	///
30540	/// `16/32/64-bit`
30541	EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8 = 3818,
30542	/// `VPCMPUQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8`
30543	///
30544	/// `EVEX.128.66.0F3A.W1 1E /r ib`
30545	///
30546	/// `AVX512VL and AVX512F`
30547	///
30548	/// `16/32/64-bit`
30549	EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8 = 3819,
30550	/// `VPCMPUQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8`
30551	///
30552	/// `EVEX.256.66.0F3A.W1 1E /r ib`
30553	///
30554	/// `AVX512VL and AVX512F`
30555	///
30556	/// `16/32/64-bit`
30557	EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8 = 3820,
30558	/// `VPCMPUQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8`
30559	///
30560	/// `EVEX.512.66.0F3A.W1 1E /r ib`
30561	///
30562	/// `AVX512F`
30563	///
30564	/// `16/32/64-bit`
30565	EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8 = 3821,
30566	/// `VPCMPD k1 {k2}, xmm2, xmm3/m128/m32bcst, imm8`
30567	///
30568	/// `EVEX.128.66.0F3A.W0 1F /r ib`
30569	///
30570	/// `AVX512VL and AVX512F`
30571	///
30572	/// `16/32/64-bit`
30573	EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8 = 3822,
30574	/// `VPCMPD k1 {k2}, ymm2, ymm3/m256/m32bcst, imm8`
30575	///
30576	/// `EVEX.256.66.0F3A.W0 1F /r ib`
30577	///
30578	/// `AVX512VL and AVX512F`
30579	///
30580	/// `16/32/64-bit`
30581	EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8 = 3823,
30582	/// `VPCMPD k1 {k2}, zmm2, zmm3/m512/m32bcst, imm8`
30583	///
30584	/// `EVEX.512.66.0F3A.W0 1F /r ib`
30585	///
30586	/// `AVX512F`
30587	///
30588	/// `16/32/64-bit`
30589	EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8 = 3824,
30590	/// `VPCMPQ k1 {k2}, xmm2, xmm3/m128/m64bcst, imm8`
30591	///
30592	/// `EVEX.128.66.0F3A.W1 1F /r ib`
30593	///
30594	/// `AVX512VL and AVX512F`
30595	///
30596	/// `16/32/64-bit`
30597	EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8 = 3825,
30598	/// `VPCMPQ k1 {k2}, ymm2, ymm3/m256/m64bcst, imm8`
30599	///
30600	/// `EVEX.256.66.0F3A.W1 1F /r ib`
30601	///
30602	/// `AVX512VL and AVX512F`
30603	///
30604	/// `16/32/64-bit`
30605	EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8 = 3826,
30606	/// `VPCMPQ k1 {k2}, zmm2, zmm3/m512/m64bcst, imm8`
30607	///
30608	/// `EVEX.512.66.0F3A.W1 1F /r ib`
30609	///
30610	/// `AVX512F`
30611	///
30612	/// `16/32/64-bit`
30613	EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8 = 3827,
30614	/// `PINSRB xmm1, r32/m8, imm8`
30615	///
30616	/// `66 0F 3A 20 /r ib`
30617	///
30618	/// `SSE4.1`
30619	///
30620	/// `16/32/64-bit`
30621	Pinsrb_xmm_r32m8_imm8 = 3828,
30622	/// `PINSRB xmm1, r64/m8, imm8`
30623	///
30624	/// `66 o64 0F 3A 20 /r ib`
30625	///
30626	/// `SSE4.1`
30627	///
30628	/// `64-bit`
30629	Pinsrb_xmm_r64m8_imm8 = 3829,
30630	/// `VPINSRB xmm1, xmm2, r32/m8, imm8`
30631	///
30632	/// `VEX.128.66.0F3A.W0 20 /r ib`
30633	///
30634	/// `AVX`
30635	///
30636	/// `16/32/64-bit`
30637	VEX_Vpinsrb_xmm_xmm_r32m8_imm8 = 3830,
30638	/// `VPINSRB xmm1, xmm2, r64/m8, imm8`
30639	///
30640	/// `VEX.128.66.0F3A.W1 20 /r ib`
30641	///
30642	/// `AVX`
30643	///
30644	/// `64-bit`
30645	VEX_Vpinsrb_xmm_xmm_r64m8_imm8 = 3831,
30646	/// `VPINSRB xmm1, xmm2, r32/m8, imm8`
30647	///
30648	/// `EVEX.128.66.0F3A.W0 20 /r ib`
30649	///
30650	/// `AVX512BW`
30651	///
30652	/// `16/32/64-bit`
30653	EVEX_Vpinsrb_xmm_xmm_r32m8_imm8 = 3832,
30654	/// `VPINSRB xmm1, xmm2, r64/m8, imm8`
30655	///
30656	/// `EVEX.128.66.0F3A.W1 20 /r ib`
30657	///
30658	/// `AVX512BW`
30659	///
30660	/// `64-bit`
30661	EVEX_Vpinsrb_xmm_xmm_r64m8_imm8 = 3833,
30662	/// `INSERTPS xmm1, xmm2/m32, imm8`
30663	///
30664	/// `66 0F 3A 21 /r ib`
30665	///
30666	/// `SSE4.1`
30667	///
30668	/// `16/32/64-bit`
30669	Insertps_xmm_xmmm32_imm8 = 3834,
30670	/// `VINSERTPS xmm1, xmm2, xmm3/m32, imm8`
30671	///
30672	/// `VEX.128.66.0F3A.WIG 21 /r ib`
30673	///
30674	/// `AVX`
30675	///
30676	/// `16/32/64-bit`
30677	VEX_Vinsertps_xmm_xmm_xmmm32_imm8 = 3835,
30678	/// `VINSERTPS xmm1, xmm2, xmm3/m32, imm8`
30679	///
30680	/// `EVEX.128.66.0F3A.W0 21 /r ib`
30681	///
30682	/// `AVX512F`
30683	///
30684	/// `16/32/64-bit`
30685	EVEX_Vinsertps_xmm_xmm_xmmm32_imm8 = 3836,
30686	/// `PINSRD xmm1, r/m32, imm8`
30687	///
30688	/// `66 0F 3A 22 /r ib`
30689	///
30690	/// `SSE4.1`
30691	///
30692	/// `16/32/64-bit`
30693	Pinsrd_xmm_rm32_imm8 = 3837,
30694	/// `PINSRQ xmm1, r/m64, imm8`
30695	///
30696	/// `66 o64 0F 3A 22 /r ib`
30697	///
30698	/// `SSE4.1`
30699	///
30700	/// `64-bit`
30701	Pinsrq_xmm_rm64_imm8 = 3838,
30702	/// `VPINSRD xmm1, xmm2, r/m32, imm8`
30703	///
30704	/// `VEX.128.66.0F3A.W0 22 /r ib`
30705	///
30706	/// `AVX`
30707	///
30708	/// `16/32/64-bit`
30709	VEX_Vpinsrd_xmm_xmm_rm32_imm8 = 3839,
30710	/// `VPINSRQ xmm1, xmm2, r/m64, imm8`
30711	///
30712	/// `VEX.128.66.0F3A.W1 22 /r ib`
30713	///
30714	/// `AVX`
30715	///
30716	/// `64-bit`
30717	VEX_Vpinsrq_xmm_xmm_rm64_imm8 = 3840,
30718	/// `VPINSRD xmm1, xmm2, r/m32, imm8`
30719	///
30720	/// `EVEX.128.66.0F3A.W0 22 /r ib`
30721	///
30722	/// `AVX512DQ`
30723	///
30724	/// `16/32/64-bit`
30725	EVEX_Vpinsrd_xmm_xmm_rm32_imm8 = 3841,
30726	/// `VPINSRQ xmm1, xmm2, r/m64, imm8`
30727	///
30728	/// `EVEX.128.66.0F3A.W1 22 /r ib`
30729	///
30730	/// `AVX512DQ`
30731	///
30732	/// `64-bit`
30733	EVEX_Vpinsrq_xmm_xmm_rm64_imm8 = 3842,
30734	/// `VSHUFF32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
30735	///
30736	/// `EVEX.256.66.0F3A.W0 23 /r ib`
30737	///
30738	/// `AVX512VL and AVX512F`
30739	///
30740	/// `16/32/64-bit`
30741	EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8 = 3843,
30742	/// `VSHUFF32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
30743	///
30744	/// `EVEX.512.66.0F3A.W0 23 /r ib`
30745	///
30746	/// `AVX512F`
30747	///
30748	/// `16/32/64-bit`
30749	EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8 = 3844,
30750	/// `VSHUFF64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
30751	///
30752	/// `EVEX.256.66.0F3A.W1 23 /r ib`
30753	///
30754	/// `AVX512VL and AVX512F`
30755	///
30756	/// `16/32/64-bit`
30757	EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8 = 3845,
30758	/// `VSHUFF64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
30759	///
30760	/// `EVEX.512.66.0F3A.W1 23 /r ib`
30761	///
30762	/// `AVX512F`
30763	///
30764	/// `16/32/64-bit`
30765	EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8 = 3846,
30766	/// `VPTERNLOGD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
30767	///
30768	/// `EVEX.128.66.0F3A.W0 25 /r ib`
30769	///
30770	/// `AVX512VL and AVX512F`
30771	///
30772	/// `16/32/64-bit`
30773	EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8 = 3847,
30774	/// `VPTERNLOGD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
30775	///
30776	/// `EVEX.256.66.0F3A.W0 25 /r ib`
30777	///
30778	/// `AVX512VL and AVX512F`
30779	///
30780	/// `16/32/64-bit`
30781	EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8 = 3848,
30782	/// `VPTERNLOGD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
30783	///
30784	/// `EVEX.512.66.0F3A.W0 25 /r ib`
30785	///
30786	/// `AVX512F`
30787	///
30788	/// `16/32/64-bit`
30789	EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8 = 3849,
30790	/// `VPTERNLOGQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
30791	///
30792	/// `EVEX.128.66.0F3A.W1 25 /r ib`
30793	///
30794	/// `AVX512VL and AVX512F`
30795	///
30796	/// `16/32/64-bit`
30797	EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8 = 3850,
30798	/// `VPTERNLOGQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
30799	///
30800	/// `EVEX.256.66.0F3A.W1 25 /r ib`
30801	///
30802	/// `AVX512VL and AVX512F`
30803	///
30804	/// `16/32/64-bit`
30805	EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8 = 3851,
30806	/// `VPTERNLOGQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
30807	///
30808	/// `EVEX.512.66.0F3A.W1 25 /r ib`
30809	///
30810	/// `AVX512F`
30811	///
30812	/// `16/32/64-bit`
30813	EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8 = 3852,
30814	/// `VGETMANTPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
30815	///
30816	/// `EVEX.128.66.0F3A.W0 26 /r ib`
30817	///
30818	/// `AVX512VL and AVX512F`
30819	///
30820	/// `16/32/64-bit`
30821	EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8 = 3853,
30822	/// `VGETMANTPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
30823	///
30824	/// `EVEX.256.66.0F3A.W0 26 /r ib`
30825	///
30826	/// `AVX512VL and AVX512F`
30827	///
30828	/// `16/32/64-bit`
30829	EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8 = 3854,
30830	/// `VGETMANTPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8`
30831	///
30832	/// `EVEX.512.66.0F3A.W0 26 /r ib`
30833	///
30834	/// `AVX512F`
30835	///
30836	/// `16/32/64-bit`
30837	EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae = 3855,
30838	/// `VGETMANTPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
30839	///
30840	/// `EVEX.128.66.0F3A.W1 26 /r ib`
30841	///
30842	/// `AVX512VL and AVX512F`
30843	///
30844	/// `16/32/64-bit`
30845	EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8 = 3856,
30846	/// `VGETMANTPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
30847	///
30848	/// `EVEX.256.66.0F3A.W1 26 /r ib`
30849	///
30850	/// `AVX512VL and AVX512F`
30851	///
30852	/// `16/32/64-bit`
30853	EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8 = 3857,
30854	/// `VGETMANTPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8`
30855	///
30856	/// `EVEX.512.66.0F3A.W1 26 /r ib`
30857	///
30858	/// `AVX512F`
30859	///
30860	/// `16/32/64-bit`
30861	EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae = 3858,
30862	/// `VGETMANTSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8`
30863	///
30864	/// `EVEX.LIG.66.0F3A.W0 27 /r ib`
30865	///
30866	/// `AVX512F`
30867	///
30868	/// `16/32/64-bit`
30869	EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae = 3859,
30870	/// `VGETMANTSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8`
30871	///
30872	/// `EVEX.LIG.66.0F3A.W1 27 /r ib`
30873	///
30874	/// `AVX512F`
30875	///
30876	/// `16/32/64-bit`
30877	EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae = 3860,
30878	/// `KSHIFTRB k1, k2, imm8`
30879	///
30880	/// `VEX.L0.66.0F3A.W0 30 /r ib`
30881	///
30882	/// `AVX512DQ`
30883	///
30884	/// `16/32/64-bit`
30885	VEX_Kshiftrb_kr_kr_imm8 = 3861,
30886	/// `KSHIFTRW k1, k2, imm8`
30887	///
30888	/// `VEX.L0.66.0F3A.W1 30 /r ib`
30889	///
30890	/// `AVX512F`
30891	///
30892	/// `16/32/64-bit`
30893	VEX_Kshiftrw_kr_kr_imm8 = 3862,
30894	/// `KSHIFTRD k1, k2, imm8`
30895	///
30896	/// `VEX.L0.66.0F3A.W0 31 /r ib`
30897	///
30898	/// `AVX512BW`
30899	///
30900	/// `16/32/64-bit`
30901	VEX_Kshiftrd_kr_kr_imm8 = 3863,
30902	/// `KSHIFTRQ k1, k2, imm8`
30903	///
30904	/// `VEX.L0.66.0F3A.W1 31 /r ib`
30905	///
30906	/// `AVX512BW`
30907	///
30908	/// `16/32/64-bit`
30909	VEX_Kshiftrq_kr_kr_imm8 = 3864,
30910	/// `KSHIFTLB k1, k2, imm8`
30911	///
30912	/// `VEX.L0.66.0F3A.W0 32 /r ib`
30913	///
30914	/// `AVX512DQ`
30915	///
30916	/// `16/32/64-bit`
30917	VEX_Kshiftlb_kr_kr_imm8 = 3865,
30918	/// `KSHIFTLW k1, k2, imm8`
30919	///
30920	/// `VEX.L0.66.0F3A.W1 32 /r ib`
30921	///
30922	/// `AVX512F`
30923	///
30924	/// `16/32/64-bit`
30925	VEX_Kshiftlw_kr_kr_imm8 = 3866,
30926	/// `KSHIFTLD k1, k2, imm8`
30927	///
30928	/// `VEX.L0.66.0F3A.W0 33 /r ib`
30929	///
30930	/// `AVX512BW`
30931	///
30932	/// `16/32/64-bit`
30933	VEX_Kshiftld_kr_kr_imm8 = 3867,
30934	/// `KSHIFTLQ k1, k2, imm8`
30935	///
30936	/// `VEX.L0.66.0F3A.W1 33 /r ib`
30937	///
30938	/// `AVX512BW`
30939	///
30940	/// `16/32/64-bit`
30941	VEX_Kshiftlq_kr_kr_imm8 = 3868,
30942	/// `VINSERTI128 ymm1, ymm2, xmm3/m128, imm8`
30943	///
30944	/// `VEX.256.66.0F3A.W0 38 /r ib`
30945	///
30946	/// `AVX2`
30947	///
30948	/// `16/32/64-bit`
30949	VEX_Vinserti128_ymm_ymm_xmmm128_imm8 = 3869,
30950	/// `VINSERTI32X4 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8`
30951	///
30952	/// `EVEX.256.66.0F3A.W0 38 /r ib`
30953	///
30954	/// `AVX512VL and AVX512F`
30955	///
30956	/// `16/32/64-bit`
30957	EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8 = 3870,
30958	/// `VINSERTI32X4 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8`
30959	///
30960	/// `EVEX.512.66.0F3A.W0 38 /r ib`
30961	///
30962	/// `AVX512F`
30963	///
30964	/// `16/32/64-bit`
30965	EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8 = 3871,
30966	/// `VINSERTI64X2 ymm1 {k1}{z}, ymm2, xmm3/m128, imm8`
30967	///
30968	/// `EVEX.256.66.0F3A.W1 38 /r ib`
30969	///
30970	/// `AVX512VL and AVX512DQ`
30971	///
30972	/// `16/32/64-bit`
30973	EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8 = 3872,
30974	/// `VINSERTI64X2 zmm1 {k1}{z}, zmm2, xmm3/m128, imm8`
30975	///
30976	/// `EVEX.512.66.0F3A.W1 38 /r ib`
30977	///
30978	/// `AVX512DQ`
30979	///
30980	/// `16/32/64-bit`
30981	EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8 = 3873,
30982	/// `VEXTRACTI128 xmm1/m128, ymm2, imm8`
30983	///
30984	/// `VEX.256.66.0F3A.W0 39 /r ib`
30985	///
30986	/// `AVX2`
30987	///
30988	/// `16/32/64-bit`
30989	VEX_Vextracti128_xmmm128_ymm_imm8 = 3874,
30990	/// `VEXTRACTI32X4 xmm1/m128 {k1}{z}, ymm2, imm8`
30991	///
30992	/// `EVEX.256.66.0F3A.W0 39 /r ib`
30993	///
30994	/// `AVX512VL and AVX512F`
30995	///
30996	/// `16/32/64-bit`
30997	EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8 = 3875,
30998	/// `VEXTRACTI32X4 xmm1/m128 {k1}{z}, zmm2, imm8`
30999	///
31000	/// `EVEX.512.66.0F3A.W0 39 /r ib`
31001	///
31002	/// `AVX512F`
31003	///
31004	/// `16/32/64-bit`
31005	EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8 = 3876,
31006	/// `VEXTRACTI64X2 xmm1/m128 {k1}{z}, ymm2, imm8`
31007	///
31008	/// `EVEX.256.66.0F3A.W1 39 /r ib`
31009	///
31010	/// `AVX512VL and AVX512DQ`
31011	///
31012	/// `16/32/64-bit`
31013	EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8 = 3877,
31014	/// `VEXTRACTI64X2 xmm1/m128 {k1}{z}, zmm2, imm8`
31015	///
31016	/// `EVEX.512.66.0F3A.W1 39 /r ib`
31017	///
31018	/// `AVX512DQ`
31019	///
31020	/// `16/32/64-bit`
31021	EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8 = 3878,
31022	/// `VINSERTI32X8 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8`
31023	///
31024	/// `EVEX.512.66.0F3A.W0 3A /r ib`
31025	///
31026	/// `AVX512DQ`
31027	///
31028	/// `16/32/64-bit`
31029	EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8 = 3879,
31030	/// `VINSERTI64X4 zmm1 {k1}{z}, zmm2, ymm3/m256, imm8`
31031	///
31032	/// `EVEX.512.66.0F3A.W1 3A /r ib`
31033	///
31034	/// `AVX512F`
31035	///
31036	/// `16/32/64-bit`
31037	EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8 = 3880,
31038	/// `VEXTRACTI32X8 ymm1/m256 {k1}{z}, zmm2, imm8`
31039	///
31040	/// `EVEX.512.66.0F3A.W0 3B /r ib`
31041	///
31042	/// `AVX512DQ`
31043	///
31044	/// `16/32/64-bit`
31045	EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8 = 3881,
31046	/// `VEXTRACTI64X4 ymm1/m256 {k1}{z}, zmm2, imm8`
31047	///
31048	/// `EVEX.512.66.0F3A.W1 3B /r ib`
31049	///
31050	/// `AVX512F`
31051	///
31052	/// `16/32/64-bit`
31053	EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8 = 3882,
31054	/// `VPCMPUB k1 {k2}, xmm2, xmm3/m128, imm8`
31055	///
31056	/// `EVEX.128.66.0F3A.W0 3E /r ib`
31057	///
31058	/// `AVX512VL and AVX512BW`
31059	///
31060	/// `16/32/64-bit`
31061	EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8 = 3883,
31062	/// `VPCMPUB k1 {k2}, ymm2, ymm3/m256, imm8`
31063	///
31064	/// `EVEX.256.66.0F3A.W0 3E /r ib`
31065	///
31066	/// `AVX512VL and AVX512BW`
31067	///
31068	/// `16/32/64-bit`
31069	EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8 = 3884,
31070	/// `VPCMPUB k1 {k2}, zmm2, zmm3/m512, imm8`
31071	///
31072	/// `EVEX.512.66.0F3A.W0 3E /r ib`
31073	///
31074	/// `AVX512BW`
31075	///
31076	/// `16/32/64-bit`
31077	EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8 = 3885,
31078	/// `VPCMPUW k1 {k2}, xmm2, xmm3/m128, imm8`
31079	///
31080	/// `EVEX.128.66.0F3A.W1 3E /r ib`
31081	///
31082	/// `AVX512VL and AVX512BW`
31083	///
31084	/// `16/32/64-bit`
31085	EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8 = 3886,
31086	/// `VPCMPUW k1 {k2}, ymm2, ymm3/m256, imm8`
31087	///
31088	/// `EVEX.256.66.0F3A.W1 3E /r ib`
31089	///
31090	/// `AVX512VL and AVX512BW`
31091	///
31092	/// `16/32/64-bit`
31093	EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8 = 3887,
31094	/// `VPCMPUW k1 {k2}, zmm2, zmm3/m512, imm8`
31095	///
31096	/// `EVEX.512.66.0F3A.W1 3E /r ib`
31097	///
31098	/// `AVX512BW`
31099	///
31100	/// `16/32/64-bit`
31101	EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8 = 3888,
31102	/// `VPCMPB k1 {k2}, xmm2, xmm3/m128, imm8`
31103	///
31104	/// `EVEX.128.66.0F3A.W0 3F /r ib`
31105	///
31106	/// `AVX512VL and AVX512BW`
31107	///
31108	/// `16/32/64-bit`
31109	EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8 = 3889,
31110	/// `VPCMPB k1 {k2}, ymm2, ymm3/m256, imm8`
31111	///
31112	/// `EVEX.256.66.0F3A.W0 3F /r ib`
31113	///
31114	/// `AVX512VL and AVX512BW`
31115	///
31116	/// `16/32/64-bit`
31117	EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8 = 3890,
31118	/// `VPCMPB k1 {k2}, zmm2, zmm3/m512, imm8`
31119	///
31120	/// `EVEX.512.66.0F3A.W0 3F /r ib`
31121	///
31122	/// `AVX512BW`
31123	///
31124	/// `16/32/64-bit`
31125	EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8 = 3891,
31126	/// `VPCMPW k1 {k2}, xmm2, xmm3/m128, imm8`
31127	///
31128	/// `EVEX.128.66.0F3A.W1 3F /r ib`
31129	///
31130	/// `AVX512VL and AVX512BW`
31131	///
31132	/// `16/32/64-bit`
31133	EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8 = 3892,
31134	/// `VPCMPW k1 {k2}, ymm2, ymm3/m256, imm8`
31135	///
31136	/// `EVEX.256.66.0F3A.W1 3F /r ib`
31137	///
31138	/// `AVX512VL and AVX512BW`
31139	///
31140	/// `16/32/64-bit`
31141	EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8 = 3893,
31142	/// `VPCMPW k1 {k2}, zmm2, zmm3/m512, imm8`
31143	///
31144	/// `EVEX.512.66.0F3A.W1 3F /r ib`
31145	///
31146	/// `AVX512BW`
31147	///
31148	/// `16/32/64-bit`
31149	EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8 = 3894,
31150	/// `DPPS xmm1, xmm2/m128, imm8`
31151	///
31152	/// `66 0F 3A 40 /r ib`
31153	///
31154	/// `SSE4.1`
31155	///
31156	/// `16/32/64-bit`
31157	Dpps_xmm_xmmm128_imm8 = 3895,
31158	/// `VDPPS xmm1, xmm2, xmm3/m128, imm8`
31159	///
31160	/// `VEX.128.66.0F3A.WIG 40 /r ib`
31161	///
31162	/// `AVX`
31163	///
31164	/// `16/32/64-bit`
31165	VEX_Vdpps_xmm_xmm_xmmm128_imm8 = 3896,
31166	/// `VDPPS ymm1, ymm2, ymm3/m256, imm8`
31167	///
31168	/// `VEX.256.66.0F3A.WIG 40 /r ib`
31169	///
31170	/// `AVX`
31171	///
31172	/// `16/32/64-bit`
31173	VEX_Vdpps_ymm_ymm_ymmm256_imm8 = 3897,
31174	/// `DPPD xmm1, xmm2/m128, imm8`
31175	///
31176	/// `66 0F 3A 41 /r ib`
31177	///
31178	/// `SSE4.1`
31179	///
31180	/// `16/32/64-bit`
31181	Dppd_xmm_xmmm128_imm8 = 3898,
31182	/// `VDPPD xmm1, xmm2, xmm3/m128, imm8`
31183	///
31184	/// `VEX.128.66.0F3A.WIG 41 /r ib`
31185	///
31186	/// `AVX`
31187	///
31188	/// `16/32/64-bit`
31189	VEX_Vdppd_xmm_xmm_xmmm128_imm8 = 3899,
31190	/// `MPSADBW xmm1, xmm2/m128, imm8`
31191	///
31192	/// `66 0F 3A 42 /r ib`
31193	///
31194	/// `SSE4.1`
31195	///
31196	/// `16/32/64-bit`
31197	Mpsadbw_xmm_xmmm128_imm8 = 3900,
31198	/// `VMPSADBW xmm1, xmm2, xmm3/m128, imm8`
31199	///
31200	/// `VEX.128.66.0F3A.WIG 42 /r ib`
31201	///
31202	/// `AVX`
31203	///
31204	/// `16/32/64-bit`
31205	VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8 = 3901,
31206	/// `VMPSADBW ymm1, ymm2, ymm3/m256, imm8`
31207	///
31208	/// `VEX.256.66.0F3A.WIG 42 /r ib`
31209	///
31210	/// `AVX2`
31211	///
31212	/// `16/32/64-bit`
31213	VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8 = 3902,
31214	/// `VDBPSADBW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8`
31215	///
31216	/// `EVEX.128.66.0F3A.W0 42 /r ib`
31217	///
31218	/// `AVX512VL and AVX512BW`
31219	///
31220	/// `16/32/64-bit`
31221	EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8 = 3903,
31222	/// `VDBPSADBW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8`
31223	///
31224	/// `EVEX.256.66.0F3A.W0 42 /r ib`
31225	///
31226	/// `AVX512VL and AVX512BW`
31227	///
31228	/// `16/32/64-bit`
31229	EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8 = 3904,
31230	/// `VDBPSADBW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8`
31231	///
31232	/// `EVEX.512.66.0F3A.W0 42 /r ib`
31233	///
31234	/// `AVX512BW`
31235	///
31236	/// `16/32/64-bit`
31237	EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8 = 3905,
31238	/// `VSHUFI32X4 ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
31239	///
31240	/// `EVEX.256.66.0F3A.W0 43 /r ib`
31241	///
31242	/// `AVX512VL and AVX512F`
31243	///
31244	/// `16/32/64-bit`
31245	EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8 = 3906,
31246	/// `VSHUFI32X4 zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
31247	///
31248	/// `EVEX.512.66.0F3A.W0 43 /r ib`
31249	///
31250	/// `AVX512F`
31251	///
31252	/// `16/32/64-bit`
31253	EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8 = 3907,
31254	/// `VSHUFI64X2 ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
31255	///
31256	/// `EVEX.256.66.0F3A.W1 43 /r ib`
31257	///
31258	/// `AVX512VL and AVX512F`
31259	///
31260	/// `16/32/64-bit`
31261	EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8 = 3908,
31262	/// `VSHUFI64X2 zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
31263	///
31264	/// `EVEX.512.66.0F3A.W1 43 /r ib`
31265	///
31266	/// `AVX512F`
31267	///
31268	/// `16/32/64-bit`
31269	EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8 = 3909,
31270	/// `PCLMULQDQ xmm1, xmm2/m128, imm8`
31271	///
31272	/// `66 0F 3A 44 /r ib`
31273	///
31274	/// `PCLMULQDQ`
31275	///
31276	/// `16/32/64-bit`
31277	Pclmulqdq_xmm_xmmm128_imm8 = 3910,
31278	/// `VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8`
31279	///
31280	/// `VEX.128.66.0F3A.WIG 44 /r ib`
31281	///
31282	/// `PCLMULQDQ and AVX`
31283	///
31284	/// `16/32/64-bit`
31285	VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 = 3911,
31286	/// `VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8`
31287	///
31288	/// `VEX.256.66.0F3A.WIG 44 /r ib`
31289	///
31290	/// `VPCLMULQDQ`
31291	///
31292	/// `16/32/64-bit`
31293	VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 = 3912,
31294	/// `VPCLMULQDQ xmm1, xmm2, xmm3/m128, imm8`
31295	///
31296	/// `EVEX.128.66.0F3A.WIG 44 /r ib`
31297	///
31298	/// `AVX512VL and VPCLMULQDQ`
31299	///
31300	/// `16/32/64-bit`
31301	EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8 = 3913,
31302	/// `VPCLMULQDQ ymm1, ymm2, ymm3/m256, imm8`
31303	///
31304	/// `EVEX.256.66.0F3A.WIG 44 /r ib`
31305	///
31306	/// `AVX512VL and VPCLMULQDQ`
31307	///
31308	/// `16/32/64-bit`
31309	EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8 = 3914,
31310	/// `VPCLMULQDQ zmm1, zmm2, zmm3/m512, imm8`
31311	///
31312	/// `EVEX.512.66.0F3A.WIG 44 /r ib`
31313	///
31314	/// `AVX512F and VPCLMULQDQ`
31315	///
31316	/// `16/32/64-bit`
31317	EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8 = 3915,
31318	/// `VPERM2I128 ymm1, ymm2, ymm3/m256, imm8`
31319	///
31320	/// `VEX.256.66.0F3A.W0 46 /r ib`
31321	///
31322	/// `AVX2`
31323	///
31324	/// `16/32/64-bit`
31325	VEX_Vperm2i128_ymm_ymm_ymmm256_imm8 = 3916,
31326	/// `VPERMIL2PS xmm1, xmm2, xmm3/m128, xmm4, imm4`
31327	///
31328	/// `VEX.128.66.0F3A.W0 48 /r /is5`
31329	///
31330	/// `XOP`
31331	///
31332	/// `16/32/64-bit`
31333	VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4 = 3917,
31334	/// `VPERMIL2PS ymm1, ymm2, ymm3/m256, ymm4, imm4`
31335	///
31336	/// `VEX.256.66.0F3A.W0 48 /r /is5`
31337	///
31338	/// `XOP`
31339	///
31340	/// `16/32/64-bit`
31341	VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4 = 3918,
31342	/// `VPERMIL2PS xmm1, xmm2, xmm3, xmm4/m128, imm4`
31343	///
31344	/// `VEX.128.66.0F3A.W1 48 /r /is5`
31345	///
31346	/// `XOP`
31347	///
31348	/// `16/32/64-bit`
31349	VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4 = 3919,
31350	/// `VPERMIL2PS ymm1, ymm2, ymm3, ymm4/m256, imm4`
31351	///
31352	/// `VEX.256.66.0F3A.W1 48 /r /is5`
31353	///
31354	/// `XOP`
31355	///
31356	/// `16/32/64-bit`
31357	VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4 = 3920,
31358	/// `VPERMIL2PD xmm1, xmm2, xmm3/m128, xmm4, imm4`
31359	///
31360	/// `VEX.128.66.0F3A.W0 49 /r /is5`
31361	///
31362	/// `XOP`
31363	///
31364	/// `16/32/64-bit`
31365	VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4 = 3921,
31366	/// `VPERMIL2PD ymm1, ymm2, ymm3/m256, ymm4, imm4`
31367	///
31368	/// `VEX.256.66.0F3A.W0 49 /r /is5`
31369	///
31370	/// `XOP`
31371	///
31372	/// `16/32/64-bit`
31373	VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4 = 3922,
31374	/// `VPERMIL2PD xmm1, xmm2, xmm3, xmm4/m128, imm4`
31375	///
31376	/// `VEX.128.66.0F3A.W1 49 /r /is5`
31377	///
31378	/// `XOP`
31379	///
31380	/// `16/32/64-bit`
31381	VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4 = 3923,
31382	/// `VPERMIL2PD ymm1, ymm2, ymm3, ymm4/m256, imm4`
31383	///
31384	/// `VEX.256.66.0F3A.W1 49 /r /is5`
31385	///
31386	/// `XOP`
31387	///
31388	/// `16/32/64-bit`
31389	VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4 = 3924,
31390	/// `VBLENDVPS xmm1, xmm2, xmm3/m128, xmm4`
31391	///
31392	/// `VEX.128.66.0F3A.W0 4A /r /is4`
31393	///
31394	/// `AVX`
31395	///
31396	/// `16/32/64-bit`
31397	VEX_Vblendvps_xmm_xmm_xmmm128_xmm = 3925,
31398	/// `VBLENDVPS ymm1, ymm2, ymm3/m256, ymm4`
31399	///
31400	/// `VEX.256.66.0F3A.W0 4A /r /is4`
31401	///
31402	/// `AVX`
31403	///
31404	/// `16/32/64-bit`
31405	VEX_Vblendvps_ymm_ymm_ymmm256_ymm = 3926,
31406	/// `VBLENDVPD xmm1, xmm2, xmm3/m128, xmm4`
31407	///
31408	/// `VEX.128.66.0F3A.W0 4B /r /is4`
31409	///
31410	/// `AVX`
31411	///
31412	/// `16/32/64-bit`
31413	VEX_Vblendvpd_xmm_xmm_xmmm128_xmm = 3927,
31414	/// `VBLENDVPD ymm1, ymm2, ymm3/m256, ymm4`
31415	///
31416	/// `VEX.256.66.0F3A.W0 4B /r /is4`
31417	///
31418	/// `AVX`
31419	///
31420	/// `16/32/64-bit`
31421	VEX_Vblendvpd_ymm_ymm_ymmm256_ymm = 3928,
31422	/// `VPBLENDVB xmm1, xmm2, xmm3/m128, xmm4`
31423	///
31424	/// `VEX.128.66.0F3A.W0 4C /r /is4`
31425	///
31426	/// `AVX`
31427	///
31428	/// `16/32/64-bit`
31429	VEX_Vpblendvb_xmm_xmm_xmmm128_xmm = 3929,
31430	/// `VPBLENDVB ymm1, ymm2, ymm3/m256, ymm4`
31431	///
31432	/// `VEX.256.66.0F3A.W0 4C /r /is4`
31433	///
31434	/// `AVX2`
31435	///
31436	/// `16/32/64-bit`
31437	VEX_Vpblendvb_ymm_ymm_ymmm256_ymm = 3930,
31438	/// `VRANGEPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
31439	///
31440	/// `EVEX.128.66.0F3A.W0 50 /r ib`
31441	///
31442	/// `AVX512VL and AVX512DQ`
31443	///
31444	/// `16/32/64-bit`
31445	EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8 = 3931,
31446	/// `VRANGEPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
31447	///
31448	/// `EVEX.256.66.0F3A.W0 50 /r ib`
31449	///
31450	/// `AVX512VL and AVX512DQ`
31451	///
31452	/// `16/32/64-bit`
31453	EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8 = 3932,
31454	/// `VRANGEPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8`
31455	///
31456	/// `EVEX.512.66.0F3A.W0 50 /r ib`
31457	///
31458	/// `AVX512DQ`
31459	///
31460	/// `16/32/64-bit`
31461	EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae = 3933,
31462	/// `VRANGEPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
31463	///
31464	/// `EVEX.128.66.0F3A.W1 50 /r ib`
31465	///
31466	/// `AVX512VL and AVX512DQ`
31467	///
31468	/// `16/32/64-bit`
31469	EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8 = 3934,
31470	/// `VRANGEPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
31471	///
31472	/// `EVEX.256.66.0F3A.W1 50 /r ib`
31473	///
31474	/// `AVX512VL and AVX512DQ`
31475	///
31476	/// `16/32/64-bit`
31477	EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8 = 3935,
31478	/// `VRANGEPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8`
31479	///
31480	/// `EVEX.512.66.0F3A.W1 50 /r ib`
31481	///
31482	/// `AVX512DQ`
31483	///
31484	/// `16/32/64-bit`
31485	EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae = 3936,
31486	/// `VRANGESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8`
31487	///
31488	/// `EVEX.LIG.66.0F3A.W0 51 /r ib`
31489	///
31490	/// `AVX512DQ`
31491	///
31492	/// `16/32/64-bit`
31493	EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae = 3937,
31494	/// `VRANGESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8`
31495	///
31496	/// `EVEX.LIG.66.0F3A.W1 51 /r ib`
31497	///
31498	/// `AVX512DQ`
31499	///
31500	/// `16/32/64-bit`
31501	EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3938,
31502	/// `VFIXUPIMMPS xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
31503	///
31504	/// `EVEX.128.66.0F3A.W0 54 /r ib`
31505	///
31506	/// `AVX512VL and AVX512F`
31507	///
31508	/// `16/32/64-bit`
31509	EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8 = 3939,
31510	/// `VFIXUPIMMPS ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
31511	///
31512	/// `EVEX.256.66.0F3A.W0 54 /r ib`
31513	///
31514	/// `AVX512VL and AVX512F`
31515	///
31516	/// `16/32/64-bit`
31517	EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8 = 3940,
31518	/// `VFIXUPIMMPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{sae}, imm8`
31519	///
31520	/// `EVEX.512.66.0F3A.W0 54 /r ib`
31521	///
31522	/// `AVX512F`
31523	///
31524	/// `16/32/64-bit`
31525	EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae = 3941,
31526	/// `VFIXUPIMMPD xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
31527	///
31528	/// `EVEX.128.66.0F3A.W1 54 /r ib`
31529	///
31530	/// `AVX512VL and AVX512F`
31531	///
31532	/// `16/32/64-bit`
31533	EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8 = 3942,
31534	/// `VFIXUPIMMPD ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
31535	///
31536	/// `EVEX.256.66.0F3A.W1 54 /r ib`
31537	///
31538	/// `AVX512VL and AVX512F`
31539	///
31540	/// `16/32/64-bit`
31541	EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8 = 3943,
31542	/// `VFIXUPIMMPD zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst{sae}, imm8`
31543	///
31544	/// `EVEX.512.66.0F3A.W1 54 /r ib`
31545	///
31546	/// `AVX512F`
31547	///
31548	/// `16/32/64-bit`
31549	EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae = 3944,
31550	/// `VFIXUPIMMSS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8`
31551	///
31552	/// `EVEX.LIG.66.0F3A.W0 55 /r ib`
31553	///
31554	/// `AVX512F`
31555	///
31556	/// `16/32/64-bit`
31557	EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae = 3945,
31558	/// `VFIXUPIMMSD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8`
31559	///
31560	/// `EVEX.LIG.66.0F3A.W1 55 /r ib`
31561	///
31562	/// `AVX512F`
31563	///
31564	/// `16/32/64-bit`
31565	EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae = 3946,
31566	/// `VREDUCEPS xmm1 {k1}{z}, xmm2/m128/m32bcst, imm8`
31567	///
31568	/// `EVEX.128.66.0F3A.W0 56 /r ib`
31569	///
31570	/// `AVX512VL and AVX512DQ`
31571	///
31572	/// `16/32/64-bit`
31573	EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8 = 3947,
31574	/// `VREDUCEPS ymm1 {k1}{z}, ymm2/m256/m32bcst, imm8`
31575	///
31576	/// `EVEX.256.66.0F3A.W0 56 /r ib`
31577	///
31578	/// `AVX512VL and AVX512DQ`
31579	///
31580	/// `16/32/64-bit`
31581	EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8 = 3948,
31582	/// `VREDUCEPS zmm1 {k1}{z}, zmm2/m512/m32bcst{sae}, imm8`
31583	///
31584	/// `EVEX.512.66.0F3A.W0 56 /r ib`
31585	///
31586	/// `AVX512DQ`
31587	///
31588	/// `16/32/64-bit`
31589	EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae = 3949,
31590	/// `VREDUCEPD xmm1 {k1}{z}, xmm2/m128/m64bcst, imm8`
31591	///
31592	/// `EVEX.128.66.0F3A.W1 56 /r ib`
31593	///
31594	/// `AVX512VL and AVX512DQ`
31595	///
31596	/// `16/32/64-bit`
31597	EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8 = 3950,
31598	/// `VREDUCEPD ymm1 {k1}{z}, ymm2/m256/m64bcst, imm8`
31599	///
31600	/// `EVEX.256.66.0F3A.W1 56 /r ib`
31601	///
31602	/// `AVX512VL and AVX512DQ`
31603	///
31604	/// `16/32/64-bit`
31605	EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8 = 3951,
31606	/// `VREDUCEPD zmm1 {k1}{z}, zmm2/m512/m64bcst{sae}, imm8`
31607	///
31608	/// `EVEX.512.66.0F3A.W1 56 /r ib`
31609	///
31610	/// `AVX512DQ`
31611	///
31612	/// `16/32/64-bit`
31613	EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae = 3952,
31614	/// `VREDUCESS xmm1 {k1}{z}, xmm2, xmm3/m32{sae}, imm8`
31615	///
31616	/// `EVEX.LIG.66.0F3A.W0 57 /r ib`
31617	///
31618	/// `AVX512DQ`
31619	///
31620	/// `16/32/64-bit`
31621	EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae = 3953,
31622	/// `VREDUCESD xmm1 {k1}{z}, xmm2, xmm3/m64{sae}, imm8`
31623	///
31624	/// `EVEX.LIG.66.0F3A.W1 57 /r ib`
31625	///
31626	/// `AVX512DQ`
31627	///
31628	/// `16/32/64-bit`
31629	EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae = 3954,
31630	/// `VFMADDSUBPS xmm1, xmm2, xmm3/m128, xmm4`
31631	///
31632	/// `VEX.128.66.0F3A.W0 5C /r /is4`
31633	///
31634	/// `FMA4`
31635	///
31636	/// `16/32/64-bit`
31637	VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm = 3955,
31638	/// `VFMADDSUBPS ymm1, ymm2, ymm3/m256, ymm4`
31639	///
31640	/// `VEX.256.66.0F3A.W0 5C /r /is4`
31641	///
31642	/// `FMA4`
31643	///
31644	/// `16/32/64-bit`
31645	VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm = 3956,
31646	/// `VFMADDSUBPS xmm1, xmm2, xmm3, xmm4/m128`
31647	///
31648	/// `VEX.128.66.0F3A.W1 5C /r /is4`
31649	///
31650	/// `FMA4`
31651	///
31652	/// `16/32/64-bit`
31653	VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128 = 3957,
31654	/// `VFMADDSUBPS ymm1, ymm2, ymm3, ymm4/m256`
31655	///
31656	/// `VEX.256.66.0F3A.W1 5C /r /is4`
31657	///
31658	/// `FMA4`
31659	///
31660	/// `16/32/64-bit`
31661	VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256 = 3958,
31662	/// `VFMADDSUBPD xmm1, xmm2, xmm3/m128, xmm4`
31663	///
31664	/// `VEX.128.66.0F3A.W0 5D /r /is4`
31665	///
31666	/// `FMA4`
31667	///
31668	/// `16/32/64-bit`
31669	VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm = 3959,
31670	/// `VFMADDSUBPD ymm1, ymm2, ymm3/m256, ymm4`
31671	///
31672	/// `VEX.256.66.0F3A.W0 5D /r /is4`
31673	///
31674	/// `FMA4`
31675	///
31676	/// `16/32/64-bit`
31677	VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm = 3960,
31678	/// `VFMADDSUBPD xmm1, xmm2, xmm3, xmm4/m128`
31679	///
31680	/// `VEX.128.66.0F3A.W1 5D /r /is4`
31681	///
31682	/// `FMA4`
31683	///
31684	/// `16/32/64-bit`
31685	VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128 = 3961,
31686	/// `VFMADDSUBPD ymm1, ymm2, ymm3, ymm4/m256`
31687	///
31688	/// `VEX.256.66.0F3A.W1 5D /r /is4`
31689	///
31690	/// `FMA4`
31691	///
31692	/// `16/32/64-bit`
31693	VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256 = 3962,
31694	/// `VFMSUBADDPS xmm1, xmm2, xmm3/m128, xmm4`
31695	///
31696	/// `VEX.128.66.0F3A.W0 5E /r /is4`
31697	///
31698	/// `FMA4`
31699	///
31700	/// `16/32/64-bit`
31701	VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm = 3963,
31702	/// `VFMSUBADDPS ymm1, ymm2, ymm3/m256, ymm4`
31703	///
31704	/// `VEX.256.66.0F3A.W0 5E /r /is4`
31705	///
31706	/// `FMA4`
31707	///
31708	/// `16/32/64-bit`
31709	VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm = 3964,
31710	/// `VFMSUBADDPS xmm1, xmm2, xmm3, xmm4/m128`
31711	///
31712	/// `VEX.128.66.0F3A.W1 5E /r /is4`
31713	///
31714	/// `FMA4`
31715	///
31716	/// `16/32/64-bit`
31717	VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128 = 3965,
31718	/// `VFMSUBADDPS ymm1, ymm2, ymm3, ymm4/m256`
31719	///
31720	/// `VEX.256.66.0F3A.W1 5E /r /is4`
31721	///
31722	/// `FMA4`
31723	///
31724	/// `16/32/64-bit`
31725	VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256 = 3966,
31726	/// `VFMSUBADDPD xmm1, xmm2, xmm3/m128, xmm4`
31727	///
31728	/// `VEX.128.66.0F3A.W0 5F /r /is4`
31729	///
31730	/// `FMA4`
31731	///
31732	/// `16/32/64-bit`
31733	VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm = 3967,
31734	/// `VFMSUBADDPD ymm1, ymm2, ymm3/m256, ymm4`
31735	///
31736	/// `VEX.256.66.0F3A.W0 5F /r /is4`
31737	///
31738	/// `FMA4`
31739	///
31740	/// `16/32/64-bit`
31741	VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm = 3968,
31742	/// `VFMSUBADDPD xmm1, xmm2, xmm3, xmm4/m128`
31743	///
31744	/// `VEX.128.66.0F3A.W1 5F /r /is4`
31745	///
31746	/// `FMA4`
31747	///
31748	/// `16/32/64-bit`
31749	VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128 = 3969,
31750	/// `VFMSUBADDPD ymm1, ymm2, ymm3, ymm4/m256`
31751	///
31752	/// `VEX.256.66.0F3A.W1 5F /r /is4`
31753	///
31754	/// `FMA4`
31755	///
31756	/// `16/32/64-bit`
31757	VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256 = 3970,
31758	/// `PCMPESTRM xmm1, xmm2/m128, imm8`
31759	///
31760	/// `66 0F 3A 60 /r ib`
31761	///
31762	/// `SSE4.2`
31763	///
31764	/// `16/32/64-bit`
31765	Pcmpestrm_xmm_xmmm128_imm8 = 3971,
31766	/// `PCMPESTRM64 xmm1, xmm2/m128, imm8`
31767	///
31768	/// `66 o64 0F 3A 60 /r ib`
31769	///
31770	/// `SSE4.2`
31771	///
31772	/// `64-bit`
31773	Pcmpestrm64_xmm_xmmm128_imm8 = 3972,
31774	/// `VPCMPESTRM xmm1, xmm2/m128, imm8`
31775	///
31776	/// `VEX.128.66.0F3A.W0 60 /r ib`
31777	///
31778	/// `AVX`
31779	///
31780	/// `16/32/64-bit`
31781	VEX_Vpcmpestrm_xmm_xmmm128_imm8 = 3973,
31782	/// `VPCMPESTRM64 xmm1, xmm2/m128, imm8`
31783	///
31784	/// `VEX.128.66.0F3A.W1 60 /r ib`
31785	///
31786	/// `AVX`
31787	///
31788	/// `64-bit`
31789	VEX_Vpcmpestrm64_xmm_xmmm128_imm8 = 3974,
31790	/// `PCMPESTRI xmm1, xmm2/m128, imm8`
31791	///
31792	/// `66 0F 3A 61 /r ib`
31793	///
31794	/// `SSE4.2`
31795	///
31796	/// `16/32/64-bit`
31797	Pcmpestri_xmm_xmmm128_imm8 = 3975,
31798	/// `PCMPESTRI64 xmm1, xmm2/m128, imm8`
31799	///
31800	/// `66 o64 0F 3A 61 /r ib`
31801	///
31802	/// `SSE4.2`
31803	///
31804	/// `64-bit`
31805	Pcmpestri64_xmm_xmmm128_imm8 = 3976,
31806	/// `VPCMPESTRI xmm1, xmm2/m128, imm8`
31807	///
31808	/// `VEX.128.66.0F3A.W0 61 /r ib`
31809	///
31810	/// `AVX`
31811	///
31812	/// `16/32/64-bit`
31813	VEX_Vpcmpestri_xmm_xmmm128_imm8 = 3977,
31814	/// `VPCMPESTRI64 xmm1, xmm2/m128, imm8`
31815	///
31816	/// `VEX.128.66.0F3A.W1 61 /r ib`
31817	///
31818	/// `AVX`
31819	///
31820	/// `64-bit`
31821	VEX_Vpcmpestri64_xmm_xmmm128_imm8 = 3978,
31822	/// `PCMPISTRM xmm1, xmm2/m128, imm8`
31823	///
31824	/// `66 0F 3A 62 /r ib`
31825	///
31826	/// `SSE4.2`
31827	///
31828	/// `16/32/64-bit`
31829	Pcmpistrm_xmm_xmmm128_imm8 = 3979,
31830	/// `VPCMPISTRM xmm1, xmm2/m128, imm8`
31831	///
31832	/// `VEX.128.66.0F3A.WIG 62 /r ib`
31833	///
31834	/// `AVX`
31835	///
31836	/// `16/32/64-bit`
31837	VEX_Vpcmpistrm_xmm_xmmm128_imm8 = 3980,
31838	/// `PCMPISTRI xmm1, xmm2/m128, imm8`
31839	///
31840	/// `66 0F 3A 63 /r ib`
31841	///
31842	/// `SSE4.2`
31843	///
31844	/// `16/32/64-bit`
31845	Pcmpistri_xmm_xmmm128_imm8 = 3981,
31846	/// `VPCMPISTRI xmm1, xmm2/m128, imm8`
31847	///
31848	/// `VEX.128.66.0F3A.WIG 63 /r ib`
31849	///
31850	/// `AVX`
31851	///
31852	/// `16/32/64-bit`
31853	VEX_Vpcmpistri_xmm_xmmm128_imm8 = 3982,
31854	/// `VFPCLASSPS k2 {k1}, xmm2/m128/m32bcst, imm8`
31855	///
31856	/// `EVEX.128.66.0F3A.W0 66 /r ib`
31857	///
31858	/// `AVX512VL and AVX512DQ`
31859	///
31860	/// `16/32/64-bit`
31861	EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8 = 3983,
31862	/// `VFPCLASSPS k2 {k1}, ymm2/m256/m32bcst, imm8`
31863	///
31864	/// `EVEX.256.66.0F3A.W0 66 /r ib`
31865	///
31866	/// `AVX512VL and AVX512DQ`
31867	///
31868	/// `16/32/64-bit`
31869	EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8 = 3984,
31870	/// `VFPCLASSPS k2 {k1}, zmm2/m512/m32bcst, imm8`
31871	///
31872	/// `EVEX.512.66.0F3A.W0 66 /r ib`
31873	///
31874	/// `AVX512DQ`
31875	///
31876	/// `16/32/64-bit`
31877	EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8 = 3985,
31878	/// `VFPCLASSPD k2 {k1}, xmm2/m128/m64bcst, imm8`
31879	///
31880	/// `EVEX.128.66.0F3A.W1 66 /r ib`
31881	///
31882	/// `AVX512VL and AVX512DQ`
31883	///
31884	/// `16/32/64-bit`
31885	EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8 = 3986,
31886	/// `VFPCLASSPD k2 {k1}, ymm2/m256/m64bcst, imm8`
31887	///
31888	/// `EVEX.256.66.0F3A.W1 66 /r ib`
31889	///
31890	/// `AVX512VL and AVX512DQ`
31891	///
31892	/// `16/32/64-bit`
31893	EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8 = 3987,
31894	/// `VFPCLASSPD k2 {k1}, zmm2/m512/m64bcst, imm8`
31895	///
31896	/// `EVEX.512.66.0F3A.W1 66 /r ib`
31897	///
31898	/// `AVX512DQ`
31899	///
31900	/// `16/32/64-bit`
31901	EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8 = 3988,
31902	/// `VFPCLASSSS k2 {k1}, xmm2/m32, imm8`
31903	///
31904	/// `EVEX.LIG.66.0F3A.W0 67 /r ib`
31905	///
31906	/// `AVX512DQ`
31907	///
31908	/// `16/32/64-bit`
31909	EVEX_Vfpclassss_kr_k1_xmmm32_imm8 = 3989,
31910	/// `VFPCLASSSD k2 {k1}, xmm2/m64, imm8`
31911	///
31912	/// `EVEX.LIG.66.0F3A.W1 67 /r ib`
31913	///
31914	/// `AVX512DQ`
31915	///
31916	/// `16/32/64-bit`
31917	EVEX_Vfpclasssd_kr_k1_xmmm64_imm8 = 3990,
31918	/// `VFMADDPS xmm1, xmm2, xmm3/m128, xmm4`
31919	///
31920	/// `VEX.128.66.0F3A.W0 68 /r /is4`
31921	///
31922	/// `FMA4`
31923	///
31924	/// `16/32/64-bit`
31925	VEX_Vfmaddps_xmm_xmm_xmmm128_xmm = 3991,
31926	/// `VFMADDPS ymm1, ymm2, ymm3/m256, ymm4`
31927	///
31928	/// `VEX.256.66.0F3A.W0 68 /r /is4`
31929	///
31930	/// `FMA4`
31931	///
31932	/// `16/32/64-bit`
31933	VEX_Vfmaddps_ymm_ymm_ymmm256_ymm = 3992,
31934	/// `VFMADDPS xmm1, xmm2, xmm3, xmm4/m128`
31935	///
31936	/// `VEX.128.66.0F3A.W1 68 /r /is4`
31937	///
31938	/// `FMA4`
31939	///
31940	/// `16/32/64-bit`
31941	VEX_Vfmaddps_xmm_xmm_xmm_xmmm128 = 3993,
31942	/// `VFMADDPS ymm1, ymm2, ymm3, ymm4/m256`
31943	///
31944	/// `VEX.256.66.0F3A.W1 68 /r /is4`
31945	///
31946	/// `FMA4`
31947	///
31948	/// `16/32/64-bit`
31949	VEX_Vfmaddps_ymm_ymm_ymm_ymmm256 = 3994,
31950	/// `VFMADDPD xmm1, xmm2, xmm3/m128, xmm4`
31951	///
31952	/// `VEX.128.66.0F3A.W0 69 /r /is4`
31953	///
31954	/// `FMA4`
31955	///
31956	/// `16/32/64-bit`
31957	VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm = 3995,
31958	/// `VFMADDPD ymm1, ymm2, ymm3/m256, ymm4`
31959	///
31960	/// `VEX.256.66.0F3A.W0 69 /r /is4`
31961	///
31962	/// `FMA4`
31963	///
31964	/// `16/32/64-bit`
31965	VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm = 3996,
31966	/// `VFMADDPD xmm1, xmm2, xmm3, xmm4/m128`
31967	///
31968	/// `VEX.128.66.0F3A.W1 69 /r /is4`
31969	///
31970	/// `FMA4`
31971	///
31972	/// `16/32/64-bit`
31973	VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128 = 3997,
31974	/// `VFMADDPD ymm1, ymm2, ymm3, ymm4/m256`
31975	///
31976	/// `VEX.256.66.0F3A.W1 69 /r /is4`
31977	///
31978	/// `FMA4`
31979	///
31980	/// `16/32/64-bit`
31981	VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256 = 3998,
31982	/// `VFMADDSS xmm1, xmm2, xmm3/m32, xmm4`
31983	///
31984	/// `VEX.LIG.66.0F3A.W0 6A /r /is4`
31985	///
31986	/// `FMA4`
31987	///
31988	/// `16/32/64-bit`
31989	VEX_Vfmaddss_xmm_xmm_xmmm32_xmm = 3999,
31990	/// `VFMADDSS xmm1, xmm2, xmm3, xmm4/m32`
31991	///
31992	/// `VEX.LIG.66.0F3A.W1 6A /r /is4`
31993	///
31994	/// `FMA4`
31995	///
31996	/// `16/32/64-bit`
31997	VEX_Vfmaddss_xmm_xmm_xmm_xmmm32 = 4000,
31998	/// `VFMADDSD xmm1, xmm2, xmm3/m64, xmm4`
31999	///
32000	/// `VEX.LIG.66.0F3A.W0 6B /r /is4`
32001	///
32002	/// `FMA4`
32003	///
32004	/// `16/32/64-bit`
32005	VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm = 4001,
32006	/// `VFMADDSD xmm1, xmm2, xmm3, xmm4/m64`
32007	///
32008	/// `VEX.LIG.66.0F3A.W1 6B /r /is4`
32009	///
32010	/// `FMA4`
32011	///
32012	/// `16/32/64-bit`
32013	VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64 = 4002,
32014	/// `VFMSUBPS xmm1, xmm2, xmm3/m128, xmm4`
32015	///
32016	/// `VEX.128.66.0F3A.W0 6C /r /is4`
32017	///
32018	/// `FMA4`
32019	///
32020	/// `16/32/64-bit`
32021	VEX_Vfmsubps_xmm_xmm_xmmm128_xmm = 4003,
32022	/// `VFMSUBPS ymm1, ymm2, ymm3/m256, ymm4`
32023	///
32024	/// `VEX.256.66.0F3A.W0 6C /r /is4`
32025	///
32026	/// `FMA4`
32027	///
32028	/// `16/32/64-bit`
32029	VEX_Vfmsubps_ymm_ymm_ymmm256_ymm = 4004,
32030	/// `VFMSUBPS xmm1, xmm2, xmm3, xmm4/m128`
32031	///
32032	/// `VEX.128.66.0F3A.W1 6C /r /is4`
32033	///
32034	/// `FMA4`
32035	///
32036	/// `16/32/64-bit`
32037	VEX_Vfmsubps_xmm_xmm_xmm_xmmm128 = 4005,
32038	/// `VFMSUBPS ymm1, ymm2, ymm3, ymm4/m256`
32039	///
32040	/// `VEX.256.66.0F3A.W1 6C /r /is4`
32041	///
32042	/// `FMA4`
32043	///
32044	/// `16/32/64-bit`
32045	VEX_Vfmsubps_ymm_ymm_ymm_ymmm256 = 4006,
32046	/// `VFMSUBPD xmm1, xmm2, xmm3/m128, xmm4`
32047	///
32048	/// `VEX.128.66.0F3A.W0 6D /r /is4`
32049	///
32050	/// `FMA4`
32051	///
32052	/// `16/32/64-bit`
32053	VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm = 4007,
32054	/// `VFMSUBPD ymm1, ymm2, ymm3/m256, ymm4`
32055	///
32056	/// `VEX.256.66.0F3A.W0 6D /r /is4`
32057	///
32058	/// `FMA4`
32059	///
32060	/// `16/32/64-bit`
32061	VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm = 4008,
32062	/// `VFMSUBPD xmm1, xmm2, xmm3, xmm4/m128`
32063	///
32064	/// `VEX.128.66.0F3A.W1 6D /r /is4`
32065	///
32066	/// `FMA4`
32067	///
32068	/// `16/32/64-bit`
32069	VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128 = 4009,
32070	/// `VFMSUBPD ymm1, ymm2, ymm3, ymm4/m256`
32071	///
32072	/// `VEX.256.66.0F3A.W1 6D /r /is4`
32073	///
32074	/// `FMA4`
32075	///
32076	/// `16/32/64-bit`
32077	VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256 = 4010,
32078	/// `VFMSUBSS xmm1, xmm2, xmm3/m32, xmm4`
32079	///
32080	/// `VEX.LIG.66.0F3A.W0 6E /r /is4`
32081	///
32082	/// `FMA4`
32083	///
32084	/// `16/32/64-bit`
32085	VEX_Vfmsubss_xmm_xmm_xmmm32_xmm = 4011,
32086	/// `VFMSUBSS xmm1, xmm2, xmm3, xmm4/m32`
32087	///
32088	/// `VEX.LIG.66.0F3A.W1 6E /r /is4`
32089	///
32090	/// `FMA4`
32091	///
32092	/// `16/32/64-bit`
32093	VEX_Vfmsubss_xmm_xmm_xmm_xmmm32 = 4012,
32094	/// `VFMSUBSD xmm1, xmm2, xmm3/m64, xmm4`
32095	///
32096	/// `VEX.LIG.66.0F3A.W0 6F /r /is4`
32097	///
32098	/// `FMA4`
32099	///
32100	/// `16/32/64-bit`
32101	VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm = 4013,
32102	/// `VFMSUBSD xmm1, xmm2, xmm3, xmm4/m64`
32103	///
32104	/// `VEX.LIG.66.0F3A.W1 6F /r /is4`
32105	///
32106	/// `FMA4`
32107	///
32108	/// `16/32/64-bit`
32109	VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64 = 4014,
32110	/// `VPSHLDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8`
32111	///
32112	/// `EVEX.128.66.0F3A.W1 70 /r ib`
32113	///
32114	/// `AVX512VL and AVX512_VBMI2`
32115	///
32116	/// `16/32/64-bit`
32117	EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8 = 4015,
32118	/// `VPSHLDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8`
32119	///
32120	/// `EVEX.256.66.0F3A.W1 70 /r ib`
32121	///
32122	/// `AVX512VL and AVX512_VBMI2`
32123	///
32124	/// `16/32/64-bit`
32125	EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8 = 4016,
32126	/// `VPSHLDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8`
32127	///
32128	/// `EVEX.512.66.0F3A.W1 70 /r ib`
32129	///
32130	/// `AVX512_VBMI2`
32131	///
32132	/// `16/32/64-bit`
32133	EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8 = 4017,
32134	/// `VPSHLDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
32135	///
32136	/// `EVEX.128.66.0F3A.W0 71 /r ib`
32137	///
32138	/// `AVX512VL and AVX512_VBMI2`
32139	///
32140	/// `16/32/64-bit`
32141	EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8 = 4018,
32142	/// `VPSHLDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
32143	///
32144	/// `EVEX.256.66.0F3A.W0 71 /r ib`
32145	///
32146	/// `AVX512VL and AVX512_VBMI2`
32147	///
32148	/// `16/32/64-bit`
32149	EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8 = 4019,
32150	/// `VPSHLDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
32151	///
32152	/// `EVEX.512.66.0F3A.W0 71 /r ib`
32153	///
32154	/// `AVX512_VBMI2`
32155	///
32156	/// `16/32/64-bit`
32157	EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8 = 4020,
32158	/// `VPSHLDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
32159	///
32160	/// `EVEX.128.66.0F3A.W1 71 /r ib`
32161	///
32162	/// `AVX512VL and AVX512_VBMI2`
32163	///
32164	/// `16/32/64-bit`
32165	EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8 = 4021,
32166	/// `VPSHLDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
32167	///
32168	/// `EVEX.256.66.0F3A.W1 71 /r ib`
32169	///
32170	/// `AVX512VL and AVX512_VBMI2`
32171	///
32172	/// `16/32/64-bit`
32173	EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8 = 4022,
32174	/// `VPSHLDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
32175	///
32176	/// `EVEX.512.66.0F3A.W1 71 /r ib`
32177	///
32178	/// `AVX512_VBMI2`
32179	///
32180	/// `16/32/64-bit`
32181	EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8 = 4023,
32182	/// `VPSHRDW xmm1 {k1}{z}, xmm2, xmm3/m128, imm8`
32183	///
32184	/// `EVEX.128.66.0F3A.W1 72 /r ib`
32185	///
32186	/// `AVX512VL and AVX512_VBMI2`
32187	///
32188	/// `16/32/64-bit`
32189	EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8 = 4024,
32190	/// `VPSHRDW ymm1 {k1}{z}, ymm2, ymm3/m256, imm8`
32191	///
32192	/// `EVEX.256.66.0F3A.W1 72 /r ib`
32193	///
32194	/// `AVX512VL and AVX512_VBMI2`
32195	///
32196	/// `16/32/64-bit`
32197	EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8 = 4025,
32198	/// `VPSHRDW zmm1 {k1}{z}, zmm2, zmm3/m512, imm8`
32199	///
32200	/// `EVEX.512.66.0F3A.W1 72 /r ib`
32201	///
32202	/// `AVX512_VBMI2`
32203	///
32204	/// `16/32/64-bit`
32205	EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8 = 4026,
32206	/// `VPSHRDD xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst, imm8`
32207	///
32208	/// `EVEX.128.66.0F3A.W0 73 /r ib`
32209	///
32210	/// `AVX512VL and AVX512_VBMI2`
32211	///
32212	/// `16/32/64-bit`
32213	EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8 = 4027,
32214	/// `VPSHRDD ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst, imm8`
32215	///
32216	/// `EVEX.256.66.0F3A.W0 73 /r ib`
32217	///
32218	/// `AVX512VL and AVX512_VBMI2`
32219	///
32220	/// `16/32/64-bit`
32221	EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8 = 4028,
32222	/// `VPSHRDD zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst, imm8`
32223	///
32224	/// `EVEX.512.66.0F3A.W0 73 /r ib`
32225	///
32226	/// `AVX512_VBMI2`
32227	///
32228	/// `16/32/64-bit`
32229	EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8 = 4029,
32230	/// `VPSHRDQ xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
32231	///
32232	/// `EVEX.128.66.0F3A.W1 73 /r ib`
32233	///
32234	/// `AVX512VL and AVX512_VBMI2`
32235	///
32236	/// `16/32/64-bit`
32237	EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8 = 4030,
32238	/// `VPSHRDQ ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
32239	///
32240	/// `EVEX.256.66.0F3A.W1 73 /r ib`
32241	///
32242	/// `AVX512VL and AVX512_VBMI2`
32243	///
32244	/// `16/32/64-bit`
32245	EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8 = 4031,
32246	/// `VPSHRDQ zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
32247	///
32248	/// `EVEX.512.66.0F3A.W1 73 /r ib`
32249	///
32250	/// `AVX512_VBMI2`
32251	///
32252	/// `16/32/64-bit`
32253	EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8 = 4032,
32254	/// `VFNMADDPS xmm1, xmm2, xmm3/m128, xmm4`
32255	///
32256	/// `VEX.128.66.0F3A.W0 78 /r /is4`
32257	///
32258	/// `FMA4`
32259	///
32260	/// `16/32/64-bit`
32261	VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm = 4033,
32262	/// `VFNMADDPS ymm1, ymm2, ymm3/m256, ymm4`
32263	///
32264	/// `VEX.256.66.0F3A.W0 78 /r /is4`
32265	///
32266	/// `FMA4`
32267	///
32268	/// `16/32/64-bit`
32269	VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm = 4034,
32270	/// `VFNMADDPS xmm1, xmm2, xmm3, xmm4/m128`
32271	///
32272	/// `VEX.128.66.0F3A.W1 78 /r /is4`
32273	///
32274	/// `FMA4`
32275	///
32276	/// `16/32/64-bit`
32277	VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128 = 4035,
32278	/// `VFNMADDPS ymm1, ymm2, ymm3, ymm4/m256`
32279	///
32280	/// `VEX.256.66.0F3A.W1 78 /r /is4`
32281	///
32282	/// `FMA4`
32283	///
32284	/// `16/32/64-bit`
32285	VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256 = 4036,
32286	/// `VFNMADDPD xmm1, xmm2, xmm3/m128, xmm4`
32287	///
32288	/// `VEX.128.66.0F3A.W0 79 /r /is4`
32289	///
32290	/// `FMA4`
32291	///
32292	/// `16/32/64-bit`
32293	VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm = 4037,
32294	/// `VFNMADDPD ymm1, ymm2, ymm3/m256, ymm4`
32295	///
32296	/// `VEX.256.66.0F3A.W0 79 /r /is4`
32297	///
32298	/// `FMA4`
32299	///
32300	/// `16/32/64-bit`
32301	VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm = 4038,
32302	/// `VFNMADDPD xmm1, xmm2, xmm3, xmm4/m128`
32303	///
32304	/// `VEX.128.66.0F3A.W1 79 /r /is4`
32305	///
32306	/// `FMA4`
32307	///
32308	/// `16/32/64-bit`
32309	VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128 = 4039,
32310	/// `VFNMADDPD ymm1, ymm2, ymm3, ymm4/m256`
32311	///
32312	/// `VEX.256.66.0F3A.W1 79 /r /is4`
32313	///
32314	/// `FMA4`
32315	///
32316	/// `16/32/64-bit`
32317	VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256 = 4040,
32318	/// `VFNMADDSS xmm1, xmm2, xmm3/m32, xmm4`
32319	///
32320	/// `VEX.LIG.66.0F3A.W0 7A /r /is4`
32321	///
32322	/// `FMA4`
32323	///
32324	/// `16/32/64-bit`
32325	VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm = 4041,
32326	/// `VFNMADDSS xmm1, xmm2, xmm3, xmm4/m32`
32327	///
32328	/// `VEX.LIG.66.0F3A.W1 7A /r /is4`
32329	///
32330	/// `FMA4`
32331	///
32332	/// `16/32/64-bit`
32333	VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32 = 4042,
32334	/// `VFNMADDSD xmm1, xmm2, xmm3/m64, xmm4`
32335	///
32336	/// `VEX.LIG.66.0F3A.W0 7B /r /is4`
32337	///
32338	/// `FMA4`
32339	///
32340	/// `16/32/64-bit`
32341	VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm = 4043,
32342	/// `VFNMADDSD xmm1, xmm2, xmm3, xmm4/m64`
32343	///
32344	/// `VEX.LIG.66.0F3A.W1 7B /r /is4`
32345	///
32346	/// `FMA4`
32347	///
32348	/// `16/32/64-bit`
32349	VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64 = 4044,
32350	/// `VFNMSUBPS xmm1, xmm2, xmm3/m128, xmm4`
32351	///
32352	/// `VEX.128.66.0F3A.W0 7C /r /is4`
32353	///
32354	/// `FMA4`
32355	///
32356	/// `16/32/64-bit`
32357	VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm = 4045,
32358	/// `VFNMSUBPS ymm1, ymm2, ymm3/m256, ymm4`
32359	///
32360	/// `VEX.256.66.0F3A.W0 7C /r /is4`
32361	///
32362	/// `FMA4`
32363	///
32364	/// `16/32/64-bit`
32365	VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm = 4046,
32366	/// `VFNMSUBPS xmm1, xmm2, xmm3, xmm4/m128`
32367	///
32368	/// `VEX.128.66.0F3A.W1 7C /r /is4`
32369	///
32370	/// `FMA4`
32371	///
32372	/// `16/32/64-bit`
32373	VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128 = 4047,
32374	/// `VFNMSUBPS ymm1, ymm2, ymm3, ymm4/m256`
32375	///
32376	/// `VEX.256.66.0F3A.W1 7C /r /is4`
32377	///
32378	/// `FMA4`
32379	///
32380	/// `16/32/64-bit`
32381	VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256 = 4048,
32382	/// `VFNMSUBPD xmm1, xmm2, xmm3/m128, xmm4`
32383	///
32384	/// `VEX.128.66.0F3A.W0 7D /r /is4`
32385	///
32386	/// `FMA4`
32387	///
32388	/// `16/32/64-bit`
32389	VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm = 4049,
32390	/// `VFNMSUBPD ymm1, ymm2, ymm3/m256, ymm4`
32391	///
32392	/// `VEX.256.66.0F3A.W0 7D /r /is4`
32393	///
32394	/// `FMA4`
32395	///
32396	/// `16/32/64-bit`
32397	VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm = 4050,
32398	/// `VFNMSUBPD xmm1, xmm2, xmm3, xmm4/m128`
32399	///
32400	/// `VEX.128.66.0F3A.W1 7D /r /is4`
32401	///
32402	/// `FMA4`
32403	///
32404	/// `16/32/64-bit`
32405	VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128 = 4051,
32406	/// `VFNMSUBPD ymm1, ymm2, ymm3, ymm4/m256`
32407	///
32408	/// `VEX.256.66.0F3A.W1 7D /r /is4`
32409	///
32410	/// `FMA4`
32411	///
32412	/// `16/32/64-bit`
32413	VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256 = 4052,
32414	/// `VFNMSUBSS xmm1, xmm2, xmm3/m32, xmm4`
32415	///
32416	/// `VEX.LIG.66.0F3A.W0 7E /r /is4`
32417	///
32418	/// `FMA4`
32419	///
32420	/// `16/32/64-bit`
32421	VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm = 4053,
32422	/// `VFNMSUBSS xmm1, xmm2, xmm3, xmm4/m32`
32423	///
32424	/// `VEX.LIG.66.0F3A.W1 7E /r /is4`
32425	///
32426	/// `FMA4`
32427	///
32428	/// `16/32/64-bit`
32429	VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32 = 4054,
32430	/// `VFNMSUBSD xmm1, xmm2, xmm3/m64, xmm4`
32431	///
32432	/// `VEX.LIG.66.0F3A.W0 7F /r /is4`
32433	///
32434	/// `FMA4`
32435	///
32436	/// `16/32/64-bit`
32437	VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm = 4055,
32438	/// `VFNMSUBSD xmm1, xmm2, xmm3, xmm4/m64`
32439	///
32440	/// `VEX.LIG.66.0F3A.W1 7F /r /is4`
32441	///
32442	/// `FMA4`
32443	///
32444	/// `16/32/64-bit`
32445	VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64 = 4056,
32446	/// `SHA1RNDS4 xmm1, xmm2/m128, imm8`
32447	///
32448	/// `NP 0F 3A CC /r ib`
32449	///
32450	/// `SHA`
32451	///
32452	/// `16/32/64-bit`
32453	Sha1rnds4_xmm_xmmm128_imm8 = 4057,
32454	/// `GF2P8AFFINEQB xmm1, xmm2/m128, imm8`
32455	///
32456	/// `66 0F 3A CE /r ib`
32457	///
32458	/// `GFNI`
32459	///
32460	/// `16/32/64-bit`
32461	Gf2p8affineqb_xmm_xmmm128_imm8 = 4058,
32462	/// `VGF2P8AFFINEQB xmm1, xmm2, xmm3/m128, imm8`
32463	///
32464	/// `VEX.128.66.0F3A.W1 CE /r ib`
32465	///
32466	/// `AVX and GFNI`
32467	///
32468	/// `16/32/64-bit`
32469	VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8 = 4059,
32470	/// `VGF2P8AFFINEQB ymm1, ymm2, ymm3/m256, imm8`
32471	///
32472	/// `VEX.256.66.0F3A.W1 CE /r ib`
32473	///
32474	/// `AVX and GFNI`
32475	///
32476	/// `16/32/64-bit`
32477	VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8 = 4060,
32478	/// `VGF2P8AFFINEQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
32479	///
32480	/// `EVEX.128.66.0F3A.W1 CE /r ib`
32481	///
32482	/// `AVX512VL and GFNI`
32483	///
32484	/// `16/32/64-bit`
32485	EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8 = 4061,
32486	/// `VGF2P8AFFINEQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
32487	///
32488	/// `EVEX.256.66.0F3A.W1 CE /r ib`
32489	///
32490	/// `AVX512VL and GFNI`
32491	///
32492	/// `16/32/64-bit`
32493	EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8 = 4062,
32494	/// `VGF2P8AFFINEQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
32495	///
32496	/// `EVEX.512.66.0F3A.W1 CE /r ib`
32497	///
32498	/// `AVX512F and GFNI`
32499	///
32500	/// `16/32/64-bit`
32501	EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8 = 4063,
32502	/// `GF2P8AFFINEINVQB xmm1, xmm2/m128, imm8`
32503	///
32504	/// `66 0F 3A CF /r ib`
32505	///
32506	/// `GFNI`
32507	///
32508	/// `16/32/64-bit`
32509	Gf2p8affineinvqb_xmm_xmmm128_imm8 = 4064,
32510	/// `VGF2P8AFFINEINVQB xmm1, xmm2, xmm3/m128, imm8`
32511	///
32512	/// `VEX.128.66.0F3A.W1 CF /r ib`
32513	///
32514	/// `AVX and GFNI`
32515	///
32516	/// `16/32/64-bit`
32517	VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8 = 4065,
32518	/// `VGF2P8AFFINEINVQB ymm1, ymm2, ymm3/m256, imm8`
32519	///
32520	/// `VEX.256.66.0F3A.W1 CF /r ib`
32521	///
32522	/// `AVX and GFNI`
32523	///
32524	/// `16/32/64-bit`
32525	VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8 = 4066,
32526	/// `VGF2P8AFFINEINVQB xmm1 {k1}{z}, xmm2, xmm3/m128/m64bcst, imm8`
32527	///
32528	/// `EVEX.128.66.0F3A.W1 CF /r ib`
32529	///
32530	/// `AVX512VL and GFNI`
32531	///
32532	/// `16/32/64-bit`
32533	EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8 = 4067,
32534	/// `VGF2P8AFFINEINVQB ymm1 {k1}{z}, ymm2, ymm3/m256/m64bcst, imm8`
32535	///
32536	/// `EVEX.256.66.0F3A.W1 CF /r ib`
32537	///
32538	/// `AVX512VL and GFNI`
32539	///
32540	/// `16/32/64-bit`
32541	EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8 = 4068,
32542	/// `VGF2P8AFFINEINVQB zmm1 {k1}{z}, zmm2, zmm3/m512/m64bcst, imm8`
32543	///
32544	/// `EVEX.512.66.0F3A.W1 CF /r ib`
32545	///
32546	/// `AVX512F and GFNI`
32547	///
32548	/// `16/32/64-bit`
32549	EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8 = 4069,
32550	/// `AESKEYGENASSIST xmm1, xmm2/m128, imm8`
32551	///
32552	/// `66 0F 3A DF /r ib`
32553	///
32554	/// `AES`
32555	///
32556	/// `16/32/64-bit`
32557	Aeskeygenassist_xmm_xmmm128_imm8 = 4070,
32558	/// `VAESKEYGENASSIST xmm1, xmm2/m128, imm8`
32559	///
32560	/// `VEX.128.66.0F3A.WIG DF /r ib`
32561	///
32562	/// `AES and AVX`
32563	///
32564	/// `16/32/64-bit`
32565	VEX_Vaeskeygenassist_xmm_xmmm128_imm8 = 4071,
32566	/// `RORX r32, r/m32, imm8`
32567	///
32568	/// `VEX.LZ.F2.0F3A.W0 F0 /r ib`
32569	///
32570	/// `BMI2`
32571	///
32572	/// `16/32/64-bit`
32573	VEX_Rorx_r32_rm32_imm8 = 4072,
32574	/// `RORX r64, r/m64, imm8`
32575	///
32576	/// `VEX.LZ.F2.0F3A.W1 F0 /r ib`
32577	///
32578	/// `BMI2`
32579	///
32580	/// `64-bit`
32581	VEX_Rorx_r64_rm64_imm8 = 4073,
32582	/// `VPMACSSWW xmm1, xmm2, xmm3/m128, xmm4`
32583	///
32584	/// `XOP.128.X8.W0 85 /r /is4`
32585	///
32586	/// `XOP`
32587	///
32588	/// `16/32/64-bit`
32589	XOP_Vpmacssww_xmm_xmm_xmmm128_xmm = 4074,
32590	/// `VPMACSSWD xmm1, xmm2, xmm3/m128, xmm4`
32591	///
32592	/// `XOP.128.X8.W0 86 /r /is4`
32593	///
32594	/// `XOP`
32595	///
32596	/// `16/32/64-bit`
32597	XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm = 4075,
32598	/// `VPMACSSDQL xmm1, xmm2, xmm3/m128, xmm4`
32599	///
32600	/// `XOP.128.X8.W0 87 /r /is4`
32601	///
32602	/// `XOP`
32603	///
32604	/// `16/32/64-bit`
32605	XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm = 4076,
32606	/// `VPMACSSDD xmm1, xmm2, xmm3/m128, xmm4`
32607	///
32608	/// `XOP.128.X8.W0 8E /r /is4`
32609	///
32610	/// `XOP`
32611	///
32612	/// `16/32/64-bit`
32613	XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm = 4077,
32614	/// `VPMACSSDQH xmm1, xmm2, xmm3/m128, xmm4`
32615	///
32616	/// `XOP.128.X8.W0 8F /r /is4`
32617	///
32618	/// `XOP`
32619	///
32620	/// `16/32/64-bit`
32621	XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm = 4078,
32622	/// `VPMACSWW xmm1, xmm2, xmm3/m128, xmm4`
32623	///
32624	/// `XOP.128.X8.W0 95 /r /is4`
32625	///
32626	/// `XOP`
32627	///
32628	/// `16/32/64-bit`
32629	XOP_Vpmacsww_xmm_xmm_xmmm128_xmm = 4079,
32630	/// `VPMACSWD xmm1, xmm2, xmm3/m128, xmm4`
32631	///
32632	/// `XOP.128.X8.W0 96 /r /is4`
32633	///
32634	/// `XOP`
32635	///
32636	/// `16/32/64-bit`
32637	XOP_Vpmacswd_xmm_xmm_xmmm128_xmm = 4080,
32638	/// `VPMACSDQL xmm1, xmm2, xmm3/m128, xmm4`
32639	///
32640	/// `XOP.128.X8.W0 97 /r /is4`
32641	///
32642	/// `XOP`
32643	///
32644	/// `16/32/64-bit`
32645	XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm = 4081,
32646	/// `VPMACSDD xmm1, xmm2, xmm3/m128, xmm4`
32647	///
32648	/// `XOP.128.X8.W0 9E /r /is4`
32649	///
32650	/// `XOP`
32651	///
32652	/// `16/32/64-bit`
32653	XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm = 4082,
32654	/// `VPMACSDQH xmm1, xmm2, xmm3/m128, xmm4`
32655	///
32656	/// `XOP.128.X8.W0 9F /r /is4`
32657	///
32658	/// `XOP`
32659	///
32660	/// `16/32/64-bit`
32661	XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm = 4083,
32662	/// `VPCMOV xmm1, xmm2, xmm3/m128, xmm4`
32663	///
32664	/// `XOP.128.X8.W0 A2 /r /is4`
32665	///
32666	/// `XOP`
32667	///
32668	/// `16/32/64-bit`
32669	XOP_Vpcmov_xmm_xmm_xmmm128_xmm = 4084,
32670	/// `VPCMOV ymm1, ymm2, ymm3/m256, ymm4`
32671	///
32672	/// `XOP.256.X8.W0 A2 /r /is4`
32673	///
32674	/// `XOP`
32675	///
32676	/// `16/32/64-bit`
32677	XOP_Vpcmov_ymm_ymm_ymmm256_ymm = 4085,
32678	/// `VPCMOV xmm1, xmm2, xmm3, xmm4/m128`
32679	///
32680	/// `XOP.128.X8.W1 A2 /r /is4`
32681	///
32682	/// `XOP`
32683	///
32684	/// `16/32/64-bit`
32685	XOP_Vpcmov_xmm_xmm_xmm_xmmm128 = 4086,
32686	/// `VPCMOV ymm1, ymm2, ymm3, ymm4/m256`
32687	///
32688	/// `XOP.256.X8.W1 A2 /r /is4`
32689	///
32690	/// `XOP`
32691	///
32692	/// `16/32/64-bit`
32693	XOP_Vpcmov_ymm_ymm_ymm_ymmm256 = 4087,
32694	/// `VPPERM xmm1, xmm2, xmm3/m128, xmm4`
32695	///
32696	/// `XOP.128.X8.W0 A3 /r /is4`
32697	///
32698	/// `XOP`
32699	///
32700	/// `16/32/64-bit`
32701	XOP_Vpperm_xmm_xmm_xmmm128_xmm = 4088,
32702	/// `VPPERM xmm1, xmm2, xmm3, xmm4/m128`
32703	///
32704	/// `XOP.128.X8.W1 A3 /r /is4`
32705	///
32706	/// `XOP`
32707	///
32708	/// `16/32/64-bit`
32709	XOP_Vpperm_xmm_xmm_xmm_xmmm128 = 4089,
32710	/// `VPMADCSSWD xmm1, xmm2, xmm3/m128, xmm4`
32711	///
32712	/// `XOP.128.X8.W0 A6 /r /is4`
32713	///
32714	/// `XOP`
32715	///
32716	/// `16/32/64-bit`
32717	XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm = 4090,
32718	/// `VPMADCSWD xmm1, xmm2, xmm3/m128, xmm4`
32719	///
32720	/// `XOP.128.X8.W0 B6 /r /is4`
32721	///
32722	/// `XOP`
32723	///
32724	/// `16/32/64-bit`
32725	XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm = 4091,
32726	/// `VPROTB xmm1, xmm2/m128, imm8`
32727	///
32728	/// `XOP.128.X8.W0 C0 /r ib`
32729	///
32730	/// `XOP`
32731	///
32732	/// `16/32/64-bit`
32733	XOP_Vprotb_xmm_xmmm128_imm8 = 4092,
32734	/// `VPROTW xmm1, xmm2/m128, imm8`
32735	///
32736	/// `XOP.128.X8.W0 C1 /r ib`
32737	///
32738	/// `XOP`
32739	///
32740	/// `16/32/64-bit`
32741	XOP_Vprotw_xmm_xmmm128_imm8 = 4093,
32742	/// `VPROTD xmm1, xmm2/m128, imm8`
32743	///
32744	/// `XOP.128.X8.W0 C2 /r ib`
32745	///
32746	/// `XOP`
32747	///
32748	/// `16/32/64-bit`
32749	XOP_Vprotd_xmm_xmmm128_imm8 = 4094,
32750	/// `VPROTQ xmm1, xmm2/m128, imm8`
32751	///
32752	/// `XOP.128.X8.W0 C3 /r ib`
32753	///
32754	/// `XOP`
32755	///
32756	/// `16/32/64-bit`
32757	XOP_Vprotq_xmm_xmmm128_imm8 = 4095,
32758	/// `VPCOMB xmm1, xmm2, xmm3/m128, imm8`
32759	///
32760	/// `XOP.128.X8.W0 CC /r ib`
32761	///
32762	/// `XOP`
32763	///
32764	/// `16/32/64-bit`
32765	XOP_Vpcomb_xmm_xmm_xmmm128_imm8 = 4096,
32766	/// `VPCOMW xmm1, xmm2, xmm3/m128, imm8`
32767	///
32768	/// `XOP.128.X8.W0 CD /r ib`
32769	///
32770	/// `XOP`
32771	///
32772	/// `16/32/64-bit`
32773	XOP_Vpcomw_xmm_xmm_xmmm128_imm8 = 4097,
32774	/// `VPCOMD xmm1, xmm2, xmm3/m128, imm8`
32775	///
32776	/// `XOP.128.X8.W0 CE /r ib`
32777	///
32778	/// `XOP`
32779	///
32780	/// `16/32/64-bit`
32781	XOP_Vpcomd_xmm_xmm_xmmm128_imm8 = 4098,
32782	/// `VPCOMQ xmm1, xmm2, xmm3/m128, imm8`
32783	///
32784	/// `XOP.128.X8.W0 CF /r ib`
32785	///
32786	/// `XOP`
32787	///
32788	/// `16/32/64-bit`
32789	XOP_Vpcomq_xmm_xmm_xmmm128_imm8 = 4099,
32790	/// `VPCOMUB xmm1, xmm2, xmm3/m128, imm8`
32791	///
32792	/// `XOP.128.X8.W0 EC /r ib`
32793	///
32794	/// `XOP`
32795	///
32796	/// `16/32/64-bit`
32797	XOP_Vpcomub_xmm_xmm_xmmm128_imm8 = 4100,
32798	/// `VPCOMUW xmm1, xmm2, xmm3/m128, imm8`
32799	///
32800	/// `XOP.128.X8.W0 ED /r ib`
32801	///
32802	/// `XOP`
32803	///
32804	/// `16/32/64-bit`
32805	XOP_Vpcomuw_xmm_xmm_xmmm128_imm8 = 4101,
32806	/// `VPCOMUD xmm1, xmm2, xmm3/m128, imm8`
32807	///
32808	/// `XOP.128.X8.W0 EE /r ib`
32809	///
32810	/// `XOP`
32811	///
32812	/// `16/32/64-bit`
32813	XOP_Vpcomud_xmm_xmm_xmmm128_imm8 = 4102,
32814	/// `VPCOMUQ xmm1, xmm2, xmm3/m128, imm8`
32815	///
32816	/// `XOP.128.X8.W0 EF /r ib`
32817	///
32818	/// `XOP`
32819	///
32820	/// `16/32/64-bit`
32821	XOP_Vpcomuq_xmm_xmm_xmmm128_imm8 = 4103,
32822	/// `BLCFILL r32, r/m32`
32823	///
32824	/// `XOP.L0.X9.W0 01 /1`
32825	///
32826	/// `TBM`
32827	///
32828	/// `16/32/64-bit`
32829	XOP_Blcfill_r32_rm32 = 4104,
32830	/// `BLCFILL r64, r/m64`
32831	///
32832	/// `XOP.L0.X9.W1 01 /1`
32833	///
32834	/// `TBM`
32835	///
32836	/// `64-bit`
32837	XOP_Blcfill_r64_rm64 = 4105,
32838	/// `BLSFILL r32, r/m32`
32839	///
32840	/// `XOP.L0.X9.W0 01 /2`
32841	///
32842	/// `TBM`
32843	///
32844	/// `16/32/64-bit`
32845	XOP_Blsfill_r32_rm32 = 4106,
32846	/// `BLSFILL r64, r/m64`
32847	///
32848	/// `XOP.L0.X9.W1 01 /2`
32849	///
32850	/// `TBM`
32851	///
32852	/// `64-bit`
32853	XOP_Blsfill_r64_rm64 = 4107,
32854	/// `BLCS r32, r/m32`
32855	///
32856	/// `XOP.L0.X9.W0 01 /3`
32857	///
32858	/// `TBM`
32859	///
32860	/// `16/32/64-bit`
32861	XOP_Blcs_r32_rm32 = 4108,
32862	/// `BLCS r64, r/m64`
32863	///
32864	/// `XOP.L0.X9.W1 01 /3`
32865	///
32866	/// `TBM`
32867	///
32868	/// `64-bit`
32869	XOP_Blcs_r64_rm64 = 4109,
32870	/// `TZMSK r32, r/m32`
32871	///
32872	/// `XOP.L0.X9.W0 01 /4`
32873	///
32874	/// `TBM`
32875	///
32876	/// `16/32/64-bit`
32877	XOP_Tzmsk_r32_rm32 = 4110,
32878	/// `TZMSK r64, r/m64`
32879	///
32880	/// `XOP.L0.X9.W1 01 /4`
32881	///
32882	/// `TBM`
32883	///
32884	/// `64-bit`
32885	XOP_Tzmsk_r64_rm64 = 4111,
32886	/// `BLCIC r32, r/m32`
32887	///
32888	/// `XOP.L0.X9.W0 01 /5`
32889	///
32890	/// `TBM`
32891	///
32892	/// `16/32/64-bit`
32893	XOP_Blcic_r32_rm32 = 4112,
32894	/// `BLCIC r64, r/m64`
32895	///
32896	/// `XOP.L0.X9.W1 01 /5`
32897	///
32898	/// `TBM`
32899	///
32900	/// `64-bit`
32901	XOP_Blcic_r64_rm64 = 4113,
32902	/// `BLSIC r32, r/m32`
32903	///
32904	/// `XOP.L0.X9.W0 01 /6`
32905	///
32906	/// `TBM`
32907	///
32908	/// `16/32/64-bit`
32909	XOP_Blsic_r32_rm32 = 4114,
32910	/// `BLSIC r64, r/m64`
32911	///
32912	/// `XOP.L0.X9.W1 01 /6`
32913	///
32914	/// `TBM`
32915	///
32916	/// `64-bit`
32917	XOP_Blsic_r64_rm64 = 4115,
32918	/// `T1MSKC r32, r/m32`
32919	///
32920	/// `XOP.L0.X9.W0 01 /7`
32921	///
32922	/// `TBM`
32923	///
32924	/// `16/32/64-bit`
32925	XOP_T1mskc_r32_rm32 = 4116,
32926	/// `T1MSKC r64, r/m64`
32927	///
32928	/// `XOP.L0.X9.W1 01 /7`
32929	///
32930	/// `TBM`
32931	///
32932	/// `64-bit`
32933	XOP_T1mskc_r64_rm64 = 4117,
32934	/// `BLCMSK r32, r/m32`
32935	///
32936	/// `XOP.L0.X9.W0 02 /1`
32937	///
32938	/// `TBM`
32939	///
32940	/// `16/32/64-bit`
32941	XOP_Blcmsk_r32_rm32 = 4118,
32942	/// `BLCMSK r64, r/m64`
32943	///
32944	/// `XOP.L0.X9.W1 02 /1`
32945	///
32946	/// `TBM`
32947	///
32948	/// `64-bit`
32949	XOP_Blcmsk_r64_rm64 = 4119,
32950	/// `BLCI r32, r/m32`
32951	///
32952	/// `XOP.L0.X9.W0 02 /6`
32953	///
32954	/// `TBM`
32955	///
32956	/// `16/32/64-bit`
32957	XOP_Blci_r32_rm32 = 4120,
32958	/// `BLCI r64, r/m64`
32959	///
32960	/// `XOP.L0.X9.W1 02 /6`
32961	///
32962	/// `TBM`
32963	///
32964	/// `64-bit`
32965	XOP_Blci_r64_rm64 = 4121,
32966	/// `LLWPCB r32`
32967	///
32968	/// `XOP.L0.X9.W0 12 /0`
32969	///
32970	/// `LWP`
32971	///
32972	/// `16/32/64-bit`
32973	XOP_Llwpcb_r32 = 4122,
32974	/// `LLWPCB r64`
32975	///
32976	/// `XOP.L0.X9.W1 12 /0`
32977	///
32978	/// `LWP`
32979	///
32980	/// `64-bit`
32981	XOP_Llwpcb_r64 = 4123,
32982	/// `SLWPCB r32`
32983	///
32984	/// `XOP.L0.X9.W0 12 /1`
32985	///
32986	/// `LWP`
32987	///
32988	/// `16/32/64-bit`
32989	XOP_Slwpcb_r32 = 4124,
32990	/// `SLWPCB r64`
32991	///
32992	/// `XOP.L0.X9.W1 12 /1`
32993	///
32994	/// `LWP`
32995	///
32996	/// `64-bit`
32997	XOP_Slwpcb_r64 = 4125,
32998	/// `VFRCZPS xmm1, xmm2/m128`
32999	///
33000	/// `XOP.128.X9.W0 80 /r`
33001	///
33002	/// `XOP`
33003	///
33004	/// `16/32/64-bit`
33005	XOP_Vfrczps_xmm_xmmm128 = 4126,
33006	/// `VFRCZPS ymm1, ymm2/m256`
33007	///
33008	/// `XOP.256.X9.W0 80 /r`
33009	///
33010	/// `XOP`
33011	///
33012	/// `16/32/64-bit`
33013	XOP_Vfrczps_ymm_ymmm256 = 4127,
33014	/// `VFRCZPD xmm1, xmm2/m128`
33015	///
33016	/// `XOP.128.X9.W0 81 /r`
33017	///
33018	/// `XOP`
33019	///
33020	/// `16/32/64-bit`
33021	XOP_Vfrczpd_xmm_xmmm128 = 4128,
33022	/// `VFRCZPD ymm1, ymm2/m256`
33023	///
33024	/// `XOP.256.X9.W0 81 /r`
33025	///
33026	/// `XOP`
33027	///
33028	/// `16/32/64-bit`
33029	XOP_Vfrczpd_ymm_ymmm256 = 4129,
33030	/// `VFRCZSS xmm1, xmm2/m32`
33031	///
33032	/// `XOP.128.X9.W0 82 /r`
33033	///
33034	/// `XOP`
33035	///
33036	/// `16/32/64-bit`
33037	XOP_Vfrczss_xmm_xmmm32 = 4130,
33038	/// `VFRCZSD xmm1, xmm2/m64`
33039	///
33040	/// `XOP.128.X9.W0 83 /r`
33041	///
33042	/// `XOP`
33043	///
33044	/// `16/32/64-bit`
33045	XOP_Vfrczsd_xmm_xmmm64 = 4131,
33046	/// `VPROTB xmm1, xmm2/m128, xmm3`
33047	///
33048	/// `XOP.128.X9.W0 90 /r`
33049	///
33050	/// `XOP`
33051	///
33052	/// `16/32/64-bit`
33053	XOP_Vprotb_xmm_xmmm128_xmm = 4132,
33054	/// `VPROTB xmm1, xmm2, xmm3/m128`
33055	///
33056	/// `XOP.128.X9.W1 90 /r`
33057	///
33058	/// `XOP`
33059	///
33060	/// `16/32/64-bit`
33061	XOP_Vprotb_xmm_xmm_xmmm128 = 4133,
33062	/// `VPROTW xmm1, xmm2/m128, xmm3`
33063	///
33064	/// `XOP.128.X9.W0 91 /r`
33065	///
33066	/// `XOP`
33067	///
33068	/// `16/32/64-bit`
33069	XOP_Vprotw_xmm_xmmm128_xmm = 4134,
33070	/// `VPROTW xmm1, xmm2, xmm3/m128`
33071	///
33072	/// `XOP.128.X9.W1 91 /r`
33073	///
33074	/// `XOP`
33075	///
33076	/// `16/32/64-bit`
33077	XOP_Vprotw_xmm_xmm_xmmm128 = 4135,
33078	/// `VPROTD xmm1, xmm2/m128, xmm3`
33079	///
33080	/// `XOP.128.X9.W0 92 /r`
33081	///
33082	/// `XOP`
33083	///
33084	/// `16/32/64-bit`
33085	XOP_Vprotd_xmm_xmmm128_xmm = 4136,
33086	/// `VPROTD xmm1, xmm2, xmm3/m128`
33087	///
33088	/// `XOP.128.X9.W1 92 /r`
33089	///
33090	/// `XOP`
33091	///
33092	/// `16/32/64-bit`
33093	XOP_Vprotd_xmm_xmm_xmmm128 = 4137,
33094	/// `VPROTQ xmm1, xmm2/m128, xmm3`
33095	///
33096	/// `XOP.128.X9.W0 93 /r`
33097	///
33098	/// `XOP`
33099	///
33100	/// `16/32/64-bit`
33101	XOP_Vprotq_xmm_xmmm128_xmm = 4138,
33102	/// `VPROTQ xmm1, xmm2, xmm3/m128`
33103	///
33104	/// `XOP.128.X9.W1 93 /r`
33105	///
33106	/// `XOP`
33107	///
33108	/// `16/32/64-bit`
33109	XOP_Vprotq_xmm_xmm_xmmm128 = 4139,
33110	/// `VPSHLB xmm1, xmm2/m128, xmm3`
33111	///
33112	/// `XOP.128.X9.W0 94 /r`
33113	///
33114	/// `XOP`
33115	///
33116	/// `16/32/64-bit`
33117	XOP_Vpshlb_xmm_xmmm128_xmm = 4140,
33118	/// `VPSHLB xmm1, xmm2, xmm3/m128`
33119	///
33120	/// `XOP.128.X9.W1 94 /r`
33121	///
33122	/// `XOP`
33123	///
33124	/// `16/32/64-bit`
33125	XOP_Vpshlb_xmm_xmm_xmmm128 = 4141,
33126	/// `VPSHLW xmm1, xmm2/m128, xmm3`
33127	///
33128	/// `XOP.128.X9.W0 95 /r`
33129	///
33130	/// `XOP`
33131	///
33132	/// `16/32/64-bit`
33133	XOP_Vpshlw_xmm_xmmm128_xmm = 4142,
33134	/// `VPSHLW xmm1, xmm2, xmm3/m128`
33135	///
33136	/// `XOP.128.X9.W1 95 /r`
33137	///
33138	/// `XOP`
33139	///
33140	/// `16/32/64-bit`
33141	XOP_Vpshlw_xmm_xmm_xmmm128 = 4143,
33142	/// `VPSHLD xmm1, xmm2/m128, xmm3`
33143	///
33144	/// `XOP.128.X9.W0 96 /r`
33145	///
33146	/// `XOP`
33147	///
33148	/// `16/32/64-bit`
33149	XOP_Vpshld_xmm_xmmm128_xmm = 4144,
33150	/// `VPSHLD xmm1, xmm2, xmm3/m128`
33151	///
33152	/// `XOP.128.X9.W1 96 /r`
33153	///
33154	/// `XOP`
33155	///
33156	/// `16/32/64-bit`
33157	XOP_Vpshld_xmm_xmm_xmmm128 = 4145,
33158	/// `VPSHLQ xmm1, xmm2/m128, xmm3`
33159	///
33160	/// `XOP.128.X9.W0 97 /r`
33161	///
33162	/// `XOP`
33163	///
33164	/// `16/32/64-bit`
33165	XOP_Vpshlq_xmm_xmmm128_xmm = 4146,
33166	/// `VPSHLQ xmm1, xmm2, xmm3/m128`
33167	///
33168	/// `XOP.128.X9.W1 97 /r`
33169	///
33170	/// `XOP`
33171	///
33172	/// `16/32/64-bit`
33173	XOP_Vpshlq_xmm_xmm_xmmm128 = 4147,
33174	/// `VPSHAB xmm1, xmm2/m128, xmm3`
33175	///
33176	/// `XOP.128.X9.W0 98 /r`
33177	///
33178	/// `XOP`
33179	///
33180	/// `16/32/64-bit`
33181	XOP_Vpshab_xmm_xmmm128_xmm = 4148,
33182	/// `VPSHAB xmm1, xmm2, xmm3/m128`
33183	///
33184	/// `XOP.128.X9.W1 98 /r`
33185	///
33186	/// `XOP`
33187	///
33188	/// `16/32/64-bit`
33189	XOP_Vpshab_xmm_xmm_xmmm128 = 4149,
33190	/// `VPSHAW xmm1, xmm2/m128, xmm3`
33191	///
33192	/// `XOP.128.X9.W0 99 /r`
33193	///
33194	/// `XOP`
33195	///
33196	/// `16/32/64-bit`
33197	XOP_Vpshaw_xmm_xmmm128_xmm = 4150,
33198	/// `VPSHAW xmm1, xmm2, xmm3/m128`
33199	///
33200	/// `XOP.128.X9.W1 99 /r`
33201	///
33202	/// `XOP`
33203	///
33204	/// `16/32/64-bit`
33205	XOP_Vpshaw_xmm_xmm_xmmm128 = 4151,
33206	/// `VPSHAD xmm1, xmm2/m128, xmm3`
33207	///
33208	/// `XOP.128.X9.W0 9A /r`
33209	///
33210	/// `XOP`
33211	///
33212	/// `16/32/64-bit`
33213	XOP_Vpshad_xmm_xmmm128_xmm = 4152,
33214	/// `VPSHAD xmm1, xmm2, xmm3/m128`
33215	///
33216	/// `XOP.128.X9.W1 9A /r`
33217	///
33218	/// `XOP`
33219	///
33220	/// `16/32/64-bit`
33221	XOP_Vpshad_xmm_xmm_xmmm128 = 4153,
33222	/// `VPSHAQ xmm1, xmm2/m128, xmm3`
33223	///
33224	/// `XOP.128.X9.W0 9B /r`
33225	///
33226	/// `XOP`
33227	///
33228	/// `16/32/64-bit`
33229	XOP_Vpshaq_xmm_xmmm128_xmm = 4154,
33230	/// `VPSHAQ xmm1, xmm2, xmm3/m128`
33231	///
33232	/// `XOP.128.X9.W1 9B /r`
33233	///
33234	/// `XOP`
33235	///
33236	/// `16/32/64-bit`
33237	XOP_Vpshaq_xmm_xmm_xmmm128 = 4155,
33238	/// `VPHADDBW xmm1, xmm2/m128`
33239	///
33240	/// `XOP.128.X9.W0 C1 /r`
33241	///
33242	/// `XOP`
33243	///
33244	/// `16/32/64-bit`
33245	XOP_Vphaddbw_xmm_xmmm128 = 4156,
33246	/// `VPHADDBD xmm1, xmm2/m128`
33247	///
33248	/// `XOP.128.X9.W0 C2 /r`
33249	///
33250	/// `XOP`
33251	///
33252	/// `16/32/64-bit`
33253	XOP_Vphaddbd_xmm_xmmm128 = 4157,
33254	/// `VPHADDBQ xmm1, xmm2/m128`
33255	///
33256	/// `XOP.128.X9.W0 C3 /r`
33257	///
33258	/// `XOP`
33259	///
33260	/// `16/32/64-bit`
33261	XOP_Vphaddbq_xmm_xmmm128 = 4158,
33262	/// `VPHADDWD xmm1, xmm2/m128`
33263	///
33264	/// `XOP.128.X9.W0 C6 /r`
33265	///
33266	/// `XOP`
33267	///
33268	/// `16/32/64-bit`
33269	XOP_Vphaddwd_xmm_xmmm128 = 4159,
33270	/// `VPHADDWQ xmm1, xmm2/m128`
33271	///
33272	/// `XOP.128.X9.W0 C7 /r`
33273	///
33274	/// `XOP`
33275	///
33276	/// `16/32/64-bit`
33277	XOP_Vphaddwq_xmm_xmmm128 = 4160,
33278	/// `VPHADDDQ xmm1, xmm2/m128`
33279	///
33280	/// `XOP.128.X9.W0 CB /r`
33281	///
33282	/// `XOP`
33283	///
33284	/// `16/32/64-bit`
33285	XOP_Vphadddq_xmm_xmmm128 = 4161,
33286	/// `VPHADDUBW xmm1, xmm2/m128`
33287	///
33288	/// `XOP.128.X9.W0 D1 /r`
33289	///
33290	/// `XOP`
33291	///
33292	/// `16/32/64-bit`
33293	XOP_Vphaddubw_xmm_xmmm128 = 4162,
33294	/// `VPHADDUBD xmm1, xmm2/m128`
33295	///
33296	/// `XOP.128.X9.W0 D2 /r`
33297	///
33298	/// `XOP`
33299	///
33300	/// `16/32/64-bit`
33301	XOP_Vphaddubd_xmm_xmmm128 = 4163,
33302	/// `VPHADDUBQ xmm1, xmm2/m128`
33303	///
33304	/// `XOP.128.X9.W0 D3 /r`
33305	///
33306	/// `XOP`
33307	///
33308	/// `16/32/64-bit`
33309	XOP_Vphaddubq_xmm_xmmm128 = 4164,
33310	/// `VPHADDUWD xmm1, xmm2/m128`
33311	///
33312	/// `XOP.128.X9.W0 D6 /r`
33313	///
33314	/// `XOP`
33315	///
33316	/// `16/32/64-bit`
33317	XOP_Vphadduwd_xmm_xmmm128 = 4165,
33318	/// `VPHADDUWQ xmm1, xmm2/m128`
33319	///
33320	/// `XOP.128.X9.W0 D7 /r`
33321	///
33322	/// `XOP`
33323	///
33324	/// `16/32/64-bit`
33325	XOP_Vphadduwq_xmm_xmmm128 = 4166,
33326	/// `VPHADDUDQ xmm1, xmm2/m128`
33327	///
33328	/// `XOP.128.X9.W0 DB /r`
33329	///
33330	/// `XOP`
33331	///
33332	/// `16/32/64-bit`
33333	XOP_Vphaddudq_xmm_xmmm128 = 4167,
33334	/// `VPHSUBBW xmm1, xmm2/m128`
33335	///
33336	/// `XOP.128.X9.W0 E1 /r`
33337	///
33338	/// `XOP`
33339	///
33340	/// `16/32/64-bit`
33341	XOP_Vphsubbw_xmm_xmmm128 = 4168,
33342	/// `VPHSUBWD xmm1, xmm2/m128`
33343	///
33344	/// `XOP.128.X9.W0 E2 /r`
33345	///
33346	/// `XOP`
33347	///
33348	/// `16/32/64-bit`
33349	XOP_Vphsubwd_xmm_xmmm128 = 4169,
33350	/// `VPHSUBDQ xmm1, xmm2/m128`
33351	///
33352	/// `XOP.128.X9.W0 E3 /r`
33353	///
33354	/// `XOP`
33355	///
33356	/// `16/32/64-bit`
33357	XOP_Vphsubdq_xmm_xmmm128 = 4170,
33358	/// `BEXTR r32, r/m32, imm32`
33359	///
33360	/// `XOP.L0.XA.W0 10 /r id`
33361	///
33362	/// `TBM`
33363	///
33364	/// `16/32/64-bit`
33365	XOP_Bextr_r32_rm32_imm32 = 4171,
33366	/// `BEXTR r64, r/m64, imm32`
33367	///
33368	/// `XOP.L0.XA.W1 10 /r id`
33369	///
33370	/// `TBM`
33371	///
33372	/// `64-bit`
33373	XOP_Bextr_r64_rm64_imm32 = 4172,
33374	/// `LWPINS r32, r/m32, imm32`
33375	///
33376	/// `XOP.L0.XA.W0 12 /0 id`
33377	///
33378	/// `LWP`
33379	///
33380	/// `16/32/64-bit`
33381	XOP_Lwpins_r32_rm32_imm32 = 4173,
33382	/// `LWPINS r64, r/m32, imm32`
33383	///
33384	/// `XOP.L0.XA.W1 12 /0 id`
33385	///
33386	/// `LWP`
33387	///
33388	/// `64-bit`
33389	XOP_Lwpins_r64_rm32_imm32 = 4174,
33390	/// `LWPVAL r32, r/m32, imm32`
33391	///
33392	/// `XOP.L0.XA.W0 12 /1 id`
33393	///
33394	/// `LWP`
33395	///
33396	/// `16/32/64-bit`
33397	XOP_Lwpval_r32_rm32_imm32 = 4175,
33398	/// `LWPVAL r64, r/m32, imm32`
33399	///
33400	/// `XOP.L0.XA.W1 12 /1 id`
33401	///
33402	/// `LWP`
33403	///
33404	/// `64-bit`
33405	XOP_Lwpval_r64_rm32_imm32 = 4176,
33406	/// `PI2FW mm, mm/m64`
33407	///
33408	/// `0F 0F /r 0C`
33409	///
33410	/// `3DNOWEXT`
33411	///
33412	/// `16/32/64-bit`
33413	D3NOW_Pi2fw_mm_mmm64 = 4177,
33414	/// `PI2FD mm, mm/m64`
33415	///
33416	/// `0F 0F /r 0D`
33417	///
33418	/// `3DNOW`
33419	///
33420	/// `16/32/64-bit`
33421	D3NOW_Pi2fd_mm_mmm64 = 4178,
33422	/// `PF2IW mm, mm/m64`
33423	///
33424	/// `0F 0F /r 1C`
33425	///
33426	/// `3DNOWEXT`
33427	///
33428	/// `16/32/64-bit`
33429	D3NOW_Pf2iw_mm_mmm64 = 4179,
33430	/// `PF2ID mm, mm/m64`
33431	///
33432	/// `0F 0F /r 1D`
33433	///
33434	/// `3DNOW`
33435	///
33436	/// `16/32/64-bit`
33437	D3NOW_Pf2id_mm_mmm64 = 4180,
33438	/// `PFRCPV mm, mm/m64`
33439	///
33440	/// `0F 0F /r 86`
33441	///
33442	/// `AMD Geode GX/LX`
33443	///
33444	/// `16/32-bit`
33445	D3NOW_Pfrcpv_mm_mmm64 = 4181,
33446	/// `PFRSQRTV mm, mm/m64`
33447	///
33448	/// `0F 0F /r 87`
33449	///
33450	/// `AMD Geode GX/LX`
33451	///
33452	/// `16/32-bit`
33453	D3NOW_Pfrsqrtv_mm_mmm64 = 4182,
33454	/// `PFNACC mm, mm/m64`
33455	///
33456	/// `0F 0F /r 8A`
33457	///
33458	/// `3DNOWEXT`
33459	///
33460	/// `16/32/64-bit`
33461	D3NOW_Pfnacc_mm_mmm64 = 4183,
33462	/// `PFPNACC mm, mm/m64`
33463	///
33464	/// `0F 0F /r 8E`
33465	///
33466	/// `3DNOWEXT`
33467	///
33468	/// `16/32/64-bit`
33469	D3NOW_Pfpnacc_mm_mmm64 = 4184,
33470	/// `PFCMPGE mm, mm/m64`
33471	///
33472	/// `0F 0F /r 90`
33473	///
33474	/// `3DNOW`
33475	///
33476	/// `16/32/64-bit`
33477	D3NOW_Pfcmpge_mm_mmm64 = 4185,
33478	/// `PFMIN mm, mm/m64`
33479	///
33480	/// `0F 0F /r 94`
33481	///
33482	/// `3DNOW`
33483	///
33484	/// `16/32/64-bit`
33485	D3NOW_Pfmin_mm_mmm64 = 4186,
33486	/// `PFRCP mm, mm/m64`
33487	///
33488	/// `0F 0F /r 96`
33489	///
33490	/// `3DNOW`
33491	///
33492	/// `16/32/64-bit`
33493	D3NOW_Pfrcp_mm_mmm64 = 4187,
33494	/// `PFRSQRT mm, mm/m64`
33495	///
33496	/// `0F 0F /r 97`
33497	///
33498	/// `3DNOW`
33499	///
33500	/// `16/32/64-bit`
33501	D3NOW_Pfrsqrt_mm_mmm64 = 4188,
33502	/// `PFSUB mm, mm/m64`
33503	///
33504	/// `0F 0F /r 9A`
33505	///
33506	/// `3DNOW`
33507	///
33508	/// `16/32/64-bit`
33509	D3NOW_Pfsub_mm_mmm64 = 4189,
33510	/// `PFADD mm, mm/m64`
33511	///
33512	/// `0F 0F /r 9E`
33513	///
33514	/// `3DNOW`
33515	///
33516	/// `16/32/64-bit`
33517	D3NOW_Pfadd_mm_mmm64 = 4190,
33518	/// `PFCMPGT mm, mm/m64`
33519	///
33520	/// `0F 0F /r A0`
33521	///
33522	/// `3DNOW`
33523	///
33524	/// `16/32/64-bit`
33525	D3NOW_Pfcmpgt_mm_mmm64 = 4191,
33526	/// `PFMAX mm, mm/m64`
33527	///
33528	/// `0F 0F /r A4`
33529	///
33530	/// `3DNOW`
33531	///
33532	/// `16/32/64-bit`
33533	D3NOW_Pfmax_mm_mmm64 = 4192,
33534	/// `PFRCPIT1 mm, mm/m64`
33535	///
33536	/// `0F 0F /r A6`
33537	///
33538	/// `3DNOW`
33539	///
33540	/// `16/32/64-bit`
33541	D3NOW_Pfrcpit1_mm_mmm64 = 4193,
33542	/// `PFRSQIT1 mm, mm/m64`
33543	///
33544	/// `0F 0F /r A7`
33545	///
33546	/// `3DNOW`
33547	///
33548	/// `16/32/64-bit`
33549	D3NOW_Pfrsqit1_mm_mmm64 = 4194,
33550	/// `PFSUBR mm, mm/m64`
33551	///
33552	/// `0F 0F /r AA`
33553	///
33554	/// `3DNOW`
33555	///
33556	/// `16/32/64-bit`
33557	D3NOW_Pfsubr_mm_mmm64 = 4195,
33558	/// `PFACC mm, mm/m64`
33559	///
33560	/// `0F 0F /r AE`
33561	///
33562	/// `3DNOW`
33563	///
33564	/// `16/32/64-bit`
33565	D3NOW_Pfacc_mm_mmm64 = 4196,
33566	/// `PFCMPEQ mm, mm/m64`
33567	///
33568	/// `0F 0F /r B0`
33569	///
33570	/// `3DNOW`
33571	///
33572	/// `16/32/64-bit`
33573	D3NOW_Pfcmpeq_mm_mmm64 = 4197,
33574	/// `PFMUL mm, mm/m64`
33575	///
33576	/// `0F 0F /r B4`
33577	///
33578	/// `3DNOW`
33579	///
33580	/// `16/32/64-bit`
33581	D3NOW_Pfmul_mm_mmm64 = 4198,
33582	/// `PFRCPIT2 mm, mm/m64`
33583	///
33584	/// `0F 0F /r B6`
33585	///
33586	/// `3DNOW`
33587	///
33588	/// `16/32/64-bit`
33589	D3NOW_Pfrcpit2_mm_mmm64 = 4199,
33590	/// `PMULHRW mm, mm/m64`
33591	///
33592	/// `0F 0F /r B7`
33593	///
33594	/// `3DNOW`
33595	///
33596	/// `16/32/64-bit`
33597	D3NOW_Pmulhrw_mm_mmm64 = 4200,
33598	/// `PSWAPD mm, mm/m64`
33599	///
33600	/// `0F 0F /r BB`
33601	///
33602	/// `3DNOWEXT`
33603	///
33604	/// `16/32/64-bit`
33605	D3NOW_Pswapd_mm_mmm64 = 4201,
33606	/// `PAVGUSB mm, mm/m64`
33607	///
33608	/// `0F 0F /r BF`
33609	///
33610	/// `3DNOW`
33611	///
33612	/// `16/32/64-bit`
33613	D3NOW_Pavgusb_mm_mmm64 = 4202,
33614	/// `RMPADJUST`
33615	///
33616	/// `F3 0F 01 FE`
33617	///
33618	/// `SEV-SNP`
33619	///
33620	/// `64-bit`
33621	Rmpadjust = 4203,
33622	/// `RMPUPDATE`
33623	///
33624	/// `F2 0F 01 FE`
33625	///
33626	/// `SEV-SNP`
33627	///
33628	/// `64-bit`
33629	Rmpupdate = 4204,
33630	/// `PSMASH`
33631	///
33632	/// `F3 0F 01 FF`
33633	///
33634	/// `SEV-SNP`
33635	///
33636	/// `64-bit`
33637	Psmash = 4205,
33638	/// `PVALIDATE`
33639	///
33640	/// `a16 F2 0F 01 FF`
33641	///
33642	/// `SEV-SNP`
33643	///
33644	/// `16/32-bit`
33645	Pvalidatew = 4206,
33646	/// `PVALIDATE`
33647	///
33648	/// `a32 F2 0F 01 FF`
33649	///
33650	/// `SEV-SNP`
33651	///
33652	/// `16/32/64-bit`
33653	Pvalidated = 4207,
33654	/// `PVALIDATE`
33655	///
33656	/// `a64 F2 0F 01 FF`
33657	///
33658	/// `SEV-SNP`
33659	///
33660	/// `64-bit`
33661	Pvalidateq = 4208,
33662	/// `SERIALIZE`
33663	///
33664	/// `NP 0F 01 E8`
33665	///
33666	/// `SERIALIZE`
33667	///
33668	/// `16/32/64-bit`
33669	Serialize = 4209,
33670	/// `XSUSLDTRK`
33671	///
33672	/// `F2 0F 01 E8`
33673	///
33674	/// `TSXLDTRK`
33675	///
33676	/// `16/32/64-bit`
33677	Xsusldtrk = 4210,
33678	/// `XRESLDTRK`
33679	///
33680	/// `F2 0F 01 E9`
33681	///
33682	/// `TSXLDTRK`
33683	///
33684	/// `16/32/64-bit`
33685	Xresldtrk = 4211,
33686	/// `INVLPGB`
33687	///
33688	/// `a16 NP 0F 01 FE`
33689	///
33690	/// `INVLPGB`
33691	///
33692	/// `16/32-bit`
33693	Invlpgbw = 4212,
33694	/// `INVLPGB`
33695	///
33696	/// `a32 NP 0F 01 FE`
33697	///
33698	/// `INVLPGB`
33699	///
33700	/// `16/32/64-bit`
33701	Invlpgbd = 4213,
33702	/// `INVLPGB`
33703	///
33704	/// `a64 NP 0F 01 FE`
33705	///
33706	/// `INVLPGB`
33707	///
33708	/// `64-bit`
33709	Invlpgbq = 4214,
33710	/// `TLBSYNC`
33711	///
33712	/// `NP 0F 01 FF`
33713	///
33714	/// `INVLPGB`
33715	///
33716	/// `16/32/64-bit`
33717	Tlbsync = 4215,
33718	/// `PREFETCHW m8`
33719	///
33720	/// `0F 0D /3`
33721	///
33722	/// `PREFETCHW`
33723	///
33724	/// `16/32/64-bit`
33725	Prefetchreserved3_m8 = 4216,
33726	/// `PREFETCH m8`
33727	///
33728	/// `0F 0D /4`
33729	///
33730	/// `PREFETCHW`
33731	///
33732	/// `16/32/64-bit`
33733	Prefetchreserved4_m8 = 4217,
33734	/// `PREFETCH m8`
33735	///
33736	/// `0F 0D /5`
33737	///
33738	/// `PREFETCHW`
33739	///
33740	/// `16/32/64-bit`
33741	Prefetchreserved5_m8 = 4218,
33742	/// `PREFETCH m8`
33743	///
33744	/// `0F 0D /6`
33745	///
33746	/// `PREFETCHW`
33747	///
33748	/// `16/32/64-bit`
33749	Prefetchreserved6_m8 = 4219,
33750	/// `PREFETCH m8`
33751	///
33752	/// `0F 0D /7`
33753	///
33754	/// `PREFETCHW`
33755	///
33756	/// `16/32/64-bit`
33757	Prefetchreserved7_m8 = 4220,
33758	/// `UD0`
33759	///
33760	/// `0F FF`
33761	///
33762	/// `286+`
33763	///
33764	/// `16/32/64-bit`
33765	Ud0 = 4221,
33766	/// `VMGEXIT`
33767	///
33768	/// `F3 0F 01 D9`
33769	///
33770	/// `SEV-ES`
33771	///
33772	/// `16/32/64-bit`
33773	Vmgexit = 4222,
33774	/// `GETSECQ`
33775	///
33776	/// `NP o64 0F 37`
33777	///
33778	/// `SMX`
33779	///
33780	/// `64-bit`
33781	Getsecq = 4223,
33782	/// `LDTILECFG m512`
33783	///
33784	/// `VEX.128.0F38.W0 49 !(11):000:bbb`
33785	///
33786	/// `AMX-TILE`
33787	///
33788	/// `64-bit`
33789	VEX_Ldtilecfg_m512 = 4224,
33790	/// `TILERELEASE`
33791	///
33792	/// `VEX.128.0F38.W0 49 C0`
33793	///
33794	/// `AMX-TILE`
33795	///
33796	/// `64-bit`
33797	VEX_Tilerelease = 4225,
33798	/// `STTILECFG m512`
33799	///
33800	/// `VEX.128.66.0F38.W0 49 !(11):000:bbb`
33801	///
33802	/// `AMX-TILE`
33803	///
33804	/// `64-bit`
33805	VEX_Sttilecfg_m512 = 4226,
33806	/// `TILEZERO tmm1`
33807	///
33808	/// `VEX.128.F2.0F38.W0 49 11:rrr:000`
33809	///
33810	/// `AMX-TILE`
33811	///
33812	/// `64-bit`
33813	VEX_Tilezero_tmm = 4227,
33814	/// `TILELOADDT1 tmm1, sibmem`
33815	///
33816	/// `VEX.128.66.0F38.W0 4B !(11):rrr:100`
33817	///
33818	/// `AMX-TILE`
33819	///
33820	/// `64-bit`
33821	VEX_Tileloaddt1_tmm_sibmem = 4228,
33822	/// `TILESTORED sibmem, tmm1`
33823	///
33824	/// `VEX.128.F3.0F38.W0 4B !(11):rrr:100`
33825	///
33826	/// `AMX-TILE`
33827	///
33828	/// `64-bit`
33829	VEX_Tilestored_sibmem_tmm = 4229,
33830	/// `TILELOADD tmm1, sibmem`
33831	///
33832	/// `VEX.128.F2.0F38.W0 4B !(11):rrr:100`
33833	///
33834	/// `AMX-TILE`
33835	///
33836	/// `64-bit`
33837	VEX_Tileloadd_tmm_sibmem = 4230,
33838	/// `TDPBF16PS tmm1, tmm2, tmm3`
33839	///
33840	/// `VEX.128.F3.0F38.W0 5C 11:rrr:bbb`
33841	///
33842	/// `AMX-BF16`
33843	///
33844	/// `64-bit`
33845	VEX_Tdpbf16ps_tmm_tmm_tmm = 4231,
33846	/// `TDPBUUD tmm1, tmm2, tmm3`
33847	///
33848	/// `VEX.128.0F38.W0 5E 11:rrr:bbb`
33849	///
33850	/// `AMX-INT8`
33851	///
33852	/// `64-bit`
33853	VEX_Tdpbuud_tmm_tmm_tmm = 4232,
33854	/// `TDPBUSD tmm1, tmm2, tmm3`
33855	///
33856	/// `VEX.128.66.0F38.W0 5E 11:rrr:bbb`
33857	///
33858	/// `AMX-INT8`
33859	///
33860	/// `64-bit`
33861	VEX_Tdpbusd_tmm_tmm_tmm = 4233,
33862	/// `TDPBSUD tmm1, tmm2, tmm3`
33863	///
33864	/// `VEX.128.F3.0F38.W0 5E 11:rrr:bbb`
33865	///
33866	/// `AMX-INT8`
33867	///
33868	/// `64-bit`
33869	VEX_Tdpbsud_tmm_tmm_tmm = 4234,
33870	/// `TDPBSSD tmm1, tmm2, tmm3`
33871	///
33872	/// `VEX.128.F2.0F38.W0 5E 11:rrr:bbb`
33873	///
33874	/// `AMX-INT8`
33875	///
33876	/// `64-bit`
33877	VEX_Tdpbssd_tmm_tmm_tmm = 4235,
33878	/// `FNSTDW AX`
33879	///
33880	/// `DF E1`
33881	///
33882	/// `387 SL`
33883	///
33884	/// `16/32-bit`
33885	Fnstdw_AX = 4236,
33886	/// `FNSTSG AX`
33887	///
33888	/// `DF E2`
33889	///
33890	/// `387 SL`
33891	///
33892	/// `16/32-bit`
33893	Fnstsg_AX = 4237,
33894	/// `RDSHR r/m32`
33895	///
33896	/// `0F 36 /0`
33897	///
33898	/// `Cyrix 6x86MX, M II, III`
33899	///
33900	/// `16/32-bit`
33901	Rdshr_rm32 = 4238,
33902	/// `WRSHR r/m32`
33903	///
33904	/// `0F 37 /0`
33905	///
33906	/// `Cyrix 6x86MX, M II, III`
33907	///
33908	/// `16/32-bit`
33909	Wrshr_rm32 = 4239,
33910	/// `SMINT`
33911	///
33912	/// `0F 38`
33913	///
33914	/// `Cyrix 6x86MX+, AMD Geode GX/LX`
33915	///
33916	/// `16/32-bit`
33917	Smint = 4240,
33918	/// `DMINT`
33919	///
33920	/// `0F 39`
33921	///
33922	/// `AMD Geode GX/LX`
33923	///
33924	/// `16/32-bit`
33925	Dmint = 4241,
33926	/// `RDM`
33927	///
33928	/// `0F 3A`
33929	///
33930	/// `AMD Geode GX/LX`
33931	///
33932	/// `16/32-bit`
33933	Rdm = 4242,
33934	/// `SVDC m80, Sreg`
33935	///
33936	/// `0F 78 /r`
33937	///
33938	/// `Cyrix, AMD Geode GX/LX`
33939	///
33940	/// `16/32-bit`
33941	Svdc_m80_Sreg = 4243,
33942	/// `RSDC Sreg, m80`
33943	///
33944	/// `0F 79 /r`
33945	///
33946	/// `Cyrix, AMD Geode GX/LX`
33947	///
33948	/// `16/32-bit`
33949	Rsdc_Sreg_m80 = 4244,
33950	/// `SVLDT m80`
33951	///
33952	/// `0F 7A /0`
33953	///
33954	/// `Cyrix, AMD Geode GX/LX`
33955	///
33956	/// `16/32-bit`
33957	Svldt_m80 = 4245,
33958	/// `RSLDT m80`
33959	///
33960	/// `0F 7B /0`
33961	///
33962	/// `Cyrix, AMD Geode GX/LX`
33963	///
33964	/// `16/32-bit`
33965	Rsldt_m80 = 4246,
33966	/// `SVTS m80`
33967	///
33968	/// `0F 7C /0`
33969	///
33970	/// `Cyrix, AMD Geode GX/LX`
33971	///
33972	/// `16/32-bit`
33973	Svts_m80 = 4247,
33974	/// `RSTS m80`
33975	///
33976	/// `0F 7D /0`
33977	///
33978	/// `Cyrix, AMD Geode GX/LX`
33979	///
33980	/// `16/32-bit`
33981	Rsts_m80 = 4248,
33982	/// `SMINT`
33983	///
33984	/// `0F 7E`
33985	///
33986	/// `Cyrix 6x86 or earlier`
33987	///
33988	/// `16/32-bit`
33989	Smint_0F7E = 4249,
33990	/// `BB0_RESET`
33991	///
33992	/// `0F 3A`
33993	///
33994	/// `Cyrix MediaGX, GXm, GXLV, GX1`
33995	///
33996	/// `16/32-bit`
33997	Bb0_reset = 4250,
33998	/// `BB1_RESET`
33999	///
34000	/// `0F 3B`
34001	///
34002	/// `Cyrix MediaGX, GXm, GXLV, GX1`
34003	///
34004	/// `16/32-bit`
34005	Bb1_reset = 4251,
34006	/// `CPU_WRITE`
34007	///
34008	/// `0F 3C`
34009	///
34010	/// `Cyrix MediaGX, GXm, GXLV, GX1`
34011	///
34012	/// `16/32-bit`
34013	Cpu_write = 4252,
34014	/// `CPU_READ`
34015	///
34016	/// `0F 3D`
34017	///
34018	/// `Cyrix MediaGX, GXm, GXLV, GX1`
34019	///
34020	/// `16/32-bit`
34021	Cpu_read = 4253,
34022	/// `ALTINST`
34023	///
34024	/// `0F 3F`
34025	///
34026	/// `Centaur AIS`
34027	///
34028	/// `16/32-bit`
34029	Altinst = 4254,
34030	/// `PAVEB mm, mm/m64`
34031	///
34032	/// `0F 50 /r`
34033	///
34034	/// `CYRIX_EMMI`
34035	///
34036	/// `16/32-bit`
34037	Paveb_mm_mmm64 = 4255,
34038	/// `PADDSIW mm, mm/m64`
34039	///
34040	/// `0F 51 /r`
34041	///
34042	/// `CYRIX_EMMI`
34043	///
34044	/// `16/32-bit`
34045	Paddsiw_mm_mmm64 = 4256,
34046	/// `PMAGW mm, mm/m64`
34047	///
34048	/// `0F 52 /r`
34049	///
34050	/// `CYRIX_EMMI`
34051	///
34052	/// `16/32-bit`
34053	Pmagw_mm_mmm64 = 4257,
34054	/// `PDISTIB mm, m64`
34055	///
34056	/// `0F 54 /r`
34057	///
34058	/// `CYRIX_EMMI`
34059	///
34060	/// `16/32-bit`
34061	Pdistib_mm_m64 = 4258,
34062	/// `PSUBSIW mm, mm/m64`
34063	///
34064	/// `0F 55 /r`
34065	///
34066	/// `CYRIX_EMMI`
34067	///
34068	/// `16/32-bit`
34069	Psubsiw_mm_mmm64 = 4259,
34070	/// `PMVZB mm, m64`
34071	///
34072	/// `0F 58 /r`
34073	///
34074	/// `CYRIX_EMMI`
34075	///
34076	/// `16/32-bit`
34077	Pmvzb_mm_m64 = 4260,
34078	/// `PMULHRW mm, mm/m64`
34079	///
34080	/// `0F 59 /r`
34081	///
34082	/// `CYRIX_EMMI`
34083	///
34084	/// `16/32-bit`
34085	Pmulhrw_mm_mmm64 = 4261,
34086	/// `PMVNZB mm, m64`
34087	///
34088	/// `0F 5A /r`
34089	///
34090	/// `CYRIX_EMMI`
34091	///
34092	/// `16/32-bit`
34093	Pmvnzb_mm_m64 = 4262,
34094	/// `PMVLZB mm, m64`
34095	///
34096	/// `0F 5B /r`
34097	///
34098	/// `CYRIX_EMMI`
34099	///
34100	/// `16/32-bit`
34101	Pmvlzb_mm_m64 = 4263,
34102	/// `PMVGEZB mm, m64`
34103	///
34104	/// `0F 5C /r`
34105	///
34106	/// `CYRIX_EMMI`
34107	///
34108	/// `16/32-bit`
34109	Pmvgezb_mm_m64 = 4264,
34110	/// `PMULHRIW mm, mm/m64`
34111	///
34112	/// `0F 5D /r`
34113	///
34114	/// `CYRIX_EMMI`
34115	///
34116	/// `16/32-bit`
34117	Pmulhriw_mm_mmm64 = 4265,
34118	/// `PMACHRIW mm, m64`
34119	///
34120	/// `0F 5E /r`
34121	///
34122	/// `CYRIX_EMMI`
34123	///
34124	/// `16/32-bit`
34125	Pmachriw_mm_m64 = 4266,
34126	/// `UNDOC`
34127	///
34128	/// `D9 D7`
34129	///
34130	/// `Cyrix, AMD Geode GX/LX`
34131	///
34132	/// `16/32-bit`
34133	Cyrix_D9D7 = 4267,
34134	/// `UNDOC`
34135	///
34136	/// `D9 E2`
34137	///
34138	/// `Cyrix, AMD Geode GX/LX`
34139	///
34140	/// `16/32-bit`
34141	Cyrix_D9E2 = 4268,
34142	/// `FTSTP`
34143	///
34144	/// `D9 E6`
34145	///
34146	/// `Cyrix, AMD Geode GX/LX`
34147	///
34148	/// `16/32-bit`
34149	Ftstp = 4269,
34150	/// `UNDOC`
34151	///
34152	/// `D9 E7`
34153	///
34154	/// `Cyrix, AMD Geode GX/LX`
34155	///
34156	/// `16/32-bit`
34157	Cyrix_D9E7 = 4270,
34158	/// `FRINT2`
34159	///
34160	/// `DB FC`
34161	///
34162	/// `Cyrix, AMD Geode GX/LX`
34163	///
34164	/// `16/32-bit`
34165	Frint2 = 4271,
34166	/// `FRICHOP`
34167	///
34168	/// `DD FC`
34169	///
34170	/// `Cyrix, AMD Geode GX/LX`
34171	///
34172	/// `16/32-bit`
34173	Frichop = 4272,
34174	/// `UNDOC`
34175	///
34176	/// `DE D8`
34177	///
34178	/// `Cyrix, AMD Geode GX/LX`
34179	///
34180	/// `16/32-bit`
34181	Cyrix_DED8 = 4273,
34182	/// `UNDOC`
34183	///
34184	/// `DE DA`
34185	///
34186	/// `Cyrix, AMD Geode GX/LX`
34187	///
34188	/// `16/32-bit`
34189	Cyrix_DEDA = 4274,
34190	/// `UNDOC`
34191	///
34192	/// `DE DC`
34193	///
34194	/// `Cyrix, AMD Geode GX/LX`
34195	///
34196	/// `16/32-bit`
34197	Cyrix_DEDC = 4275,
34198	/// `UNDOC`
34199	///
34200	/// `DE DD`
34201	///
34202	/// `Cyrix, AMD Geode GX/LX`
34203	///
34204	/// `16/32-bit`
34205	Cyrix_DEDD = 4276,
34206	/// `UNDOC`
34207	///
34208	/// `DE DE`
34209	///
34210	/// `Cyrix, AMD Geode GX/LX`
34211	///
34212	/// `16/32-bit`
34213	Cyrix_DEDE = 4277,
34214	/// `FRINEAR`
34215	///
34216	/// `DF FC`
34217	///
34218	/// `Cyrix, AMD Geode GX/LX`
34219	///
34220	/// `16/32-bit`
34221	Frinear = 4278,
34222	/// `TDCALL`
34223	///
34224	/// `66 0F 01 CC`
34225	///
34226	/// `TDX`
34227	///
34228	/// `16/32/64-bit`
34229	Tdcall = 4279,
34230	/// `SEAMRET`
34231	///
34232	/// `66 0F 01 CD`
34233	///
34234	/// `TDX`
34235	///
34236	/// `64-bit`
34237	Seamret = 4280,
34238	/// `SEAMOPS`
34239	///
34240	/// `66 0F 01 CE`
34241	///
34242	/// `TDX`
34243	///
34244	/// `64-bit`
34245	Seamops = 4281,
34246	/// `SEAMCALL`
34247	///
34248	/// `66 0F 01 CF`
34249	///
34250	/// `TDX`
34251	///
34252	/// `64-bit`
34253	Seamcall = 4282,
34254	/// `AESENCWIDE128KL m384, <XMM0-7>`
34255	///
34256	/// `F3 0F 38 D8 !(11):000:bbb`
34257	///
34258	/// `AESKLE and WIDE_KL`
34259	///
34260	/// `16/32/64-bit`
34261	Aesencwide128kl_m384 = 4283,
34262	/// `AESDECWIDE128KL m384, <XMM0-7>`
34263	///
34264	/// `F3 0F 38 D8 !(11):001:bbb`
34265	///
34266	/// `AESKLE and WIDE_KL`
34267	///
34268	/// `16/32/64-bit`
34269	Aesdecwide128kl_m384 = 4284,
34270	/// `AESENCWIDE256KL m512, <XMM0-7>`
34271	///
34272	/// `F3 0F 38 D8 !(11):010:bbb`
34273	///
34274	/// `AESKLE and WIDE_KL`
34275	///
34276	/// `16/32/64-bit`
34277	Aesencwide256kl_m512 = 4285,
34278	/// `AESDECWIDE256KL m512, <XMM0-7>`
34279	///
34280	/// `F3 0F 38 D8 !(11):011:bbb`
34281	///
34282	/// `AESKLE and WIDE_KL`
34283	///
34284	/// `16/32/64-bit`
34285	Aesdecwide256kl_m512 = 4286,
34286	/// `LOADIWKEY xmm1, xmm2, <EAX>, <XMM0>`
34287	///
34288	/// `F3 0F 38 DC 11:rrr:bbb`
34289	///
34290	/// `KL`
34291	///
34292	/// `16/32/64-bit`
34293	Loadiwkey_xmm_xmm = 4287,
34294	/// `AESENC128KL xmm, m384`
34295	///
34296	/// `F3 0F 38 DC !(11):rrr:bbb`
34297	///
34298	/// `AESKLE`
34299	///
34300	/// `16/32/64-bit`
34301	Aesenc128kl_xmm_m384 = 4288,
34302	/// `AESDEC128KL xmm, m384`
34303	///
34304	/// `F3 0F 38 DD !(11):rrr:bbb`
34305	///
34306	/// `AESKLE`
34307	///
34308	/// `16/32/64-bit`
34309	Aesdec128kl_xmm_m384 = 4289,
34310	/// `AESENC256KL xmm, m512`
34311	///
34312	/// `F3 0F 38 DE !(11):rrr:bbb`
34313	///
34314	/// `AESKLE`
34315	///
34316	/// `16/32/64-bit`
34317	Aesenc256kl_xmm_m512 = 4290,
34318	/// `AESDEC256KL xmm, m512`
34319	///
34320	/// `F3 0F 38 DF !(11):rrr:bbb`
34321	///
34322	/// `AESKLE`
34323	///
34324	/// `16/32/64-bit`
34325	Aesdec256kl_xmm_m512 = 4291,
34326	/// `ENCODEKEY128 r32, r32, <XMM0-2>, <XMM4-6>`
34327	///
34328	/// `F3 0F 38 FA 11:rrr:bbb`
34329	///
34330	/// `AESKLE`
34331	///
34332	/// `16/32/64-bit`
34333	Encodekey128_r32_r32 = 4292,
34334	/// `ENCODEKEY256 r32, r32, <XMM0-6>`
34335	///
34336	/// `F3 0F 38 FB 11:rrr:bbb`
34337	///
34338	/// `AESKLE`
34339	///
34340	/// `16/32/64-bit`
34341	Encodekey256_r32_r32 = 4293,
34342	/// `VBROADCASTSS xmm1, xmm2`
34343	///
34344	/// `VEX.128.66.0F38.W0 18 /r`
34345	///
34346	/// `AVX2`
34347	///
34348	/// `16/32/64-bit`
34349	VEX_Vbroadcastss_xmm_xmm = 4294,
34350	/// `VBROADCASTSS ymm1, xmm2`
34351	///
34352	/// `VEX.256.66.0F38.W0 18 /r`
34353	///
34354	/// `AVX2`
34355	///
34356	/// `16/32/64-bit`
34357	VEX_Vbroadcastss_ymm_xmm = 4295,
34358	/// `VBROADCASTSD ymm1, xmm2`
34359	///
34360	/// `VEX.256.66.0F38.W0 19 /r`
34361	///
34362	/// `AVX2`
34363	///
34364	/// `16/32/64-bit`
34365	VEX_Vbroadcastsd_ymm_xmm = 4296,
34366	/// `VMGEXIT`
34367	///
34368	/// `F2 0F 01 D9`
34369	///
34370	/// `SEV-ES`
34371	///
34372	/// `16/32/64-bit`
34373	Vmgexit_F2 = 4297,
34374	/// `UIRET`
34375	///
34376	/// `F3 0F 01 EC`
34377	///
34378	/// `UINTR`
34379	///
34380	/// `64-bit`
34381	Uiret = 4298,
34382	/// `TESTUI`
34383	///
34384	/// `F3 0F 01 ED`
34385	///
34386	/// `UINTR`
34387	///
34388	/// `64-bit`
34389	Testui = 4299,
34390	/// `CLUI`
34391	///
34392	/// `F3 0F 01 EE`
34393	///
34394	/// `UINTR`
34395	///
34396	/// `64-bit`
34397	Clui = 4300,
34398	/// `STUI`
34399	///
34400	/// `F3 0F 01 EF`
34401	///
34402	/// `UINTR`
34403	///
34404	/// `64-bit`
34405	Stui = 4301,
34406	/// `SENDUIPI r64`
34407	///
34408	/// `F3 0F C7 /6`
34409	///
34410	/// `UINTR`
34411	///
34412	/// `64-bit`
34413	Senduipi_r64 = 4302,
34414	/// `HRESET imm8, <EAX>`
34415	///
34416	/// `F3 0F 3A F0 C0 ib`
34417	///
34418	/// `HRESET`
34419	///
34420	/// `16/32/64-bit`
34421	Hreset_imm8 = 4303,
34422	/// `VPDPBUSD xmm1, xmm2, xmm3/m128`
34423	///
34424	/// `VEX.128.66.0F38.W0 50 /r`
34425	///
34426	/// `AVX-VNNI`
34427	///
34428	/// `16/32/64-bit`
34429	VEX_Vpdpbusd_xmm_xmm_xmmm128 = 4304,
34430	/// `VPDPBUSD ymm1, ymm2, ymm3/m256`
34431	///
34432	/// `VEX.256.66.0F38.W0 50 /r`
34433	///
34434	/// `AVX-VNNI`
34435	///
34436	/// `16/32/64-bit`
34437	VEX_Vpdpbusd_ymm_ymm_ymmm256 = 4305,
34438	/// `VPDPBUSDS xmm1, xmm2, xmm3/m128`
34439	///
34440	/// `VEX.128.66.0F38.W0 51 /r`
34441	///
34442	/// `AVX-VNNI`
34443	///
34444	/// `16/32/64-bit`
34445	VEX_Vpdpbusds_xmm_xmm_xmmm128 = 4306,
34446	/// `VPDPBUSDS ymm1, ymm2, ymm3/m256`
34447	///
34448	/// `VEX.256.66.0F38.W0 51 /r`
34449	///
34450	/// `AVX-VNNI`
34451	///
34452	/// `16/32/64-bit`
34453	VEX_Vpdpbusds_ymm_ymm_ymmm256 = 4307,
34454	/// `VPDPWSSD xmm1, xmm2, xmm3/m128`
34455	///
34456	/// `VEX.128.66.0F38.W0 52 /r`
34457	///
34458	/// `AVX-VNNI`
34459	///
34460	/// `16/32/64-bit`
34461	VEX_Vpdpwssd_xmm_xmm_xmmm128 = 4308,
34462	/// `VPDPWSSD ymm1, ymm2, ymm3/m256`
34463	///
34464	/// `VEX.256.66.0F38.W0 52 /r`
34465	///
34466	/// `AVX-VNNI`
34467	///
34468	/// `16/32/64-bit`
34469	VEX_Vpdpwssd_ymm_ymm_ymmm256 = 4309,
34470	/// `VPDPWSSDS xmm1, xmm2, xmm3/m128`
34471	///
34472	/// `VEX.128.66.0F38.W0 53 /r`
34473	///
34474	/// `AVX-VNNI`
34475	///
34476	/// `16/32/64-bit`
34477	VEX_Vpdpwssds_xmm_xmm_xmmm128 = 4310,
34478	/// `VPDPWSSDS ymm1, ymm2, ymm3/m256`
34479	///
34480	/// `VEX.256.66.0F38.W0 53 /r`
34481	///
34482	/// `AVX-VNNI`
34483	///
34484	/// `16/32/64-bit`
34485	VEX_Vpdpwssds_ymm_ymm_ymmm256 = 4311,
34486	/// `CCS_HASH`
34487	///
34488	/// `a16 F3 0F A6 E8`
34489	///
34490	/// `PADLOCK_GMI`
34491	///
34492	/// `16/32-bit`
34493	Ccs_hash_16 = 4312,
34494	/// `CCS_HASH`
34495	///
34496	/// `a32 F3 0F A6 E8`
34497	///
34498	/// `PADLOCK_GMI`
34499	///
34500	/// `16/32/64-bit`
34501	Ccs_hash_32 = 4313,
34502	/// `CCS_HASH`
34503	///
34504	/// `a64 F3 0F A6 E8`
34505	///
34506	/// `PADLOCK_GMI`
34507	///
34508	/// `64-bit`
34509	Ccs_hash_64 = 4314,
34510	/// `CCS_ENCRYPT`
34511	///
34512	/// `a16 F3 0F A7 F0`
34513	///
34514	/// `PADLOCK_GMI`
34515	///
34516	/// `16/32-bit`
34517	Ccs_encrypt_16 = 4315,
34518	/// `CCS_ENCRYPT`
34519	///
34520	/// `a32 F3 0F A7 F0`
34521	///
34522	/// `PADLOCK_GMI`
34523	///
34524	/// `16/32/64-bit`
34525	Ccs_encrypt_32 = 4316,
34526	/// `CCS_ENCRYPT`
34527	///
34528	/// `a64 F3 0F A7 F0`
34529	///
34530	/// `PADLOCK_GMI`
34531	///
34532	/// `64-bit`
34533	Ccs_encrypt_64 = 4317,
34534	/// `LKGS r/m16`
34535	///
34536	/// `o16 F2 0F 00 /6`
34537	///
34538	/// `LKGS`
34539	///
34540	/// `64-bit`
34541	Lkgs_rm16 = 4318,
34542	/// `LKGS r32/m16`
34543	///
34544	/// `o32 F2 0F 00 /6`
34545	///
34546	/// `LKGS`
34547	///
34548	/// `64-bit`
34549	Lkgs_r32m16 = 4319,
34550	/// `LKGS r64/m16`
34551	///
34552	/// `F2 o64 0F 00 /6`
34553	///
34554	/// `LKGS`
34555	///
34556	/// `64-bit`
34557	Lkgs_r64m16 = 4320,
34558	/// `ERETU`
34559	///
34560	/// `F3 0F 01 CA`
34561	///
34562	/// `FRED`
34563	///
34564	/// `64-bit`
34565	Eretu = 4321,
34566	/// `ERETS`
34567	///
34568	/// `F2 0F 01 CA`
34569	///
34570	/// `FRED`
34571	///
34572	/// `64-bit`
34573	Erets = 4322,
34574	/// `VADDPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
34575	///
34576	/// `EVEX.128.MAP5.W0 58 /r`
34577	///
34578	/// `AVX512VL and AVX512-FP16`
34579	///
34580	/// `16/32/64-bit`
34581	EVEX_Vaddph_xmm_k1z_xmm_xmmm128b16 = 4323,
34582	/// `VADDPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
34583	///
34584	/// `EVEX.256.MAP5.W0 58 /r`
34585	///
34586	/// `AVX512VL and AVX512-FP16`
34587	///
34588	/// `16/32/64-bit`
34589	EVEX_Vaddph_ymm_k1z_ymm_ymmm256b16 = 4324,
34590	/// `VADDPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
34591	///
34592	/// `EVEX.512.MAP5.W0 58 /r`
34593	///
34594	/// `AVX512-FP16`
34595	///
34596	/// `16/32/64-bit`
34597	EVEX_Vaddph_zmm_k1z_zmm_zmmm512b16_er = 4325,
34598	/// `VADDSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
34599	///
34600	/// `EVEX.LIG.F3.MAP5.W0 58 /r`
34601	///
34602	/// `AVX512-FP16`
34603	///
34604	/// `16/32/64-bit`
34605	EVEX_Vaddsh_xmm_k1z_xmm_xmmm16_er = 4326,
34606	/// `VCMPPH k1 {k2}, xmm2, xmm3/m128/m16bcst, imm8`
34607	///
34608	/// `EVEX.128.0F3A.W0 C2 /r ib`
34609	///
34610	/// `AVX512VL and AVX512-FP16`
34611	///
34612	/// `16/32/64-bit`
34613	EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8 = 4327,
34614	/// `VCMPPH k1 {k2}, ymm2, ymm3/m256/m16bcst, imm8`
34615	///
34616	/// `EVEX.256.0F3A.W0 C2 /r ib`
34617	///
34618	/// `AVX512VL and AVX512-FP16`
34619	///
34620	/// `16/32/64-bit`
34621	EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8 = 4328,
34622	/// `VCMPPH k1 {k2}, zmm2, zmm3/m512/m16bcst{sae}, imm8`
34623	///
34624	/// `EVEX.512.0F3A.W0 C2 /r ib`
34625	///
34626	/// `AVX512-FP16`
34627	///
34628	/// `16/32/64-bit`
34629	EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae = 4329,
34630	/// `VCMPSH k1 {k2}, xmm2, xmm3/m16{sae}, imm8`
34631	///
34632	/// `EVEX.LIG.F3.0F3A.W0 C2 /r ib`
34633	///
34634	/// `AVX512-FP16`
34635	///
34636	/// `16/32/64-bit`
34637	EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae = 4330,
34638	/// `VCOMISH xmm1, xmm2/m16{sae}`
34639	///
34640	/// `EVEX.LIG.MAP5.W0 2F /r`
34641	///
34642	/// `AVX512-FP16`
34643	///
34644	/// `16/32/64-bit`
34645	EVEX_Vcomish_xmm_xmmm16_sae = 4331,
34646	/// `VCVTDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst`
34647	///
34648	/// `EVEX.128.MAP5.W0 5B /r`
34649	///
34650	/// `AVX512VL and AVX512-FP16`
34651	///
34652	/// `16/32/64-bit`
34653	EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32 = 4332,
34654	/// `VCVTDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst`
34655	///
34656	/// `EVEX.256.MAP5.W0 5B /r`
34657	///
34658	/// `AVX512VL and AVX512-FP16`
34659	///
34660	/// `16/32/64-bit`
34661	EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32 = 4333,
34662	/// `VCVTDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}`
34663	///
34664	/// `EVEX.512.MAP5.W0 5B /r`
34665	///
34666	/// `AVX512-FP16`
34667	///
34668	/// `16/32/64-bit`
34669	EVEX_Vcvtdq2ph_ymm_k1z_zmmm512b32_er = 4334,
34670	/// `VCVTPD2PH xmm1 {k1}{z}, xmm2/m128/m64bcst`
34671	///
34672	/// `EVEX.128.66.MAP5.W1 5A /r`
34673	///
34674	/// `AVX512VL and AVX512-FP16`
34675	///
34676	/// `16/32/64-bit`
34677	EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64 = 4335,
34678	/// `VCVTPD2PH xmm1 {k1}{z}, ymm2/m256/m64bcst`
34679	///
34680	/// `EVEX.256.66.MAP5.W1 5A /r`
34681	///
34682	/// `AVX512VL and AVX512-FP16`
34683	///
34684	/// `16/32/64-bit`
34685	EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64 = 4336,
34686	/// `VCVTPD2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
34687	///
34688	/// `EVEX.512.66.MAP5.W1 5A /r`
34689	///
34690	/// `AVX512-FP16`
34691	///
34692	/// `16/32/64-bit`
34693	EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er = 4337,
34694	/// `VCVTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst`
34695	///
34696	/// `EVEX.128.66.MAP5.W0 5B /r`
34697	///
34698	/// `AVX512VL and AVX512-FP16`
34699	///
34700	/// `16/32/64-bit`
34701	EVEX_Vcvtph2dq_xmm_k1z_xmmm64b16 = 4338,
34702	/// `VCVTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst`
34703	///
34704	/// `EVEX.256.66.MAP5.W0 5B /r`
34705	///
34706	/// `AVX512VL and AVX512-FP16`
34707	///
34708	/// `16/32/64-bit`
34709	EVEX_Vcvtph2dq_ymm_k1z_xmmm128b16 = 4339,
34710	/// `VCVTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}`
34711	///
34712	/// `EVEX.512.66.MAP5.W0 5B /r`
34713	///
34714	/// `AVX512-FP16`
34715	///
34716	/// `16/32/64-bit`
34717	EVEX_Vcvtph2dq_zmm_k1z_ymmm256b16_er = 4340,
34718	/// `VCVTPH2PD xmm1 {k1}{z}, xmm2/m32/m16bcst`
34719	///
34720	/// `EVEX.128.MAP5.W0 5A /r`
34721	///
34722	/// `AVX512VL and AVX512-FP16`
34723	///
34724	/// `16/32/64-bit`
34725	EVEX_Vcvtph2pd_xmm_k1z_xmmm32b16 = 4341,
34726	/// `VCVTPH2PD ymm1 {k1}{z}, xmm2/m64/m16bcst`
34727	///
34728	/// `EVEX.256.MAP5.W0 5A /r`
34729	///
34730	/// `AVX512VL and AVX512-FP16`
34731	///
34732	/// `16/32/64-bit`
34733	EVEX_Vcvtph2pd_ymm_k1z_xmmm64b16 = 4342,
34734	/// `VCVTPH2PD zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}`
34735	///
34736	/// `EVEX.512.MAP5.W0 5A /r`
34737	///
34738	/// `AVX512-FP16`
34739	///
34740	/// `16/32/64-bit`
34741	EVEX_Vcvtph2pd_zmm_k1z_xmmm128b16_sae = 4343,
34742	/// `VCVTPH2PSX xmm1 {k1}{z}, xmm2/m64/m16bcst`
34743	///
34744	/// `EVEX.128.66.MAP6.W0 13 /r`
34745	///
34746	/// `AVX512VL and AVX512-FP16`
34747	///
34748	/// `16/32/64-bit`
34749	EVEX_Vcvtph2psx_xmm_k1z_xmmm64b16 = 4344,
34750	/// `VCVTPH2PSX ymm1 {k1}{z}, xmm2/m128/m16bcst`
34751	///
34752	/// `EVEX.256.66.MAP6.W0 13 /r`
34753	///
34754	/// `AVX512VL and AVX512-FP16`
34755	///
34756	/// `16/32/64-bit`
34757	EVEX_Vcvtph2psx_ymm_k1z_xmmm128b16 = 4345,
34758	/// `VCVTPH2PSX zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}`
34759	///
34760	/// `EVEX.512.66.MAP6.W0 13 /r`
34761	///
34762	/// `AVX512-FP16`
34763	///
34764	/// `16/32/64-bit`
34765	EVEX_Vcvtph2psx_zmm_k1z_ymmm256b16_sae = 4346,
34766	/// `VCVTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst`
34767	///
34768	/// `EVEX.128.66.MAP5.W0 7B /r`
34769	///
34770	/// `AVX512VL and AVX512-FP16`
34771	///
34772	/// `16/32/64-bit`
34773	EVEX_Vcvtph2qq_xmm_k1z_xmmm32b16 = 4347,
34774	/// `VCVTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst`
34775	///
34776	/// `EVEX.256.66.MAP5.W0 7B /r`
34777	///
34778	/// `AVX512VL and AVX512-FP16`
34779	///
34780	/// `16/32/64-bit`
34781	EVEX_Vcvtph2qq_ymm_k1z_xmmm64b16 = 4348,
34782	/// `VCVTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}`
34783	///
34784	/// `EVEX.512.66.MAP5.W0 7B /r`
34785	///
34786	/// `AVX512-FP16`
34787	///
34788	/// `16/32/64-bit`
34789	EVEX_Vcvtph2qq_zmm_k1z_xmmm128b16_er = 4349,
34790	/// `VCVTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst`
34791	///
34792	/// `EVEX.128.MAP5.W0 79 /r`
34793	///
34794	/// `AVX512VL and AVX512-FP16`
34795	///
34796	/// `16/32/64-bit`
34797	EVEX_Vcvtph2udq_xmm_k1z_xmmm64b16 = 4350,
34798	/// `VCVTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst`
34799	///
34800	/// `EVEX.256.MAP5.W0 79 /r`
34801	///
34802	/// `AVX512VL and AVX512-FP16`
34803	///
34804	/// `16/32/64-bit`
34805	EVEX_Vcvtph2udq_ymm_k1z_xmmm128b16 = 4351,
34806	/// `VCVTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{er}`
34807	///
34808	/// `EVEX.512.MAP5.W0 79 /r`
34809	///
34810	/// `AVX512-FP16`
34811	///
34812	/// `16/32/64-bit`
34813	EVEX_Vcvtph2udq_zmm_k1z_ymmm256b16_er = 4352,
34814	/// `VCVTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst`
34815	///
34816	/// `EVEX.128.66.MAP5.W0 79 /r`
34817	///
34818	/// `AVX512VL and AVX512-FP16`
34819	///
34820	/// `16/32/64-bit`
34821	EVEX_Vcvtph2uqq_xmm_k1z_xmmm32b16 = 4353,
34822	/// `VCVTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst`
34823	///
34824	/// `EVEX.256.66.MAP5.W0 79 /r`
34825	///
34826	/// `AVX512VL and AVX512-FP16`
34827	///
34828	/// `16/32/64-bit`
34829	EVEX_Vcvtph2uqq_ymm_k1z_xmmm64b16 = 4354,
34830	/// `VCVTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{er}`
34831	///
34832	/// `EVEX.512.66.MAP5.W0 79 /r`
34833	///
34834	/// `AVX512-FP16`
34835	///
34836	/// `16/32/64-bit`
34837	EVEX_Vcvtph2uqq_zmm_k1z_xmmm128b16_er = 4355,
34838	/// `VCVTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst`
34839	///
34840	/// `EVEX.128.MAP5.W0 7D /r`
34841	///
34842	/// `AVX512VL and AVX512-FP16`
34843	///
34844	/// `16/32/64-bit`
34845	EVEX_Vcvtph2uw_xmm_k1z_xmmm128b16 = 4356,
34846	/// `VCVTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst`
34847	///
34848	/// `EVEX.256.MAP5.W0 7D /r`
34849	///
34850	/// `AVX512VL and AVX512-FP16`
34851	///
34852	/// `16/32/64-bit`
34853	EVEX_Vcvtph2uw_ymm_k1z_ymmm256b16 = 4357,
34854	/// `VCVTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{er}`
34855	///
34856	/// `EVEX.512.MAP5.W0 7D /r`
34857	///
34858	/// `AVX512-FP16`
34859	///
34860	/// `16/32/64-bit`
34861	EVEX_Vcvtph2uw_zmm_k1z_zmmm512b16_er = 4358,
34862	/// `VCVTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst`
34863	///
34864	/// `EVEX.128.66.MAP5.W0 7D /r`
34865	///
34866	/// `AVX512VL and AVX512-FP16`
34867	///
34868	/// `16/32/64-bit`
34869	EVEX_Vcvtph2w_xmm_k1z_xmmm128b16 = 4359,
34870	/// `VCVTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst`
34871	///
34872	/// `EVEX.256.66.MAP5.W0 7D /r`
34873	///
34874	/// `AVX512VL and AVX512-FP16`
34875	///
34876	/// `16/32/64-bit`
34877	EVEX_Vcvtph2w_ymm_k1z_ymmm256b16 = 4360,
34878	/// `VCVTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{er}`
34879	///
34880	/// `EVEX.512.66.MAP5.W0 7D /r`
34881	///
34882	/// `AVX512-FP16`
34883	///
34884	/// `16/32/64-bit`
34885	EVEX_Vcvtph2w_zmm_k1z_zmmm512b16_er = 4361,
34886	/// `VCVTPS2PHX xmm1 {k1}{z}, xmm2/m128/m32bcst`
34887	///
34888	/// `EVEX.128.66.MAP5.W0 1D /r`
34889	///
34890	/// `AVX512VL and AVX512-FP16`
34891	///
34892	/// `16/32/64-bit`
34893	EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32 = 4362,
34894	/// `VCVTPS2PHX xmm1 {k1}{z}, ymm2/m256/m32bcst`
34895	///
34896	/// `EVEX.256.66.MAP5.W0 1D /r`
34897	///
34898	/// `AVX512VL and AVX512-FP16`
34899	///
34900	/// `16/32/64-bit`
34901	EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32 = 4363,
34902	/// `VCVTPS2PHX ymm1 {k1}{z}, zmm2/m512/m32bcst{er}`
34903	///
34904	/// `EVEX.512.66.MAP5.W0 1D /r`
34905	///
34906	/// `AVX512-FP16`
34907	///
34908	/// `16/32/64-bit`
34909	EVEX_Vcvtps2phx_ymm_k1z_zmmm512b32_er = 4364,
34910	/// `VCVTQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst`
34911	///
34912	/// `EVEX.128.MAP5.W1 5B /r`
34913	///
34914	/// `AVX512VL and AVX512-FP16`
34915	///
34916	/// `16/32/64-bit`
34917	EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64 = 4365,
34918	/// `VCVTQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst`
34919	///
34920	/// `EVEX.256.MAP5.W1 5B /r`
34921	///
34922	/// `AVX512VL and AVX512-FP16`
34923	///
34924	/// `16/32/64-bit`
34925	EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64 = 4366,
34926	/// `VCVTQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
34927	///
34928	/// `EVEX.512.MAP5.W1 5B /r`
34929	///
34930	/// `AVX512-FP16`
34931	///
34932	/// `16/32/64-bit`
34933	EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er = 4367,
34934	/// `VCVTSD2SH xmm1 {k1}{z}, xmm2, xmm3/m64{er}`
34935	///
34936	/// `EVEX.LIG.F2.MAP5.W1 5A /r`
34937	///
34938	/// `AVX512-FP16`
34939	///
34940	/// `16/32/64-bit`
34941	EVEX_Vcvtsd2sh_xmm_k1z_xmm_xmmm64_er = 4368,
34942	/// `VCVTSH2SD xmm1 {k1}{z}, xmm2, xmm3/m16{sae}`
34943	///
34944	/// `EVEX.LIG.F3.MAP5.W0 5A /r`
34945	///
34946	/// `AVX512-FP16`
34947	///
34948	/// `16/32/64-bit`
34949	EVEX_Vcvtsh2sd_xmm_k1z_xmm_xmmm16_sae = 4369,
34950	/// `VCVTSH2SI r32, xmm1/m16{er}`
34951	///
34952	/// `EVEX.LIG.F3.MAP5.W0 2D /r`
34953	///
34954	/// `AVX512-FP16`
34955	///
34956	/// `16/32/64-bit`
34957	EVEX_Vcvtsh2si_r32_xmmm16_er = 4370,
34958	/// `VCVTSH2SI r64, xmm1/m16{er}`
34959	///
34960	/// `EVEX.LIG.F3.MAP5.W1 2D /r`
34961	///
34962	/// `AVX512-FP16`
34963	///
34964	/// `64-bit`
34965	EVEX_Vcvtsh2si_r64_xmmm16_er = 4371,
34966	/// `VCVTSH2SS xmm1 {k1}{z}, xmm2, xmm3/m16{sae}`
34967	///
34968	/// `EVEX.LIG.MAP6.W0 13 /r`
34969	///
34970	/// `AVX512-FP16`
34971	///
34972	/// `16/32/64-bit`
34973	EVEX_Vcvtsh2ss_xmm_k1z_xmm_xmmm16_sae = 4372,
34974	/// `VCVTSH2USI r32, xmm1/m16{er}`
34975	///
34976	/// `EVEX.LIG.F3.MAP5.W0 79 /r`
34977	///
34978	/// `AVX512-FP16`
34979	///
34980	/// `16/32/64-bit`
34981	EVEX_Vcvtsh2usi_r32_xmmm16_er = 4373,
34982	/// `VCVTSH2USI r64, xmm1/m16{er}`
34983	///
34984	/// `EVEX.LIG.F3.MAP5.W1 79 /r`
34985	///
34986	/// `AVX512-FP16`
34987	///
34988	/// `64-bit`
34989	EVEX_Vcvtsh2usi_r64_xmmm16_er = 4374,
34990	/// `VCVTSI2SH xmm1, xmm2, r/m32{er}`
34991	///
34992	/// `EVEX.LIG.F3.MAP5.W0 2A /r`
34993	///
34994	/// `AVX512-FP16`
34995	///
34996	/// `16/32/64-bit`
34997	EVEX_Vcvtsi2sh_xmm_xmm_rm32_er = 4375,
34998	/// `VCVTSI2SH xmm1, xmm2, r/m64{er}`
34999	///
35000	/// `EVEX.LIG.F3.MAP5.W1 2A /r`
35001	///
35002	/// `AVX512-FP16`
35003	///
35004	/// `64-bit`
35005	EVEX_Vcvtsi2sh_xmm_xmm_rm64_er = 4376,
35006	/// `VCVTSS2SH xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
35007	///
35008	/// `EVEX.LIG.MAP5.W0 1D /r`
35009	///
35010	/// `AVX512-FP16`
35011	///
35012	/// `16/32/64-bit`
35013	EVEX_Vcvtss2sh_xmm_k1z_xmm_xmmm32_er = 4377,
35014	/// `VCVTTPH2DQ xmm1 {k1}{z}, xmm2/m64/m16bcst`
35015	///
35016	/// `EVEX.128.F3.MAP5.W0 5B /r`
35017	///
35018	/// `AVX512VL and AVX512-FP16`
35019	///
35020	/// `16/32/64-bit`
35021	EVEX_Vcvttph2dq_xmm_k1z_xmmm64b16 = 4378,
35022	/// `VCVTTPH2DQ ymm1 {k1}{z}, xmm2/m128/m16bcst`
35023	///
35024	/// `EVEX.256.F3.MAP5.W0 5B /r`
35025	///
35026	/// `AVX512VL and AVX512-FP16`
35027	///
35028	/// `16/32/64-bit`
35029	EVEX_Vcvttph2dq_ymm_k1z_xmmm128b16 = 4379,
35030	/// `VCVTTPH2DQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}`
35031	///
35032	/// `EVEX.512.F3.MAP5.W0 5B /r`
35033	///
35034	/// `AVX512-FP16`
35035	///
35036	/// `16/32/64-bit`
35037	EVEX_Vcvttph2dq_zmm_k1z_ymmm256b16_sae = 4380,
35038	/// `VCVTTPH2QQ xmm1 {k1}{z}, xmm2/m32/m16bcst`
35039	///
35040	/// `EVEX.128.66.MAP5.W0 7A /r`
35041	///
35042	/// `AVX512VL and AVX512-FP16`
35043	///
35044	/// `16/32/64-bit`
35045	EVEX_Vcvttph2qq_xmm_k1z_xmmm32b16 = 4381,
35046	/// `VCVTTPH2QQ ymm1 {k1}{z}, xmm2/m64/m16bcst`
35047	///
35048	/// `EVEX.256.66.MAP5.W0 7A /r`
35049	///
35050	/// `AVX512VL and AVX512-FP16`
35051	///
35052	/// `16/32/64-bit`
35053	EVEX_Vcvttph2qq_ymm_k1z_xmmm64b16 = 4382,
35054	/// `VCVTTPH2QQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}`
35055	///
35056	/// `EVEX.512.66.MAP5.W0 7A /r`
35057	///
35058	/// `AVX512-FP16`
35059	///
35060	/// `16/32/64-bit`
35061	EVEX_Vcvttph2qq_zmm_k1z_xmmm128b16_sae = 4383,
35062	/// `VCVTTPH2UDQ xmm1 {k1}{z}, xmm2/m64/m16bcst`
35063	///
35064	/// `EVEX.128.MAP5.W0 78 /r`
35065	///
35066	/// `AVX512VL and AVX512-FP16`
35067	///
35068	/// `16/32/64-bit`
35069	EVEX_Vcvttph2udq_xmm_k1z_xmmm64b16 = 4384,
35070	/// `VCVTTPH2UDQ ymm1 {k1}{z}, xmm2/m128/m16bcst`
35071	///
35072	/// `EVEX.256.MAP5.W0 78 /r`
35073	///
35074	/// `AVX512VL and AVX512-FP16`
35075	///
35076	/// `16/32/64-bit`
35077	EVEX_Vcvttph2udq_ymm_k1z_xmmm128b16 = 4385,
35078	/// `VCVTTPH2UDQ zmm1 {k1}{z}, ymm2/m256/m16bcst{sae}`
35079	///
35080	/// `EVEX.512.MAP5.W0 78 /r`
35081	///
35082	/// `AVX512-FP16`
35083	///
35084	/// `16/32/64-bit`
35085	EVEX_Vcvttph2udq_zmm_k1z_ymmm256b16_sae = 4386,
35086	/// `VCVTTPH2UQQ xmm1 {k1}{z}, xmm2/m32/m16bcst`
35087	///
35088	/// `EVEX.128.66.MAP5.W0 78 /r`
35089	///
35090	/// `AVX512VL and AVX512-FP16`
35091	///
35092	/// `16/32/64-bit`
35093	EVEX_Vcvttph2uqq_xmm_k1z_xmmm32b16 = 4387,
35094	/// `VCVTTPH2UQQ ymm1 {k1}{z}, xmm2/m64/m16bcst`
35095	///
35096	/// `EVEX.256.66.MAP5.W0 78 /r`
35097	///
35098	/// `AVX512VL and AVX512-FP16`
35099	///
35100	/// `16/32/64-bit`
35101	EVEX_Vcvttph2uqq_ymm_k1z_xmmm64b16 = 4388,
35102	/// `VCVTTPH2UQQ zmm1 {k1}{z}, xmm2/m128/m16bcst{sae}`
35103	///
35104	/// `EVEX.512.66.MAP5.W0 78 /r`
35105	///
35106	/// `AVX512-FP16`
35107	///
35108	/// `16/32/64-bit`
35109	EVEX_Vcvttph2uqq_zmm_k1z_xmmm128b16_sae = 4389,
35110	/// `VCVTTPH2UW xmm1 {k1}{z}, xmm2/m128/m16bcst`
35111	///
35112	/// `EVEX.128.MAP5.W0 7C /r`
35113	///
35114	/// `AVX512VL and AVX512-FP16`
35115	///
35116	/// `16/32/64-bit`
35117	EVEX_Vcvttph2uw_xmm_k1z_xmmm128b16 = 4390,
35118	/// `VCVTTPH2UW ymm1 {k1}{z}, ymm2/m256/m16bcst`
35119	///
35120	/// `EVEX.256.MAP5.W0 7C /r`
35121	///
35122	/// `AVX512VL and AVX512-FP16`
35123	///
35124	/// `16/32/64-bit`
35125	EVEX_Vcvttph2uw_ymm_k1z_ymmm256b16 = 4391,
35126	/// `VCVTTPH2UW zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}`
35127	///
35128	/// `EVEX.512.MAP5.W0 7C /r`
35129	///
35130	/// `AVX512-FP16`
35131	///
35132	/// `16/32/64-bit`
35133	EVEX_Vcvttph2uw_zmm_k1z_zmmm512b16_sae = 4392,
35134	/// `VCVTTPH2W xmm1 {k1}{z}, xmm2/m128/m16bcst`
35135	///
35136	/// `EVEX.128.66.MAP5.W0 7C /r`
35137	///
35138	/// `AVX512VL and AVX512-FP16`
35139	///
35140	/// `16/32/64-bit`
35141	EVEX_Vcvttph2w_xmm_k1z_xmmm128b16 = 4393,
35142	/// `VCVTTPH2W ymm1 {k1}{z}, ymm2/m256/m16bcst`
35143	///
35144	/// `EVEX.256.66.MAP5.W0 7C /r`
35145	///
35146	/// `AVX512VL and AVX512-FP16`
35147	///
35148	/// `16/32/64-bit`
35149	EVEX_Vcvttph2w_ymm_k1z_ymmm256b16 = 4394,
35150	/// `VCVTTPH2W zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}`
35151	///
35152	/// `EVEX.512.66.MAP5.W0 7C /r`
35153	///
35154	/// `AVX512-FP16`
35155	///
35156	/// `16/32/64-bit`
35157	EVEX_Vcvttph2w_zmm_k1z_zmmm512b16_sae = 4395,
35158	/// `VCVTTSH2SI r32, xmm1/m16{sae}`
35159	///
35160	/// `EVEX.LIG.F3.MAP5.W0 2C /r`
35161	///
35162	/// `AVX512-FP16`
35163	///
35164	/// `16/32/64-bit`
35165	EVEX_Vcvttsh2si_r32_xmmm16_sae = 4396,
35166	/// `VCVTTSH2SI r64, xmm1/m16{sae}`
35167	///
35168	/// `EVEX.LIG.F3.MAP5.W1 2C /r`
35169	///
35170	/// `AVX512-FP16`
35171	///
35172	/// `64-bit`
35173	EVEX_Vcvttsh2si_r64_xmmm16_sae = 4397,
35174	/// `VCVTTSH2USI r32, xmm1/m16{sae}`
35175	///
35176	/// `EVEX.LIG.F3.MAP5.W0 78 /r`
35177	///
35178	/// `AVX512-FP16`
35179	///
35180	/// `16/32/64-bit`
35181	EVEX_Vcvttsh2usi_r32_xmmm16_sae = 4398,
35182	/// `VCVTTSH2USI r64, xmm1/m16{sae}`
35183	///
35184	/// `EVEX.LIG.F3.MAP5.W1 78 /r`
35185	///
35186	/// `AVX512-FP16`
35187	///
35188	/// `64-bit`
35189	EVEX_Vcvttsh2usi_r64_xmmm16_sae = 4399,
35190	/// `VCVTUDQ2PH xmm1 {k1}{z}, xmm2/m128/m32bcst`
35191	///
35192	/// `EVEX.128.F2.MAP5.W0 7A /r`
35193	///
35194	/// `AVX512VL and AVX512-FP16`
35195	///
35196	/// `16/32/64-bit`
35197	EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32 = 4400,
35198	/// `VCVTUDQ2PH xmm1 {k1}{z}, ymm2/m256/m32bcst`
35199	///
35200	/// `EVEX.256.F2.MAP5.W0 7A /r`
35201	///
35202	/// `AVX512VL and AVX512-FP16`
35203	///
35204	/// `16/32/64-bit`
35205	EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32 = 4401,
35206	/// `VCVTUDQ2PH ymm1 {k1}{z}, zmm2/m512/m32bcst{er}`
35207	///
35208	/// `EVEX.512.F2.MAP5.W0 7A /r`
35209	///
35210	/// `AVX512-FP16`
35211	///
35212	/// `16/32/64-bit`
35213	EVEX_Vcvtudq2ph_ymm_k1z_zmmm512b32_er = 4402,
35214	/// `VCVTUQQ2PH xmm1 {k1}{z}, xmm2/m128/m64bcst`
35215	///
35216	/// `EVEX.128.F2.MAP5.W1 7A /r`
35217	///
35218	/// `AVX512VL and AVX512-FP16`
35219	///
35220	/// `16/32/64-bit`
35221	EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64 = 4403,
35222	/// `VCVTUQQ2PH xmm1 {k1}{z}, ymm2/m256/m64bcst`
35223	///
35224	/// `EVEX.256.F2.MAP5.W1 7A /r`
35225	///
35226	/// `AVX512VL and AVX512-FP16`
35227	///
35228	/// `16/32/64-bit`
35229	EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64 = 4404,
35230	/// `VCVTUQQ2PH xmm1 {k1}{z}, zmm2/m512/m64bcst{er}`
35231	///
35232	/// `EVEX.512.F2.MAP5.W1 7A /r`
35233	///
35234	/// `AVX512-FP16`
35235	///
35236	/// `16/32/64-bit`
35237	EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er = 4405,
35238	/// `VCVTUSI2SH xmm1, xmm2, r/m32{er}`
35239	///
35240	/// `EVEX.LIG.F3.MAP5.W0 7B /r`
35241	///
35242	/// `AVX512-FP16`
35243	///
35244	/// `16/32/64-bit`
35245	EVEX_Vcvtusi2sh_xmm_xmm_rm32_er = 4406,
35246	/// `VCVTUSI2SH xmm1, xmm2, r/m64{er}`
35247	///
35248	/// `EVEX.LIG.F3.MAP5.W1 7B /r`
35249	///
35250	/// `AVX512-FP16`
35251	///
35252	/// `64-bit`
35253	EVEX_Vcvtusi2sh_xmm_xmm_rm64_er = 4407,
35254	/// `VCVTUW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst`
35255	///
35256	/// `EVEX.128.F2.MAP5.W0 7D /r`
35257	///
35258	/// `AVX512VL and AVX512-FP16`
35259	///
35260	/// `16/32/64-bit`
35261	EVEX_Vcvtuw2ph_xmm_k1z_xmmm128b16 = 4408,
35262	/// `VCVTUW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst`
35263	///
35264	/// `EVEX.256.F2.MAP5.W0 7D /r`
35265	///
35266	/// `AVX512VL and AVX512-FP16`
35267	///
35268	/// `16/32/64-bit`
35269	EVEX_Vcvtuw2ph_ymm_k1z_ymmm256b16 = 4409,
35270	/// `VCVTUW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}`
35271	///
35272	/// `EVEX.512.F2.MAP5.W0 7D /r`
35273	///
35274	/// `AVX512-FP16`
35275	///
35276	/// `16/32/64-bit`
35277	EVEX_Vcvtuw2ph_zmm_k1z_zmmm512b16_er = 4410,
35278	/// `VCVTW2PH xmm1 {k1}{z}, xmm2/m128/m16bcst`
35279	///
35280	/// `EVEX.128.F3.MAP5.W0 7D /r`
35281	///
35282	/// `AVX512VL and AVX512-FP16`
35283	///
35284	/// `16/32/64-bit`
35285	EVEX_Vcvtw2ph_xmm_k1z_xmmm128b16 = 4411,
35286	/// `VCVTW2PH ymm1 {k1}{z}, ymm2/m256/m16bcst`
35287	///
35288	/// `EVEX.256.F3.MAP5.W0 7D /r`
35289	///
35290	/// `AVX512VL and AVX512-FP16`
35291	///
35292	/// `16/32/64-bit`
35293	EVEX_Vcvtw2ph_ymm_k1z_ymmm256b16 = 4412,
35294	/// `VCVTW2PH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}`
35295	///
35296	/// `EVEX.512.F3.MAP5.W0 7D /r`
35297	///
35298	/// `AVX512-FP16`
35299	///
35300	/// `16/32/64-bit`
35301	EVEX_Vcvtw2ph_zmm_k1z_zmmm512b16_er = 4413,
35302	/// `VDIVPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35303	///
35304	/// `EVEX.128.MAP5.W0 5E /r`
35305	///
35306	/// `AVX512VL and AVX512-FP16`
35307	///
35308	/// `16/32/64-bit`
35309	EVEX_Vdivph_xmm_k1z_xmm_xmmm128b16 = 4414,
35310	/// `VDIVPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35311	///
35312	/// `EVEX.256.MAP5.W0 5E /r`
35313	///
35314	/// `AVX512VL and AVX512-FP16`
35315	///
35316	/// `16/32/64-bit`
35317	EVEX_Vdivph_ymm_k1z_ymm_ymmm256b16 = 4415,
35318	/// `VDIVPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35319	///
35320	/// `EVEX.512.MAP5.W0 5E /r`
35321	///
35322	/// `AVX512-FP16`
35323	///
35324	/// `16/32/64-bit`
35325	EVEX_Vdivph_zmm_k1z_zmm_zmmm512b16_er = 4416,
35326	/// `VDIVSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35327	///
35328	/// `EVEX.LIG.F3.MAP5.W0 5E /r`
35329	///
35330	/// `AVX512-FP16`
35331	///
35332	/// `16/32/64-bit`
35333	EVEX_Vdivsh_xmm_k1z_xmm_xmmm16_er = 4417,
35334	/// `VFCMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
35335	///
35336	/// `EVEX.128.F2.MAP6.W0 56 /r`
35337	///
35338	/// `AVX512VL and AVX512-FP16`
35339	///
35340	/// `16/32/64-bit`
35341	EVEX_Vfcmaddcph_xmm_k1z_xmm_xmmm128b32 = 4418,
35342	/// `VFCMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
35343	///
35344	/// `EVEX.256.F2.MAP6.W0 56 /r`
35345	///
35346	/// `AVX512VL and AVX512-FP16`
35347	///
35348	/// `16/32/64-bit`
35349	EVEX_Vfcmaddcph_ymm_k1z_ymm_ymmm256b32 = 4419,
35350	/// `VFCMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
35351	///
35352	/// `EVEX.512.F2.MAP6.W0 56 /r`
35353	///
35354	/// `AVX512-FP16`
35355	///
35356	/// `16/32/64-bit`
35357	EVEX_Vfcmaddcph_zmm_k1z_zmm_zmmm512b32_er = 4420,
35358	/// `VFMADDCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
35359	///
35360	/// `EVEX.128.F3.MAP6.W0 56 /r`
35361	///
35362	/// `AVX512VL and AVX512-FP16`
35363	///
35364	/// `16/32/64-bit`
35365	EVEX_Vfmaddcph_xmm_k1z_xmm_xmmm128b32 = 4421,
35366	/// `VFMADDCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
35367	///
35368	/// `EVEX.256.F3.MAP6.W0 56 /r`
35369	///
35370	/// `AVX512VL and AVX512-FP16`
35371	///
35372	/// `16/32/64-bit`
35373	EVEX_Vfmaddcph_ymm_k1z_ymm_ymmm256b32 = 4422,
35374	/// `VFMADDCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
35375	///
35376	/// `EVEX.512.F3.MAP6.W0 56 /r`
35377	///
35378	/// `AVX512-FP16`
35379	///
35380	/// `16/32/64-bit`
35381	EVEX_Vfmaddcph_zmm_k1z_zmm_zmmm512b32_er = 4423,
35382	/// `VFCMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
35383	///
35384	/// `EVEX.LIG.F2.MAP6.W0 57 /r`
35385	///
35386	/// `AVX512-FP16`
35387	///
35388	/// `16/32/64-bit`
35389	EVEX_Vfcmaddcsh_xmm_k1z_xmm_xmmm32_er = 4424,
35390	/// `VFMADDCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
35391	///
35392	/// `EVEX.LIG.F3.MAP6.W0 57 /r`
35393	///
35394	/// `AVX512-FP16`
35395	///
35396	/// `16/32/64-bit`
35397	EVEX_Vfmaddcsh_xmm_k1z_xmm_xmmm32_er = 4425,
35398	/// `VFCMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
35399	///
35400	/// `EVEX.128.F2.MAP6.W0 D6 /r`
35401	///
35402	/// `AVX512VL and AVX512-FP16`
35403	///
35404	/// `16/32/64-bit`
35405	EVEX_Vfcmulcph_xmm_k1z_xmm_xmmm128b32 = 4426,
35406	/// `VFCMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
35407	///
35408	/// `EVEX.256.F2.MAP6.W0 D6 /r`
35409	///
35410	/// `AVX512VL and AVX512-FP16`
35411	///
35412	/// `16/32/64-bit`
35413	EVEX_Vfcmulcph_ymm_k1z_ymm_ymmm256b32 = 4427,
35414	/// `VFCMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
35415	///
35416	/// `EVEX.512.F2.MAP6.W0 D6 /r`
35417	///
35418	/// `AVX512-FP16`
35419	///
35420	/// `16/32/64-bit`
35421	EVEX_Vfcmulcph_zmm_k1z_zmm_zmmm512b32_er = 4428,
35422	/// `VFMULCPH xmm1 {k1}{z}, xmm2, xmm3/m128/m32bcst`
35423	///
35424	/// `EVEX.128.F3.MAP6.W0 D6 /r`
35425	///
35426	/// `AVX512VL and AVX512-FP16`
35427	///
35428	/// `16/32/64-bit`
35429	EVEX_Vfmulcph_xmm_k1z_xmm_xmmm128b32 = 4429,
35430	/// `VFMULCPH ymm1 {k1}{z}, ymm2, ymm3/m256/m32bcst`
35431	///
35432	/// `EVEX.256.F3.MAP6.W0 D6 /r`
35433	///
35434	/// `AVX512VL and AVX512-FP16`
35435	///
35436	/// `16/32/64-bit`
35437	EVEX_Vfmulcph_ymm_k1z_ymm_ymmm256b32 = 4430,
35438	/// `VFMULCPH zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst{er}`
35439	///
35440	/// `EVEX.512.F3.MAP6.W0 D6 /r`
35441	///
35442	/// `AVX512-FP16`
35443	///
35444	/// `16/32/64-bit`
35445	EVEX_Vfmulcph_zmm_k1z_zmm_zmmm512b32_er = 4431,
35446	/// `VFCMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
35447	///
35448	/// `EVEX.LIG.F2.MAP6.W0 D7 /r`
35449	///
35450	/// `AVX512-FP16`
35451	///
35452	/// `16/32/64-bit`
35453	EVEX_Vfcmulcsh_xmm_k1z_xmm_xmmm32_er = 4432,
35454	/// `VFMULCSH xmm1 {k1}{z}, xmm2, xmm3/m32{er}`
35455	///
35456	/// `EVEX.LIG.F3.MAP6.W0 D7 /r`
35457	///
35458	/// `AVX512-FP16`
35459	///
35460	/// `16/32/64-bit`
35461	EVEX_Vfmulcsh_xmm_k1z_xmm_xmmm32_er = 4433,
35462	/// `VFMADDSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35463	///
35464	/// `EVEX.128.66.MAP6.W0 96 /r`
35465	///
35466	/// `AVX512VL and AVX512-FP16`
35467	///
35468	/// `16/32/64-bit`
35469	EVEX_Vfmaddsub132ph_xmm_k1z_xmm_xmmm128b16 = 4434,
35470	/// `VFMADDSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35471	///
35472	/// `EVEX.256.66.MAP6.W0 96 /r`
35473	///
35474	/// `AVX512VL and AVX512-FP16`
35475	///
35476	/// `16/32/64-bit`
35477	EVEX_Vfmaddsub132ph_ymm_k1z_ymm_ymmm256b16 = 4435,
35478	/// `VFMADDSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35479	///
35480	/// `EVEX.512.66.MAP6.W0 96 /r`
35481	///
35482	/// `AVX512-FP16`
35483	///
35484	/// `16/32/64-bit`
35485	EVEX_Vfmaddsub132ph_zmm_k1z_zmm_zmmm512b16_er = 4436,
35486	/// `VFMADDSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35487	///
35488	/// `EVEX.128.66.MAP6.W0 A6 /r`
35489	///
35490	/// `AVX512VL and AVX512-FP16`
35491	///
35492	/// `16/32/64-bit`
35493	EVEX_Vfmaddsub213ph_xmm_k1z_xmm_xmmm128b16 = 4437,
35494	/// `VFMADDSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35495	///
35496	/// `EVEX.256.66.MAP6.W0 A6 /r`
35497	///
35498	/// `AVX512VL and AVX512-FP16`
35499	///
35500	/// `16/32/64-bit`
35501	EVEX_Vfmaddsub213ph_ymm_k1z_ymm_ymmm256b16 = 4438,
35502	/// `VFMADDSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35503	///
35504	/// `EVEX.512.66.MAP6.W0 A6 /r`
35505	///
35506	/// `AVX512-FP16`
35507	///
35508	/// `16/32/64-bit`
35509	EVEX_Vfmaddsub213ph_zmm_k1z_zmm_zmmm512b16_er = 4439,
35510	/// `VFMADDSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35511	///
35512	/// `EVEX.128.66.MAP6.W0 B6 /r`
35513	///
35514	/// `AVX512VL and AVX512-FP16`
35515	///
35516	/// `16/32/64-bit`
35517	EVEX_Vfmaddsub231ph_xmm_k1z_xmm_xmmm128b16 = 4440,
35518	/// `VFMADDSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35519	///
35520	/// `EVEX.256.66.MAP6.W0 B6 /r`
35521	///
35522	/// `AVX512VL and AVX512-FP16`
35523	///
35524	/// `16/32/64-bit`
35525	EVEX_Vfmaddsub231ph_ymm_k1z_ymm_ymmm256b16 = 4441,
35526	/// `VFMADDSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35527	///
35528	/// `EVEX.512.66.MAP6.W0 B6 /r`
35529	///
35530	/// `AVX512-FP16`
35531	///
35532	/// `16/32/64-bit`
35533	EVEX_Vfmaddsub231ph_zmm_k1z_zmm_zmmm512b16_er = 4442,
35534	/// `VFMSUBADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35535	///
35536	/// `EVEX.128.66.MAP6.W0 97 /r`
35537	///
35538	/// `AVX512VL and AVX512-FP16`
35539	///
35540	/// `16/32/64-bit`
35541	EVEX_Vfmsubadd132ph_xmm_k1z_xmm_xmmm128b16 = 4443,
35542	/// `VFMSUBADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35543	///
35544	/// `EVEX.256.66.MAP6.W0 97 /r`
35545	///
35546	/// `AVX512VL and AVX512-FP16`
35547	///
35548	/// `16/32/64-bit`
35549	EVEX_Vfmsubadd132ph_ymm_k1z_ymm_ymmm256b16 = 4444,
35550	/// `VFMSUBADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35551	///
35552	/// `EVEX.512.66.MAP6.W0 97 /r`
35553	///
35554	/// `AVX512-FP16`
35555	///
35556	/// `16/32/64-bit`
35557	EVEX_Vfmsubadd132ph_zmm_k1z_zmm_zmmm512b16_er = 4445,
35558	/// `VFMSUBADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35559	///
35560	/// `EVEX.128.66.MAP6.W0 A7 /r`
35561	///
35562	/// `AVX512VL and AVX512-FP16`
35563	///
35564	/// `16/32/64-bit`
35565	EVEX_Vfmsubadd213ph_xmm_k1z_xmm_xmmm128b16 = 4446,
35566	/// `VFMSUBADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35567	///
35568	/// `EVEX.256.66.MAP6.W0 A7 /r`
35569	///
35570	/// `AVX512VL and AVX512-FP16`
35571	///
35572	/// `16/32/64-bit`
35573	EVEX_Vfmsubadd213ph_ymm_k1z_ymm_ymmm256b16 = 4447,
35574	/// `VFMSUBADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35575	///
35576	/// `EVEX.512.66.MAP6.W0 A7 /r`
35577	///
35578	/// `AVX512-FP16`
35579	///
35580	/// `16/32/64-bit`
35581	EVEX_Vfmsubadd213ph_zmm_k1z_zmm_zmmm512b16_er = 4448,
35582	/// `VFMSUBADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35583	///
35584	/// `EVEX.128.66.MAP6.W0 B7 /r`
35585	///
35586	/// `AVX512VL and AVX512-FP16`
35587	///
35588	/// `16/32/64-bit`
35589	EVEX_Vfmsubadd231ph_xmm_k1z_xmm_xmmm128b16 = 4449,
35590	/// `VFMSUBADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35591	///
35592	/// `EVEX.256.66.MAP6.W0 B7 /r`
35593	///
35594	/// `AVX512VL and AVX512-FP16`
35595	///
35596	/// `16/32/64-bit`
35597	EVEX_Vfmsubadd231ph_ymm_k1z_ymm_ymmm256b16 = 4450,
35598	/// `VFMSUBADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35599	///
35600	/// `EVEX.512.66.MAP6.W0 B7 /r`
35601	///
35602	/// `AVX512-FP16`
35603	///
35604	/// `16/32/64-bit`
35605	EVEX_Vfmsubadd231ph_zmm_k1z_zmm_zmmm512b16_er = 4451,
35606	/// `VFMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35607	///
35608	/// `EVEX.128.66.MAP6.W0 98 /r`
35609	///
35610	/// `AVX512VL and AVX512-FP16`
35611	///
35612	/// `16/32/64-bit`
35613	EVEX_Vfmadd132ph_xmm_k1z_xmm_xmmm128b16 = 4452,
35614	/// `VFMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35615	///
35616	/// `EVEX.256.66.MAP6.W0 98 /r`
35617	///
35618	/// `AVX512VL and AVX512-FP16`
35619	///
35620	/// `16/32/64-bit`
35621	EVEX_Vfmadd132ph_ymm_k1z_ymm_ymmm256b16 = 4453,
35622	/// `VFMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35623	///
35624	/// `EVEX.512.66.MAP6.W0 98 /r`
35625	///
35626	/// `AVX512-FP16`
35627	///
35628	/// `16/32/64-bit`
35629	EVEX_Vfmadd132ph_zmm_k1z_zmm_zmmm512b16_er = 4454,
35630	/// `VFMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35631	///
35632	/// `EVEX.128.66.MAP6.W0 A8 /r`
35633	///
35634	/// `AVX512VL and AVX512-FP16`
35635	///
35636	/// `16/32/64-bit`
35637	EVEX_Vfmadd213ph_xmm_k1z_xmm_xmmm128b16 = 4455,
35638	/// `VFMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35639	///
35640	/// `EVEX.256.66.MAP6.W0 A8 /r`
35641	///
35642	/// `AVX512VL and AVX512-FP16`
35643	///
35644	/// `16/32/64-bit`
35645	EVEX_Vfmadd213ph_ymm_k1z_ymm_ymmm256b16 = 4456,
35646	/// `VFMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35647	///
35648	/// `EVEX.512.66.MAP6.W0 A8 /r`
35649	///
35650	/// `AVX512-FP16`
35651	///
35652	/// `16/32/64-bit`
35653	EVEX_Vfmadd213ph_zmm_k1z_zmm_zmmm512b16_er = 4457,
35654	/// `VFMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35655	///
35656	/// `EVEX.128.66.MAP6.W0 B8 /r`
35657	///
35658	/// `AVX512VL and AVX512-FP16`
35659	///
35660	/// `16/32/64-bit`
35661	EVEX_Vfmadd231ph_xmm_k1z_xmm_xmmm128b16 = 4458,
35662	/// `VFMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35663	///
35664	/// `EVEX.256.66.MAP6.W0 B8 /r`
35665	///
35666	/// `AVX512VL and AVX512-FP16`
35667	///
35668	/// `16/32/64-bit`
35669	EVEX_Vfmadd231ph_ymm_k1z_ymm_ymmm256b16 = 4459,
35670	/// `VFMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35671	///
35672	/// `EVEX.512.66.MAP6.W0 B8 /r`
35673	///
35674	/// `AVX512-FP16`
35675	///
35676	/// `16/32/64-bit`
35677	EVEX_Vfmadd231ph_zmm_k1z_zmm_zmmm512b16_er = 4460,
35678	/// `VFNMADD132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35679	///
35680	/// `EVEX.128.66.MAP6.W0 9C /r`
35681	///
35682	/// `AVX512VL and AVX512-FP16`
35683	///
35684	/// `16/32/64-bit`
35685	EVEX_Vfnmadd132ph_xmm_k1z_xmm_xmmm128b16 = 4461,
35686	/// `VFNMADD132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35687	///
35688	/// `EVEX.256.66.MAP6.W0 9C /r`
35689	///
35690	/// `AVX512VL and AVX512-FP16`
35691	///
35692	/// `16/32/64-bit`
35693	EVEX_Vfnmadd132ph_ymm_k1z_ymm_ymmm256b16 = 4462,
35694	/// `VFNMADD132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35695	///
35696	/// `EVEX.512.66.MAP6.W0 9C /r`
35697	///
35698	/// `AVX512-FP16`
35699	///
35700	/// `16/32/64-bit`
35701	EVEX_Vfnmadd132ph_zmm_k1z_zmm_zmmm512b16_er = 4463,
35702	/// `VFNMADD213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35703	///
35704	/// `EVEX.128.66.MAP6.W0 AC /r`
35705	///
35706	/// `AVX512VL and AVX512-FP16`
35707	///
35708	/// `16/32/64-bit`
35709	EVEX_Vfnmadd213ph_xmm_k1z_xmm_xmmm128b16 = 4464,
35710	/// `VFNMADD213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35711	///
35712	/// `EVEX.256.66.MAP6.W0 AC /r`
35713	///
35714	/// `AVX512VL and AVX512-FP16`
35715	///
35716	/// `16/32/64-bit`
35717	EVEX_Vfnmadd213ph_ymm_k1z_ymm_ymmm256b16 = 4465,
35718	/// `VFNMADD213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35719	///
35720	/// `EVEX.512.66.MAP6.W0 AC /r`
35721	///
35722	/// `AVX512-FP16`
35723	///
35724	/// `16/32/64-bit`
35725	EVEX_Vfnmadd213ph_zmm_k1z_zmm_zmmm512b16_er = 4466,
35726	/// `VFNMADD231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35727	///
35728	/// `EVEX.128.66.MAP6.W0 BC /r`
35729	///
35730	/// `AVX512VL and AVX512-FP16`
35731	///
35732	/// `16/32/64-bit`
35733	EVEX_Vfnmadd231ph_xmm_k1z_xmm_xmmm128b16 = 4467,
35734	/// `VFNMADD231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35735	///
35736	/// `EVEX.256.66.MAP6.W0 BC /r`
35737	///
35738	/// `AVX512VL and AVX512-FP16`
35739	///
35740	/// `16/32/64-bit`
35741	EVEX_Vfnmadd231ph_ymm_k1z_ymm_ymmm256b16 = 4468,
35742	/// `VFNMADD231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35743	///
35744	/// `EVEX.512.66.MAP6.W0 BC /r`
35745	///
35746	/// `AVX512-FP16`
35747	///
35748	/// `16/32/64-bit`
35749	EVEX_Vfnmadd231ph_zmm_k1z_zmm_zmmm512b16_er = 4469,
35750	/// `VFMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35751	///
35752	/// `EVEX.LIG.66.MAP6.W0 99 /r`
35753	///
35754	/// `AVX512-FP16`
35755	///
35756	/// `16/32/64-bit`
35757	EVEX_Vfmadd132sh_xmm_k1z_xmm_xmmm16_er = 4470,
35758	/// `VFMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35759	///
35760	/// `EVEX.LIG.66.MAP6.W0 A9 /r`
35761	///
35762	/// `AVX512-FP16`
35763	///
35764	/// `16/32/64-bit`
35765	EVEX_Vfmadd213sh_xmm_k1z_xmm_xmmm16_er = 4471,
35766	/// `VFMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35767	///
35768	/// `EVEX.LIG.66.MAP6.W0 B9 /r`
35769	///
35770	/// `AVX512-FP16`
35771	///
35772	/// `16/32/64-bit`
35773	EVEX_Vfmadd231sh_xmm_k1z_xmm_xmmm16_er = 4472,
35774	/// `VFNMADD132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35775	///
35776	/// `EVEX.LIG.66.MAP6.W0 9D /r`
35777	///
35778	/// `AVX512-FP16`
35779	///
35780	/// `16/32/64-bit`
35781	EVEX_Vfnmadd132sh_xmm_k1z_xmm_xmmm16_er = 4473,
35782	/// `VFNMADD213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35783	///
35784	/// `EVEX.LIG.66.MAP6.W0 AD /r`
35785	///
35786	/// `AVX512-FP16`
35787	///
35788	/// `16/32/64-bit`
35789	EVEX_Vfnmadd213sh_xmm_k1z_xmm_xmmm16_er = 4474,
35790	/// `VFNMADD231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35791	///
35792	/// `EVEX.LIG.66.MAP6.W0 BD /r`
35793	///
35794	/// `AVX512-FP16`
35795	///
35796	/// `16/32/64-bit`
35797	EVEX_Vfnmadd231sh_xmm_k1z_xmm_xmmm16_er = 4475,
35798	/// `VFMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35799	///
35800	/// `EVEX.128.66.MAP6.W0 9A /r`
35801	///
35802	/// `AVX512VL and AVX512-FP16`
35803	///
35804	/// `16/32/64-bit`
35805	EVEX_Vfmsub132ph_xmm_k1z_xmm_xmmm128b16 = 4476,
35806	/// `VFMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35807	///
35808	/// `EVEX.256.66.MAP6.W0 9A /r`
35809	///
35810	/// `AVX512VL and AVX512-FP16`
35811	///
35812	/// `16/32/64-bit`
35813	EVEX_Vfmsub132ph_ymm_k1z_ymm_ymmm256b16 = 4477,
35814	/// `VFMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35815	///
35816	/// `EVEX.512.66.MAP6.W0 9A /r`
35817	///
35818	/// `AVX512-FP16`
35819	///
35820	/// `16/32/64-bit`
35821	EVEX_Vfmsub132ph_zmm_k1z_zmm_zmmm512b16_er = 4478,
35822	/// `VFMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35823	///
35824	/// `EVEX.128.66.MAP6.W0 AA /r`
35825	///
35826	/// `AVX512VL and AVX512-FP16`
35827	///
35828	/// `16/32/64-bit`
35829	EVEX_Vfmsub213ph_xmm_k1z_xmm_xmmm128b16 = 4479,
35830	/// `VFMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35831	///
35832	/// `EVEX.256.66.MAP6.W0 AA /r`
35833	///
35834	/// `AVX512VL and AVX512-FP16`
35835	///
35836	/// `16/32/64-bit`
35837	EVEX_Vfmsub213ph_ymm_k1z_ymm_ymmm256b16 = 4480,
35838	/// `VFMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35839	///
35840	/// `EVEX.512.66.MAP6.W0 AA /r`
35841	///
35842	/// `AVX512-FP16`
35843	///
35844	/// `16/32/64-bit`
35845	EVEX_Vfmsub213ph_zmm_k1z_zmm_zmmm512b16_er = 4481,
35846	/// `VFMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35847	///
35848	/// `EVEX.128.66.MAP6.W0 BA /r`
35849	///
35850	/// `AVX512VL and AVX512-FP16`
35851	///
35852	/// `16/32/64-bit`
35853	EVEX_Vfmsub231ph_xmm_k1z_xmm_xmmm128b16 = 4482,
35854	/// `VFMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35855	///
35856	/// `EVEX.256.66.MAP6.W0 BA /r`
35857	///
35858	/// `AVX512VL and AVX512-FP16`
35859	///
35860	/// `16/32/64-bit`
35861	EVEX_Vfmsub231ph_ymm_k1z_ymm_ymmm256b16 = 4483,
35862	/// `VFMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35863	///
35864	/// `EVEX.512.66.MAP6.W0 BA /r`
35865	///
35866	/// `AVX512-FP16`
35867	///
35868	/// `16/32/64-bit`
35869	EVEX_Vfmsub231ph_zmm_k1z_zmm_zmmm512b16_er = 4484,
35870	/// `VFNMSUB132PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35871	///
35872	/// `EVEX.128.66.MAP6.W0 9E /r`
35873	///
35874	/// `AVX512VL and AVX512-FP16`
35875	///
35876	/// `16/32/64-bit`
35877	EVEX_Vfnmsub132ph_xmm_k1z_xmm_xmmm128b16 = 4485,
35878	/// `VFNMSUB132PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35879	///
35880	/// `EVEX.256.66.MAP6.W0 9E /r`
35881	///
35882	/// `AVX512VL and AVX512-FP16`
35883	///
35884	/// `16/32/64-bit`
35885	EVEX_Vfnmsub132ph_ymm_k1z_ymm_ymmm256b16 = 4486,
35886	/// `VFNMSUB132PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35887	///
35888	/// `EVEX.512.66.MAP6.W0 9E /r`
35889	///
35890	/// `AVX512-FP16`
35891	///
35892	/// `16/32/64-bit`
35893	EVEX_Vfnmsub132ph_zmm_k1z_zmm_zmmm512b16_er = 4487,
35894	/// `VFNMSUB213PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35895	///
35896	/// `EVEX.128.66.MAP6.W0 AE /r`
35897	///
35898	/// `AVX512VL and AVX512-FP16`
35899	///
35900	/// `16/32/64-bit`
35901	EVEX_Vfnmsub213ph_xmm_k1z_xmm_xmmm128b16 = 4488,
35902	/// `VFNMSUB213PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35903	///
35904	/// `EVEX.256.66.MAP6.W0 AE /r`
35905	///
35906	/// `AVX512VL and AVX512-FP16`
35907	///
35908	/// `16/32/64-bit`
35909	EVEX_Vfnmsub213ph_ymm_k1z_ymm_ymmm256b16 = 4489,
35910	/// `VFNMSUB213PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35911	///
35912	/// `EVEX.512.66.MAP6.W0 AE /r`
35913	///
35914	/// `AVX512-FP16`
35915	///
35916	/// `16/32/64-bit`
35917	EVEX_Vfnmsub213ph_zmm_k1z_zmm_zmmm512b16_er = 4490,
35918	/// `VFNMSUB231PH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
35919	///
35920	/// `EVEX.128.66.MAP6.W0 BE /r`
35921	///
35922	/// `AVX512VL and AVX512-FP16`
35923	///
35924	/// `16/32/64-bit`
35925	EVEX_Vfnmsub231ph_xmm_k1z_xmm_xmmm128b16 = 4491,
35926	/// `VFNMSUB231PH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
35927	///
35928	/// `EVEX.256.66.MAP6.W0 BE /r`
35929	///
35930	/// `AVX512VL and AVX512-FP16`
35931	///
35932	/// `16/32/64-bit`
35933	EVEX_Vfnmsub231ph_ymm_k1z_ymm_ymmm256b16 = 4492,
35934	/// `VFNMSUB231PH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
35935	///
35936	/// `EVEX.512.66.MAP6.W0 BE /r`
35937	///
35938	/// `AVX512-FP16`
35939	///
35940	/// `16/32/64-bit`
35941	EVEX_Vfnmsub231ph_zmm_k1z_zmm_zmmm512b16_er = 4493,
35942	/// `VFMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35943	///
35944	/// `EVEX.LIG.66.MAP6.W0 9B /r`
35945	///
35946	/// `AVX512-FP16`
35947	///
35948	/// `16/32/64-bit`
35949	EVEX_Vfmsub132sh_xmm_k1z_xmm_xmmm16_er = 4494,
35950	/// `VFMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35951	///
35952	/// `EVEX.LIG.66.MAP6.W0 AB /r`
35953	///
35954	/// `AVX512-FP16`
35955	///
35956	/// `16/32/64-bit`
35957	EVEX_Vfmsub213sh_xmm_k1z_xmm_xmmm16_er = 4495,
35958	/// `VFMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35959	///
35960	/// `EVEX.LIG.66.MAP6.W0 BB /r`
35961	///
35962	/// `AVX512-FP16`
35963	///
35964	/// `16/32/64-bit`
35965	EVEX_Vfmsub231sh_xmm_k1z_xmm_xmmm16_er = 4496,
35966	/// `VFNMSUB132SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35967	///
35968	/// `EVEX.LIG.66.MAP6.W0 9F /r`
35969	///
35970	/// `AVX512-FP16`
35971	///
35972	/// `16/32/64-bit`
35973	EVEX_Vfnmsub132sh_xmm_k1z_xmm_xmmm16_er = 4497,
35974	/// `VFNMSUB213SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35975	///
35976	/// `EVEX.LIG.66.MAP6.W0 AF /r`
35977	///
35978	/// `AVX512-FP16`
35979	///
35980	/// `16/32/64-bit`
35981	EVEX_Vfnmsub213sh_xmm_k1z_xmm_xmmm16_er = 4498,
35982	/// `VFNMSUB231SH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
35983	///
35984	/// `EVEX.LIG.66.MAP6.W0 BF /r`
35985	///
35986	/// `AVX512-FP16`
35987	///
35988	/// `16/32/64-bit`
35989	EVEX_Vfnmsub231sh_xmm_k1z_xmm_xmmm16_er = 4499,
35990	/// `VFPCLASSPH k1 {k2}, xmm2/m128/m16bcst, imm8`
35991	///
35992	/// `EVEX.128.0F3A.W0 66 /r ib`
35993	///
35994	/// `AVX512VL and AVX512-FP16`
35995	///
35996	/// `16/32/64-bit`
35997	EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8 = 4500,
35998	/// `VFPCLASSPH k1 {k2}, ymm2/m256/m16bcst, imm8`
35999	///
36000	/// `EVEX.256.0F3A.W0 66 /r ib`
36001	///
36002	/// `AVX512VL and AVX512-FP16`
36003	///
36004	/// `16/32/64-bit`
36005	EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8 = 4501,
36006	/// `VFPCLASSPH k1 {k2}, zmm2/m512/m16bcst, imm8`
36007	///
36008	/// `EVEX.512.0F3A.W0 66 /r ib`
36009	///
36010	/// `AVX512-FP16`
36011	///
36012	/// `16/32/64-bit`
36013	EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8 = 4502,
36014	/// `VFPCLASSSH k1 {k2}, xmm2/m16, imm8`
36015	///
36016	/// `EVEX.LIG.0F3A.W0 67 /r ib`
36017	///
36018	/// `AVX512-FP16`
36019	///
36020	/// `16/32/64-bit`
36021	EVEX_Vfpclasssh_kr_k1_xmmm16_imm8 = 4503,
36022	/// `VGETEXPPH xmm1 {k1}{z}, xmm2/m128/m16bcst`
36023	///
36024	/// `EVEX.128.66.MAP6.W0 42 /r`
36025	///
36026	/// `AVX512VL and AVX512-FP16`
36027	///
36028	/// `16/32/64-bit`
36029	EVEX_Vgetexpph_xmm_k1z_xmmm128b16 = 4504,
36030	/// `VGETEXPPH ymm1 {k1}{z}, ymm2/m256/m16bcst`
36031	///
36032	/// `EVEX.256.66.MAP6.W0 42 /r`
36033	///
36034	/// `AVX512VL and AVX512-FP16`
36035	///
36036	/// `16/32/64-bit`
36037	EVEX_Vgetexpph_ymm_k1z_ymmm256b16 = 4505,
36038	/// `VGETEXPPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}`
36039	///
36040	/// `EVEX.512.66.MAP6.W0 42 /r`
36041	///
36042	/// `AVX512-FP16`
36043	///
36044	/// `16/32/64-bit`
36045	EVEX_Vgetexpph_zmm_k1z_zmmm512b16_sae = 4506,
36046	/// `VGETEXPSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}`
36047	///
36048	/// `EVEX.LIG.66.MAP6.W0 43 /r`
36049	///
36050	/// `AVX512-FP16`
36051	///
36052	/// `16/32/64-bit`
36053	EVEX_Vgetexpsh_xmm_k1z_xmm_xmmm16_sae = 4507,
36054	/// `VGETMANTPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8`
36055	///
36056	/// `EVEX.128.0F3A.W0 26 /r ib`
36057	///
36058	/// `AVX512VL and AVX512-FP16`
36059	///
36060	/// `16/32/64-bit`
36061	EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8 = 4508,
36062	/// `VGETMANTPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8`
36063	///
36064	/// `EVEX.256.0F3A.W0 26 /r ib`
36065	///
36066	/// `AVX512VL and AVX512-FP16`
36067	///
36068	/// `16/32/64-bit`
36069	EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8 = 4509,
36070	/// `VGETMANTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8`
36071	///
36072	/// `EVEX.512.0F3A.W0 26 /r ib`
36073	///
36074	/// `AVX512-FP16`
36075	///
36076	/// `16/32/64-bit`
36077	EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae = 4510,
36078	/// `VGETMANTSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8`
36079	///
36080	/// `EVEX.LIG.0F3A.W0 27 /r ib`
36081	///
36082	/// `AVX512-FP16`
36083	///
36084	/// `16/32/64-bit`
36085	EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae = 4511,
36086	/// `VMAXPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
36087	///
36088	/// `EVEX.128.MAP5.W0 5F /r`
36089	///
36090	/// `AVX512VL and AVX512-FP16`
36091	///
36092	/// `16/32/64-bit`
36093	EVEX_Vmaxph_xmm_k1z_xmm_xmmm128b16 = 4512,
36094	/// `VMAXPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
36095	///
36096	/// `EVEX.256.MAP5.W0 5F /r`
36097	///
36098	/// `AVX512VL and AVX512-FP16`
36099	///
36100	/// `16/32/64-bit`
36101	EVEX_Vmaxph_ymm_k1z_ymm_ymmm256b16 = 4513,
36102	/// `VMAXPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}`
36103	///
36104	/// `EVEX.512.MAP5.W0 5F /r`
36105	///
36106	/// `AVX512-FP16`
36107	///
36108	/// `16/32/64-bit`
36109	EVEX_Vmaxph_zmm_k1z_zmm_zmmm512b16_sae = 4514,
36110	/// `VMAXSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}`
36111	///
36112	/// `EVEX.LIG.F3.MAP5.W0 5F /r`
36113	///
36114	/// `AVX512-FP16`
36115	///
36116	/// `16/32/64-bit`
36117	EVEX_Vmaxsh_xmm_k1z_xmm_xmmm16_sae = 4515,
36118	/// `VMINPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
36119	///
36120	/// `EVEX.128.MAP5.W0 5D /r`
36121	///
36122	/// `AVX512VL and AVX512-FP16`
36123	///
36124	/// `16/32/64-bit`
36125	EVEX_Vminph_xmm_k1z_xmm_xmmm128b16 = 4516,
36126	/// `VMINPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
36127	///
36128	/// `EVEX.256.MAP5.W0 5D /r`
36129	///
36130	/// `AVX512VL and AVX512-FP16`
36131	///
36132	/// `16/32/64-bit`
36133	EVEX_Vminph_ymm_k1z_ymm_ymmm256b16 = 4517,
36134	/// `VMINPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{sae}`
36135	///
36136	/// `EVEX.512.MAP5.W0 5D /r`
36137	///
36138	/// `AVX512-FP16`
36139	///
36140	/// `16/32/64-bit`
36141	EVEX_Vminph_zmm_k1z_zmm_zmmm512b16_sae = 4518,
36142	/// `VMINSH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}`
36143	///
36144	/// `EVEX.LIG.F3.MAP5.W0 5D /r`
36145	///
36146	/// `AVX512-FP16`
36147	///
36148	/// `16/32/64-bit`
36149	EVEX_Vminsh_xmm_k1z_xmm_xmmm16_sae = 4519,
36150	/// `VMOVSH xmm1 {k1}{z}, m16`
36151	///
36152	/// `EVEX.LIG.F3.MAP5.W0 10 /r`
36153	///
36154	/// `AVX512-FP16`
36155	///
36156	/// `16/32/64-bit`
36157	EVEX_Vmovsh_xmm_k1z_m16 = 4520,
36158	/// `VMOVSH m16 {k1}, xmm1`
36159	///
36160	/// `EVEX.LIG.F3.MAP5.W0 11 /r`
36161	///
36162	/// `AVX512-FP16`
36163	///
36164	/// `16/32/64-bit`
36165	EVEX_Vmovsh_m16_k1_xmm = 4521,
36166	/// `VMOVSH xmm1 {k1}{z}, xmm2, xmm3`
36167	///
36168	/// `EVEX.LIG.F3.MAP5.W0 10 /r`
36169	///
36170	/// `AVX512-FP16`
36171	///
36172	/// `16/32/64-bit`
36173	EVEX_Vmovsh_xmm_k1z_xmm_xmm = 4522,
36174	/// `VMOVSH xmm1 {k1}{z}, xmm2, xmm3`
36175	///
36176	/// `EVEX.LIG.F3.MAP5.W0 11 /r`
36177	///
36178	/// `AVX512-FP16`
36179	///
36180	/// `16/32/64-bit`
36181	EVEX_Vmovsh_xmm_k1z_xmm_xmm_MAP5_11 = 4523,
36182	/// `VMOVW xmm1, r32/m16`
36183	///
36184	/// `EVEX.128.66.MAP5.W0 6E /r`
36185	///
36186	/// `AVX512-FP16`
36187	///
36188	/// `16/32/64-bit`
36189	EVEX_Vmovw_xmm_r32m16 = 4524,
36190	/// `VMOVW xmm1, r64/m16`
36191	///
36192	/// `EVEX.128.66.MAP5.W1 6E /r`
36193	///
36194	/// `AVX512-FP16`
36195	///
36196	/// `64-bit`
36197	EVEX_Vmovw_xmm_r64m16 = 4525,
36198	/// `VMOVW r32/m16, xmm1`
36199	///
36200	/// `EVEX.128.66.MAP5.W0 7E /r`
36201	///
36202	/// `AVX512-FP16`
36203	///
36204	/// `16/32/64-bit`
36205	EVEX_Vmovw_r32m16_xmm = 4526,
36206	/// `VMOVW r64/m16, xmm1`
36207	///
36208	/// `EVEX.128.66.MAP5.W1 7E /r`
36209	///
36210	/// `AVX512-FP16`
36211	///
36212	/// `64-bit`
36213	EVEX_Vmovw_r64m16_xmm = 4527,
36214	/// `VMULPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
36215	///
36216	/// `EVEX.128.MAP5.W0 59 /r`
36217	///
36218	/// `AVX512VL and AVX512-FP16`
36219	///
36220	/// `16/32/64-bit`
36221	EVEX_Vmulph_xmm_k1z_xmm_xmmm128b16 = 4528,
36222	/// `VMULPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
36223	///
36224	/// `EVEX.256.MAP5.W0 59 /r`
36225	///
36226	/// `AVX512VL and AVX512-FP16`
36227	///
36228	/// `16/32/64-bit`
36229	EVEX_Vmulph_ymm_k1z_ymm_ymmm256b16 = 4529,
36230	/// `VMULPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
36231	///
36232	/// `EVEX.512.MAP5.W0 59 /r`
36233	///
36234	/// `AVX512-FP16`
36235	///
36236	/// `16/32/64-bit`
36237	EVEX_Vmulph_zmm_k1z_zmm_zmmm512b16_er = 4530,
36238	/// `VMULSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
36239	///
36240	/// `EVEX.LIG.F3.MAP5.W0 59 /r`
36241	///
36242	/// `AVX512-FP16`
36243	///
36244	/// `16/32/64-bit`
36245	EVEX_Vmulsh_xmm_k1z_xmm_xmmm16_er = 4531,
36246	/// `VRCPPH xmm1 {k1}{z}, xmm2/m128/m16bcst`
36247	///
36248	/// `EVEX.128.66.MAP6.W0 4C /r`
36249	///
36250	/// `AVX512VL and AVX512-FP16`
36251	///
36252	/// `16/32/64-bit`
36253	EVEX_Vrcpph_xmm_k1z_xmmm128b16 = 4532,
36254	/// `VRCPPH ymm1 {k1}{z}, ymm2/m256/m16bcst`
36255	///
36256	/// `EVEX.256.66.MAP6.W0 4C /r`
36257	///
36258	/// `AVX512VL and AVX512-FP16`
36259	///
36260	/// `16/32/64-bit`
36261	EVEX_Vrcpph_ymm_k1z_ymmm256b16 = 4533,
36262	/// `VRCPPH zmm1 {k1}{z}, zmm2/m512/m16bcst`
36263	///
36264	/// `EVEX.512.66.MAP6.W0 4C /r`
36265	///
36266	/// `AVX512-FP16`
36267	///
36268	/// `16/32/64-bit`
36269	EVEX_Vrcpph_zmm_k1z_zmmm512b16 = 4534,
36270	/// `VRCPSH xmm1 {k1}{z}, xmm2, xmm3/m16`
36271	///
36272	/// `EVEX.LIG.66.MAP6.W0 4D /r`
36273	///
36274	/// `AVX512-FP16`
36275	///
36276	/// `16/32/64-bit`
36277	EVEX_Vrcpsh_xmm_k1z_xmm_xmmm16 = 4535,
36278	/// `VREDUCEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8`
36279	///
36280	/// `EVEX.128.0F3A.W0 56 /r ib`
36281	///
36282	/// `AVX512VL and AVX512-FP16`
36283	///
36284	/// `16/32/64-bit`
36285	EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8 = 4536,
36286	/// `VREDUCEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8`
36287	///
36288	/// `EVEX.256.0F3A.W0 56 /r ib`
36289	///
36290	/// `AVX512VL and AVX512-FP16`
36291	///
36292	/// `16/32/64-bit`
36293	EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8 = 4537,
36294	/// `VREDUCEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8`
36295	///
36296	/// `EVEX.512.0F3A.W0 56 /r ib`
36297	///
36298	/// `AVX512-FP16`
36299	///
36300	/// `16/32/64-bit`
36301	EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae = 4538,
36302	/// `VREDUCESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8`
36303	///
36304	/// `EVEX.LIG.0F3A.W0 57 /r ib`
36305	///
36306	/// `AVX512-FP16`
36307	///
36308	/// `16/32/64-bit`
36309	EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae = 4539,
36310	/// `VRNDSCALEPH xmm1 {k1}{z}, xmm2/m128/m16bcst, imm8`
36311	///
36312	/// `EVEX.128.0F3A.W0 08 /r ib`
36313	///
36314	/// `AVX512VL and AVX512-FP16`
36315	///
36316	/// `16/32/64-bit`
36317	EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8 = 4540,
36318	/// `VRNDSCALEPH ymm1 {k1}{z}, ymm2/m256/m16bcst, imm8`
36319	///
36320	/// `EVEX.256.0F3A.W0 08 /r ib`
36321	///
36322	/// `AVX512VL and AVX512-FP16`
36323	///
36324	/// `16/32/64-bit`
36325	EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8 = 4541,
36326	/// `VRNDSCALEPH zmm1 {k1}{z}, zmm2/m512/m16bcst{sae}, imm8`
36327	///
36328	/// `EVEX.512.0F3A.W0 08 /r ib`
36329	///
36330	/// `AVX512-FP16`
36331	///
36332	/// `16/32/64-bit`
36333	EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae = 4542,
36334	/// `VRNDSCALESH xmm1 {k1}{z}, xmm2, xmm3/m16{sae}, imm8`
36335	///
36336	/// `EVEX.LIG.0F3A.W0 0A /r ib`
36337	///
36338	/// `AVX512-FP16`
36339	///
36340	/// `16/32/64-bit`
36341	EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae = 4543,
36342	/// `VRSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst`
36343	///
36344	/// `EVEX.128.66.MAP6.W0 4E /r`
36345	///
36346	/// `AVX512VL and AVX512-FP16`
36347	///
36348	/// `16/32/64-bit`
36349	EVEX_Vrsqrtph_xmm_k1z_xmmm128b16 = 4544,
36350	/// `VRSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst`
36351	///
36352	/// `EVEX.256.66.MAP6.W0 4E /r`
36353	///
36354	/// `AVX512VL and AVX512-FP16`
36355	///
36356	/// `16/32/64-bit`
36357	EVEX_Vrsqrtph_ymm_k1z_ymmm256b16 = 4545,
36358	/// `VRSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst`
36359	///
36360	/// `EVEX.512.66.MAP6.W0 4E /r`
36361	///
36362	/// `AVX512-FP16`
36363	///
36364	/// `16/32/64-bit`
36365	EVEX_Vrsqrtph_zmm_k1z_zmmm512b16 = 4546,
36366	/// `VRSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16`
36367	///
36368	/// `EVEX.LIG.66.MAP6.W0 4F /r`
36369	///
36370	/// `AVX512-FP16`
36371	///
36372	/// `16/32/64-bit`
36373	EVEX_Vrsqrtsh_xmm_k1z_xmm_xmmm16 = 4547,
36374	/// `VSCALEFPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
36375	///
36376	/// `EVEX.128.66.MAP6.W0 2C /r`
36377	///
36378	/// `AVX512VL and AVX512-FP16`
36379	///
36380	/// `16/32/64-bit`
36381	EVEX_Vscalefph_xmm_k1z_xmm_xmmm128b16 = 4548,
36382	/// `VSCALEFPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
36383	///
36384	/// `EVEX.256.66.MAP6.W0 2C /r`
36385	///
36386	/// `AVX512VL and AVX512-FP16`
36387	///
36388	/// `16/32/64-bit`
36389	EVEX_Vscalefph_ymm_k1z_ymm_ymmm256b16 = 4549,
36390	/// `VSCALEFPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
36391	///
36392	/// `EVEX.512.66.MAP6.W0 2C /r`
36393	///
36394	/// `AVX512-FP16`
36395	///
36396	/// `16/32/64-bit`
36397	EVEX_Vscalefph_zmm_k1z_zmm_zmmm512b16_er = 4550,
36398	/// `VSCALEFSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
36399	///
36400	/// `EVEX.LIG.66.MAP6.W0 2D /r`
36401	///
36402	/// `AVX512-FP16`
36403	///
36404	/// `16/32/64-bit`
36405	EVEX_Vscalefsh_xmm_k1z_xmm_xmmm16_er = 4551,
36406	/// `VSQRTPH xmm1 {k1}{z}, xmm2/m128/m16bcst`
36407	///
36408	/// `EVEX.128.MAP5.W0 51 /r`
36409	///
36410	/// `AVX512VL and AVX512-FP16`
36411	///
36412	/// `16/32/64-bit`
36413	EVEX_Vsqrtph_xmm_k1z_xmmm128b16 = 4552,
36414	/// `VSQRTPH ymm1 {k1}{z}, ymm2/m256/m16bcst`
36415	///
36416	/// `EVEX.256.MAP5.W0 51 /r`
36417	///
36418	/// `AVX512VL and AVX512-FP16`
36419	///
36420	/// `16/32/64-bit`
36421	EVEX_Vsqrtph_ymm_k1z_ymmm256b16 = 4553,
36422	/// `VSQRTPH zmm1 {k1}{z}, zmm2/m512/m16bcst{er}`
36423	///
36424	/// `EVEX.512.MAP5.W0 51 /r`
36425	///
36426	/// `AVX512-FP16`
36427	///
36428	/// `16/32/64-bit`
36429	EVEX_Vsqrtph_zmm_k1z_zmmm512b16_er = 4554,
36430	/// `VSQRTSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
36431	///
36432	/// `EVEX.LIG.F3.MAP5.W0 51 /r`
36433	///
36434	/// `AVX512-FP16`
36435	///
36436	/// `16/32/64-bit`
36437	EVEX_Vsqrtsh_xmm_k1z_xmm_xmmm16_er = 4555,
36438	/// `VSUBPH xmm1 {k1}{z}, xmm2, xmm3/m128/m16bcst`
36439	///
36440	/// `EVEX.128.MAP5.W0 5C /r`
36441	///
36442	/// `AVX512VL and AVX512-FP16`
36443	///
36444	/// `16/32/64-bit`
36445	EVEX_Vsubph_xmm_k1z_xmm_xmmm128b16 = 4556,
36446	/// `VSUBPH ymm1 {k1}{z}, ymm2, ymm3/m256/m16bcst`
36447	///
36448	/// `EVEX.256.MAP5.W0 5C /r`
36449	///
36450	/// `AVX512VL and AVX512-FP16`
36451	///
36452	/// `16/32/64-bit`
36453	EVEX_Vsubph_ymm_k1z_ymm_ymmm256b16 = 4557,
36454	/// `VSUBPH zmm1 {k1}{z}, zmm2, zmm3/m512/m16bcst{er}`
36455	///
36456	/// `EVEX.512.MAP5.W0 5C /r`
36457	///
36458	/// `AVX512-FP16`
36459	///
36460	/// `16/32/64-bit`
36461	EVEX_Vsubph_zmm_k1z_zmm_zmmm512b16_er = 4558,
36462	/// `VSUBSH xmm1 {k1}{z}, xmm2, xmm3/m16{er}`
36463	///
36464	/// `EVEX.LIG.F3.MAP5.W0 5C /r`
36465	///
36466	/// `AVX512-FP16`
36467	///
36468	/// `16/32/64-bit`
36469	EVEX_Vsubsh_xmm_k1z_xmm_xmmm16_er = 4559,
36470	/// `VUCOMISH xmm1, xmm2/m16{sae}`
36471	///
36472	/// `EVEX.LIG.MAP5.W0 2E /r`
36473	///
36474	/// `AVX512-FP16`
36475	///
36476	/// `16/32/64-bit`
36477	EVEX_Vucomish_xmm_xmmm16_sae = 4560,
36478	/// `RDUDBG`
36479	///
36480	/// `0F 0E`
36481	///
36482	/// `UDBG`
36483	///
36484	/// `16/32/64-bit`
36485	Rdudbg = 4561,
36486	/// `WRUDBG`
36487	///
36488	/// `0F 0F`
36489	///
36490	/// `UDBG`
36491	///
36492	/// `16/32/64-bit`
36493	Wrudbg = 4562,
36494	/// `JKZD k1, rel8`
36495	///
36496	/// `VEX.128.W0 74 cb`
36497	///
36498	/// `KNC`
36499	///
36500	/// `64-bit`
36501	VEX_KNC_Jkzd_kr_rel8_64 = 4563,
36502	/// `JKNZD k1, rel8`
36503	///
36504	/// `VEX.128.W0 75 cb`
36505	///
36506	/// `KNC`
36507	///
36508	/// `64-bit`
36509	VEX_KNC_Jknzd_kr_rel8_64 = 4564,
36510	/// `VPREFETCHNTA m8`
36511	///
36512	/// `VEX.128.0F.WIG 18 /0`
36513	///
36514	/// `KNC`
36515	///
36516	/// `64-bit`
36517	VEX_KNC_Vprefetchnta_m8 = 4565,
36518	/// `VPREFETCH0 m8`
36519	///
36520	/// `VEX.128.0F.WIG 18 /1`
36521	///
36522	/// `KNC`
36523	///
36524	/// `64-bit`
36525	VEX_KNC_Vprefetch0_m8 = 4566,
36526	/// `VPREFETCH1 m8`
36527	///
36528	/// `VEX.128.0F.WIG 18 /2`
36529	///
36530	/// `KNC`
36531	///
36532	/// `64-bit`
36533	VEX_KNC_Vprefetch1_m8 = 4567,
36534	/// `VPREFETCH2 m8`
36535	///
36536	/// `VEX.128.0F.WIG 18 /3`
36537	///
36538	/// `KNC`
36539	///
36540	/// `64-bit`
36541	VEX_KNC_Vprefetch2_m8 = 4568,
36542	/// `VPREFETCHENTA m8`
36543	///
36544	/// `VEX.128.0F.WIG 18 /4`
36545	///
36546	/// `KNC`
36547	///
36548	/// `64-bit`
36549	VEX_KNC_Vprefetchenta_m8 = 4569,
36550	/// `VPREFETCHE0 m8`
36551	///
36552	/// `VEX.128.0F.WIG 18 /5`
36553	///
36554	/// `KNC`
36555	///
36556	/// `64-bit`
36557	VEX_KNC_Vprefetche0_m8 = 4570,
36558	/// `VPREFETCHE1 m8`
36559	///
36560	/// `VEX.128.0F.WIG 18 /6`
36561	///
36562	/// `KNC`
36563	///
36564	/// `64-bit`
36565	VEX_KNC_Vprefetche1_m8 = 4571,
36566	/// `VPREFETCHE2 m8`
36567	///
36568	/// `VEX.128.0F.WIG 18 /7`
36569	///
36570	/// `KNC`
36571	///
36572	/// `64-bit`
36573	VEX_KNC_Vprefetche2_m8 = 4572,
36574	/// `KAND k1, k2`
36575	///
36576	/// `VEX.128.0F.W0 41 /r`
36577	///
36578	/// `KNC`
36579	///
36580	/// `64-bit`
36581	VEX_KNC_Kand_kr_kr = 4573,
36582	/// `KANDN k1, k2`
36583	///
36584	/// `VEX.128.0F.W0 42 /r`
36585	///
36586	/// `KNC`
36587	///
36588	/// `64-bit`
36589	VEX_KNC_Kandn_kr_kr = 4574,
36590	/// `KANDNR k1, k2`
36591	///
36592	/// `VEX.128.0F.W0 43 /r`
36593	///
36594	/// `KNC`
36595	///
36596	/// `64-bit`
36597	VEX_KNC_Kandnr_kr_kr = 4575,
36598	/// `KNOT k1, k2`
36599	///
36600	/// `VEX.128.0F.W0 44 /r`
36601	///
36602	/// `KNC`
36603	///
36604	/// `64-bit`
36605	VEX_KNC_Knot_kr_kr = 4576,
36606	/// `KOR k1, k2`
36607	///
36608	/// `VEX.128.0F.W0 45 /r`
36609	///
36610	/// `KNC`
36611	///
36612	/// `64-bit`
36613	VEX_KNC_Kor_kr_kr = 4577,
36614	/// `KXNOR k1, k2`
36615	///
36616	/// `VEX.128.0F.W0 46 /r`
36617	///
36618	/// `KNC`
36619	///
36620	/// `64-bit`
36621	VEX_KNC_Kxnor_kr_kr = 4578,
36622	/// `KXOR k1, k2`
36623	///
36624	/// `VEX.128.0F.W0 47 /r`
36625	///
36626	/// `KNC`
36627	///
36628	/// `64-bit`
36629	VEX_KNC_Kxor_kr_kr = 4579,
36630	/// `KMERGE2L1H k1, k2`
36631	///
36632	/// `VEX.128.0F.W0 48 /r`
36633	///
36634	/// `KNC`
36635	///
36636	/// `64-bit`
36637	VEX_KNC_Kmerge2l1h_kr_kr = 4580,
36638	/// `KMERGE2L1L k1, k2`
36639	///
36640	/// `VEX.128.0F.W0 49 /r`
36641	///
36642	/// `KNC`
36643	///
36644	/// `64-bit`
36645	VEX_KNC_Kmerge2l1l_kr_kr = 4581,
36646	/// `JKZD k1, rel32`
36647	///
36648	/// `VEX.128.0F.W0 84 cd`
36649	///
36650	/// `KNC`
36651	///
36652	/// `64-bit`
36653	VEX_KNC_Jkzd_kr_rel32_64 = 4582,
36654	/// `JKNZD k1, rel32`
36655	///
36656	/// `VEX.128.0F.W0 85 cd`
36657	///
36658	/// `KNC`
36659	///
36660	/// `64-bit`
36661	VEX_KNC_Jknzd_kr_rel32_64 = 4583,
36662	/// `KMOV k1, k2`
36663	///
36664	/// `VEX.128.0F.W0 90 /r`
36665	///
36666	/// `KNC`
36667	///
36668	/// `64-bit`
36669	VEX_KNC_Kmov_kr_kr = 4584,
36670	/// `KMOV k1, r32`
36671	///
36672	/// `VEX.128.0F.W0 92 /r`
36673	///
36674	/// `KNC`
36675	///
36676	/// `64-bit`
36677	VEX_KNC_Kmov_kr_r32 = 4585,
36678	/// `KMOV r32, k1`
36679	///
36680	/// `VEX.128.0F.W0 93 /r`
36681	///
36682	/// `KNC`
36683	///
36684	/// `64-bit`
36685	VEX_KNC_Kmov_r32_kr = 4586,
36686	/// `KCONCATH r64, k1, k2`
36687	///
36688	/// `VEX.128.0F.W0 95 /r`
36689	///
36690	/// `KNC`
36691	///
36692	/// `64-bit`
36693	VEX_KNC_Kconcath_r64_kr_kr = 4587,
36694	/// `KCONCATL r64, k1, k2`
36695	///
36696	/// `VEX.128.0F.W0 97 /r`
36697	///
36698	/// `KNC`
36699	///
36700	/// `64-bit`
36701	VEX_KNC_Kconcatl_r64_kr_kr = 4588,
36702	/// `KORTEST k1, k2`
36703	///
36704	/// `VEX.128.0F.W0 98 /r`
36705	///
36706	/// `KNC`
36707	///
36708	/// `64-bit`
36709	VEX_KNC_Kortest_kr_kr = 4589,
36710	/// `DELAY r32`
36711	///
36712	/// `VEX.128.F3.0F.W0 AE /6`
36713	///
36714	/// `KNC`
36715	///
36716	/// `64-bit`
36717	VEX_KNC_Delay_r32 = 4590,
36718	/// `DELAY r64`
36719	///
36720	/// `VEX.128.F3.0F.W1 AE /6`
36721	///
36722	/// `KNC`
36723	///
36724	/// `64-bit`
36725	VEX_KNC_Delay_r64 = 4591,
36726	/// `SPFLT r32`
36727	///
36728	/// `VEX.128.F2.0F.W0 AE /6`
36729	///
36730	/// `KNC`
36731	///
36732	/// `64-bit`
36733	VEX_KNC_Spflt_r32 = 4592,
36734	/// `SPFLT r64`
36735	///
36736	/// `VEX.128.F2.0F.W1 AE /6`
36737	///
36738	/// `KNC`
36739	///
36740	/// `64-bit`
36741	VEX_KNC_Spflt_r64 = 4593,
36742	/// `CLEVICT1 m8`
36743	///
36744	/// `VEX.128.F3.0F.WIG AE /7`
36745	///
36746	/// `KNC`
36747	///
36748	/// `64-bit`
36749	VEX_KNC_Clevict1_m8 = 4594,
36750	/// `CLEVICT0 m8`
36751	///
36752	/// `VEX.128.F2.0F.WIG AE /7`
36753	///
36754	/// `KNC`
36755	///
36756	/// `64-bit`
36757	VEX_KNC_Clevict0_m8 = 4595,
36758	/// `POPCNT r32, r32`
36759	///
36760	/// `VEX.128.F3.0F.W0 B8 /r`
36761	///
36762	/// `KNC`
36763	///
36764	/// `64-bit`
36765	VEX_KNC_Popcnt_r32_r32 = 4596,
36766	/// `POPCNT r64, r64`
36767	///
36768	/// `VEX.128.F3.0F.W1 B8 /r`
36769	///
36770	/// `KNC`
36771	///
36772	/// `64-bit`
36773	VEX_KNC_Popcnt_r64_r64 = 4597,
36774	/// `TZCNT r32, r32`
36775	///
36776	/// `VEX.128.F3.0F.W0 BC /r`
36777	///
36778	/// `KNC`
36779	///
36780	/// `64-bit`
36781	VEX_KNC_Tzcnt_r32_r32 = 4598,
36782	/// `TZCNT r64, r64`
36783	///
36784	/// `VEX.128.F3.0F.W1 BC /r`
36785	///
36786	/// `KNC`
36787	///
36788	/// `64-bit`
36789	VEX_KNC_Tzcnt_r64_r64 = 4599,
36790	/// `TZCNTI r32, r32`
36791	///
36792	/// `VEX.128.F2.0F.W0 BC /r`
36793	///
36794	/// `KNC`
36795	///
36796	/// `64-bit`
36797	VEX_KNC_Tzcnti_r32_r32 = 4600,
36798	/// `TZCNTI r64, r64`
36799	///
36800	/// `VEX.128.F2.0F.W1 BC /r`
36801	///
36802	/// `KNC`
36803	///
36804	/// `64-bit`
36805	VEX_KNC_Tzcnti_r64_r64 = 4601,
36806	/// `LZCNT r32, r32`
36807	///
36808	/// `VEX.128.F3.0F.W0 BD /r`
36809	///
36810	/// `KNC`
36811	///
36812	/// `64-bit`
36813	VEX_KNC_Lzcnt_r32_r32 = 4602,
36814	/// `LZCNT r64, r64`
36815	///
36816	/// `VEX.128.F3.0F.W1 BD /r`
36817	///
36818	/// `KNC`
36819	///
36820	/// `64-bit`
36821	VEX_KNC_Lzcnt_r64_r64 = 4603,
36822	/// `UNDOC r32, r/m32`
36823	///
36824	/// `VEX.128.F3.0F38.W0 F0 /r`
36825	///
36826	/// `KNC`
36827	///
36828	/// `64-bit`
36829	VEX_KNC_Undoc_r32_rm32_128_F3_0F38_W0_F0 = 4604,
36830	/// `UNDOC r64, r/m64`
36831	///
36832	/// `VEX.128.F3.0F38.W1 F0 /r`
36833	///
36834	/// `KNC`
36835	///
36836	/// `64-bit`
36837	VEX_KNC_Undoc_r64_rm64_128_F3_0F38_W1_F0 = 4605,
36838	/// `UNDOC r32, r/m32`
36839	///
36840	/// `VEX.128.F2.0F38.W0 F0 /r`
36841	///
36842	/// `KNC`
36843	///
36844	/// `64-bit`
36845	VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F0 = 4606,
36846	/// `UNDOC r64, r/m64`
36847	///
36848	/// `VEX.128.F2.0F38.W1 F0 /r`
36849	///
36850	/// `KNC`
36851	///
36852	/// `64-bit`
36853	VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F0 = 4607,
36854	/// `UNDOC r32, r/m32`
36855	///
36856	/// `VEX.128.F2.0F38.W0 F1 /r`
36857	///
36858	/// `KNC`
36859	///
36860	/// `64-bit`
36861	VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F1 = 4608,
36862	/// `UNDOC r64, r/m64`
36863	///
36864	/// `VEX.128.F2.0F38.W1 F1 /r`
36865	///
36866	/// `KNC`
36867	///
36868	/// `64-bit`
36869	VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F1 = 4609,
36870	/// `KEXTRACT k1, r64, imm8`
36871	///
36872	/// `VEX.128.66.0F3A.W0 3E /r ib`
36873	///
36874	/// `KNC`
36875	///
36876	/// `64-bit`
36877	VEX_KNC_Kextract_kr_r64_imm8 = 4610,
36878	/// `VPREFETCHNTA m`
36879	///
36880	/// `MVEX.512.0F.WIG 18 /0`
36881	///
36882	/// `KNC`
36883	///
36884	/// `64-bit`
36885	MVEX_Vprefetchnta_m = 4611,
36886	/// `VPREFETCH0 m`
36887	///
36888	/// `MVEX.512.0F.WIG 18 /1`
36889	///
36890	/// `KNC`
36891	///
36892	/// `64-bit`
36893	MVEX_Vprefetch0_m = 4612,
36894	/// `VPREFETCH1 m`
36895	///
36896	/// `MVEX.512.0F.WIG 18 /2`
36897	///
36898	/// `KNC`
36899	///
36900	/// `64-bit`
36901	MVEX_Vprefetch1_m = 4613,
36902	/// `VPREFETCH2 m`
36903	///
36904	/// `MVEX.512.0F.WIG 18 /3`
36905	///
36906	/// `KNC`
36907	///
36908	/// `64-bit`
36909	MVEX_Vprefetch2_m = 4614,
36910	/// `VPREFETCHENTA m`
36911	///
36912	/// `MVEX.512.0F.WIG 18 /4`
36913	///
36914	/// `KNC`
36915	///
36916	/// `64-bit`
36917	MVEX_Vprefetchenta_m = 4615,
36918	/// `VPREFETCHE0 m`
36919	///
36920	/// `MVEX.512.0F.WIG 18 /5`
36921	///
36922	/// `KNC`
36923	///
36924	/// `64-bit`
36925	MVEX_Vprefetche0_m = 4616,
36926	/// `VPREFETCHE1 m`
36927	///
36928	/// `MVEX.512.0F.WIG 18 /6`
36929	///
36930	/// `KNC`
36931	///
36932	/// `64-bit`
36933	MVEX_Vprefetche1_m = 4617,
36934	/// `VPREFETCHE2 m`
36935	///
36936	/// `MVEX.512.0F.WIG 18 /7`
36937	///
36938	/// `KNC`
36939	///
36940	/// `64-bit`
36941	MVEX_Vprefetche2_m = 4618,
36942	/// `VMOVAPS zmm1 {k1}, Sf32(zmm2/mt)`
36943	///
36944	/// `MVEX.512.0F.W0 28 /r`
36945	///
36946	/// `KNC`
36947	///
36948	/// `64-bit`
36949	MVEX_Vmovaps_zmm_k1_zmmmt = 4619,
36950	/// `VMOVAPD zmm1 {k1}, Sf64(zmm2/mt)`
36951	///
36952	/// `MVEX.512.66.0F.W1 28 /r`
36953	///
36954	/// `KNC`
36955	///
36956	/// `64-bit`
36957	MVEX_Vmovapd_zmm_k1_zmmmt = 4620,
36958	/// `VMOVAPS mt {k1}, Df32(zmm1)`
36959	///
36960	/// `MVEX.512.0F.W0 29 /r`
36961	///
36962	/// `KNC`
36963	///
36964	/// `64-bit`
36965	MVEX_Vmovaps_mt_k1_zmm = 4621,
36966	/// `VMOVAPD mt {k1}, Df64(zmm1)`
36967	///
36968	/// `MVEX.512.66.0F.W1 29 /r`
36969	///
36970	/// `KNC`
36971	///
36972	/// `64-bit`
36973	MVEX_Vmovapd_mt_k1_zmm = 4622,
36974	/// `VMOVNRAPD m {k1}, Df64(zmm1)`
36975	///
36976	/// `MVEX.512.F3.0F.W1.EH0 29 /r`
36977	///
36978	/// `KNC`
36979	///
36980	/// `64-bit`
36981	MVEX_Vmovnrapd_m_k1_zmm = 4623,
36982	/// `VMOVNRNGOAPD m {k1}, Df64(zmm1)`
36983	///
36984	/// `MVEX.512.F3.0F.W1.EH1 29 /r`
36985	///
36986	/// `KNC`
36987	///
36988	/// `64-bit`
36989	MVEX_Vmovnrngoapd_m_k1_zmm = 4624,
36990	/// `VMOVNRAPS m {k1}, Df32(zmm1)`
36991	///
36992	/// `MVEX.512.F2.0F.W0.EH0 29 /r`
36993	///
36994	/// `KNC`
36995	///
36996	/// `64-bit`
36997	MVEX_Vmovnraps_m_k1_zmm = 4625,
36998	/// `VMOVNRNGOAPS m {k1}, Df32(zmm1)`
36999	///
37000	/// `MVEX.512.F2.0F.W0.EH1 29 /r`
37001	///
37002	/// `KNC`
37003	///
37004	/// `64-bit`
37005	MVEX_Vmovnrngoaps_m_k1_zmm = 4626,
37006	/// `VADDPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37007	///
37008	/// `MVEX.NDS.512.0F.W0 58 /r`
37009	///
37010	/// `KNC`
37011	///
37012	/// `64-bit`
37013	MVEX_Vaddps_zmm_k1_zmm_zmmmt = 4627,
37014	/// `VADDPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37015	///
37016	/// `MVEX.NDS.512.66.0F.W1 58 /r`
37017	///
37018	/// `KNC`
37019	///
37020	/// `64-bit`
37021	MVEX_Vaddpd_zmm_k1_zmm_zmmmt = 4628,
37022	/// `VMULPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37023	///
37024	/// `MVEX.NDS.512.0F.W0 59 /r`
37025	///
37026	/// `KNC`
37027	///
37028	/// `64-bit`
37029	MVEX_Vmulps_zmm_k1_zmm_zmmmt = 4629,
37030	/// `VMULPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37031	///
37032	/// `MVEX.NDS.512.66.0F.W1 59 /r`
37033	///
37034	/// `KNC`
37035	///
37036	/// `64-bit`
37037	MVEX_Vmulpd_zmm_k1_zmm_zmmmt = 4630,
37038	/// `VCVTPS2PD zmm1 {k1}, Sf32(zmm2/mt)`
37039	///
37040	/// `MVEX.512.0F.W0 5A /r`
37041	///
37042	/// `KNC`
37043	///
37044	/// `64-bit`
37045	MVEX_Vcvtps2pd_zmm_k1_zmmmt = 4631,
37046	/// `VCVTPD2PS zmm1 {k1}, Sf64(zmm2/mt)`
37047	///
37048	/// `MVEX.512.66.0F.W1 5A /r`
37049	///
37050	/// `KNC`
37051	///
37052	/// `64-bit`
37053	MVEX_Vcvtpd2ps_zmm_k1_zmmmt = 4632,
37054	/// `VSUBPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37055	///
37056	/// `MVEX.NDS.512.0F.W0 5C /r`
37057	///
37058	/// `KNC`
37059	///
37060	/// `64-bit`
37061	MVEX_Vsubps_zmm_k1_zmm_zmmmt = 4633,
37062	/// `VSUBPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37063	///
37064	/// `MVEX.NDS.512.66.0F.W1 5C /r`
37065	///
37066	/// `KNC`
37067	///
37068	/// `64-bit`
37069	MVEX_Vsubpd_zmm_k1_zmm_zmmmt = 4634,
37070	/// `VPCMPGTD k2 {k1}, zmm1, Si32(zmm2/mt)`
37071	///
37072	/// `MVEX.NDS.512.66.0F.W0 66 /r`
37073	///
37074	/// `KNC`
37075	///
37076	/// `64-bit`
37077	MVEX_Vpcmpgtd_kr_k1_zmm_zmmmt = 4635,
37078	/// `VMOVDQA32 zmm1 {k1}, Si32(zmm2/mt)`
37079	///
37080	/// `MVEX.512.66.0F.W0 6F /r`
37081	///
37082	/// `KNC`
37083	///
37084	/// `64-bit`
37085	MVEX_Vmovdqa32_zmm_k1_zmmmt = 4636,
37086	/// `VMOVDQA64 zmm1 {k1}, Si64(zmm2/mt)`
37087	///
37088	/// `MVEX.512.66.0F.W1 6F /r`
37089	///
37090	/// `KNC`
37091	///
37092	/// `64-bit`
37093	MVEX_Vmovdqa64_zmm_k1_zmmmt = 4637,
37094	/// `VPSHUFD zmm1 {k1}, zmm2/mt, imm8`
37095	///
37096	/// `MVEX.512.66.0F.W0 70 /r ib`
37097	///
37098	/// `KNC`
37099	///
37100	/// `64-bit`
37101	MVEX_Vpshufd_zmm_k1_zmmmt_imm8 = 4638,
37102	/// `VPSRLD zmm1 {k1}, Si32(zmm2/mt), imm8`
37103	///
37104	/// `MVEX.NDD.512.66.0F.W0 72 /2 ib`
37105	///
37106	/// `KNC`
37107	///
37108	/// `64-bit`
37109	MVEX_Vpsrld_zmm_k1_zmmmt_imm8 = 4639,
37110	/// `VPSRAD zmm1 {k1}, Si32(zmm2/mt), imm8`
37111	///
37112	/// `MVEX.NDD.512.66.0F.W0 72 /4 ib`
37113	///
37114	/// `KNC`
37115	///
37116	/// `64-bit`
37117	MVEX_Vpsrad_zmm_k1_zmmmt_imm8 = 4640,
37118	/// `VPSLLD zmm1 {k1}, Si32(zmm2/mt), imm8`
37119	///
37120	/// `MVEX.NDD.512.66.0F.W0 72 /6 ib`
37121	///
37122	/// `KNC`
37123	///
37124	/// `64-bit`
37125	MVEX_Vpslld_zmm_k1_zmmmt_imm8 = 4641,
37126	/// `VPCMPEQD k2 {k1}, zmm1, Si32(zmm2/mt)`
37127	///
37128	/// `MVEX.NDS.512.66.0F.W0 76 /r`
37129	///
37130	/// `KNC`
37131	///
37132	/// `64-bit`
37133	MVEX_Vpcmpeqd_kr_k1_zmm_zmmmt = 4642,
37134	/// `VCVTUDQ2PD zmm1 {k1}, Si32(zmm2/mt)`
37135	///
37136	/// `MVEX.512.F3.0F.W0 7A /r`
37137	///
37138	/// `KNC`
37139	///
37140	/// `64-bit`
37141	MVEX_Vcvtudq2pd_zmm_k1_zmmmt = 4643,
37142	/// `VMOVDQA32 mt {k1}, Di32(zmm1)`
37143	///
37144	/// `MVEX.512.66.0F.W0 7F /r`
37145	///
37146	/// `KNC`
37147	///
37148	/// `64-bit`
37149	MVEX_Vmovdqa32_mt_k1_zmm = 4644,
37150	/// `VMOVDQA64 mt {k1}, Di64(zmm1)`
37151	///
37152	/// `MVEX.512.66.0F.W1 7F /r`
37153	///
37154	/// `KNC`
37155	///
37156	/// `64-bit`
37157	MVEX_Vmovdqa64_mt_k1_zmm = 4645,
37158	/// `CLEVICT1 m`
37159	///
37160	/// `MVEX.512.F3.0F.WIG AE /7`
37161	///
37162	/// `KNC`
37163	///
37164	/// `64-bit`
37165	MVEX_Clevict1_m = 4646,
37166	/// `CLEVICT0 m`
37167	///
37168	/// `MVEX.512.F2.0F.WIG AE /7`
37169	///
37170	/// `KNC`
37171	///
37172	/// `64-bit`
37173	MVEX_Clevict0_m = 4647,
37174	/// `VCMPPS k2 {k1}, zmm1, Sf32(zmm2/mt), imm8`
37175	///
37176	/// `MVEX.NDS.512.0F.W0 C2 /r ib`
37177	///
37178	/// `KNC`
37179	///
37180	/// `64-bit`
37181	MVEX_Vcmpps_kr_k1_zmm_zmmmt_imm8 = 4648,
37182	/// `VCMPPD k2 {k1}, zmm1, Sf64(zmm2/mt), imm8`
37183	///
37184	/// `MVEX.NDS.512.66.0F.W1 C2 /r ib`
37185	///
37186	/// `KNC`
37187	///
37188	/// `64-bit`
37189	MVEX_Vcmppd_kr_k1_zmm_zmmmt_imm8 = 4649,
37190	/// `VPANDD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37191	///
37192	/// `MVEX.NDS.512.66.0F.W0 DB /r`
37193	///
37194	/// `KNC`
37195	///
37196	/// `64-bit`
37197	MVEX_Vpandd_zmm_k1_zmm_zmmmt = 4650,
37198	/// `VPANDQ zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37199	///
37200	/// `MVEX.NDS.512.66.0F.W1 DB /r`
37201	///
37202	/// `KNC`
37203	///
37204	/// `64-bit`
37205	MVEX_Vpandq_zmm_k1_zmm_zmmmt = 4651,
37206	/// `VPANDND zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37207	///
37208	/// `MVEX.NDS.512.66.0F.W0 DF /r`
37209	///
37210	/// `KNC`
37211	///
37212	/// `64-bit`
37213	MVEX_Vpandnd_zmm_k1_zmm_zmmmt = 4652,
37214	/// `VPANDNQ zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37215	///
37216	/// `MVEX.NDS.512.66.0F.W1 DF /r`
37217	///
37218	/// `KNC`
37219	///
37220	/// `64-bit`
37221	MVEX_Vpandnq_zmm_k1_zmm_zmmmt = 4653,
37222	/// `VCVTDQ2PD zmm1 {k1}, Si32(zmm2/mt)`
37223	///
37224	/// `MVEX.512.F3.0F.W0 E6 /r`
37225	///
37226	/// `KNC`
37227	///
37228	/// `64-bit`
37229	MVEX_Vcvtdq2pd_zmm_k1_zmmmt = 4654,
37230	/// `VPORD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37231	///
37232	/// `MVEX.NDS.512.66.0F.W0 EB /r`
37233	///
37234	/// `KNC`
37235	///
37236	/// `64-bit`
37237	MVEX_Vpord_zmm_k1_zmm_zmmmt = 4655,
37238	/// `VPORQ zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37239	///
37240	/// `MVEX.NDS.512.66.0F.W1 EB /r`
37241	///
37242	/// `KNC`
37243	///
37244	/// `64-bit`
37245	MVEX_Vporq_zmm_k1_zmm_zmmmt = 4656,
37246	/// `VPXORD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37247	///
37248	/// `MVEX.NDS.512.66.0F.W0 EF /r`
37249	///
37250	/// `KNC`
37251	///
37252	/// `64-bit`
37253	MVEX_Vpxord_zmm_k1_zmm_zmmmt = 4657,
37254	/// `VPXORQ zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37255	///
37256	/// `MVEX.NDS.512.66.0F.W1 EF /r`
37257	///
37258	/// `KNC`
37259	///
37260	/// `64-bit`
37261	MVEX_Vpxorq_zmm_k1_zmm_zmmmt = 4658,
37262	/// `VPSUBD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37263	///
37264	/// `MVEX.NDS.512.66.0F.W0 FA /r`
37265	///
37266	/// `KNC`
37267	///
37268	/// `64-bit`
37269	MVEX_Vpsubd_zmm_k1_zmm_zmmmt = 4659,
37270	/// `VPADDD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37271	///
37272	/// `MVEX.NDS.512.66.0F.W0 FE /r`
37273	///
37274	/// `KNC`
37275	///
37276	/// `64-bit`
37277	MVEX_Vpaddd_zmm_k1_zmm_zmmmt = 4660,
37278	/// `VBROADCASTSS zmm1 {k1}, Uf32(mt)`
37279	///
37280	/// `MVEX.512.66.0F38.W0 18 /r`
37281	///
37282	/// `KNC`
37283	///
37284	/// `64-bit`
37285	MVEX_Vbroadcastss_zmm_k1_mt = 4661,
37286	/// `VBROADCASTSD zmm1 {k1}, Uf64(mt)`
37287	///
37288	/// `MVEX.512.66.0F38.W1 19 /r`
37289	///
37290	/// `KNC`
37291	///
37292	/// `64-bit`
37293	MVEX_Vbroadcastsd_zmm_k1_mt = 4662,
37294	/// `VBROADCASTF32X4 zmm1 {k1}, Uf32(mt)`
37295	///
37296	/// `MVEX.512.66.0F38.W0 1A /r`
37297	///
37298	/// `KNC`
37299	///
37300	/// `64-bit`
37301	MVEX_Vbroadcastf32x4_zmm_k1_mt = 4663,
37302	/// `VBROADCASTF64X4 zmm1 {k1}, Uf64(mt)`
37303	///
37304	/// `MVEX.512.66.0F38.W1 1B /r`
37305	///
37306	/// `KNC`
37307	///
37308	/// `64-bit`
37309	MVEX_Vbroadcastf64x4_zmm_k1_mt = 4664,
37310	/// `VPTESTMD k2 {k1}, zmm1, Si32(zmm2/mt)`
37311	///
37312	/// `MVEX.NDS.512.66.0F38.W0 27 /r`
37313	///
37314	/// `KNC`
37315	///
37316	/// `64-bit`
37317	MVEX_Vptestmd_kr_k1_zmm_zmmmt = 4665,
37318	/// `VPERMD zmm1 {k1}, zmm2, zmm3/mt`
37319	///
37320	/// `MVEX.NDS.512.66.0F38.W0 36 /r`
37321	///
37322	/// `KNC`
37323	///
37324	/// `64-bit`
37325	MVEX_Vpermd_zmm_k1_zmm_zmmmt = 4666,
37326	/// `VPMINSD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37327	///
37328	/// `MVEX.NDS.512.66.0F38.W0 39 /r`
37329	///
37330	/// `KNC`
37331	///
37332	/// `64-bit`
37333	MVEX_Vpminsd_zmm_k1_zmm_zmmmt = 4667,
37334	/// `VPMINUD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37335	///
37336	/// `MVEX.NDS.512.66.0F38.W0 3B /r`
37337	///
37338	/// `KNC`
37339	///
37340	/// `64-bit`
37341	MVEX_Vpminud_zmm_k1_zmm_zmmmt = 4668,
37342	/// `VPMAXSD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37343	///
37344	/// `MVEX.NDS.512.66.0F38.W0 3D /r`
37345	///
37346	/// `KNC`
37347	///
37348	/// `64-bit`
37349	MVEX_Vpmaxsd_zmm_k1_zmm_zmmmt = 4669,
37350	/// `VPMAXUD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37351	///
37352	/// `MVEX.NDS.512.66.0F38.W0 3F /r`
37353	///
37354	/// `KNC`
37355	///
37356	/// `64-bit`
37357	MVEX_Vpmaxud_zmm_k1_zmm_zmmmt = 4670,
37358	/// `VPMULLD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37359	///
37360	/// `MVEX.NDS.512.66.0F38.W0 40 /r`
37361	///
37362	/// `KNC`
37363	///
37364	/// `64-bit`
37365	MVEX_Vpmulld_zmm_k1_zmm_zmmmt = 4671,
37366	/// `VGETEXPPS zmm1 {k1}, Sf32(zmm2/mt)`
37367	///
37368	/// `MVEX.512.66.0F38.W0 42 /r`
37369	///
37370	/// `KNC`
37371	///
37372	/// `64-bit`
37373	MVEX_Vgetexpps_zmm_k1_zmmmt = 4672,
37374	/// `VGETEXPPD zmm1 {k1}, Sf64(zmm2/mt)`
37375	///
37376	/// `MVEX.512.66.0F38.W1 42 /r`
37377	///
37378	/// `KNC`
37379	///
37380	/// `64-bit`
37381	MVEX_Vgetexppd_zmm_k1_zmmmt = 4673,
37382	/// `VPSRLVD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37383	///
37384	/// `MVEX.NDS.512.66.0F38.W0 45 /r`
37385	///
37386	/// `KNC`
37387	///
37388	/// `64-bit`
37389	MVEX_Vpsrlvd_zmm_k1_zmm_zmmmt = 4674,
37390	/// `VPSRAVD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37391	///
37392	/// `MVEX.NDS.512.66.0F38.W0 46 /r`
37393	///
37394	/// `KNC`
37395	///
37396	/// `64-bit`
37397	MVEX_Vpsravd_zmm_k1_zmm_zmmmt = 4675,
37398	/// `VPSLLVD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37399	///
37400	/// `MVEX.NDS.512.66.0F38.W0 47 /r`
37401	///
37402	/// `KNC`
37403	///
37404	/// `64-bit`
37405	MVEX_Vpsllvd_zmm_k1_zmm_zmmmt = 4676,
37406	/// `UNDOC zmm1 {k1}, zmm2/mt`
37407	///
37408	/// `MVEX.512.66.0F38.W0 48 /r`
37409	///
37410	/// `KNC`
37411	///
37412	/// `64-bit`
37413	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_48 = 4677,
37414	/// `UNDOC zmm1 {k1}, zmm2/mt`
37415	///
37416	/// `MVEX.512.66.0F38.W0 49 /r`
37417	///
37418	/// `KNC`
37419	///
37420	/// `64-bit`
37421	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_49 = 4678,
37422	/// `UNDOC zmm1 {k1}, zmm2/mt`
37423	///
37424	/// `MVEX.512.66.0F38.W0 4A /r`
37425	///
37426	/// `KNC`
37427	///
37428	/// `64-bit`
37429	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4A = 4679,
37430	/// `UNDOC zmm1 {k1}, zmm2/mt`
37431	///
37432	/// `MVEX.512.66.0F38.W0 4B /r`
37433	///
37434	/// `KNC`
37435	///
37436	/// `64-bit`
37437	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4B = 4680,
37438	/// `VADDNPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37439	///
37440	/// `MVEX.NDS.512.66.0F38.W0 50 /r`
37441	///
37442	/// `KNC`
37443	///
37444	/// `64-bit`
37445	MVEX_Vaddnps_zmm_k1_zmm_zmmmt = 4681,
37446	/// `VADDNPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37447	///
37448	/// `MVEX.NDS.512.66.0F38.W1 50 /r`
37449	///
37450	/// `KNC`
37451	///
37452	/// `64-bit`
37453	MVEX_Vaddnpd_zmm_k1_zmm_zmmmt = 4682,
37454	/// `VGMAXABSPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37455	///
37456	/// `MVEX.NDS.512.66.0F38.W0 51 /r`
37457	///
37458	/// `KNC`
37459	///
37460	/// `64-bit`
37461	MVEX_Vgmaxabsps_zmm_k1_zmm_zmmmt = 4683,
37462	/// `VGMINPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37463	///
37464	/// `MVEX.NDS.512.66.0F38.W0 52 /r`
37465	///
37466	/// `KNC`
37467	///
37468	/// `64-bit`
37469	MVEX_Vgminps_zmm_k1_zmm_zmmmt = 4684,
37470	/// `VGMINPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37471	///
37472	/// `MVEX.NDS.512.66.0F38.W1 52 /r`
37473	///
37474	/// `KNC`
37475	///
37476	/// `64-bit`
37477	MVEX_Vgminpd_zmm_k1_zmm_zmmmt = 4685,
37478	/// `VGMAXPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37479	///
37480	/// `MVEX.NDS.512.66.0F38.W0 53 /r`
37481	///
37482	/// `KNC`
37483	///
37484	/// `64-bit`
37485	MVEX_Vgmaxps_zmm_k1_zmm_zmmmt = 4686,
37486	/// `VGMAXPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37487	///
37488	/// `MVEX.NDS.512.66.0F38.W1 53 /r`
37489	///
37490	/// `KNC`
37491	///
37492	/// `64-bit`
37493	MVEX_Vgmaxpd_zmm_k1_zmm_zmmmt = 4687,
37494	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37495	///
37496	/// `MVEX.NDS.512.66.0F38.W0 54 /r`
37497	///
37498	/// `KNC`
37499	///
37500	/// `64-bit`
37501	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_54 = 4688,
37502	/// `VFIXUPNANPS zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37503	///
37504	/// `MVEX.NDS.512.66.0F38.W0 55 /r`
37505	///
37506	/// `KNC`
37507	///
37508	/// `64-bit`
37509	MVEX_Vfixupnanps_zmm_k1_zmm_zmmmt = 4689,
37510	/// `VFIXUPNANPD zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37511	///
37512	/// `MVEX.NDS.512.66.0F38.W1 55 /r`
37513	///
37514	/// `KNC`
37515	///
37516	/// `64-bit`
37517	MVEX_Vfixupnanpd_zmm_k1_zmm_zmmmt = 4690,
37518	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37519	///
37520	/// `MVEX.NDS.512.66.0F38.W0 56 /r`
37521	///
37522	/// `KNC`
37523	///
37524	/// `64-bit`
37525	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_56 = 4691,
37526	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37527	///
37528	/// `MVEX.NDS.512.66.0F38.W0 57 /r`
37529	///
37530	/// `KNC`
37531	///
37532	/// `64-bit`
37533	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_57 = 4692,
37534	/// `VPBROADCASTD zmm1 {k1}, Ui32(mt)`
37535	///
37536	/// `MVEX.512.66.0F38.W0 58 /r`
37537	///
37538	/// `KNC`
37539	///
37540	/// `64-bit`
37541	MVEX_Vpbroadcastd_zmm_k1_mt = 4693,
37542	/// `VPBROADCASTQ zmm1 {k1}, Ui64(mt)`
37543	///
37544	/// `MVEX.512.66.0F38.W1 59 /r`
37545	///
37546	/// `KNC`
37547	///
37548	/// `64-bit`
37549	MVEX_Vpbroadcastq_zmm_k1_mt = 4694,
37550	/// `VBROADCASTI32X4 zmm1 {k1}, Ui32(mt)`
37551	///
37552	/// `MVEX.512.66.0F38.W0 5A /r`
37553	///
37554	/// `KNC`
37555	///
37556	/// `64-bit`
37557	MVEX_Vbroadcasti32x4_zmm_k1_mt = 4695,
37558	/// `VBROADCASTI64X4 zmm1 {k1}, Ui64(mt)`
37559	///
37560	/// `MVEX.512.66.0F38.W1 5B /r`
37561	///
37562	/// `KNC`
37563	///
37564	/// `64-bit`
37565	MVEX_Vbroadcasti64x4_zmm_k1_mt = 4696,
37566	/// `VPADCD zmm1 {k1}, k2, Si32(zmm3/mt)`
37567	///
37568	/// `MVEX.NDS.512.66.0F38.W0 5C /r`
37569	///
37570	/// `KNC`
37571	///
37572	/// `64-bit`
37573	MVEX_Vpadcd_zmm_k1_kr_zmmmt = 4697,
37574	/// `VPADDSETCD zmm1 {k1}, k2, Si32(zmm3/mt)`
37575	///
37576	/// `MVEX.NDS.512.66.0F38.W0 5D /r`
37577	///
37578	/// `KNC`
37579	///
37580	/// `64-bit`
37581	MVEX_Vpaddsetcd_zmm_k1_kr_zmmmt = 4698,
37582	/// `VPSBBD zmm1 {k1}, k2, Si32(zmm3/mt)`
37583	///
37584	/// `MVEX.NDS.512.66.0F38.W0 5E /r`
37585	///
37586	/// `KNC`
37587	///
37588	/// `64-bit`
37589	MVEX_Vpsbbd_zmm_k1_kr_zmmmt = 4699,
37590	/// `VPSUBSETBD zmm1 {k1}, k2, Si32(zmm3/mt)`
37591	///
37592	/// `MVEX.NDS.512.66.0F38.W0 5F /r`
37593	///
37594	/// `KNC`
37595	///
37596	/// `64-bit`
37597	MVEX_Vpsubsetbd_zmm_k1_kr_zmmmt = 4700,
37598	/// `VPBLENDMD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37599	///
37600	/// `MVEX.NDS.512.66.0F38.W0 64 /r`
37601	///
37602	/// `KNC`
37603	///
37604	/// `64-bit`
37605	MVEX_Vpblendmd_zmm_k1_zmm_zmmmt = 4701,
37606	/// `VPBLENDMQ zmm1 {k1}, zmm2, Si64(zmm3/mt)`
37607	///
37608	/// `MVEX.NDS.512.66.0F38.W1 64 /r`
37609	///
37610	/// `KNC`
37611	///
37612	/// `64-bit`
37613	MVEX_Vpblendmq_zmm_k1_zmm_zmmmt = 4702,
37614	/// `VBLENDMPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37615	///
37616	/// `MVEX.NDS.512.66.0F38.W0 65 /r`
37617	///
37618	/// `KNC`
37619	///
37620	/// `64-bit`
37621	MVEX_Vblendmps_zmm_k1_zmm_zmmmt = 4703,
37622	/// `VBLENDMPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37623	///
37624	/// `MVEX.NDS.512.66.0F38.W1 65 /r`
37625	///
37626	/// `KNC`
37627	///
37628	/// `64-bit`
37629	MVEX_Vblendmpd_zmm_k1_zmm_zmmmt = 4704,
37630	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37631	///
37632	/// `MVEX.NDS.512.66.0F38.W0 67 /r`
37633	///
37634	/// `KNC`
37635	///
37636	/// `64-bit`
37637	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_67 = 4705,
37638	/// `UNDOC zmm1 {k1}, zmm2/mt`
37639	///
37640	/// `MVEX.512.66.0F38.W0 68 /r`
37641	///
37642	/// `KNC`
37643	///
37644	/// `64-bit`
37645	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_68 = 4706,
37646	/// `UNDOC zmm1 {k1}, zmm2/mt`
37647	///
37648	/// `MVEX.512.66.0F38.W0 69 /r`
37649	///
37650	/// `KNC`
37651	///
37652	/// `64-bit`
37653	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_69 = 4707,
37654	/// `UNDOC zmm1 {k1}, zmm2/mt`
37655	///
37656	/// `MVEX.512.66.0F38.W0 6A /r`
37657	///
37658	/// `KNC`
37659	///
37660	/// `64-bit`
37661	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6A = 4708,
37662	/// `UNDOC zmm1 {k1}, zmm2/mt`
37663	///
37664	/// `MVEX.512.66.0F38.W0 6B /r`
37665	///
37666	/// `KNC`
37667	///
37668	/// `64-bit`
37669	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6B = 4709,
37670	/// `VPSUBRD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37671	///
37672	/// `MVEX.NDS.512.66.0F38.W0 6C /r`
37673	///
37674	/// `KNC`
37675	///
37676	/// `64-bit`
37677	MVEX_Vpsubrd_zmm_k1_zmm_zmmmt = 4710,
37678	/// `VSUBRPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37679	///
37680	/// `MVEX.NDS.512.66.0F38.W0 6D /r`
37681	///
37682	/// `KNC`
37683	///
37684	/// `64-bit`
37685	MVEX_Vsubrps_zmm_k1_zmm_zmmmt = 4711,
37686	/// `VSUBRPD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37687	///
37688	/// `MVEX.NDS.512.66.0F38.W1 6D /r`
37689	///
37690	/// `KNC`
37691	///
37692	/// `64-bit`
37693	MVEX_Vsubrpd_zmm_k1_zmm_zmmmt = 4712,
37694	/// `VPSBBRD zmm1 {k1}, k2, Si32(zmm3/mt)`
37695	///
37696	/// `MVEX.NDS.512.66.0F38.W0 6E /r`
37697	///
37698	/// `KNC`
37699	///
37700	/// `64-bit`
37701	MVEX_Vpsbbrd_zmm_k1_kr_zmmmt = 4713,
37702	/// `VPSUBRSETBD zmm1 {k1}, k2, Si32(zmm3/mt)`
37703	///
37704	/// `MVEX.NDS.512.66.0F38.W0 6F /r`
37705	///
37706	/// `KNC`
37707	///
37708	/// `64-bit`
37709	MVEX_Vpsubrsetbd_zmm_k1_kr_zmmmt = 4714,
37710	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37711	///
37712	/// `MVEX.NDS.512.66.0F38.W0 70 /r`
37713	///
37714	/// `KNC`
37715	///
37716	/// `64-bit`
37717	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_70 = 4715,
37718	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37719	///
37720	/// `MVEX.NDS.512.66.0F38.W0 71 /r`
37721	///
37722	/// `KNC`
37723	///
37724	/// `64-bit`
37725	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_71 = 4716,
37726	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37727	///
37728	/// `MVEX.NDS.512.66.0F38.W0 72 /r`
37729	///
37730	/// `KNC`
37731	///
37732	/// `64-bit`
37733	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_72 = 4717,
37734	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37735	///
37736	/// `MVEX.NDS.512.66.0F38.W0 73 /r`
37737	///
37738	/// `KNC`
37739	///
37740	/// `64-bit`
37741	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_73 = 4718,
37742	/// `VPCMPLTD k2 {k1}, zmm1, Si32(zmm2/mt)`
37743	///
37744	/// `MVEX.NDS.512.66.0F38.W0 74 /r`
37745	///
37746	/// `KNC`
37747	///
37748	/// `64-bit`
37749	MVEX_Vpcmpltd_kr_k1_zmm_zmmmt = 4719,
37750	/// `VSCALEPS zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37751	///
37752	/// `MVEX.NDS.512.66.0F38.W0 84 /r`
37753	///
37754	/// `KNC`
37755	///
37756	/// `64-bit`
37757	MVEX_Vscaleps_zmm_k1_zmm_zmmmt = 4720,
37758	/// `VPMULHUD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37759	///
37760	/// `MVEX.NDS.512.66.0F38.W0 86 /r`
37761	///
37762	/// `KNC`
37763	///
37764	/// `64-bit`
37765	MVEX_Vpmulhud_zmm_k1_zmm_zmmmt = 4721,
37766	/// `VPMULHD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
37767	///
37768	/// `MVEX.NDS.512.66.0F38.W0 87 /r`
37769	///
37770	/// `KNC`
37771	///
37772	/// `64-bit`
37773	MVEX_Vpmulhd_zmm_k1_zmm_zmmmt = 4722,
37774	/// `VPGATHERDD zmm1 {k1}, Ui32(mvt)`
37775	///
37776	/// `MVEX.512.66.0F38.W0 90 /vsib`
37777	///
37778	/// `KNC`
37779	///
37780	/// `64-bit`
37781	MVEX_Vpgatherdd_zmm_k1_mvt = 4723,
37782	/// `VPGATHERDQ zmm1 {k1}, Ui64(mvt)`
37783	///
37784	/// `MVEX.512.66.0F38.W1 90 /vsib`
37785	///
37786	/// `KNC`
37787	///
37788	/// `64-bit`
37789	MVEX_Vpgatherdq_zmm_k1_mvt = 4724,
37790	/// `VGATHERDPS zmm1 {k1}, Uf32(mvt)`
37791	///
37792	/// `MVEX.512.66.0F38.W0 92 /vsib`
37793	///
37794	/// `KNC`
37795	///
37796	/// `64-bit`
37797	MVEX_Vgatherdps_zmm_k1_mvt = 4725,
37798	/// `VGATHERDPD zmm1 {k1}, Uf64(mvt)`
37799	///
37800	/// `MVEX.512.66.0F38.W1 92 /vsib`
37801	///
37802	/// `KNC`
37803	///
37804	/// `64-bit`
37805	MVEX_Vgatherdpd_zmm_k1_mvt = 4726,
37806	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37807	///
37808	/// `MVEX.NDS.512.66.0F38.W0 94 /r`
37809	///
37810	/// `KNC`
37811	///
37812	/// `64-bit`
37813	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_94 = 4727,
37814	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
37815	///
37816	/// `MVEX.NDS.512.66.0F38.W1 94 /r`
37817	///
37818	/// `KNC`
37819	///
37820	/// `64-bit`
37821	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_94 = 4728,
37822	/// `VFMADD132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37823	///
37824	/// `MVEX.NDS.512.66.0F38.W0 98 /r`
37825	///
37826	/// `KNC`
37827	///
37828	/// `64-bit`
37829	MVEX_Vfmadd132ps_zmm_k1_zmm_zmmmt = 4729,
37830	/// `VFMADD132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37831	///
37832	/// `MVEX.NDS.512.66.0F38.W1 98 /r`
37833	///
37834	/// `KNC`
37835	///
37836	/// `64-bit`
37837	MVEX_Vfmadd132pd_zmm_k1_zmm_zmmmt = 4730,
37838	/// `VFMSUB132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37839	///
37840	/// `MVEX.NDS.512.66.0F38.W0 9A /r`
37841	///
37842	/// `KNC`
37843	///
37844	/// `64-bit`
37845	MVEX_Vfmsub132ps_zmm_k1_zmm_zmmmt = 4731,
37846	/// `VFMSUB132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37847	///
37848	/// `MVEX.NDS.512.66.0F38.W1 9A /r`
37849	///
37850	/// `KNC`
37851	///
37852	/// `64-bit`
37853	MVEX_Vfmsub132pd_zmm_k1_zmm_zmmmt = 4732,
37854	/// `VFNMADD132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37855	///
37856	/// `MVEX.NDS.512.66.0F38.W0 9C /r`
37857	///
37858	/// `KNC`
37859	///
37860	/// `64-bit`
37861	MVEX_Vfnmadd132ps_zmm_k1_zmm_zmmmt = 4733,
37862	/// `VFNMADD132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37863	///
37864	/// `MVEX.NDS.512.66.0F38.W1 9C /r`
37865	///
37866	/// `KNC`
37867	///
37868	/// `64-bit`
37869	MVEX_Vfnmadd132pd_zmm_k1_zmm_zmmmt = 4734,
37870	/// `VFNMSUB132PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37871	///
37872	/// `MVEX.NDS.512.66.0F38.W0 9E /r`
37873	///
37874	/// `KNC`
37875	///
37876	/// `64-bit`
37877	MVEX_Vfnmsub132ps_zmm_k1_zmm_zmmmt = 4735,
37878	/// `VFNMSUB132PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37879	///
37880	/// `MVEX.NDS.512.66.0F38.W1 9E /r`
37881	///
37882	/// `KNC`
37883	///
37884	/// `64-bit`
37885	MVEX_Vfnmsub132pd_zmm_k1_zmm_zmmmt = 4736,
37886	/// `VPSCATTERDD mvt {k1}, Di32(zmm1)`
37887	///
37888	/// `MVEX.512.66.0F38.W0 A0 /vsib`
37889	///
37890	/// `KNC`
37891	///
37892	/// `64-bit`
37893	MVEX_Vpscatterdd_mvt_k1_zmm = 4737,
37894	/// `VPSCATTERDQ mvt {k1}, Di64(zmm1)`
37895	///
37896	/// `MVEX.512.66.0F38.W1 A0 /vsib`
37897	///
37898	/// `KNC`
37899	///
37900	/// `64-bit`
37901	MVEX_Vpscatterdq_mvt_k1_zmm = 4738,
37902	/// `VSCATTERDPS mvt {k1}, Df32(zmm1)`
37903	///
37904	/// `MVEX.512.66.0F38.W0 A2 /vsib`
37905	///
37906	/// `KNC`
37907	///
37908	/// `64-bit`
37909	MVEX_Vscatterdps_mvt_k1_zmm = 4739,
37910	/// `VSCATTERDPD mvt {k1}, Df64(zmm1)`
37911	///
37912	/// `MVEX.512.66.0F38.W1 A2 /vsib`
37913	///
37914	/// `KNC`
37915	///
37916	/// `64-bit`
37917	MVEX_Vscatterdpd_mvt_k1_zmm = 4740,
37918	/// `VFMADD233PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37919	///
37920	/// `MVEX.NDS.512.66.0F38.W0 A4 /r`
37921	///
37922	/// `KNC`
37923	///
37924	/// `64-bit`
37925	MVEX_Vfmadd233ps_zmm_k1_zmm_zmmmt = 4741,
37926	/// `VFMADD213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37927	///
37928	/// `MVEX.NDS.512.66.0F38.W0 A8 /r`
37929	///
37930	/// `KNC`
37931	///
37932	/// `64-bit`
37933	MVEX_Vfmadd213ps_zmm_k1_zmm_zmmmt = 4742,
37934	/// `VFMADD213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37935	///
37936	/// `MVEX.NDS.512.66.0F38.W1 A8 /r`
37937	///
37938	/// `KNC`
37939	///
37940	/// `64-bit`
37941	MVEX_Vfmadd213pd_zmm_k1_zmm_zmmmt = 4743,
37942	/// `VFMSUB213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37943	///
37944	/// `MVEX.NDS.512.66.0F38.W0 AA /r`
37945	///
37946	/// `KNC`
37947	///
37948	/// `64-bit`
37949	MVEX_Vfmsub213ps_zmm_k1_zmm_zmmmt = 4744,
37950	/// `VFMSUB213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37951	///
37952	/// `MVEX.NDS.512.66.0F38.W1 AA /r`
37953	///
37954	/// `KNC`
37955	///
37956	/// `64-bit`
37957	MVEX_Vfmsub213pd_zmm_k1_zmm_zmmmt = 4745,
37958	/// `VFNMADD213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37959	///
37960	/// `MVEX.NDS.512.66.0F38.W0 AC /r`
37961	///
37962	/// `KNC`
37963	///
37964	/// `64-bit`
37965	MVEX_Vfnmadd213ps_zmm_k1_zmm_zmmmt = 4746,
37966	/// `VFNMADD213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37967	///
37968	/// `MVEX.NDS.512.66.0F38.W1 AC /r`
37969	///
37970	/// `KNC`
37971	///
37972	/// `64-bit`
37973	MVEX_Vfnmadd213pd_zmm_k1_zmm_zmmmt = 4747,
37974	/// `VFNMSUB213PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
37975	///
37976	/// `MVEX.NDS.512.66.0F38.W0 AE /r`
37977	///
37978	/// `KNC`
37979	///
37980	/// `64-bit`
37981	MVEX_Vfnmsub213ps_zmm_k1_zmm_zmmmt = 4748,
37982	/// `VFNMSUB213PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
37983	///
37984	/// `MVEX.NDS.512.66.0F38.W1 AE /r`
37985	///
37986	/// `KNC`
37987	///
37988	/// `64-bit`
37989	MVEX_Vfnmsub213pd_zmm_k1_zmm_zmmmt = 4749,
37990	/// `UNDOC zmm1 {k1}, mvt`
37991	///
37992	/// `MVEX.512.66.0F38.W0 B0 /vsib`
37993	///
37994	/// `KNC`
37995	///
37996	/// `64-bit`
37997	MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B0 = 4750,
37998	/// `UNDOC zmm1 {k1}, mvt`
37999	///
38000	/// `MVEX.512.66.0F38.W0 B2 /vsib`
38001	///
38002	/// `KNC`
38003	///
38004	/// `64-bit`
38005	MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B2 = 4751,
38006	/// `VPMADD233D zmm1 {k1}, zmm2, Si32(zmm3/mt)`
38007	///
38008	/// `MVEX.NDS.512.66.0F38.W0 B4 /r`
38009	///
38010	/// `KNC`
38011	///
38012	/// `64-bit`
38013	MVEX_Vpmadd233d_zmm_k1_zmm_zmmmt = 4752,
38014	/// `VPMADD231D zmm1 {k1}, zmm2, Si32(zmm3/mt)`
38015	///
38016	/// `MVEX.NDS.512.66.0F38.W0 B5 /r`
38017	///
38018	/// `KNC`
38019	///
38020	/// `64-bit`
38021	MVEX_Vpmadd231d_zmm_k1_zmm_zmmmt = 4753,
38022	/// `VFMADD231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
38023	///
38024	/// `MVEX.NDS.512.66.0F38.W0 B8 /r`
38025	///
38026	/// `KNC`
38027	///
38028	/// `64-bit`
38029	MVEX_Vfmadd231ps_zmm_k1_zmm_zmmmt = 4754,
38030	/// `VFMADD231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
38031	///
38032	/// `MVEX.NDS.512.66.0F38.W1 B8 /r`
38033	///
38034	/// `KNC`
38035	///
38036	/// `64-bit`
38037	MVEX_Vfmadd231pd_zmm_k1_zmm_zmmmt = 4755,
38038	/// `VFMSUB231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
38039	///
38040	/// `MVEX.NDS.512.66.0F38.W0 BA /r`
38041	///
38042	/// `KNC`
38043	///
38044	/// `64-bit`
38045	MVEX_Vfmsub231ps_zmm_k1_zmm_zmmmt = 4756,
38046	/// `VFMSUB231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
38047	///
38048	/// `MVEX.NDS.512.66.0F38.W1 BA /r`
38049	///
38050	/// `KNC`
38051	///
38052	/// `64-bit`
38053	MVEX_Vfmsub231pd_zmm_k1_zmm_zmmmt = 4757,
38054	/// `VFNMADD231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
38055	///
38056	/// `MVEX.NDS.512.66.0F38.W0 BC /r`
38057	///
38058	/// `KNC`
38059	///
38060	/// `64-bit`
38061	MVEX_Vfnmadd231ps_zmm_k1_zmm_zmmmt = 4758,
38062	/// `VFNMADD231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
38063	///
38064	/// `MVEX.NDS.512.66.0F38.W1 BC /r`
38065	///
38066	/// `KNC`
38067	///
38068	/// `64-bit`
38069	MVEX_Vfnmadd231pd_zmm_k1_zmm_zmmmt = 4759,
38070	/// `VFNMSUB231PS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
38071	///
38072	/// `MVEX.NDS.512.66.0F38.W0 BE /r`
38073	///
38074	/// `KNC`
38075	///
38076	/// `64-bit`
38077	MVEX_Vfnmsub231ps_zmm_k1_zmm_zmmmt = 4760,
38078	/// `VFNMSUB231PD zmm1 {k1}, zmm2, Sf64(zmm3/mt)`
38079	///
38080	/// `MVEX.NDS.512.66.0F38.W1 BE /r`
38081	///
38082	/// `KNC`
38083	///
38084	/// `64-bit`
38085	MVEX_Vfnmsub231pd_zmm_k1_zmm_zmmmt = 4761,
38086	/// `UNDOC zmm1 {k1}, mvt`
38087	///
38088	/// `MVEX.512.66.0F38.W0 C0 /vsib`
38089	///
38090	/// `KNC`
38091	///
38092	/// `64-bit`
38093	MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_C0 = 4762,
38094	/// `VGATHERPF0HINTDPS Uf32(mvt) {k1}`
38095	///
38096	/// `MVEX.512.66.0F38.W0 C6 /0 /vsib`
38097	///
38098	/// `KNC`
38099	///
38100	/// `64-bit`
38101	MVEX_Vgatherpf0hintdps_mvt_k1 = 4763,
38102	/// `VGATHERPF0HINTDPD Uf64(mvt) {k1}`
38103	///
38104	/// `MVEX.512.66.0F38.W1 C6 /0 /vsib`
38105	///
38106	/// `KNC`
38107	///
38108	/// `64-bit`
38109	MVEX_Vgatherpf0hintdpd_mvt_k1 = 4764,
38110	/// `VGATHERPF0DPS Uf32(mvt) {k1}`
38111	///
38112	/// `MVEX.512.66.0F38.W0 C6 /1 /vsib`
38113	///
38114	/// `KNC`
38115	///
38116	/// `64-bit`
38117	MVEX_Vgatherpf0dps_mvt_k1 = 4765,
38118	/// `VGATHERPF1DPS Uf32(mvt) {k1}`
38119	///
38120	/// `MVEX.512.66.0F38.W0 C6 /2 /vsib`
38121	///
38122	/// `KNC`
38123	///
38124	/// `64-bit`
38125	MVEX_Vgatherpf1dps_mvt_k1 = 4766,
38126	/// `VSCATTERPF0HINTDPS Uf32(mvt) {k1}`
38127	///
38128	/// `MVEX.512.66.0F38.W0 C6 /4 /vsib`
38129	///
38130	/// `KNC`
38131	///
38132	/// `64-bit`
38133	MVEX_Vscatterpf0hintdps_mvt_k1 = 4767,
38134	/// `VSCATTERPF0HINTDPD Uf64(mvt) {k1}`
38135	///
38136	/// `MVEX.512.66.0F38.W1 C6 /4 /vsib`
38137	///
38138	/// `KNC`
38139	///
38140	/// `64-bit`
38141	MVEX_Vscatterpf0hintdpd_mvt_k1 = 4768,
38142	/// `VSCATTERPF0DPS Uf32(mvt) {k1}`
38143	///
38144	/// `MVEX.512.66.0F38.W0 C6 /5 /vsib`
38145	///
38146	/// `KNC`
38147	///
38148	/// `64-bit`
38149	MVEX_Vscatterpf0dps_mvt_k1 = 4769,
38150	/// `VSCATTERPF1DPS Uf32(mvt) {k1}`
38151	///
38152	/// `MVEX.512.66.0F38.W0 C6 /6 /vsib`
38153	///
38154	/// `KNC`
38155	///
38156	/// `64-bit`
38157	MVEX_Vscatterpf1dps_mvt_k1 = 4770,
38158	/// `VEXP223PS zmm1 {k1}, zmm2/mt`
38159	///
38160	/// `MVEX.512.66.0F38.W0 C8 /r`
38161	///
38162	/// `KNC`
38163	///
38164	/// `64-bit`
38165	MVEX_Vexp223ps_zmm_k1_zmmmt = 4771,
38166	/// `VLOG2PS zmm1 {k1}, zmm2/mt`
38167	///
38168	/// `MVEX.512.66.0F38.W0 C9 /r`
38169	///
38170	/// `KNC`
38171	///
38172	/// `64-bit`
38173	MVEX_Vlog2ps_zmm_k1_zmmmt = 4772,
38174	/// `VRCP23PS zmm1 {k1}, zmm2/mt`
38175	///
38176	/// `MVEX.512.66.0F38.W0 CA /r`
38177	///
38178	/// `KNC`
38179	///
38180	/// `64-bit`
38181	MVEX_Vrcp23ps_zmm_k1_zmmmt = 4773,
38182	/// `VRSQRT23PS zmm1 {k1}, zmm2/mt`
38183	///
38184	/// `MVEX.512.66.0F38.W0 CB /r`
38185	///
38186	/// `KNC`
38187	///
38188	/// `64-bit`
38189	MVEX_Vrsqrt23ps_zmm_k1_zmmmt = 4774,
38190	/// `VADDSETSPS zmm1 {k1}, zmm2, Sf32(zmm3/mt)`
38191	///
38192	/// `MVEX.NDS.512.66.0F38.W0 CC /r`
38193	///
38194	/// `KNC`
38195	///
38196	/// `64-bit`
38197	MVEX_Vaddsetsps_zmm_k1_zmm_zmmmt = 4775,
38198	/// `VPADDSETSD zmm1 {k1}, zmm2, Si32(zmm3/mt)`
38199	///
38200	/// `MVEX.NDS.512.66.0F38.W0 CD /r`
38201	///
38202	/// `KNC`
38203	///
38204	/// `64-bit`
38205	MVEX_Vpaddsetsd_zmm_k1_zmm_zmmmt = 4776,
38206	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
38207	///
38208	/// `MVEX.NDS.512.66.0F38.W0 CE /r`
38209	///
38210	/// `KNC`
38211	///
38212	/// `64-bit`
38213	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CE = 4777,
38214	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
38215	///
38216	/// `MVEX.NDS.512.66.0F38.W1 CE /r`
38217	///
38218	/// `KNC`
38219	///
38220	/// `64-bit`
38221	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_CE = 4778,
38222	/// `UNDOC zmm1 {k1}, zmm2, zmm3/mt`
38223	///
38224	/// `MVEX.NDS.512.66.0F38.W0 CF /r`
38225	///
38226	/// `KNC`
38227	///
38228	/// `64-bit`
38229	MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CF = 4779,
38230	/// `VLOADUNPACKLD zmm1 {k1}, Ui32(mt)`
38231	///
38232	/// `MVEX.512.0F38.W0 D0 /r`
38233	///
38234	/// `KNC`
38235	///
38236	/// `64-bit`
38237	MVEX_Vloadunpackld_zmm_k1_mt = 4780,
38238	/// `VLOADUNPACKLQ zmm1 {k1}, Ui64(mt)`
38239	///
38240	/// `MVEX.512.0F38.W1 D0 /r`
38241	///
38242	/// `KNC`
38243	///
38244	/// `64-bit`
38245	MVEX_Vloadunpacklq_zmm_k1_mt = 4781,
38246	/// `VPACKSTORELD mt {k1}, Di32(zmm1)`
38247	///
38248	/// `MVEX.512.66.0F38.W0 D0 /r`
38249	///
38250	/// `KNC`
38251	///
38252	/// `64-bit`
38253	MVEX_Vpackstoreld_mt_k1_zmm = 4782,
38254	/// `VPACKSTORELQ mt {k1}, Di64(zmm1)`
38255	///
38256	/// `MVEX.512.66.0F38.W1 D0 /r`
38257	///
38258	/// `KNC`
38259	///
38260	/// `64-bit`
38261	MVEX_Vpackstorelq_mt_k1_zmm = 4783,
38262	/// `VLOADUNPACKLPS zmm1 {k1}, Uf32(mt)`
38263	///
38264	/// `MVEX.512.0F38.W0 D1 /r`
38265	///
38266	/// `KNC`
38267	///
38268	/// `64-bit`
38269	MVEX_Vloadunpacklps_zmm_k1_mt = 4784,
38270	/// `VLOADUNPACKLPD zmm1 {k1}, Uf64(mt)`
38271	///
38272	/// `MVEX.512.0F38.W1 D1 /r`
38273	///
38274	/// `KNC`
38275	///
38276	/// `64-bit`
38277	MVEX_Vloadunpacklpd_zmm_k1_mt = 4785,
38278	/// `VPACKSTORELPS mt {k1}, Df32(zmm1)`
38279	///
38280	/// `MVEX.512.66.0F38.W0 D1 /r`
38281	///
38282	/// `KNC`
38283	///
38284	/// `64-bit`
38285	MVEX_Vpackstorelps_mt_k1_zmm = 4786,
38286	/// `VPACKSTORELPD mt {k1}, Df64(zmm1)`
38287	///
38288	/// `MVEX.512.66.0F38.W1 D1 /r`
38289	///
38290	/// `KNC`
38291	///
38292	/// `64-bit`
38293	MVEX_Vpackstorelpd_mt_k1_zmm = 4787,
38294	/// `UNDOC zmm1 {k1}, zmm2/mt`
38295	///
38296	/// `MVEX.512.0F38.W0 D2 /r`
38297	///
38298	/// `KNC`
38299	///
38300	/// `64-bit`
38301	MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D2 = 4788,
38302	/// `UNDOC zmm1 {k1}, zmm2/mt`
38303	///
38304	/// `MVEX.512.66.0F38.W0 D2 /r`
38305	///
38306	/// `KNC`
38307	///
38308	/// `64-bit`
38309	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D2 = 4789,
38310	/// `UNDOC zmm1 {k1}, zmm2/mt`
38311	///
38312	/// `MVEX.512.0F38.W0 D3 /r`
38313	///
38314	/// `KNC`
38315	///
38316	/// `64-bit`
38317	MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D3 = 4790,
38318	/// `VLOADUNPACKHD zmm1 {k1}, Ui32(mt)`
38319	///
38320	/// `MVEX.512.0F38.W0 D4 /r`
38321	///
38322	/// `KNC`
38323	///
38324	/// `64-bit`
38325	MVEX_Vloadunpackhd_zmm_k1_mt = 4791,
38326	/// `VLOADUNPACKHQ zmm1 {k1}, Ui64(mt)`
38327	///
38328	/// `MVEX.512.0F38.W1 D4 /r`
38329	///
38330	/// `KNC`
38331	///
38332	/// `64-bit`
38333	MVEX_Vloadunpackhq_zmm_k1_mt = 4792,
38334	/// `VPACKSTOREHD mt {k1}, Di32(zmm1)`
38335	///
38336	/// `MVEX.512.66.0F38.W0 D4 /r`
38337	///
38338	/// `KNC`
38339	///
38340	/// `64-bit`
38341	MVEX_Vpackstorehd_mt_k1_zmm = 4793,
38342	/// `VPACKSTOREHQ mt {k1}, Di64(zmm1)`
38343	///
38344	/// `MVEX.512.66.0F38.W1 D4 /r`
38345	///
38346	/// `KNC`
38347	///
38348	/// `64-bit`
38349	MVEX_Vpackstorehq_mt_k1_zmm = 4794,
38350	/// `VLOADUNPACKHPS zmm1 {k1}, Uf32(mt)`
38351	///
38352	/// `MVEX.512.0F38.W0 D5 /r`
38353	///
38354	/// `KNC`
38355	///
38356	/// `64-bit`
38357	MVEX_Vloadunpackhps_zmm_k1_mt = 4795,
38358	/// `VLOADUNPACKHPD zmm1 {k1}, Uf64(mt)`
38359	///
38360	/// `MVEX.512.0F38.W1 D5 /r`
38361	///
38362	/// `KNC`
38363	///
38364	/// `64-bit`
38365	MVEX_Vloadunpackhpd_zmm_k1_mt = 4796,
38366	/// `VPACKSTOREHPS mt {k1}, Df32(zmm1)`
38367	///
38368	/// `MVEX.512.66.0F38.W0 D5 /r`
38369	///
38370	/// `KNC`
38371	///
38372	/// `64-bit`
38373	MVEX_Vpackstorehps_mt_k1_zmm = 4797,
38374	/// `VPACKSTOREHPD mt {k1}, Df64(zmm1)`
38375	///
38376	/// `MVEX.512.66.0F38.W1 D5 /r`
38377	///
38378	/// `KNC`
38379	///
38380	/// `64-bit`
38381	MVEX_Vpackstorehpd_mt_k1_zmm = 4798,
38382	/// `UNDOC zmm1 {k1}, zmm2/mt`
38383	///
38384	/// `MVEX.512.0F38.W0 D6 /r`
38385	///
38386	/// `KNC`
38387	///
38388	/// `64-bit`
38389	MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D6 = 4799,
38390	/// `UNDOC zmm1 {k1}, zmm2/mt`
38391	///
38392	/// `MVEX.512.66.0F38.W0 D6 /r`
38393	///
38394	/// `KNC`
38395	///
38396	/// `64-bit`
38397	MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D6 = 4800,
38398	/// `UNDOC zmm1 {k1}, zmm2/mt`
38399	///
38400	/// `MVEX.512.0F38.W0 D7 /r`
38401	///
38402	/// `KNC`
38403	///
38404	/// `64-bit`
38405	MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D7 = 4801,
38406	/// `VALIGND zmm1 {k1}, zmm2, zmm3/mt, imm8`
38407	///
38408	/// `MVEX.NDS.512.66.0F3A.W0 03 /r ib`
38409	///
38410	/// `KNC`
38411	///
38412	/// `64-bit`
38413	MVEX_Valignd_zmm_k1_zmm_zmmmt_imm8 = 4802,
38414	/// `VPERMF32X4 zmm1 {k1}, zmm2/mt, imm8`
38415	///
38416	/// `MVEX.512.66.0F3A.W0 07 /r ib`
38417	///
38418	/// `KNC`
38419	///
38420	/// `64-bit`
38421	MVEX_Vpermf32x4_zmm_k1_zmmmt_imm8 = 4803,
38422	/// `VPCMPUD k2 {k1}, zmm1, Si32(zmm2/mt), imm8`
38423	///
38424	/// `MVEX.NDS.512.66.0F3A.W0 1E /r ib`
38425	///
38426	/// `KNC`
38427	///
38428	/// `64-bit`
38429	MVEX_Vpcmpud_kr_k1_zmm_zmmmt_imm8 = 4804,
38430	/// `VPCMPD k2 {k1}, zmm1, Si32(zmm2/mt), imm8`
38431	///
38432	/// `MVEX.NDS.512.66.0F3A.W0 1F /r ib`
38433	///
38434	/// `KNC`
38435	///
38436	/// `64-bit`
38437	MVEX_Vpcmpd_kr_k1_zmm_zmmmt_imm8 = 4805,
38438	/// `VGETMANTPS zmm1 {k1}, Sf32(zmm2/mt), imm8`
38439	///
38440	/// `MVEX.512.66.0F3A.W0 26 /r ib`
38441	///
38442	/// `KNC`
38443	///
38444	/// `64-bit`
38445	MVEX_Vgetmantps_zmm_k1_zmmmt_imm8 = 4806,
38446	/// `VGETMANTPD zmm1 {k1}, Sf64(zmm2/mt), imm8`
38447	///
38448	/// `MVEX.512.66.0F3A.W1 26 /r ib`
38449	///
38450	/// `KNC`
38451	///
38452	/// `64-bit`
38453	MVEX_Vgetmantpd_zmm_k1_zmmmt_imm8 = 4807,
38454	/// `VRNDFXPNTPS zmm1 {k1}, Sf32(zmm2/mt), imm8`
38455	///
38456	/// `MVEX.512.66.0F3A.W0 52 /r ib`
38457	///
38458	/// `KNC`
38459	///
38460	/// `64-bit`
38461	MVEX_Vrndfxpntps_zmm_k1_zmmmt_imm8 = 4808,
38462	/// `VRNDFXPNTPD zmm1 {k1}, Sf64(zmm2/mt), imm8`
38463	///
38464	/// `MVEX.512.66.0F3A.W1 52 /r ib`
38465	///
38466	/// `KNC`
38467	///
38468	/// `64-bit`
38469	MVEX_Vrndfxpntpd_zmm_k1_zmmmt_imm8 = 4809,
38470	/// `VCVTFXPNTUDQ2PS zmm1 {k1}, Si32(zmm2/mt), imm8`
38471	///
38472	/// `MVEX.512.0F3A.W0 CA /r ib`
38473	///
38474	/// `KNC`
38475	///
38476	/// `64-bit`
38477	MVEX_Vcvtfxpntudq2ps_zmm_k1_zmmmt_imm8 = 4810,
38478	/// `VCVTFXPNTPS2UDQ zmm1 {k1}, Sf32(zmm2/mt), imm8`
38479	///
38480	/// `MVEX.512.66.0F3A.W0 CA /r ib`
38481	///
38482	/// `KNC`
38483	///
38484	/// `64-bit`
38485	MVEX_Vcvtfxpntps2udq_zmm_k1_zmmmt_imm8 = 4811,
38486	/// `VCVTFXPNTPD2UDQ zmm1 {k1}, Sf64(zmm2/mt), imm8`
38487	///
38488	/// `MVEX.512.F2.0F3A.W1 CA /r ib`
38489	///
38490	/// `KNC`
38491	///
38492	/// `64-bit`
38493	MVEX_Vcvtfxpntpd2udq_zmm_k1_zmmmt_imm8 = 4812,
38494	/// `VCVTFXPNTDQ2PS zmm1 {k1}, Si32(zmm2/mt), imm8`
38495	///
38496	/// `MVEX.512.0F3A.W0 CB /r ib`
38497	///
38498	/// `KNC`
38499	///
38500	/// `64-bit`
38501	MVEX_Vcvtfxpntdq2ps_zmm_k1_zmmmt_imm8 = 4813,
38502	/// `VCVTFXPNTPS2DQ zmm1 {k1}, Sf32(zmm2/mt), imm8`
38503	///
38504	/// `MVEX.512.66.0F3A.W0 CB /r ib`
38505	///
38506	/// `KNC`
38507	///
38508	/// `64-bit`
38509	MVEX_Vcvtfxpntps2dq_zmm_k1_zmmmt_imm8 = 4814,
38510	/// `UNDOC zmm1 {k1}, zmm2/mt, imm8`
38511	///
38512	/// `MVEX.512.66.0F3A.W0 D0 /r ib`
38513	///
38514	/// `KNC`
38515	///
38516	/// `64-bit`
38517	MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D0 = 4815,
38518	/// `UNDOC zmm1 {k1}, zmm2/mt, imm8`
38519	///
38520	/// `MVEX.512.66.0F3A.W0 D1 /r ib`
38521	///
38522	/// `KNC`
38523	///
38524	/// `64-bit`
38525	MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D1 = 4816,
38526	/// `VCVTFXPNTPD2DQ zmm1 {k1}, Sf64(zmm2/mt), imm8`
38527	///
38528	/// `MVEX.512.F2.0F3A.W1 E6 /r ib`
38529	///
38530	/// `KNC`
38531	///
38532	/// `64-bit`
38533	MVEX_Vcvtfxpntpd2dq_zmm_k1_zmmmt_imm8 = 4817,
38534	/// `UNDOC`
38535	///
38536	/// `a16 F3 0F A6 F0`
38537	///
38538	/// `PADLOCK_UNDOC`
38539	///
38540	/// `16/32-bit`
38541	Via_undoc_F30FA6F0_16 = 4818,
38542	/// `UNDOC`
38543	///
38544	/// `a32 F3 0F A6 F0`
38545	///
38546	/// `PADLOCK_UNDOC`
38547	///
38548	/// `16/32/64-bit`
38549	Via_undoc_F30FA6F0_32 = 4819,
38550	/// `UNDOC`
38551	///
38552	/// `a64 F3 0F A6 F0`
38553	///
38554	/// `PADLOCK_UNDOC`
38555	///
38556	/// `64-bit`
38557	Via_undoc_F30FA6F0_64 = 4820,
38558	/// `UNDOC`
38559	///
38560	/// `a16 F3 0F A6 F8`
38561	///
38562	/// `PADLOCK_UNDOC`
38563	///
38564	/// `16/32-bit`
38565	Via_undoc_F30FA6F8_16 = 4821,
38566	/// `UNDOC`
38567	///
38568	/// `a32 F3 0F A6 F8`
38569	///
38570	/// `PADLOCK_UNDOC`
38571	///
38572	/// `16/32/64-bit`
38573	Via_undoc_F30FA6F8_32 = 4822,
38574	/// `UNDOC`
38575	///
38576	/// `a64 F3 0F A6 F8`
38577	///
38578	/// `PADLOCK_UNDOC`
38579	///
38580	/// `64-bit`
38581	Via_undoc_F30FA6F8_64 = 4823,
38582	/// `XSHA512`
38583	///
38584	/// `a16 F3 0F A6 E0`
38585	///
38586	/// `PADLOCK_PHE`
38587	///
38588	/// `16/32-bit`
38589	Xsha512_16 = 4824,
38590	/// `XSHA512`
38591	///
38592	/// `a32 F3 0F A6 E0`
38593	///
38594	/// `PADLOCK_PHE`
38595	///
38596	/// `16/32/64-bit`
38597	Xsha512_32 = 4825,
38598	/// `XSHA512`
38599	///
38600	/// `a64 F3 0F A6 E0`
38601	///
38602	/// `PADLOCK_PHE`
38603	///
38604	/// `64-bit`
38605	Xsha512_64 = 4826,
38606	/// `XSTORE_ALT`
38607	///
38608	/// `a16 F3 0F A7 F8`
38609	///
38610	/// `PADLOCK_RNG`
38611	///
38612	/// `16/32-bit`
38613	Xstore_alt_16 = 4827,
38614	/// `XSTORE_ALT`
38615	///
38616	/// `a32 F3 0F A7 F8`
38617	///
38618	/// `PADLOCK_RNG`
38619	///
38620	/// `16/32/64-bit`
38621	Xstore_alt_32 = 4828,
38622	/// `XSTORE_ALT`
38623	///
38624	/// `a64 F3 0F A7 F8`
38625	///
38626	/// `PADLOCK_RNG`
38627	///
38628	/// `64-bit`
38629	Xstore_alt_64 = 4829,
38630	/// `XSHA512_ALT`
38631	///
38632	/// `a16 F3 0F A6 D8`
38633	///
38634	/// `PADLOCK_PHE`
38635	///
38636	/// `16/32-bit`
38637	Xsha512_alt_16 = 4830,
38638	/// `XSHA512_ALT`
38639	///
38640	/// `a32 F3 0F A6 D8`
38641	///
38642	/// `PADLOCK_PHE`
38643	///
38644	/// `16/32/64-bit`
38645	Xsha512_alt_32 = 4831,
38646	/// `XSHA512_ALT`
38647	///
38648	/// `a64 F3 0F A6 D8`
38649	///
38650	/// `PADLOCK_PHE`
38651	///
38652	/// `64-bit`
38653	Xsha512_alt_64 = 4832,
38654	/// A zero-sized instruction. Can be used as a label.
38655	Zero_bytes = 4833,
38656	/// `WRMSRNS`
38657	///
38658	/// `NP 0F 01 C6`
38659	///
38660	/// `WRMSRNS`
38661	///
38662	/// `16/32/64-bit`
38663	Wrmsrns = 4834,
38664	/// `WRMSRLIST`
38665	///
38666	/// `F3 0F 01 C6`
38667	///
38668	/// `MSRLIST`
38669	///
38670	/// `64-bit`
38671	Wrmsrlist = 4835,
38672	/// `RDMSRLIST`
38673	///
38674	/// `F2 0F 01 C6`
38675	///
38676	/// `MSRLIST`
38677	///
38678	/// `64-bit`
38679	Rdmsrlist = 4836,
38680	/// `RMPQUERY`
38681	///
38682	/// `F3 0F 01 FD`
38683	///
38684	/// `RMPQUERY`
38685	///
38686	/// `64-bit`
38687	Rmpquery = 4837,
38688	/// `PREFETCHIT1 m8`
38689	///
38690	/// `0F 18 /6`
38691	///
38692	/// `PREFETCHITI`
38693	///
38694	/// `16/32/64-bit`
38695	Prefetchit1_m8 = 4838,
38696	/// `PREFETCHIT0 m8`
38697	///
38698	/// `0F 18 /7`
38699	///
38700	/// `PREFETCHITI`
38701	///
38702	/// `16/32/64-bit`
38703	Prefetchit0_m8 = 4839,
38704	/// `AADD m32, r32`
38705	///
38706	/// `NP 0F 38 FC !(11):rrr:bbb`
38707	///
38708	/// `RAO-INT`
38709	///
38710	/// `16/32/64-bit`
38711	Aadd_m32_r32 = 4840,
38712	/// `AADD m64, r64`
38713	///
38714	/// `NP o64 0F 38 FC !(11):rrr:bbb`
38715	///
38716	/// `RAO-INT`
38717	///
38718	/// `64-bit`
38719	Aadd_m64_r64 = 4841,
38720	/// `AAND m32, r32`
38721	///
38722	/// `66 0F 38 FC !(11):rrr:bbb`
38723	///
38724	/// `RAO-INT`
38725	///
38726	/// `16/32/64-bit`
38727	Aand_m32_r32 = 4842,
38728	/// `AAND m64, r64`
38729	///
38730	/// `66 o64 0F 38 FC !(11):rrr:bbb`
38731	///
38732	/// `RAO-INT`
38733	///
38734	/// `64-bit`
38735	Aand_m64_r64 = 4843,
38736	/// `AXOR m32, r32`
38737	///
38738	/// `F3 0F 38 FC !(11):rrr:bbb`
38739	///
38740	/// `RAO-INT`
38741	///
38742	/// `16/32/64-bit`
38743	Axor_m32_r32 = 4844,
38744	/// `AXOR m64, r64`
38745	///
38746	/// `F3 o64 0F 38 FC !(11):rrr:bbb`
38747	///
38748	/// `RAO-INT`
38749	///
38750	/// `64-bit`
38751	Axor_m64_r64 = 4845,
38752	/// `AOR m32, r32`
38753	///
38754	/// `F2 0F 38 FC !(11):rrr:bbb`
38755	///
38756	/// `RAO-INT`
38757	///
38758	/// `16/32/64-bit`
38759	Aor_m32_r32 = 4846,
38760	/// `AOR m64, r64`
38761	///
38762	/// `F2 o64 0F 38 FC !(11):rrr:bbb`
38763	///
38764	/// `RAO-INT`
38765	///
38766	/// `64-bit`
38767	Aor_m64_r64 = 4847,
38768	/// `VPDPBUUD xmm1, xmm2, xmm3/m128`
38769	///
38770	/// `VEX.128.0F38.W0 50 /r`
38771	///
38772	/// `AVX-VNNI-INT8`
38773	///
38774	/// `16/32/64-bit`
38775	VEX_Vpdpbuud_xmm_xmm_xmmm128 = 4848,
38776	/// `VPDPBUUD ymm1, ymm2, ymm3/m256`
38777	///
38778	/// `VEX.256.0F38.W0 50 /r`
38779	///
38780	/// `AVX-VNNI-INT8`
38781	///
38782	/// `16/32/64-bit`
38783	VEX_Vpdpbuud_ymm_ymm_ymmm256 = 4849,
38784	/// `VPDPBSUD xmm1, xmm2, xmm3/m128`
38785	///
38786	/// `VEX.128.F3.0F38.W0 50 /r`
38787	///
38788	/// `AVX-VNNI-INT8`
38789	///
38790	/// `16/32/64-bit`
38791	VEX_Vpdpbsud_xmm_xmm_xmmm128 = 4850,
38792	/// `VPDPBSUD ymm1, ymm2, ymm3/m256`
38793	///
38794	/// `VEX.256.F3.0F38.W0 50 /r`
38795	///
38796	/// `AVX-VNNI-INT8`
38797	///
38798	/// `16/32/64-bit`
38799	VEX_Vpdpbsud_ymm_ymm_ymmm256 = 4851,
38800	/// `VPDPBSSD xmm1, xmm2, xmm3/m128`
38801	///
38802	/// `VEX.128.F2.0F38.W0 50 /r`
38803	///
38804	/// `AVX-VNNI-INT8`
38805	///
38806	/// `16/32/64-bit`
38807	VEX_Vpdpbssd_xmm_xmm_xmmm128 = 4852,
38808	/// `VPDPBSSD ymm1, ymm2, ymm3/m256`
38809	///
38810	/// `VEX.256.F2.0F38.W0 50 /r`
38811	///
38812	/// `AVX-VNNI-INT8`
38813	///
38814	/// `16/32/64-bit`
38815	VEX_Vpdpbssd_ymm_ymm_ymmm256 = 4853,
38816	/// `VPDPBUUDS xmm1, xmm2, xmm3/m128`
38817	///
38818	/// `VEX.128.0F38.W0 51 /r`
38819	///
38820	/// `AVX-VNNI-INT8`
38821	///
38822	/// `16/32/64-bit`
38823	VEX_Vpdpbuuds_xmm_xmm_xmmm128 = 4854,
38824	/// `VPDPBUUDS ymm1, ymm2, ymm3/m256`
38825	///
38826	/// `VEX.256.0F38.W0 51 /r`
38827	///
38828	/// `AVX-VNNI-INT8`
38829	///
38830	/// `16/32/64-bit`
38831	VEX_Vpdpbuuds_ymm_ymm_ymmm256 = 4855,
38832	/// `VPDPBSUDS xmm1, xmm2, xmm3/m128`
38833	///
38834	/// `VEX.128.F3.0F38.W0 51 /r`
38835	///
38836	/// `AVX-VNNI-INT8`
38837	///
38838	/// `16/32/64-bit`
38839	VEX_Vpdpbsuds_xmm_xmm_xmmm128 = 4856,
38840	/// `VPDPBSUDS ymm1, ymm2, ymm3/m256`
38841	///
38842	/// `VEX.256.F3.0F38.W0 51 /r`
38843	///
38844	/// `AVX-VNNI-INT8`
38845	///
38846	/// `16/32/64-bit`
38847	VEX_Vpdpbsuds_ymm_ymm_ymmm256 = 4857,
38848	/// `VPDPBSSDS xmm1, xmm2, xmm3/m128`
38849	///
38850	/// `VEX.128.F2.0F38.W0 51 /r`
38851	///
38852	/// `AVX-VNNI-INT8`
38853	///
38854	/// `16/32/64-bit`
38855	VEX_Vpdpbssds_xmm_xmm_xmmm128 = 4858,
38856	/// `VPDPBSSDS ymm1, ymm2, ymm3/m256`
38857	///
38858	/// `VEX.256.F2.0F38.W0 51 /r`
38859	///
38860	/// `AVX-VNNI-INT8`
38861	///
38862	/// `16/32/64-bit`
38863	VEX_Vpdpbssds_ymm_ymm_ymmm256 = 4859,
38864	/// `TDPFP16PS tmm1, tmm2, tmm3`
38865	///
38866	/// `VEX.128.F2.0F38.W0 5C 11:rrr:bbb`
38867	///
38868	/// `AMX-FP16`
38869	///
38870	/// `64-bit`
38871	VEX_Tdpfp16ps_tmm_tmm_tmm = 4860,
38872	/// `VCVTNEPS2BF16 xmm1, xmm2/m128`
38873	///
38874	/// `VEX.128.F3.0F38.W0 72 /r`
38875	///
38876	/// `AVX-NE-CONVERT`
38877	///
38878	/// `16/32/64-bit`
38879	VEX_Vcvtneps2bf16_xmm_xmmm128 = 4861,
38880	/// `VCVTNEPS2BF16 xmm1, ymm2/m256`
38881	///
38882	/// `VEX.256.F3.0F38.W0 72 /r`
38883	///
38884	/// `AVX-NE-CONVERT`
38885	///
38886	/// `16/32/64-bit`
38887	VEX_Vcvtneps2bf16_xmm_ymmm256 = 4862,
38888	/// `VCVTNEOPH2PS xmm1, m128`
38889	///
38890	/// `VEX.128.0F38.W0 B0 !(11):rrr:bbb`
38891	///
38892	/// `AVX-NE-CONVERT`
38893	///
38894	/// `16/32/64-bit`
38895	VEX_Vcvtneoph2ps_xmm_m128 = 4863,
38896	/// `VCVTNEOPH2PS ymm1, m256`
38897	///
38898	/// `VEX.256.0F38.W0 B0 !(11):rrr:bbb`
38899	///
38900	/// `AVX-NE-CONVERT`
38901	///
38902	/// `16/32/64-bit`
38903	VEX_Vcvtneoph2ps_ymm_m256 = 4864,
38904	/// `VCVTNEEPH2PS xmm1, m128`
38905	///
38906	/// `VEX.128.66.0F38.W0 B0 !(11):rrr:bbb`
38907	///
38908	/// `AVX-NE-CONVERT`
38909	///
38910	/// `16/32/64-bit`
38911	VEX_Vcvtneeph2ps_xmm_m128 = 4865,
38912	/// `VCVTNEEPH2PS ymm1, m256`
38913	///
38914	/// `VEX.256.66.0F38.W0 B0 !(11):rrr:bbb`
38915	///
38916	/// `AVX-NE-CONVERT`
38917	///
38918	/// `16/32/64-bit`
38919	VEX_Vcvtneeph2ps_ymm_m256 = 4866,
38920	/// `VCVTNEEBF162PS xmm1, m128`
38921	///
38922	/// `VEX.128.F3.0F38.W0 B0 !(11):rrr:bbb`
38923	///
38924	/// `AVX-NE-CONVERT`
38925	///
38926	/// `16/32/64-bit`
38927	VEX_Vcvtneebf162ps_xmm_m128 = 4867,
38928	/// `VCVTNEEBF162PS ymm1, m256`
38929	///
38930	/// `VEX.256.F3.0F38.W0 B0 !(11):rrr:bbb`
38931	///
38932	/// `AVX-NE-CONVERT`
38933	///
38934	/// `16/32/64-bit`
38935	VEX_Vcvtneebf162ps_ymm_m256 = 4868,
38936	/// `VCVTNEOBF162PS xmm1, m128`
38937	///
38938	/// `VEX.128.F2.0F38.W0 B0 !(11):rrr:bbb`
38939	///
38940	/// `AVX-NE-CONVERT`
38941	///
38942	/// `16/32/64-bit`
38943	VEX_Vcvtneobf162ps_xmm_m128 = 4869,
38944	/// `VCVTNEOBF162PS ymm1, m256`
38945	///
38946	/// `VEX.256.F2.0F38.W0 B0 !(11):rrr:bbb`
38947	///
38948	/// `AVX-NE-CONVERT`
38949	///
38950	/// `16/32/64-bit`
38951	VEX_Vcvtneobf162ps_ymm_m256 = 4870,
38952	/// `VBCSTNESH2PS xmm1, m16`
38953	///
38954	/// `VEX.128.66.0F38.W0 B1 !(11):rrr:bbb`
38955	///
38956	/// `AVX-NE-CONVERT`
38957	///
38958	/// `16/32/64-bit`
38959	VEX_Vbcstnesh2ps_xmm_m16 = 4871,
38960	/// `VBCSTNESH2PS ymm1, m16`
38961	///
38962	/// `VEX.256.66.0F38.W0 B1 !(11):rrr:bbb`
38963	///
38964	/// `AVX-NE-CONVERT`
38965	///
38966	/// `16/32/64-bit`
38967	VEX_Vbcstnesh2ps_ymm_m16 = 4872,
38968	/// `VBCSTNEBF162PS xmm1, m16`
38969	///
38970	/// `VEX.128.F3.0F38.W0 B1 !(11):rrr:bbb`
38971	///
38972	/// `AVX-NE-CONVERT`
38973	///
38974	/// `16/32/64-bit`
38975	VEX_Vbcstnebf162ps_xmm_m16 = 4873,
38976	/// `VBCSTNEBF162PS ymm1, m16`
38977	///
38978	/// `VEX.256.F3.0F38.W0 B1 !(11):rrr:bbb`
38979	///
38980	/// `AVX-NE-CONVERT`
38981	///
38982	/// `16/32/64-bit`
38983	VEX_Vbcstnebf162ps_ymm_m16 = 4874,
38984	/// `VPMADD52LUQ xmm1, xmm2, xmm3/m128`
38985	///
38986	/// `VEX.128.66.0F38.W1 B4 /r`
38987	///
38988	/// `AVX-IFMA`
38989	///
38990	/// `16/32/64-bit`
38991	VEX_Vpmadd52luq_xmm_xmm_xmmm128 = 4875,
38992	/// `VPMADD52LUQ ymm1, ymm2, ymm3/m256`
38993	///
38994	/// `VEX.256.66.0F38.W1 B4 /r`
38995	///
38996	/// `AVX-IFMA`
38997	///
38998	/// `16/32/64-bit`
38999	VEX_Vpmadd52luq_ymm_ymm_ymmm256 = 4876,
39000	/// `VPMADD52HUQ xmm1, xmm2, xmm3/m128`
39001	///
39002	/// `VEX.128.66.0F38.W1 B5 /r`
39003	///
39004	/// `AVX-IFMA`
39005	///
39006	/// `16/32/64-bit`
39007	VEX_Vpmadd52huq_xmm_xmm_xmmm128 = 4877,
39008	/// `VPMADD52HUQ ymm1, ymm2, ymm3/m256`
39009	///
39010	/// `VEX.256.66.0F38.W1 B5 /r`
39011	///
39012	/// `AVX-IFMA`
39013	///
39014	/// `16/32/64-bit`
39015	VEX_Vpmadd52huq_ymm_ymm_ymmm256 = 4878,
39016	/// `CMPOXADD m32, r32, r32`
39017	///
39018	/// `VEX.128.66.0F38.W0 E0 !(11):rrr:bbb`
39019	///
39020	/// `CMPCCXADD`
39021	///
39022	/// `64-bit`
39023	VEX_Cmpoxadd_m32_r32_r32 = 4879,
39024	/// `CMPOXADD m64, r64, r64`
39025	///
39026	/// `VEX.128.66.0F38.W1 E0 !(11):rrr:bbb`
39027	///
39028	/// `CMPCCXADD`
39029	///
39030	/// `64-bit`
39031	VEX_Cmpoxadd_m64_r64_r64 = 4880,
39032	/// `CMPNOXADD m32, r32, r32`
39033	///
39034	/// `VEX.128.66.0F38.W0 E1 !(11):rrr:bbb`
39035	///
39036	/// `CMPCCXADD`
39037	///
39038	/// `64-bit`
39039	VEX_Cmpnoxadd_m32_r32_r32 = 4881,
39040	/// `CMPNOXADD m64, r64, r64`
39041	///
39042	/// `VEX.128.66.0F38.W1 E1 !(11):rrr:bbb`
39043	///
39044	/// `CMPCCXADD`
39045	///
39046	/// `64-bit`
39047	VEX_Cmpnoxadd_m64_r64_r64 = 4882,
39048	/// `CMPBXADD m32, r32, r32`
39049	///
39050	/// `VEX.128.66.0F38.W0 E2 !(11):rrr:bbb`
39051	///
39052	/// `CMPCCXADD`
39053	///
39054	/// `64-bit`
39055	VEX_Cmpbxadd_m32_r32_r32 = 4883,
39056	/// `CMPBXADD m64, r64, r64`
39057	///
39058	/// `VEX.128.66.0F38.W1 E2 !(11):rrr:bbb`
39059	///
39060	/// `CMPCCXADD`
39061	///
39062	/// `64-bit`
39063	VEX_Cmpbxadd_m64_r64_r64 = 4884,
39064	/// `CMPNBXADD m32, r32, r32`
39065	///
39066	/// `VEX.128.66.0F38.W0 E3 !(11):rrr:bbb`
39067	///
39068	/// `CMPCCXADD`
39069	///
39070	/// `64-bit`
39071	VEX_Cmpnbxadd_m32_r32_r32 = 4885,
39072	/// `CMPNBXADD m64, r64, r64`
39073	///
39074	/// `VEX.128.66.0F38.W1 E3 !(11):rrr:bbb`
39075	///
39076	/// `CMPCCXADD`
39077	///
39078	/// `64-bit`
39079	VEX_Cmpnbxadd_m64_r64_r64 = 4886,
39080	/// `CMPZXADD m32, r32, r32`
39081	///
39082	/// `VEX.128.66.0F38.W0 E4 !(11):rrr:bbb`
39083	///
39084	/// `CMPCCXADD`
39085	///
39086	/// `64-bit`
39087	VEX_Cmpzxadd_m32_r32_r32 = 4887,
39088	/// `CMPZXADD m64, r64, r64`
39089	///
39090	/// `VEX.128.66.0F38.W1 E4 !(11):rrr:bbb`
39091	///
39092	/// `CMPCCXADD`
39093	///
39094	/// `64-bit`
39095	VEX_Cmpzxadd_m64_r64_r64 = 4888,
39096	/// `CMPNZXADD m32, r32, r32`
39097	///
39098	/// `VEX.128.66.0F38.W0 E5 !(11):rrr:bbb`
39099	///
39100	/// `CMPCCXADD`
39101	///
39102	/// `64-bit`
39103	VEX_Cmpnzxadd_m32_r32_r32 = 4889,
39104	/// `CMPNZXADD m64, r64, r64`
39105	///
39106	/// `VEX.128.66.0F38.W1 E5 !(11):rrr:bbb`
39107	///
39108	/// `CMPCCXADD`
39109	///
39110	/// `64-bit`
39111	VEX_Cmpnzxadd_m64_r64_r64 = 4890,
39112	/// `CMPBEXADD m32, r32, r32`
39113	///
39114	/// `VEX.128.66.0F38.W0 E6 !(11):rrr:bbb`
39115	///
39116	/// `CMPCCXADD`
39117	///
39118	/// `64-bit`
39119	VEX_Cmpbexadd_m32_r32_r32 = 4891,
39120	/// `CMPBEXADD m64, r64, r64`
39121	///
39122	/// `VEX.128.66.0F38.W1 E6 !(11):rrr:bbb`
39123	///
39124	/// `CMPCCXADD`
39125	///
39126	/// `64-bit`
39127	VEX_Cmpbexadd_m64_r64_r64 = 4892,
39128	/// `CMPNBEXADD m32, r32, r32`
39129	///
39130	/// `VEX.128.66.0F38.W0 E7 !(11):rrr:bbb`
39131	///
39132	/// `CMPCCXADD`
39133	///
39134	/// `64-bit`
39135	VEX_Cmpnbexadd_m32_r32_r32 = 4893,
39136	/// `CMPNBEXADD m64, r64, r64`
39137	///
39138	/// `VEX.128.66.0F38.W1 E7 !(11):rrr:bbb`
39139	///
39140	/// `CMPCCXADD`
39141	///
39142	/// `64-bit`
39143	VEX_Cmpnbexadd_m64_r64_r64 = 4894,
39144	/// `CMPSXADD m32, r32, r32`
39145	///
39146	/// `VEX.128.66.0F38.W0 E8 !(11):rrr:bbb`
39147	///
39148	/// `CMPCCXADD`
39149	///
39150	/// `64-bit`
39151	VEX_Cmpsxadd_m32_r32_r32 = 4895,
39152	/// `CMPSXADD m64, r64, r64`
39153	///
39154	/// `VEX.128.66.0F38.W1 E8 !(11):rrr:bbb`
39155	///
39156	/// `CMPCCXADD`
39157	///
39158	/// `64-bit`
39159	VEX_Cmpsxadd_m64_r64_r64 = 4896,
39160	/// `CMPNSXADD m32, r32, r32`
39161	///
39162	/// `VEX.128.66.0F38.W0 E9 !(11):rrr:bbb`
39163	///
39164	/// `CMPCCXADD`
39165	///
39166	/// `64-bit`
39167	VEX_Cmpnsxadd_m32_r32_r32 = 4897,
39168	/// `CMPNSXADD m64, r64, r64`
39169	///
39170	/// `VEX.128.66.0F38.W1 E9 !(11):rrr:bbb`
39171	///
39172	/// `CMPCCXADD`
39173	///
39174	/// `64-bit`
39175	VEX_Cmpnsxadd_m64_r64_r64 = 4898,
39176	/// `CMPPXADD m32, r32, r32`
39177	///
39178	/// `VEX.128.66.0F38.W0 EA !(11):rrr:bbb`
39179	///
39180	/// `CMPCCXADD`
39181	///
39182	/// `64-bit`
39183	VEX_Cmppxadd_m32_r32_r32 = 4899,
39184	/// `CMPPXADD m64, r64, r64`
39185	///
39186	/// `VEX.128.66.0F38.W1 EA !(11):rrr:bbb`
39187	///
39188	/// `CMPCCXADD`
39189	///
39190	/// `64-bit`
39191	VEX_Cmppxadd_m64_r64_r64 = 4900,
39192	/// `CMPNPXADD m32, r32, r32`
39193	///
39194	/// `VEX.128.66.0F38.W0 EB !(11):rrr:bbb`
39195	///
39196	/// `CMPCCXADD`
39197	///
39198	/// `64-bit`
39199	VEX_Cmpnpxadd_m32_r32_r32 = 4901,
39200	/// `CMPNPXADD m64, r64, r64`
39201	///
39202	/// `VEX.128.66.0F38.W1 EB !(11):rrr:bbb`
39203	///
39204	/// `CMPCCXADD`
39205	///
39206	/// `64-bit`
39207	VEX_Cmpnpxadd_m64_r64_r64 = 4902,
39208	/// `CMPLXADD m32, r32, r32`
39209	///
39210	/// `VEX.128.66.0F38.W0 EC !(11):rrr:bbb`
39211	///
39212	/// `CMPCCXADD`
39213	///
39214	/// `64-bit`
39215	VEX_Cmplxadd_m32_r32_r32 = 4903,
39216	/// `CMPLXADD m64, r64, r64`
39217	///
39218	/// `VEX.128.66.0F38.W1 EC !(11):rrr:bbb`
39219	///
39220	/// `CMPCCXADD`
39221	///
39222	/// `64-bit`
39223	VEX_Cmplxadd_m64_r64_r64 = 4904,
39224	/// `CMPNLXADD m32, r32, r32`
39225	///
39226	/// `VEX.128.66.0F38.W0 ED !(11):rrr:bbb`
39227	///
39228	/// `CMPCCXADD`
39229	///
39230	/// `64-bit`
39231	VEX_Cmpnlxadd_m32_r32_r32 = 4905,
39232	/// `CMPNLXADD m64, r64, r64`
39233	///
39234	/// `VEX.128.66.0F38.W1 ED !(11):rrr:bbb`
39235	///
39236	/// `CMPCCXADD`
39237	///
39238	/// `64-bit`
39239	VEX_Cmpnlxadd_m64_r64_r64 = 4906,
39240	/// `CMPLEXADD m32, r32, r32`
39241	///
39242	/// `VEX.128.66.0F38.W0 EE !(11):rrr:bbb`
39243	///
39244	/// `CMPCCXADD`
39245	///
39246	/// `64-bit`
39247	VEX_Cmplexadd_m32_r32_r32 = 4907,
39248	/// `CMPLEXADD m64, r64, r64`
39249	///
39250	/// `VEX.128.66.0F38.W1 EE !(11):rrr:bbb`
39251	///
39252	/// `CMPCCXADD`
39253	///
39254	/// `64-bit`
39255	VEX_Cmplexadd_m64_r64_r64 = 4908,
39256	/// `CMPNLEXADD m32, r32, r32`
39257	///
39258	/// `VEX.128.66.0F38.W0 EF !(11):rrr:bbb`
39259	///
39260	/// `CMPCCXADD`
39261	///
39262	/// `64-bit`
39263	VEX_Cmpnlexadd_m32_r32_r32 = 4909,
39264	/// `CMPNLEXADD m64, r64, r64`
39265	///
39266	/// `VEX.128.66.0F38.W1 EF !(11):rrr:bbb`
39267	///
39268	/// `CMPCCXADD`
39269	///
39270	/// `64-bit`
39271	VEX_Cmpnlexadd_m64_r64_r64 = 4910,
39272	/// `TCMMRLFP16PS tmm1, tmm2, tmm3`
39273	///
39274	/// `VEX.128.0F38.W0 6C 11:rrr:bbb`
39275	///
39276	/// `AMX-COMPLEX`
39277	///
39278	/// `64-bit`
39279	VEX_Tcmmrlfp16ps_tmm_tmm_tmm = 4911,
39280	/// `TCMMIMFP16PS tmm1, tmm2, tmm3`
39281	///
39282	/// `VEX.128.66.0F38.W0 6C 11:rrr:bbb`
39283	///
39284	/// `AMX-COMPLEX`
39285	///
39286	/// `64-bit`
39287	VEX_Tcmmimfp16ps_tmm_tmm_tmm = 4912,
39288	/// `PBNDKB`
39289	///
39290	/// `NP 0F 01 C7`
39291	///
39292	/// `TSE`
39293	///
39294	/// `64-bit`
39295	Pbndkb = 4913,
39296	/// `VSHA512RNDS2 ymm1, ymm2, xmm3`
39297	///
39298	/// `VEX.256.F2.0F38.W0 CB 11:rrr:bbb`
39299	///
39300	/// `AVX and SHA512`
39301	///
39302	/// `16/32/64-bit`
39303	VEX_Vsha512rnds2_ymm_ymm_xmm = 4914,
39304	/// `VSHA512MSG1 ymm1, xmm2`
39305	///
39306	/// `VEX.256.F2.0F38.W0 CC 11:rrr:bbb`
39307	///
39308	/// `AVX and SHA512`
39309	///
39310	/// `16/32/64-bit`
39311	VEX_Vsha512msg1_ymm_xmm = 4915,
39312	/// `VSHA512MSG2 ymm1, ymm2`
39313	///
39314	/// `VEX.256.F2.0F38.W0 CD 11:rrr:bbb`
39315	///
39316	/// `AVX and SHA512`
39317	///
39318	/// `16/32/64-bit`
39319	VEX_Vsha512msg2_ymm_ymm = 4916,
39320	/// `VPDPWUUD xmm1, xmm2, xmm3/m128`
39321	///
39322	/// `VEX.128.0F38.W0 D2 /r`
39323	///
39324	/// `AVX-VNNI-INT16`
39325	///
39326	/// `16/32/64-bit`
39327	VEX_Vpdpwuud_xmm_xmm_xmmm128 = 4917,
39328	/// `VPDPWUUD ymm1, ymm2, ymm3/m256`
39329	///
39330	/// `VEX.256.0F38.W0 D2 /r`
39331	///
39332	/// `AVX-VNNI-INT16`
39333	///
39334	/// `16/32/64-bit`
39335	VEX_Vpdpwuud_ymm_ymm_ymmm256 = 4918,
39336	/// `VPDPWUSD xmm1, xmm2, xmm3/m128`
39337	///
39338	/// `VEX.128.66.0F38.W0 D2 /r`
39339	///
39340	/// `AVX-VNNI-INT16`
39341	///
39342	/// `16/32/64-bit`
39343	VEX_Vpdpwusd_xmm_xmm_xmmm128 = 4919,
39344	/// `VPDPWUSD ymm1, ymm2, ymm3/m256`
39345	///
39346	/// `VEX.256.66.0F38.W0 D2 /r`
39347	///
39348	/// `AVX-VNNI-INT16`
39349	///
39350	/// `16/32/64-bit`
39351	VEX_Vpdpwusd_ymm_ymm_ymmm256 = 4920,
39352	/// `VPDPWSUD xmm1, xmm2, xmm3/m128`
39353	///
39354	/// `VEX.128.F3.0F38.W0 D2 /r`
39355	///
39356	/// `AVX-VNNI-INT16`
39357	///
39358	/// `16/32/64-bit`
39359	VEX_Vpdpwsud_xmm_xmm_xmmm128 = 4921,
39360	/// `VPDPWSUD ymm1, ymm2, ymm3/m256`
39361	///
39362	/// `VEX.256.F3.0F38.W0 D2 /r`
39363	///
39364	/// `AVX-VNNI-INT16`
39365	///
39366	/// `16/32/64-bit`
39367	VEX_Vpdpwsud_ymm_ymm_ymmm256 = 4922,
39368	/// `VPDPWUUDS xmm1, xmm2, xmm3/m128`
39369	///
39370	/// `VEX.128.0F38.W0 D3 /r`
39371	///
39372	/// `AVX-VNNI-INT16`
39373	///
39374	/// `16/32/64-bit`
39375	VEX_Vpdpwuuds_xmm_xmm_xmmm128 = 4923,
39376	/// `VPDPWUUDS ymm1, ymm2, ymm3/m256`
39377	///
39378	/// `VEX.256.0F38.W0 D3 /r`
39379	///
39380	/// `AVX-VNNI-INT16`
39381	///
39382	/// `16/32/64-bit`
39383	VEX_Vpdpwuuds_ymm_ymm_ymmm256 = 4924,
39384	/// `VPDPWUSDS xmm1, xmm2, xmm3/m128`
39385	///
39386	/// `VEX.128.66.0F38.W0 D3 /r`
39387	///
39388	/// `AVX-VNNI-INT16`
39389	///
39390	/// `16/32/64-bit`
39391	VEX_Vpdpwusds_xmm_xmm_xmmm128 = 4925,
39392	/// `VPDPWUSDS ymm1, ymm2, ymm3/m256`
39393	///
39394	/// `VEX.256.66.0F38.W0 D3 /r`
39395	///
39396	/// `AVX-VNNI-INT16`
39397	///
39398	/// `16/32/64-bit`
39399	VEX_Vpdpwusds_ymm_ymm_ymmm256 = 4926,
39400	/// `VPDPWSUDS xmm1, xmm2, xmm3/m128`
39401	///
39402	/// `VEX.128.F3.0F38.W0 D3 /r`
39403	///
39404	/// `AVX-VNNI-INT16`
39405	///
39406	/// `16/32/64-bit`
39407	VEX_Vpdpwsuds_xmm_xmm_xmmm128 = 4927,
39408	/// `VPDPWSUDS ymm1, ymm2, ymm3/m256`
39409	///
39410	/// `VEX.256.F3.0F38.W0 D3 /r`
39411	///
39412	/// `AVX-VNNI-INT16`
39413	///
39414	/// `16/32/64-bit`
39415	VEX_Vpdpwsuds_ymm_ymm_ymmm256 = 4928,
39416	/// `VSM3MSG1 xmm1, xmm2, xmm3/m128`
39417	///
39418	/// `VEX.128.0F38.W0 DA /r`
39419	///
39420	/// `AVX and SM3`
39421	///
39422	/// `16/32/64-bit`
39423	VEX_Vsm3msg1_xmm_xmm_xmmm128 = 4929,
39424	/// `VSM3MSG2 xmm1, xmm2, xmm3/m128`
39425	///
39426	/// `VEX.128.66.0F38.W0 DA /r`
39427	///
39428	/// `AVX and SM3`
39429	///
39430	/// `16/32/64-bit`
39431	VEX_Vsm3msg2_xmm_xmm_xmmm128 = 4930,
39432	/// `VSM4KEY4 xmm1, xmm2, xmm3/m128`
39433	///
39434	/// `VEX.128.F3.0F38.W0 DA /r`
39435	///
39436	/// `AVX and SM4`
39437	///
39438	/// `16/32/64-bit`
39439	VEX_Vsm4key4_xmm_xmm_xmmm128 = 4931,
39440	/// `VSM4KEY4 ymm1, ymm2, ymm3/m256`
39441	///
39442	/// `VEX.256.F3.0F38.W0 DA /r`
39443	///
39444	/// `AVX and SM4`
39445	///
39446	/// `16/32/64-bit`
39447	VEX_Vsm4key4_ymm_ymm_ymmm256 = 4932,
39448	/// `VSM4RNDS4 xmm1, xmm2, xmm3/m128`
39449	///
39450	/// `VEX.128.F2.0F38.W0 DA /r`
39451	///
39452	/// `AVX and SM4`
39453	///
39454	/// `16/32/64-bit`
39455	VEX_Vsm4rnds4_xmm_xmm_xmmm128 = 4933,
39456	/// `VSM4RNDS4 ymm1, ymm2, ymm3/m256`
39457	///
39458	/// `VEX.256.F2.0F38.W0 DA /r`
39459	///
39460	/// `AVX and SM4`
39461	///
39462	/// `16/32/64-bit`
39463	VEX_Vsm4rnds4_ymm_ymm_ymmm256 = 4934,
39464	/// `VSM3RNDS2 xmm1, xmm2, xmm3/m128, imm8`
39465	///
39466	/// `VEX.128.66.0F3A.W0 DE /r ib`
39467	///
39468	/// `AVX and SM3`
39469	///
39470	/// `16/32/64-bit`
39471	VEX_Vsm3rnds2_xmm_xmm_xmmm128_imm8 = 4935,
39472}
39473#[rustfmt::skip]
39474static GEN_DEBUG_CODE: [&str; 4936] = [
39475	"INVALID",
39476	"DeclareByte",
39477	"DeclareWord",
39478	"DeclareDword",
39479	"DeclareQword",
39480	"Add_rm8_r8",
39481	"Add_rm16_r16",
39482	"Add_rm32_r32",
39483	"Add_rm64_r64",
39484	"Add_r8_rm8",
39485	"Add_r16_rm16",
39486	"Add_r32_rm32",
39487	"Add_r64_rm64",
39488	"Add_AL_imm8",
39489	"Add_AX_imm16",
39490	"Add_EAX_imm32",
39491	"Add_RAX_imm32",
39492	"Pushw_ES",
39493	"Pushd_ES",
39494	"Popw_ES",
39495	"Popd_ES",
39496	"Or_rm8_r8",
39497	"Or_rm16_r16",
39498	"Or_rm32_r32",
39499	"Or_rm64_r64",
39500	"Or_r8_rm8",
39501	"Or_r16_rm16",
39502	"Or_r32_rm32",
39503	"Or_r64_rm64",
39504	"Or_AL_imm8",
39505	"Or_AX_imm16",
39506	"Or_EAX_imm32",
39507	"Or_RAX_imm32",
39508	"Pushw_CS",
39509	"Pushd_CS",
39510	"Popw_CS",
39511	"Adc_rm8_r8",
39512	"Adc_rm16_r16",
39513	"Adc_rm32_r32",
39514	"Adc_rm64_r64",
39515	"Adc_r8_rm8",
39516	"Adc_r16_rm16",
39517	"Adc_r32_rm32",
39518	"Adc_r64_rm64",
39519	"Adc_AL_imm8",
39520	"Adc_AX_imm16",
39521	"Adc_EAX_imm32",
39522	"Adc_RAX_imm32",
39523	"Pushw_SS",
39524	"Pushd_SS",
39525	"Popw_SS",
39526	"Popd_SS",
39527	"Sbb_rm8_r8",
39528	"Sbb_rm16_r16",
39529	"Sbb_rm32_r32",
39530	"Sbb_rm64_r64",
39531	"Sbb_r8_rm8",
39532	"Sbb_r16_rm16",
39533	"Sbb_r32_rm32",
39534	"Sbb_r64_rm64",
39535	"Sbb_AL_imm8",
39536	"Sbb_AX_imm16",
39537	"Sbb_EAX_imm32",
39538	"Sbb_RAX_imm32",
39539	"Pushw_DS",
39540	"Pushd_DS",
39541	"Popw_DS",
39542	"Popd_DS",
39543	"And_rm8_r8",
39544	"And_rm16_r16",
39545	"And_rm32_r32",
39546	"And_rm64_r64",
39547	"And_r8_rm8",
39548	"And_r16_rm16",
39549	"And_r32_rm32",
39550	"And_r64_rm64",
39551	"And_AL_imm8",
39552	"And_AX_imm16",
39553	"And_EAX_imm32",
39554	"And_RAX_imm32",
39555	"Daa",
39556	"Sub_rm8_r8",
39557	"Sub_rm16_r16",
39558	"Sub_rm32_r32",
39559	"Sub_rm64_r64",
39560	"Sub_r8_rm8",
39561	"Sub_r16_rm16",
39562	"Sub_r32_rm32",
39563	"Sub_r64_rm64",
39564	"Sub_AL_imm8",
39565	"Sub_AX_imm16",
39566	"Sub_EAX_imm32",
39567	"Sub_RAX_imm32",
39568	"Das",
39569	"Xor_rm8_r8",
39570	"Xor_rm16_r16",
39571	"Xor_rm32_r32",
39572	"Xor_rm64_r64",
39573	"Xor_r8_rm8",
39574	"Xor_r16_rm16",
39575	"Xor_r32_rm32",
39576	"Xor_r64_rm64",
39577	"Xor_AL_imm8",
39578	"Xor_AX_imm16",
39579	"Xor_EAX_imm32",
39580	"Xor_RAX_imm32",
39581	"Aaa",
39582	"Cmp_rm8_r8",
39583	"Cmp_rm16_r16",
39584	"Cmp_rm32_r32",
39585	"Cmp_rm64_r64",
39586	"Cmp_r8_rm8",
39587	"Cmp_r16_rm16",
39588	"Cmp_r32_rm32",
39589	"Cmp_r64_rm64",
39590	"Cmp_AL_imm8",
39591	"Cmp_AX_imm16",
39592	"Cmp_EAX_imm32",
39593	"Cmp_RAX_imm32",
39594	"Aas",
39595	"Inc_r16",
39596	"Inc_r32",
39597	"Dec_r16",
39598	"Dec_r32",
39599	"Push_r16",
39600	"Push_r32",
39601	"Push_r64",
39602	"Pop_r16",
39603	"Pop_r32",
39604	"Pop_r64",
39605	"Pushaw",
39606	"Pushad",
39607	"Popaw",
39608	"Popad",
39609	"Bound_r16_m1616",
39610	"Bound_r32_m3232",
39611	"Arpl_rm16_r16",
39612	"Arpl_r32m16_r32",
39613	"Movsxd_r16_rm16",
39614	"Movsxd_r32_rm32",
39615	"Movsxd_r64_rm32",
39616	"Push_imm16",
39617	"Pushd_imm32",
39618	"Pushq_imm32",
39619	"Imul_r16_rm16_imm16",
39620	"Imul_r32_rm32_imm32",
39621	"Imul_r64_rm64_imm32",
39622	"Pushw_imm8",
39623	"Pushd_imm8",
39624	"Pushq_imm8",
39625	"Imul_r16_rm16_imm8",
39626	"Imul_r32_rm32_imm8",
39627	"Imul_r64_rm64_imm8",
39628	"Insb_m8_DX",
39629	"Insw_m16_DX",
39630	"Insd_m32_DX",
39631	"Outsb_DX_m8",
39632	"Outsw_DX_m16",
39633	"Outsd_DX_m32",
39634	"Jo_rel8_16",
39635	"Jo_rel8_32",
39636	"Jo_rel8_64",
39637	"Jno_rel8_16",
39638	"Jno_rel8_32",
39639	"Jno_rel8_64",
39640	"Jb_rel8_16",
39641	"Jb_rel8_32",
39642	"Jb_rel8_64",
39643	"Jae_rel8_16",
39644	"Jae_rel8_32",
39645	"Jae_rel8_64",
39646	"Je_rel8_16",
39647	"Je_rel8_32",
39648	"Je_rel8_64",
39649	"Jne_rel8_16",
39650	"Jne_rel8_32",
39651	"Jne_rel8_64",
39652	"Jbe_rel8_16",
39653	"Jbe_rel8_32",
39654	"Jbe_rel8_64",
39655	"Ja_rel8_16",
39656	"Ja_rel8_32",
39657	"Ja_rel8_64",
39658	"Js_rel8_16",
39659	"Js_rel8_32",
39660	"Js_rel8_64",
39661	"Jns_rel8_16",
39662	"Jns_rel8_32",
39663	"Jns_rel8_64",
39664	"Jp_rel8_16",
39665	"Jp_rel8_32",
39666	"Jp_rel8_64",
39667	"Jnp_rel8_16",
39668	"Jnp_rel8_32",
39669	"Jnp_rel8_64",
39670	"Jl_rel8_16",
39671	"Jl_rel8_32",
39672	"Jl_rel8_64",
39673	"Jge_rel8_16",
39674	"Jge_rel8_32",
39675	"Jge_rel8_64",
39676	"Jle_rel8_16",
39677	"Jle_rel8_32",
39678	"Jle_rel8_64",
39679	"Jg_rel8_16",
39680	"Jg_rel8_32",
39681	"Jg_rel8_64",
39682	"Add_rm8_imm8",
39683	"Or_rm8_imm8",
39684	"Adc_rm8_imm8",
39685	"Sbb_rm8_imm8",
39686	"And_rm8_imm8",
39687	"Sub_rm8_imm8",
39688	"Xor_rm8_imm8",
39689	"Cmp_rm8_imm8",
39690	"Add_rm16_imm16",
39691	"Add_rm32_imm32",
39692	"Add_rm64_imm32",
39693	"Or_rm16_imm16",
39694	"Or_rm32_imm32",
39695	"Or_rm64_imm32",
39696	"Adc_rm16_imm16",
39697	"Adc_rm32_imm32",
39698	"Adc_rm64_imm32",
39699	"Sbb_rm16_imm16",
39700	"Sbb_rm32_imm32",
39701	"Sbb_rm64_imm32",
39702	"And_rm16_imm16",
39703	"And_rm32_imm32",
39704	"And_rm64_imm32",
39705	"Sub_rm16_imm16",
39706	"Sub_rm32_imm32",
39707	"Sub_rm64_imm32",
39708	"Xor_rm16_imm16",
39709	"Xor_rm32_imm32",
39710	"Xor_rm64_imm32",
39711	"Cmp_rm16_imm16",
39712	"Cmp_rm32_imm32",
39713	"Cmp_rm64_imm32",
39714	"Add_rm8_imm8_82",
39715	"Or_rm8_imm8_82",
39716	"Adc_rm8_imm8_82",
39717	"Sbb_rm8_imm8_82",
39718	"And_rm8_imm8_82",
39719	"Sub_rm8_imm8_82",
39720	"Xor_rm8_imm8_82",
39721	"Cmp_rm8_imm8_82",
39722	"Add_rm16_imm8",
39723	"Add_rm32_imm8",
39724	"Add_rm64_imm8",
39725	"Or_rm16_imm8",
39726	"Or_rm32_imm8",
39727	"Or_rm64_imm8",
39728	"Adc_rm16_imm8",
39729	"Adc_rm32_imm8",
39730	"Adc_rm64_imm8",
39731	"Sbb_rm16_imm8",
39732	"Sbb_rm32_imm8",
39733	"Sbb_rm64_imm8",
39734	"And_rm16_imm8",
39735	"And_rm32_imm8",
39736	"And_rm64_imm8",
39737	"Sub_rm16_imm8",
39738	"Sub_rm32_imm8",
39739	"Sub_rm64_imm8",
39740	"Xor_rm16_imm8",
39741	"Xor_rm32_imm8",
39742	"Xor_rm64_imm8",
39743	"Cmp_rm16_imm8",
39744	"Cmp_rm32_imm8",
39745	"Cmp_rm64_imm8",
39746	"Test_rm8_r8",
39747	"Test_rm16_r16",
39748	"Test_rm32_r32",
39749	"Test_rm64_r64",
39750	"Xchg_rm8_r8",
39751	"Xchg_rm16_r16",
39752	"Xchg_rm32_r32",
39753	"Xchg_rm64_r64",
39754	"Mov_rm8_r8",
39755	"Mov_rm16_r16",
39756	"Mov_rm32_r32",
39757	"Mov_rm64_r64",
39758	"Mov_r8_rm8",
39759	"Mov_r16_rm16",
39760	"Mov_r32_rm32",
39761	"Mov_r64_rm64",
39762	"Mov_rm16_Sreg",
39763	"Mov_r32m16_Sreg",
39764	"Mov_r64m16_Sreg",
39765	"Lea_r16_m",
39766	"Lea_r32_m",
39767	"Lea_r64_m",
39768	"Mov_Sreg_rm16",
39769	"Mov_Sreg_r32m16",
39770	"Mov_Sreg_r64m16",
39771	"Pop_rm16",
39772	"Pop_rm32",
39773	"Pop_rm64",
39774	"Nopw",
39775	"Nopd",
39776	"Nopq",
39777	"Xchg_r16_AX",
39778	"Xchg_r32_EAX",
39779	"Xchg_r64_RAX",
39780	"Pause",
39781	"Cbw",
39782	"Cwde",
39783	"Cdqe",
39784	"Cwd",
39785	"Cdq",
39786	"Cqo",
39787	"Call_ptr1616",
39788	"Call_ptr1632",
39789	"Wait",
39790	"Pushfw",
39791	"Pushfd",
39792	"Pushfq",
39793	"Popfw",
39794	"Popfd",
39795	"Popfq",
39796	"Sahf",
39797	"Lahf",
39798	"Mov_AL_moffs8",
39799	"Mov_AX_moffs16",
39800	"Mov_EAX_moffs32",
39801	"Mov_RAX_moffs64",
39802	"Mov_moffs8_AL",
39803	"Mov_moffs16_AX",
39804	"Mov_moffs32_EAX",
39805	"Mov_moffs64_RAX",
39806	"Movsb_m8_m8",
39807	"Movsw_m16_m16",
39808	"Movsd_m32_m32",
39809	"Movsq_m64_m64",
39810	"Cmpsb_m8_m8",
39811	"Cmpsw_m16_m16",
39812	"Cmpsd_m32_m32",
39813	"Cmpsq_m64_m64",
39814	"Test_AL_imm8",
39815	"Test_AX_imm16",
39816	"Test_EAX_imm32",
39817	"Test_RAX_imm32",
39818	"Stosb_m8_AL",
39819	"Stosw_m16_AX",
39820	"Stosd_m32_EAX",
39821	"Stosq_m64_RAX",
39822	"Lodsb_AL_m8",
39823	"Lodsw_AX_m16",
39824	"Lodsd_EAX_m32",
39825	"Lodsq_RAX_m64",
39826	"Scasb_AL_m8",
39827	"Scasw_AX_m16",
39828	"Scasd_EAX_m32",
39829	"Scasq_RAX_m64",
39830	"Mov_r8_imm8",
39831	"Mov_r16_imm16",
39832	"Mov_r32_imm32",
39833	"Mov_r64_imm64",
39834	"Rol_rm8_imm8",
39835	"Ror_rm8_imm8",
39836	"Rcl_rm8_imm8",
39837	"Rcr_rm8_imm8",
39838	"Shl_rm8_imm8",
39839	"Shr_rm8_imm8",
39840	"Sal_rm8_imm8",
39841	"Sar_rm8_imm8",
39842	"Rol_rm16_imm8",
39843	"Rol_rm32_imm8",
39844	"Rol_rm64_imm8",
39845	"Ror_rm16_imm8",
39846	"Ror_rm32_imm8",
39847	"Ror_rm64_imm8",
39848	"Rcl_rm16_imm8",
39849	"Rcl_rm32_imm8",
39850	"Rcl_rm64_imm8",
39851	"Rcr_rm16_imm8",
39852	"Rcr_rm32_imm8",
39853	"Rcr_rm64_imm8",
39854	"Shl_rm16_imm8",
39855	"Shl_rm32_imm8",
39856	"Shl_rm64_imm8",
39857	"Shr_rm16_imm8",
39858	"Shr_rm32_imm8",
39859	"Shr_rm64_imm8",
39860	"Sal_rm16_imm8",
39861	"Sal_rm32_imm8",
39862	"Sal_rm64_imm8",
39863	"Sar_rm16_imm8",
39864	"Sar_rm32_imm8",
39865	"Sar_rm64_imm8",
39866	"Retnw_imm16",
39867	"Retnd_imm16",
39868	"Retnq_imm16",
39869	"Retnw",
39870	"Retnd",
39871	"Retnq",
39872	"Les_r16_m1616",
39873	"Les_r32_m1632",
39874	"Lds_r16_m1616",
39875	"Lds_r32_m1632",
39876	"Mov_rm8_imm8",
39877	"Xabort_imm8",
39878	"Mov_rm16_imm16",
39879	"Mov_rm32_imm32",
39880	"Mov_rm64_imm32",
39881	"Xbegin_rel16",
39882	"Xbegin_rel32",
39883	"Enterw_imm16_imm8",
39884	"Enterd_imm16_imm8",
39885	"Enterq_imm16_imm8",
39886	"Leavew",
39887	"Leaved",
39888	"Leaveq",
39889	"Retfw_imm16",
39890	"Retfd_imm16",
39891	"Retfq_imm16",
39892	"Retfw",
39893	"Retfd",
39894	"Retfq",
39895	"Int3",
39896	"Int_imm8",
39897	"Into",
39898	"Iretw",
39899	"Iretd",
39900	"Iretq",
39901	"Rol_rm8_1",
39902	"Ror_rm8_1",
39903	"Rcl_rm8_1",
39904	"Rcr_rm8_1",
39905	"Shl_rm8_1",
39906	"Shr_rm8_1",
39907	"Sal_rm8_1",
39908	"Sar_rm8_1",
39909	"Rol_rm16_1",
39910	"Rol_rm32_1",
39911	"Rol_rm64_1",
39912	"Ror_rm16_1",
39913	"Ror_rm32_1",
39914	"Ror_rm64_1",
39915	"Rcl_rm16_1",
39916	"Rcl_rm32_1",
39917	"Rcl_rm64_1",
39918	"Rcr_rm16_1",
39919	"Rcr_rm32_1",
39920	"Rcr_rm64_1",
39921	"Shl_rm16_1",
39922	"Shl_rm32_1",
39923	"Shl_rm64_1",
39924	"Shr_rm16_1",
39925	"Shr_rm32_1",
39926	"Shr_rm64_1",
39927	"Sal_rm16_1",
39928	"Sal_rm32_1",
39929	"Sal_rm64_1",
39930	"Sar_rm16_1",
39931	"Sar_rm32_1",
39932	"Sar_rm64_1",
39933	"Rol_rm8_CL",
39934	"Ror_rm8_CL",
39935	"Rcl_rm8_CL",
39936	"Rcr_rm8_CL",
39937	"Shl_rm8_CL",
39938	"Shr_rm8_CL",
39939	"Sal_rm8_CL",
39940	"Sar_rm8_CL",
39941	"Rol_rm16_CL",
39942	"Rol_rm32_CL",
39943	"Rol_rm64_CL",
39944	"Ror_rm16_CL",
39945	"Ror_rm32_CL",
39946	"Ror_rm64_CL",
39947	"Rcl_rm16_CL",
39948	"Rcl_rm32_CL",
39949	"Rcl_rm64_CL",
39950	"Rcr_rm16_CL",
39951	"Rcr_rm32_CL",
39952	"Rcr_rm64_CL",
39953	"Shl_rm16_CL",
39954	"Shl_rm32_CL",
39955	"Shl_rm64_CL",
39956	"Shr_rm16_CL",
39957	"Shr_rm32_CL",
39958	"Shr_rm64_CL",
39959	"Sal_rm16_CL",
39960	"Sal_rm32_CL",
39961	"Sal_rm64_CL",
39962	"Sar_rm16_CL",
39963	"Sar_rm32_CL",
39964	"Sar_rm64_CL",
39965	"Aam_imm8",
39966	"Aad_imm8",
39967	"Salc",
39968	"Xlat_m8",
39969	"Fadd_m32fp",
39970	"Fmul_m32fp",
39971	"Fcom_m32fp",
39972	"Fcomp_m32fp",
39973	"Fsub_m32fp",
39974	"Fsubr_m32fp",
39975	"Fdiv_m32fp",
39976	"Fdivr_m32fp",
39977	"Fadd_st0_sti",
39978	"Fmul_st0_sti",
39979	"Fcom_st0_sti",
39980	"Fcomp_st0_sti",
39981	"Fsub_st0_sti",
39982	"Fsubr_st0_sti",
39983	"Fdiv_st0_sti",
39984	"Fdivr_st0_sti",
39985	"Fld_m32fp",
39986	"Fst_m32fp",
39987	"Fstp_m32fp",
39988	"Fldenv_m14byte",
39989	"Fldenv_m28byte",
39990	"Fldcw_m2byte",
39991	"Fnstenv_m14byte",
39992	"Fstenv_m14byte",
39993	"Fnstenv_m28byte",
39994	"Fstenv_m28byte",
39995	"Fnstcw_m2byte",
39996	"Fstcw_m2byte",
39997	"Fld_sti",
39998	"Fxch_st0_sti",
39999	"Fnop",
40000	"Fstpnce_sti",
40001	"Fchs",
40002	"Fabs",
40003	"Ftst",
40004	"Fxam",
40005	"Fld1",
40006	"Fldl2t",
40007	"Fldl2e",
40008	"Fldpi",
40009	"Fldlg2",
40010	"Fldln2",
40011	"Fldz",
40012	"F2xm1",
40013	"Fyl2x",
40014	"Fptan",
40015	"Fpatan",
40016	"Fxtract",
40017	"Fprem1",
40018	"Fdecstp",
40019	"Fincstp",
40020	"Fprem",
40021	"Fyl2xp1",
40022	"Fsqrt",
40023	"Fsincos",
40024	"Frndint",
40025	"Fscale",
40026	"Fsin",
40027	"Fcos",
40028	"Fiadd_m32int",
40029	"Fimul_m32int",
40030	"Ficom_m32int",
40031	"Ficomp_m32int",
40032	"Fisub_m32int",
40033	"Fisubr_m32int",
40034	"Fidiv_m32int",
40035	"Fidivr_m32int",
40036	"Fcmovb_st0_sti",
40037	"Fcmove_st0_sti",
40038	"Fcmovbe_st0_sti",
40039	"Fcmovu_st0_sti",
40040	"Fucompp",
40041	"Fild_m32int",
40042	"Fisttp_m32int",
40043	"Fist_m32int",
40044	"Fistp_m32int",
40045	"Fld_m80fp",
40046	"Fstp_m80fp",
40047	"Fcmovnb_st0_sti",
40048	"Fcmovne_st0_sti",
40049	"Fcmovnbe_st0_sti",
40050	"Fcmovnu_st0_sti",
40051	"Fneni",
40052	"Feni",
40053	"Fndisi",
40054	"Fdisi",
40055	"Fnclex",
40056	"Fclex",
40057	"Fninit",
40058	"Finit",
40059	"Fnsetpm",
40060	"Fsetpm",
40061	"Frstpm",
40062	"Fucomi_st0_sti",
40063	"Fcomi_st0_sti",
40064	"Fadd_m64fp",
40065	"Fmul_m64fp",
40066	"Fcom_m64fp",
40067	"Fcomp_m64fp",
40068	"Fsub_m64fp",
40069	"Fsubr_m64fp",
40070	"Fdiv_m64fp",
40071	"Fdivr_m64fp",
40072	"Fadd_sti_st0",
40073	"Fmul_sti_st0",
40074	"Fcom_st0_sti_DCD0",
40075	"Fcomp_st0_sti_DCD8",
40076	"Fsubr_sti_st0",
40077	"Fsub_sti_st0",
40078	"Fdivr_sti_st0",
40079	"Fdiv_sti_st0",
40080	"Fld_m64fp",
40081	"Fisttp_m64int",
40082	"Fst_m64fp",
40083	"Fstp_m64fp",
40084	"Frstor_m94byte",
40085	"Frstor_m108byte",
40086	"Fnsave_m94byte",
40087	"Fsave_m94byte",
40088	"Fnsave_m108byte",
40089	"Fsave_m108byte",
40090	"Fnstsw_m2byte",
40091	"Fstsw_m2byte",
40092	"Ffree_sti",
40093	"Fxch_st0_sti_DDC8",
40094	"Fst_sti",
40095	"Fstp_sti",
40096	"Fucom_st0_sti",
40097	"Fucomp_st0_sti",
40098	"Fiadd_m16int",
40099	"Fimul_m16int",
40100	"Ficom_m16int",
40101	"Ficomp_m16int",
40102	"Fisub_m16int",
40103	"Fisubr_m16int",
40104	"Fidiv_m16int",
40105	"Fidivr_m16int",
40106	"Faddp_sti_st0",
40107	"Fmulp_sti_st0",
40108	"Fcomp_st0_sti_DED0",
40109	"Fcompp",
40110	"Fsubrp_sti_st0",
40111	"Fsubp_sti_st0",
40112	"Fdivrp_sti_st0",
40113	"Fdivp_sti_st0",
40114	"Fild_m16int",
40115	"Fisttp_m16int",
40116	"Fist_m16int",
40117	"Fistp_m16int",
40118	"Fbld_m80bcd",
40119	"Fild_m64int",
40120	"Fbstp_m80bcd",
40121	"Fistp_m64int",
40122	"Ffreep_sti",
40123	"Fxch_st0_sti_DFC8",
40124	"Fstp_sti_DFD0",
40125	"Fstp_sti_DFD8",
40126	"Fnstsw_AX",
40127	"Fstsw_AX",
40128	"Fstdw_AX",
40129	"Fstsg_AX",
40130	"Fucomip_st0_sti",
40131	"Fcomip_st0_sti",
40132	"Loopne_rel8_16_CX",
40133	"Loopne_rel8_32_CX",
40134	"Loopne_rel8_16_ECX",
40135	"Loopne_rel8_32_ECX",
40136	"Loopne_rel8_64_ECX",
40137	"Loopne_rel8_16_RCX",
40138	"Loopne_rel8_64_RCX",
40139	"Loope_rel8_16_CX",
40140	"Loope_rel8_32_CX",
40141	"Loope_rel8_16_ECX",
40142	"Loope_rel8_32_ECX",
40143	"Loope_rel8_64_ECX",
40144	"Loope_rel8_16_RCX",
40145	"Loope_rel8_64_RCX",
40146	"Loop_rel8_16_CX",
40147	"Loop_rel8_32_CX",
40148	"Loop_rel8_16_ECX",
40149	"Loop_rel8_32_ECX",
40150	"Loop_rel8_64_ECX",
40151	"Loop_rel8_16_RCX",
40152	"Loop_rel8_64_RCX",
40153	"Jcxz_rel8_16",
40154	"Jcxz_rel8_32",
40155	"Jecxz_rel8_16",
40156	"Jecxz_rel8_32",
40157	"Jecxz_rel8_64",
40158	"Jrcxz_rel8_16",
40159	"Jrcxz_rel8_64",
40160	"In_AL_imm8",
40161	"In_AX_imm8",
40162	"In_EAX_imm8",
40163	"Out_imm8_AL",
40164	"Out_imm8_AX",
40165	"Out_imm8_EAX",
40166	"Call_rel16",
40167	"Call_rel32_32",
40168	"Call_rel32_64",
40169	"Jmp_rel16",
40170	"Jmp_rel32_32",
40171	"Jmp_rel32_64",
40172	"Jmp_ptr1616",
40173	"Jmp_ptr1632",
40174	"Jmp_rel8_16",
40175	"Jmp_rel8_32",
40176	"Jmp_rel8_64",
40177	"In_AL_DX",
40178	"In_AX_DX",
40179	"In_EAX_DX",
40180	"Out_DX_AL",
40181	"Out_DX_AX",
40182	"Out_DX_EAX",
40183	"Int1",
40184	"Hlt",
40185	"Cmc",
40186	"Test_rm8_imm8",
40187	"Test_rm8_imm8_F6r1",
40188	"Not_rm8",
40189	"Neg_rm8",
40190	"Mul_rm8",
40191	"Imul_rm8",
40192	"Div_rm8",
40193	"Idiv_rm8",
40194	"Test_rm16_imm16",
40195	"Test_rm32_imm32",
40196	"Test_rm64_imm32",
40197	"Test_rm16_imm16_F7r1",
40198	"Test_rm32_imm32_F7r1",
40199	"Test_rm64_imm32_F7r1",
40200	"Not_rm16",
40201	"Not_rm32",
40202	"Not_rm64",
40203	"Neg_rm16",
40204	"Neg_rm32",
40205	"Neg_rm64",
40206	"Mul_rm16",
40207	"Mul_rm32",
40208	"Mul_rm64",
40209	"Imul_rm16",
40210	"Imul_rm32",
40211	"Imul_rm64",
40212	"Div_rm16",
40213	"Div_rm32",
40214	"Div_rm64",
40215	"Idiv_rm16",
40216	"Idiv_rm32",
40217	"Idiv_rm64",
40218	"Clc",
40219	"Stc",
40220	"Cli",
40221	"Sti",
40222	"Cld",
40223	"Std",
40224	"Inc_rm8",
40225	"Dec_rm8",
40226	"Inc_rm16",
40227	"Inc_rm32",
40228	"Inc_rm64",
40229	"Dec_rm16",
40230	"Dec_rm32",
40231	"Dec_rm64",
40232	"Call_rm16",
40233	"Call_rm32",
40234	"Call_rm64",
40235	"Call_m1616",
40236	"Call_m1632",
40237	"Call_m1664",
40238	"Jmp_rm16",
40239	"Jmp_rm32",
40240	"Jmp_rm64",
40241	"Jmp_m1616",
40242	"Jmp_m1632",
40243	"Jmp_m1664",
40244	"Push_rm16",
40245	"Push_rm32",
40246	"Push_rm64",
40247	"Sldt_rm16",
40248	"Sldt_r32m16",
40249	"Sldt_r64m16",
40250	"Str_rm16",
40251	"Str_r32m16",
40252	"Str_r64m16",
40253	"Lldt_rm16",
40254	"Lldt_r32m16",
40255	"Lldt_r64m16",
40256	"Ltr_rm16",
40257	"Ltr_r32m16",
40258	"Ltr_r64m16",
40259	"Verr_rm16",
40260	"Verr_r32m16",
40261	"Verr_r64m16",
40262	"Verw_rm16",
40263	"Verw_r32m16",
40264	"Verw_r64m16",
40265	"Jmpe_rm16",
40266	"Jmpe_rm32",
40267	"Sgdt_m1632_16",
40268	"Sgdt_m1632",
40269	"Sgdt_m1664",
40270	"Sidt_m1632_16",
40271	"Sidt_m1632",
40272	"Sidt_m1664",
40273	"Lgdt_m1632_16",
40274	"Lgdt_m1632",
40275	"Lgdt_m1664",
40276	"Lidt_m1632_16",
40277	"Lidt_m1632",
40278	"Lidt_m1664",
40279	"Smsw_rm16",
40280	"Smsw_r32m16",
40281	"Smsw_r64m16",
40282	"Rstorssp_m64",
40283	"Lmsw_rm16",
40284	"Lmsw_r32m16",
40285	"Lmsw_r64m16",
40286	"Invlpg_m",
40287	"Enclv",
40288	"Vmcall",
40289	"Vmlaunch",
40290	"Vmresume",
40291	"Vmxoff",
40292	"Pconfig",
40293	"Monitorw",
40294	"Monitord",
40295	"Monitorq",
40296	"Mwait",
40297	"Clac",
40298	"Stac",
40299	"Encls",
40300	"Xgetbv",
40301	"Xsetbv",
40302	"Vmfunc",
40303	"Xend",
40304	"Xtest",
40305	"Enclu",
40306	"Vmrunw",
40307	"Vmrund",
40308	"Vmrunq",
40309	"Vmmcall",
40310	"Vmloadw",
40311	"Vmloadd",
40312	"Vmloadq",
40313	"Vmsavew",
40314	"Vmsaved",
40315	"Vmsaveq",
40316	"Stgi",
40317	"Clgi",
40318	"Skinit",
40319	"Invlpgaw",
40320	"Invlpgad",
40321	"Invlpgaq",
40322	"Setssbsy",
40323	"Saveprevssp",
40324	"Rdpkru",
40325	"Wrpkru",
40326	"Swapgs",
40327	"Rdtscp",
40328	"Monitorxw",
40329	"Monitorxd",
40330	"Monitorxq",
40331	"Mcommit",
40332	"Mwaitx",
40333	"Clzerow",
40334	"Clzerod",
40335	"Clzeroq",
40336	"Rdpru",
40337	"Lar_r16_rm16",
40338	"Lar_r32_r32m16",
40339	"Lar_r64_r64m16",
40340	"Lsl_r16_rm16",
40341	"Lsl_r32_r32m16",
40342	"Lsl_r64_r64m16",
40343	"Storeall",
40344	"Loadall286",
40345	"Syscall",
40346	"Clts",
40347	"Loadall386",
40348	"Sysretd",
40349	"Sysretq",
40350	"Invd",
40351	"Wbinvd",
40352	"Wbnoinvd",
40353	"Cl1invmb",
40354	"Ud2",
40355	"Reservednop_rm16_r16_0F0D",
40356	"Reservednop_rm32_r32_0F0D",
40357	"Reservednop_rm64_r64_0F0D",
40358	"Prefetch_m8",
40359	"Prefetchw_m8",
40360	"Prefetchwt1_m8",
40361	"Femms",
40362	"Umov_rm8_r8",
40363	"Umov_rm16_r16",
40364	"Umov_rm32_r32",
40365	"Umov_r8_rm8",
40366	"Umov_r16_rm16",
40367	"Umov_r32_rm32",
40368	"Movups_xmm_xmmm128",
40369	"VEX_Vmovups_xmm_xmmm128",
40370	"VEX_Vmovups_ymm_ymmm256",
40371	"EVEX_Vmovups_xmm_k1z_xmmm128",
40372	"EVEX_Vmovups_ymm_k1z_ymmm256",
40373	"EVEX_Vmovups_zmm_k1z_zmmm512",
40374	"Movupd_xmm_xmmm128",
40375	"VEX_Vmovupd_xmm_xmmm128",
40376	"VEX_Vmovupd_ymm_ymmm256",
40377	"EVEX_Vmovupd_xmm_k1z_xmmm128",
40378	"EVEX_Vmovupd_ymm_k1z_ymmm256",
40379	"EVEX_Vmovupd_zmm_k1z_zmmm512",
40380	"Movss_xmm_xmmm32",
40381	"VEX_Vmovss_xmm_xmm_xmm",
40382	"VEX_Vmovss_xmm_m32",
40383	"EVEX_Vmovss_xmm_k1z_xmm_xmm",
40384	"EVEX_Vmovss_xmm_k1z_m32",
40385	"Movsd_xmm_xmmm64",
40386	"VEX_Vmovsd_xmm_xmm_xmm",
40387	"VEX_Vmovsd_xmm_m64",
40388	"EVEX_Vmovsd_xmm_k1z_xmm_xmm",
40389	"EVEX_Vmovsd_xmm_k1z_m64",
40390	"Movups_xmmm128_xmm",
40391	"VEX_Vmovups_xmmm128_xmm",
40392	"VEX_Vmovups_ymmm256_ymm",
40393	"EVEX_Vmovups_xmmm128_k1z_xmm",
40394	"EVEX_Vmovups_ymmm256_k1z_ymm",
40395	"EVEX_Vmovups_zmmm512_k1z_zmm",
40396	"Movupd_xmmm128_xmm",
40397	"VEX_Vmovupd_xmmm128_xmm",
40398	"VEX_Vmovupd_ymmm256_ymm",
40399	"EVEX_Vmovupd_xmmm128_k1z_xmm",
40400	"EVEX_Vmovupd_ymmm256_k1z_ymm",
40401	"EVEX_Vmovupd_zmmm512_k1z_zmm",
40402	"Movss_xmmm32_xmm",
40403	"VEX_Vmovss_xmm_xmm_xmm_0F11",
40404	"VEX_Vmovss_m32_xmm",
40405	"EVEX_Vmovss_xmm_k1z_xmm_xmm_0F11",
40406	"EVEX_Vmovss_m32_k1_xmm",
40407	"Movsd_xmmm64_xmm",
40408	"VEX_Vmovsd_xmm_xmm_xmm_0F11",
40409	"VEX_Vmovsd_m64_xmm",
40410	"EVEX_Vmovsd_xmm_k1z_xmm_xmm_0F11",
40411	"EVEX_Vmovsd_m64_k1_xmm",
40412	"Movhlps_xmm_xmm",
40413	"Movlps_xmm_m64",
40414	"VEX_Vmovhlps_xmm_xmm_xmm",
40415	"VEX_Vmovlps_xmm_xmm_m64",
40416	"EVEX_Vmovhlps_xmm_xmm_xmm",
40417	"EVEX_Vmovlps_xmm_xmm_m64",
40418	"Movlpd_xmm_m64",
40419	"VEX_Vmovlpd_xmm_xmm_m64",
40420	"EVEX_Vmovlpd_xmm_xmm_m64",
40421	"Movsldup_xmm_xmmm128",
40422	"VEX_Vmovsldup_xmm_xmmm128",
40423	"VEX_Vmovsldup_ymm_ymmm256",
40424	"EVEX_Vmovsldup_xmm_k1z_xmmm128",
40425	"EVEX_Vmovsldup_ymm_k1z_ymmm256",
40426	"EVEX_Vmovsldup_zmm_k1z_zmmm512",
40427	"Movddup_xmm_xmmm64",
40428	"VEX_Vmovddup_xmm_xmmm64",
40429	"VEX_Vmovddup_ymm_ymmm256",
40430	"EVEX_Vmovddup_xmm_k1z_xmmm64",
40431	"EVEX_Vmovddup_ymm_k1z_ymmm256",
40432	"EVEX_Vmovddup_zmm_k1z_zmmm512",
40433	"Movlps_m64_xmm",
40434	"VEX_Vmovlps_m64_xmm",
40435	"EVEX_Vmovlps_m64_xmm",
40436	"Movlpd_m64_xmm",
40437	"VEX_Vmovlpd_m64_xmm",
40438	"EVEX_Vmovlpd_m64_xmm",
40439	"Unpcklps_xmm_xmmm128",
40440	"VEX_Vunpcklps_xmm_xmm_xmmm128",
40441	"VEX_Vunpcklps_ymm_ymm_ymmm256",
40442	"EVEX_Vunpcklps_xmm_k1z_xmm_xmmm128b32",
40443	"EVEX_Vunpcklps_ymm_k1z_ymm_ymmm256b32",
40444	"EVEX_Vunpcklps_zmm_k1z_zmm_zmmm512b32",
40445	"Unpcklpd_xmm_xmmm128",
40446	"VEX_Vunpcklpd_xmm_xmm_xmmm128",
40447	"VEX_Vunpcklpd_ymm_ymm_ymmm256",
40448	"EVEX_Vunpcklpd_xmm_k1z_xmm_xmmm128b64",
40449	"EVEX_Vunpcklpd_ymm_k1z_ymm_ymmm256b64",
40450	"EVEX_Vunpcklpd_zmm_k1z_zmm_zmmm512b64",
40451	"Unpckhps_xmm_xmmm128",
40452	"VEX_Vunpckhps_xmm_xmm_xmmm128",
40453	"VEX_Vunpckhps_ymm_ymm_ymmm256",
40454	"EVEX_Vunpckhps_xmm_k1z_xmm_xmmm128b32",
40455	"EVEX_Vunpckhps_ymm_k1z_ymm_ymmm256b32",
40456	"EVEX_Vunpckhps_zmm_k1z_zmm_zmmm512b32",
40457	"Unpckhpd_xmm_xmmm128",
40458	"VEX_Vunpckhpd_xmm_xmm_xmmm128",
40459	"VEX_Vunpckhpd_ymm_ymm_ymmm256",
40460	"EVEX_Vunpckhpd_xmm_k1z_xmm_xmmm128b64",
40461	"EVEX_Vunpckhpd_ymm_k1z_ymm_ymmm256b64",
40462	"EVEX_Vunpckhpd_zmm_k1z_zmm_zmmm512b64",
40463	"Movlhps_xmm_xmm",
40464	"VEX_Vmovlhps_xmm_xmm_xmm",
40465	"EVEX_Vmovlhps_xmm_xmm_xmm",
40466	"Movhps_xmm_m64",
40467	"VEX_Vmovhps_xmm_xmm_m64",
40468	"EVEX_Vmovhps_xmm_xmm_m64",
40469	"Movhpd_xmm_m64",
40470	"VEX_Vmovhpd_xmm_xmm_m64",
40471	"EVEX_Vmovhpd_xmm_xmm_m64",
40472	"Movshdup_xmm_xmmm128",
40473	"VEX_Vmovshdup_xmm_xmmm128",
40474	"VEX_Vmovshdup_ymm_ymmm256",
40475	"EVEX_Vmovshdup_xmm_k1z_xmmm128",
40476	"EVEX_Vmovshdup_ymm_k1z_ymmm256",
40477	"EVEX_Vmovshdup_zmm_k1z_zmmm512",
40478	"Movhps_m64_xmm",
40479	"VEX_Vmovhps_m64_xmm",
40480	"EVEX_Vmovhps_m64_xmm",
40481	"Movhpd_m64_xmm",
40482	"VEX_Vmovhpd_m64_xmm",
40483	"EVEX_Vmovhpd_m64_xmm",
40484	"Reservednop_rm16_r16_0F18",
40485	"Reservednop_rm32_r32_0F18",
40486	"Reservednop_rm64_r64_0F18",
40487	"Reservednop_rm16_r16_0F19",
40488	"Reservednop_rm32_r32_0F19",
40489	"Reservednop_rm64_r64_0F19",
40490	"Reservednop_rm16_r16_0F1A",
40491	"Reservednop_rm32_r32_0F1A",
40492	"Reservednop_rm64_r64_0F1A",
40493	"Reservednop_rm16_r16_0F1B",
40494	"Reservednop_rm32_r32_0F1B",
40495	"Reservednop_rm64_r64_0F1B",
40496	"Reservednop_rm16_r16_0F1C",
40497	"Reservednop_rm32_r32_0F1C",
40498	"Reservednop_rm64_r64_0F1C",
40499	"Reservednop_rm16_r16_0F1D",
40500	"Reservednop_rm32_r32_0F1D",
40501	"Reservednop_rm64_r64_0F1D",
40502	"Reservednop_rm16_r16_0F1E",
40503	"Reservednop_rm32_r32_0F1E",
40504	"Reservednop_rm64_r64_0F1E",
40505	"Reservednop_rm16_r16_0F1F",
40506	"Reservednop_rm32_r32_0F1F",
40507	"Reservednop_rm64_r64_0F1F",
40508	"Prefetchnta_m8",
40509	"Prefetcht0_m8",
40510	"Prefetcht1_m8",
40511	"Prefetcht2_m8",
40512	"Bndldx_bnd_mib",
40513	"Bndmov_bnd_bndm64",
40514	"Bndmov_bnd_bndm128",
40515	"Bndcl_bnd_rm32",
40516	"Bndcl_bnd_rm64",
40517	"Bndcu_bnd_rm32",
40518	"Bndcu_bnd_rm64",
40519	"Bndstx_mib_bnd",
40520	"Bndmov_bndm64_bnd",
40521	"Bndmov_bndm128_bnd",
40522	"Bndmk_bnd_m32",
40523	"Bndmk_bnd_m64",
40524	"Bndcn_bnd_rm32",
40525	"Bndcn_bnd_rm64",
40526	"Cldemote_m8",
40527	"Rdsspd_r32",
40528	"Rdsspq_r64",
40529	"Endbr64",
40530	"Endbr32",
40531	"Nop_rm16",
40532	"Nop_rm32",
40533	"Nop_rm64",
40534	"Mov_r32_cr",
40535	"Mov_r64_cr",
40536	"Mov_r32_dr",
40537	"Mov_r64_dr",
40538	"Mov_cr_r32",
40539	"Mov_cr_r64",
40540	"Mov_dr_r32",
40541	"Mov_dr_r64",
40542	"Mov_r32_tr",
40543	"Mov_tr_r32",
40544	"Movaps_xmm_xmmm128",
40545	"VEX_Vmovaps_xmm_xmmm128",
40546	"VEX_Vmovaps_ymm_ymmm256",
40547	"EVEX_Vmovaps_xmm_k1z_xmmm128",
40548	"EVEX_Vmovaps_ymm_k1z_ymmm256",
40549	"EVEX_Vmovaps_zmm_k1z_zmmm512",
40550	"Movapd_xmm_xmmm128",
40551	"VEX_Vmovapd_xmm_xmmm128",
40552	"VEX_Vmovapd_ymm_ymmm256",
40553	"EVEX_Vmovapd_xmm_k1z_xmmm128",
40554	"EVEX_Vmovapd_ymm_k1z_ymmm256",
40555	"EVEX_Vmovapd_zmm_k1z_zmmm512",
40556	"Movaps_xmmm128_xmm",
40557	"VEX_Vmovaps_xmmm128_xmm",
40558	"VEX_Vmovaps_ymmm256_ymm",
40559	"EVEX_Vmovaps_xmmm128_k1z_xmm",
40560	"EVEX_Vmovaps_ymmm256_k1z_ymm",
40561	"EVEX_Vmovaps_zmmm512_k1z_zmm",
40562	"Movapd_xmmm128_xmm",
40563	"VEX_Vmovapd_xmmm128_xmm",
40564	"VEX_Vmovapd_ymmm256_ymm",
40565	"EVEX_Vmovapd_xmmm128_k1z_xmm",
40566	"EVEX_Vmovapd_ymmm256_k1z_ymm",
40567	"EVEX_Vmovapd_zmmm512_k1z_zmm",
40568	"Cvtpi2ps_xmm_mmm64",
40569	"Cvtpi2pd_xmm_mmm64",
40570	"Cvtsi2ss_xmm_rm32",
40571	"Cvtsi2ss_xmm_rm64",
40572	"VEX_Vcvtsi2ss_xmm_xmm_rm32",
40573	"VEX_Vcvtsi2ss_xmm_xmm_rm64",
40574	"EVEX_Vcvtsi2ss_xmm_xmm_rm32_er",
40575	"EVEX_Vcvtsi2ss_xmm_xmm_rm64_er",
40576	"Cvtsi2sd_xmm_rm32",
40577	"Cvtsi2sd_xmm_rm64",
40578	"VEX_Vcvtsi2sd_xmm_xmm_rm32",
40579	"VEX_Vcvtsi2sd_xmm_xmm_rm64",
40580	"EVEX_Vcvtsi2sd_xmm_xmm_rm32_er",
40581	"EVEX_Vcvtsi2sd_xmm_xmm_rm64_er",
40582	"Movntps_m128_xmm",
40583	"VEX_Vmovntps_m128_xmm",
40584	"VEX_Vmovntps_m256_ymm",
40585	"EVEX_Vmovntps_m128_xmm",
40586	"EVEX_Vmovntps_m256_ymm",
40587	"EVEX_Vmovntps_m512_zmm",
40588	"Movntpd_m128_xmm",
40589	"VEX_Vmovntpd_m128_xmm",
40590	"VEX_Vmovntpd_m256_ymm",
40591	"EVEX_Vmovntpd_m128_xmm",
40592	"EVEX_Vmovntpd_m256_ymm",
40593	"EVEX_Vmovntpd_m512_zmm",
40594	"Movntss_m32_xmm",
40595	"Movntsd_m64_xmm",
40596	"Cvttps2pi_mm_xmmm64",
40597	"Cvttpd2pi_mm_xmmm128",
40598	"Cvttss2si_r32_xmmm32",
40599	"Cvttss2si_r64_xmmm32",
40600	"VEX_Vcvttss2si_r32_xmmm32",
40601	"VEX_Vcvttss2si_r64_xmmm32",
40602	"EVEX_Vcvttss2si_r32_xmmm32_sae",
40603	"EVEX_Vcvttss2si_r64_xmmm32_sae",
40604	"Cvttsd2si_r32_xmmm64",
40605	"Cvttsd2si_r64_xmmm64",
40606	"VEX_Vcvttsd2si_r32_xmmm64",
40607	"VEX_Vcvttsd2si_r64_xmmm64",
40608	"EVEX_Vcvttsd2si_r32_xmmm64_sae",
40609	"EVEX_Vcvttsd2si_r64_xmmm64_sae",
40610	"Cvtps2pi_mm_xmmm64",
40611	"Cvtpd2pi_mm_xmmm128",
40612	"Cvtss2si_r32_xmmm32",
40613	"Cvtss2si_r64_xmmm32",
40614	"VEX_Vcvtss2si_r32_xmmm32",
40615	"VEX_Vcvtss2si_r64_xmmm32",
40616	"EVEX_Vcvtss2si_r32_xmmm32_er",
40617	"EVEX_Vcvtss2si_r64_xmmm32_er",
40618	"Cvtsd2si_r32_xmmm64",
40619	"Cvtsd2si_r64_xmmm64",
40620	"VEX_Vcvtsd2si_r32_xmmm64",
40621	"VEX_Vcvtsd2si_r64_xmmm64",
40622	"EVEX_Vcvtsd2si_r32_xmmm64_er",
40623	"EVEX_Vcvtsd2si_r64_xmmm64_er",
40624	"Ucomiss_xmm_xmmm32",
40625	"VEX_Vucomiss_xmm_xmmm32",
40626	"EVEX_Vucomiss_xmm_xmmm32_sae",
40627	"Ucomisd_xmm_xmmm64",
40628	"VEX_Vucomisd_xmm_xmmm64",
40629	"EVEX_Vucomisd_xmm_xmmm64_sae",
40630	"Comiss_xmm_xmmm32",
40631	"Comisd_xmm_xmmm64",
40632	"VEX_Vcomiss_xmm_xmmm32",
40633	"VEX_Vcomisd_xmm_xmmm64",
40634	"EVEX_Vcomiss_xmm_xmmm32_sae",
40635	"EVEX_Vcomisd_xmm_xmmm64_sae",
40636	"Wrmsr",
40637	"Rdtsc",
40638	"Rdmsr",
40639	"Rdpmc",
40640	"Sysenter",
40641	"Sysexitd",
40642	"Sysexitq",
40643	"Getsecd",
40644	"Cmovo_r16_rm16",
40645	"Cmovo_r32_rm32",
40646	"Cmovo_r64_rm64",
40647	"Cmovno_r16_rm16",
40648	"Cmovno_r32_rm32",
40649	"Cmovno_r64_rm64",
40650	"Cmovb_r16_rm16",
40651	"Cmovb_r32_rm32",
40652	"Cmovb_r64_rm64",
40653	"Cmovae_r16_rm16",
40654	"Cmovae_r32_rm32",
40655	"Cmovae_r64_rm64",
40656	"Cmove_r16_rm16",
40657	"Cmove_r32_rm32",
40658	"Cmove_r64_rm64",
40659	"Cmovne_r16_rm16",
40660	"Cmovne_r32_rm32",
40661	"Cmovne_r64_rm64",
40662	"Cmovbe_r16_rm16",
40663	"Cmovbe_r32_rm32",
40664	"Cmovbe_r64_rm64",
40665	"Cmova_r16_rm16",
40666	"Cmova_r32_rm32",
40667	"Cmova_r64_rm64",
40668	"Cmovs_r16_rm16",
40669	"Cmovs_r32_rm32",
40670	"Cmovs_r64_rm64",
40671	"Cmovns_r16_rm16",
40672	"Cmovns_r32_rm32",
40673	"Cmovns_r64_rm64",
40674	"Cmovp_r16_rm16",
40675	"Cmovp_r32_rm32",
40676	"Cmovp_r64_rm64",
40677	"Cmovnp_r16_rm16",
40678	"Cmovnp_r32_rm32",
40679	"Cmovnp_r64_rm64",
40680	"Cmovl_r16_rm16",
40681	"Cmovl_r32_rm32",
40682	"Cmovl_r64_rm64",
40683	"Cmovge_r16_rm16",
40684	"Cmovge_r32_rm32",
40685	"Cmovge_r64_rm64",
40686	"Cmovle_r16_rm16",
40687	"Cmovle_r32_rm32",
40688	"Cmovle_r64_rm64",
40689	"Cmovg_r16_rm16",
40690	"Cmovg_r32_rm32",
40691	"Cmovg_r64_rm64",
40692	"VEX_Kandw_kr_kr_kr",
40693	"VEX_Kandq_kr_kr_kr",
40694	"VEX_Kandb_kr_kr_kr",
40695	"VEX_Kandd_kr_kr_kr",
40696	"VEX_Kandnw_kr_kr_kr",
40697	"VEX_Kandnq_kr_kr_kr",
40698	"VEX_Kandnb_kr_kr_kr",
40699	"VEX_Kandnd_kr_kr_kr",
40700	"VEX_Knotw_kr_kr",
40701	"VEX_Knotq_kr_kr",
40702	"VEX_Knotb_kr_kr",
40703	"VEX_Knotd_kr_kr",
40704	"VEX_Korw_kr_kr_kr",
40705	"VEX_Korq_kr_kr_kr",
40706	"VEX_Korb_kr_kr_kr",
40707	"VEX_Kord_kr_kr_kr",
40708	"VEX_Kxnorw_kr_kr_kr",
40709	"VEX_Kxnorq_kr_kr_kr",
40710	"VEX_Kxnorb_kr_kr_kr",
40711	"VEX_Kxnord_kr_kr_kr",
40712	"VEX_Kxorw_kr_kr_kr",
40713	"VEX_Kxorq_kr_kr_kr",
40714	"VEX_Kxorb_kr_kr_kr",
40715	"VEX_Kxord_kr_kr_kr",
40716	"VEX_Kaddw_kr_kr_kr",
40717	"VEX_Kaddq_kr_kr_kr",
40718	"VEX_Kaddb_kr_kr_kr",
40719	"VEX_Kaddd_kr_kr_kr",
40720	"VEX_Kunpckwd_kr_kr_kr",
40721	"VEX_Kunpckdq_kr_kr_kr",
40722	"VEX_Kunpckbw_kr_kr_kr",
40723	"Movmskps_r32_xmm",
40724	"Movmskps_r64_xmm",
40725	"VEX_Vmovmskps_r32_xmm",
40726	"VEX_Vmovmskps_r64_xmm",
40727	"VEX_Vmovmskps_r32_ymm",
40728	"VEX_Vmovmskps_r64_ymm",
40729	"Movmskpd_r32_xmm",
40730	"Movmskpd_r64_xmm",
40731	"VEX_Vmovmskpd_r32_xmm",
40732	"VEX_Vmovmskpd_r64_xmm",
40733	"VEX_Vmovmskpd_r32_ymm",
40734	"VEX_Vmovmskpd_r64_ymm",
40735	"Sqrtps_xmm_xmmm128",
40736	"VEX_Vsqrtps_xmm_xmmm128",
40737	"VEX_Vsqrtps_ymm_ymmm256",
40738	"EVEX_Vsqrtps_xmm_k1z_xmmm128b32",
40739	"EVEX_Vsqrtps_ymm_k1z_ymmm256b32",
40740	"EVEX_Vsqrtps_zmm_k1z_zmmm512b32_er",
40741	"Sqrtpd_xmm_xmmm128",
40742	"VEX_Vsqrtpd_xmm_xmmm128",
40743	"VEX_Vsqrtpd_ymm_ymmm256",
40744	"EVEX_Vsqrtpd_xmm_k1z_xmmm128b64",
40745	"EVEX_Vsqrtpd_ymm_k1z_ymmm256b64",
40746	"EVEX_Vsqrtpd_zmm_k1z_zmmm512b64_er",
40747	"Sqrtss_xmm_xmmm32",
40748	"VEX_Vsqrtss_xmm_xmm_xmmm32",
40749	"EVEX_Vsqrtss_xmm_k1z_xmm_xmmm32_er",
40750	"Sqrtsd_xmm_xmmm64",
40751	"VEX_Vsqrtsd_xmm_xmm_xmmm64",
40752	"EVEX_Vsqrtsd_xmm_k1z_xmm_xmmm64_er",
40753	"Rsqrtps_xmm_xmmm128",
40754	"VEX_Vrsqrtps_xmm_xmmm128",
40755	"VEX_Vrsqrtps_ymm_ymmm256",
40756	"Rsqrtss_xmm_xmmm32",
40757	"VEX_Vrsqrtss_xmm_xmm_xmmm32",
40758	"Rcpps_xmm_xmmm128",
40759	"VEX_Vrcpps_xmm_xmmm128",
40760	"VEX_Vrcpps_ymm_ymmm256",
40761	"Rcpss_xmm_xmmm32",
40762	"VEX_Vrcpss_xmm_xmm_xmmm32",
40763	"Andps_xmm_xmmm128",
40764	"VEX_Vandps_xmm_xmm_xmmm128",
40765	"VEX_Vandps_ymm_ymm_ymmm256",
40766	"EVEX_Vandps_xmm_k1z_xmm_xmmm128b32",
40767	"EVEX_Vandps_ymm_k1z_ymm_ymmm256b32",
40768	"EVEX_Vandps_zmm_k1z_zmm_zmmm512b32",
40769	"Andpd_xmm_xmmm128",
40770	"VEX_Vandpd_xmm_xmm_xmmm128",
40771	"VEX_Vandpd_ymm_ymm_ymmm256",
40772	"EVEX_Vandpd_xmm_k1z_xmm_xmmm128b64",
40773	"EVEX_Vandpd_ymm_k1z_ymm_ymmm256b64",
40774	"EVEX_Vandpd_zmm_k1z_zmm_zmmm512b64",
40775	"Andnps_xmm_xmmm128",
40776	"VEX_Vandnps_xmm_xmm_xmmm128",
40777	"VEX_Vandnps_ymm_ymm_ymmm256",
40778	"EVEX_Vandnps_xmm_k1z_xmm_xmmm128b32",
40779	"EVEX_Vandnps_ymm_k1z_ymm_ymmm256b32",
40780	"EVEX_Vandnps_zmm_k1z_zmm_zmmm512b32",
40781	"Andnpd_xmm_xmmm128",
40782	"VEX_Vandnpd_xmm_xmm_xmmm128",
40783	"VEX_Vandnpd_ymm_ymm_ymmm256",
40784	"EVEX_Vandnpd_xmm_k1z_xmm_xmmm128b64",
40785	"EVEX_Vandnpd_ymm_k1z_ymm_ymmm256b64",
40786	"EVEX_Vandnpd_zmm_k1z_zmm_zmmm512b64",
40787	"Orps_xmm_xmmm128",
40788	"VEX_Vorps_xmm_xmm_xmmm128",
40789	"VEX_Vorps_ymm_ymm_ymmm256",
40790	"EVEX_Vorps_xmm_k1z_xmm_xmmm128b32",
40791	"EVEX_Vorps_ymm_k1z_ymm_ymmm256b32",
40792	"EVEX_Vorps_zmm_k1z_zmm_zmmm512b32",
40793	"Orpd_xmm_xmmm128",
40794	"VEX_Vorpd_xmm_xmm_xmmm128",
40795	"VEX_Vorpd_ymm_ymm_ymmm256",
40796	"EVEX_Vorpd_xmm_k1z_xmm_xmmm128b64",
40797	"EVEX_Vorpd_ymm_k1z_ymm_ymmm256b64",
40798	"EVEX_Vorpd_zmm_k1z_zmm_zmmm512b64",
40799	"Xorps_xmm_xmmm128",
40800	"VEX_Vxorps_xmm_xmm_xmmm128",
40801	"VEX_Vxorps_ymm_ymm_ymmm256",
40802	"EVEX_Vxorps_xmm_k1z_xmm_xmmm128b32",
40803	"EVEX_Vxorps_ymm_k1z_ymm_ymmm256b32",
40804	"EVEX_Vxorps_zmm_k1z_zmm_zmmm512b32",
40805	"Xorpd_xmm_xmmm128",
40806	"VEX_Vxorpd_xmm_xmm_xmmm128",
40807	"VEX_Vxorpd_ymm_ymm_ymmm256",
40808	"EVEX_Vxorpd_xmm_k1z_xmm_xmmm128b64",
40809	"EVEX_Vxorpd_ymm_k1z_ymm_ymmm256b64",
40810	"EVEX_Vxorpd_zmm_k1z_zmm_zmmm512b64",
40811	"Addps_xmm_xmmm128",
40812	"VEX_Vaddps_xmm_xmm_xmmm128",
40813	"VEX_Vaddps_ymm_ymm_ymmm256",
40814	"EVEX_Vaddps_xmm_k1z_xmm_xmmm128b32",
40815	"EVEX_Vaddps_ymm_k1z_ymm_ymmm256b32",
40816	"EVEX_Vaddps_zmm_k1z_zmm_zmmm512b32_er",
40817	"Addpd_xmm_xmmm128",
40818	"VEX_Vaddpd_xmm_xmm_xmmm128",
40819	"VEX_Vaddpd_ymm_ymm_ymmm256",
40820	"EVEX_Vaddpd_xmm_k1z_xmm_xmmm128b64",
40821	"EVEX_Vaddpd_ymm_k1z_ymm_ymmm256b64",
40822	"EVEX_Vaddpd_zmm_k1z_zmm_zmmm512b64_er",
40823	"Addss_xmm_xmmm32",
40824	"VEX_Vaddss_xmm_xmm_xmmm32",
40825	"EVEX_Vaddss_xmm_k1z_xmm_xmmm32_er",
40826	"Addsd_xmm_xmmm64",
40827	"VEX_Vaddsd_xmm_xmm_xmmm64",
40828	"EVEX_Vaddsd_xmm_k1z_xmm_xmmm64_er",
40829	"Mulps_xmm_xmmm128",
40830	"VEX_Vmulps_xmm_xmm_xmmm128",
40831	"VEX_Vmulps_ymm_ymm_ymmm256",
40832	"EVEX_Vmulps_xmm_k1z_xmm_xmmm128b32",
40833	"EVEX_Vmulps_ymm_k1z_ymm_ymmm256b32",
40834	"EVEX_Vmulps_zmm_k1z_zmm_zmmm512b32_er",
40835	"Mulpd_xmm_xmmm128",
40836	"VEX_Vmulpd_xmm_xmm_xmmm128",
40837	"VEX_Vmulpd_ymm_ymm_ymmm256",
40838	"EVEX_Vmulpd_xmm_k1z_xmm_xmmm128b64",
40839	"EVEX_Vmulpd_ymm_k1z_ymm_ymmm256b64",
40840	"EVEX_Vmulpd_zmm_k1z_zmm_zmmm512b64_er",
40841	"Mulss_xmm_xmmm32",
40842	"VEX_Vmulss_xmm_xmm_xmmm32",
40843	"EVEX_Vmulss_xmm_k1z_xmm_xmmm32_er",
40844	"Mulsd_xmm_xmmm64",
40845	"VEX_Vmulsd_xmm_xmm_xmmm64",
40846	"EVEX_Vmulsd_xmm_k1z_xmm_xmmm64_er",
40847	"Cvtps2pd_xmm_xmmm64",
40848	"VEX_Vcvtps2pd_xmm_xmmm64",
40849	"VEX_Vcvtps2pd_ymm_xmmm128",
40850	"EVEX_Vcvtps2pd_xmm_k1z_xmmm64b32",
40851	"EVEX_Vcvtps2pd_ymm_k1z_xmmm128b32",
40852	"EVEX_Vcvtps2pd_zmm_k1z_ymmm256b32_sae",
40853	"Cvtpd2ps_xmm_xmmm128",
40854	"VEX_Vcvtpd2ps_xmm_xmmm128",
40855	"VEX_Vcvtpd2ps_xmm_ymmm256",
40856	"EVEX_Vcvtpd2ps_xmm_k1z_xmmm128b64",
40857	"EVEX_Vcvtpd2ps_xmm_k1z_ymmm256b64",
40858	"EVEX_Vcvtpd2ps_ymm_k1z_zmmm512b64_er",
40859	"Cvtss2sd_xmm_xmmm32",
40860	"VEX_Vcvtss2sd_xmm_xmm_xmmm32",
40861	"EVEX_Vcvtss2sd_xmm_k1z_xmm_xmmm32_sae",
40862	"Cvtsd2ss_xmm_xmmm64",
40863	"VEX_Vcvtsd2ss_xmm_xmm_xmmm64",
40864	"EVEX_Vcvtsd2ss_xmm_k1z_xmm_xmmm64_er",
40865	"Cvtdq2ps_xmm_xmmm128",
40866	"VEX_Vcvtdq2ps_xmm_xmmm128",
40867	"VEX_Vcvtdq2ps_ymm_ymmm256",
40868	"EVEX_Vcvtdq2ps_xmm_k1z_xmmm128b32",
40869	"EVEX_Vcvtdq2ps_ymm_k1z_ymmm256b32",
40870	"EVEX_Vcvtdq2ps_zmm_k1z_zmmm512b32_er",
40871	"EVEX_Vcvtqq2ps_xmm_k1z_xmmm128b64",
40872	"EVEX_Vcvtqq2ps_xmm_k1z_ymmm256b64",
40873	"EVEX_Vcvtqq2ps_ymm_k1z_zmmm512b64_er",
40874	"Cvtps2dq_xmm_xmmm128",
40875	"VEX_Vcvtps2dq_xmm_xmmm128",
40876	"VEX_Vcvtps2dq_ymm_ymmm256",
40877	"EVEX_Vcvtps2dq_xmm_k1z_xmmm128b32",
40878	"EVEX_Vcvtps2dq_ymm_k1z_ymmm256b32",
40879	"EVEX_Vcvtps2dq_zmm_k1z_zmmm512b32_er",
40880	"Cvttps2dq_xmm_xmmm128",
40881	"VEX_Vcvttps2dq_xmm_xmmm128",
40882	"VEX_Vcvttps2dq_ymm_ymmm256",
40883	"EVEX_Vcvttps2dq_xmm_k1z_xmmm128b32",
40884	"EVEX_Vcvttps2dq_ymm_k1z_ymmm256b32",
40885	"EVEX_Vcvttps2dq_zmm_k1z_zmmm512b32_sae",
40886	"Subps_xmm_xmmm128",
40887	"VEX_Vsubps_xmm_xmm_xmmm128",
40888	"VEX_Vsubps_ymm_ymm_ymmm256",
40889	"EVEX_Vsubps_xmm_k1z_xmm_xmmm128b32",
40890	"EVEX_Vsubps_ymm_k1z_ymm_ymmm256b32",
40891	"EVEX_Vsubps_zmm_k1z_zmm_zmmm512b32_er",
40892	"Subpd_xmm_xmmm128",
40893	"VEX_Vsubpd_xmm_xmm_xmmm128",
40894	"VEX_Vsubpd_ymm_ymm_ymmm256",
40895	"EVEX_Vsubpd_xmm_k1z_xmm_xmmm128b64",
40896	"EVEX_Vsubpd_ymm_k1z_ymm_ymmm256b64",
40897	"EVEX_Vsubpd_zmm_k1z_zmm_zmmm512b64_er",
40898	"Subss_xmm_xmmm32",
40899	"VEX_Vsubss_xmm_xmm_xmmm32",
40900	"EVEX_Vsubss_xmm_k1z_xmm_xmmm32_er",
40901	"Subsd_xmm_xmmm64",
40902	"VEX_Vsubsd_xmm_xmm_xmmm64",
40903	"EVEX_Vsubsd_xmm_k1z_xmm_xmmm64_er",
40904	"Minps_xmm_xmmm128",
40905	"VEX_Vminps_xmm_xmm_xmmm128",
40906	"VEX_Vminps_ymm_ymm_ymmm256",
40907	"EVEX_Vminps_xmm_k1z_xmm_xmmm128b32",
40908	"EVEX_Vminps_ymm_k1z_ymm_ymmm256b32",
40909	"EVEX_Vminps_zmm_k1z_zmm_zmmm512b32_sae",
40910	"Minpd_xmm_xmmm128",
40911	"VEX_Vminpd_xmm_xmm_xmmm128",
40912	"VEX_Vminpd_ymm_ymm_ymmm256",
40913	"EVEX_Vminpd_xmm_k1z_xmm_xmmm128b64",
40914	"EVEX_Vminpd_ymm_k1z_ymm_ymmm256b64",
40915	"EVEX_Vminpd_zmm_k1z_zmm_zmmm512b64_sae",
40916	"Minss_xmm_xmmm32",
40917	"VEX_Vminss_xmm_xmm_xmmm32",
40918	"EVEX_Vminss_xmm_k1z_xmm_xmmm32_sae",
40919	"Minsd_xmm_xmmm64",
40920	"VEX_Vminsd_xmm_xmm_xmmm64",
40921	"EVEX_Vminsd_xmm_k1z_xmm_xmmm64_sae",
40922	"Divps_xmm_xmmm128",
40923	"VEX_Vdivps_xmm_xmm_xmmm128",
40924	"VEX_Vdivps_ymm_ymm_ymmm256",
40925	"EVEX_Vdivps_xmm_k1z_xmm_xmmm128b32",
40926	"EVEX_Vdivps_ymm_k1z_ymm_ymmm256b32",
40927	"EVEX_Vdivps_zmm_k1z_zmm_zmmm512b32_er",
40928	"Divpd_xmm_xmmm128",
40929	"VEX_Vdivpd_xmm_xmm_xmmm128",
40930	"VEX_Vdivpd_ymm_ymm_ymmm256",
40931	"EVEX_Vdivpd_xmm_k1z_xmm_xmmm128b64",
40932	"EVEX_Vdivpd_ymm_k1z_ymm_ymmm256b64",
40933	"EVEX_Vdivpd_zmm_k1z_zmm_zmmm512b64_er",
40934	"Divss_xmm_xmmm32",
40935	"VEX_Vdivss_xmm_xmm_xmmm32",
40936	"EVEX_Vdivss_xmm_k1z_xmm_xmmm32_er",
40937	"Divsd_xmm_xmmm64",
40938	"VEX_Vdivsd_xmm_xmm_xmmm64",
40939	"EVEX_Vdivsd_xmm_k1z_xmm_xmmm64_er",
40940	"Maxps_xmm_xmmm128",
40941	"VEX_Vmaxps_xmm_xmm_xmmm128",
40942	"VEX_Vmaxps_ymm_ymm_ymmm256",
40943	"EVEX_Vmaxps_xmm_k1z_xmm_xmmm128b32",
40944	"EVEX_Vmaxps_ymm_k1z_ymm_ymmm256b32",
40945	"EVEX_Vmaxps_zmm_k1z_zmm_zmmm512b32_sae",
40946	"Maxpd_xmm_xmmm128",
40947	"VEX_Vmaxpd_xmm_xmm_xmmm128",
40948	"VEX_Vmaxpd_ymm_ymm_ymmm256",
40949	"EVEX_Vmaxpd_xmm_k1z_xmm_xmmm128b64",
40950	"EVEX_Vmaxpd_ymm_k1z_ymm_ymmm256b64",
40951	"EVEX_Vmaxpd_zmm_k1z_zmm_zmmm512b64_sae",
40952	"Maxss_xmm_xmmm32",
40953	"VEX_Vmaxss_xmm_xmm_xmmm32",
40954	"EVEX_Vmaxss_xmm_k1z_xmm_xmmm32_sae",
40955	"Maxsd_xmm_xmmm64",
40956	"VEX_Vmaxsd_xmm_xmm_xmmm64",
40957	"EVEX_Vmaxsd_xmm_k1z_xmm_xmmm64_sae",
40958	"Punpcklbw_mm_mmm32",
40959	"Punpcklbw_xmm_xmmm128",
40960	"VEX_Vpunpcklbw_xmm_xmm_xmmm128",
40961	"VEX_Vpunpcklbw_ymm_ymm_ymmm256",
40962	"EVEX_Vpunpcklbw_xmm_k1z_xmm_xmmm128",
40963	"EVEX_Vpunpcklbw_ymm_k1z_ymm_ymmm256",
40964	"EVEX_Vpunpcklbw_zmm_k1z_zmm_zmmm512",
40965	"Punpcklwd_mm_mmm32",
40966	"Punpcklwd_xmm_xmmm128",
40967	"VEX_Vpunpcklwd_xmm_xmm_xmmm128",
40968	"VEX_Vpunpcklwd_ymm_ymm_ymmm256",
40969	"EVEX_Vpunpcklwd_xmm_k1z_xmm_xmmm128",
40970	"EVEX_Vpunpcklwd_ymm_k1z_ymm_ymmm256",
40971	"EVEX_Vpunpcklwd_zmm_k1z_zmm_zmmm512",
40972	"Punpckldq_mm_mmm32",
40973	"Punpckldq_xmm_xmmm128",
40974	"VEX_Vpunpckldq_xmm_xmm_xmmm128",
40975	"VEX_Vpunpckldq_ymm_ymm_ymmm256",
40976	"EVEX_Vpunpckldq_xmm_k1z_xmm_xmmm128b32",
40977	"EVEX_Vpunpckldq_ymm_k1z_ymm_ymmm256b32",
40978	"EVEX_Vpunpckldq_zmm_k1z_zmm_zmmm512b32",
40979	"Packsswb_mm_mmm64",
40980	"Packsswb_xmm_xmmm128",
40981	"VEX_Vpacksswb_xmm_xmm_xmmm128",
40982	"VEX_Vpacksswb_ymm_ymm_ymmm256",
40983	"EVEX_Vpacksswb_xmm_k1z_xmm_xmmm128",
40984	"EVEX_Vpacksswb_ymm_k1z_ymm_ymmm256",
40985	"EVEX_Vpacksswb_zmm_k1z_zmm_zmmm512",
40986	"Pcmpgtb_mm_mmm64",
40987	"Pcmpgtb_xmm_xmmm128",
40988	"VEX_Vpcmpgtb_xmm_xmm_xmmm128",
40989	"VEX_Vpcmpgtb_ymm_ymm_ymmm256",
40990	"EVEX_Vpcmpgtb_kr_k1_xmm_xmmm128",
40991	"EVEX_Vpcmpgtb_kr_k1_ymm_ymmm256",
40992	"EVEX_Vpcmpgtb_kr_k1_zmm_zmmm512",
40993	"Pcmpgtw_mm_mmm64",
40994	"Pcmpgtw_xmm_xmmm128",
40995	"VEX_Vpcmpgtw_xmm_xmm_xmmm128",
40996	"VEX_Vpcmpgtw_ymm_ymm_ymmm256",
40997	"EVEX_Vpcmpgtw_kr_k1_xmm_xmmm128",
40998	"EVEX_Vpcmpgtw_kr_k1_ymm_ymmm256",
40999	"EVEX_Vpcmpgtw_kr_k1_zmm_zmmm512",
41000	"Pcmpgtd_mm_mmm64",
41001	"Pcmpgtd_xmm_xmmm128",
41002	"VEX_Vpcmpgtd_xmm_xmm_xmmm128",
41003	"VEX_Vpcmpgtd_ymm_ymm_ymmm256",
41004	"EVEX_Vpcmpgtd_kr_k1_xmm_xmmm128b32",
41005	"EVEX_Vpcmpgtd_kr_k1_ymm_ymmm256b32",
41006	"EVEX_Vpcmpgtd_kr_k1_zmm_zmmm512b32",
41007	"Packuswb_mm_mmm64",
41008	"Packuswb_xmm_xmmm128",
41009	"VEX_Vpackuswb_xmm_xmm_xmmm128",
41010	"VEX_Vpackuswb_ymm_ymm_ymmm256",
41011	"EVEX_Vpackuswb_xmm_k1z_xmm_xmmm128",
41012	"EVEX_Vpackuswb_ymm_k1z_ymm_ymmm256",
41013	"EVEX_Vpackuswb_zmm_k1z_zmm_zmmm512",
41014	"Punpckhbw_mm_mmm64",
41015	"Punpckhbw_xmm_xmmm128",
41016	"VEX_Vpunpckhbw_xmm_xmm_xmmm128",
41017	"VEX_Vpunpckhbw_ymm_ymm_ymmm256",
41018	"EVEX_Vpunpckhbw_xmm_k1z_xmm_xmmm128",
41019	"EVEX_Vpunpckhbw_ymm_k1z_ymm_ymmm256",
41020	"EVEX_Vpunpckhbw_zmm_k1z_zmm_zmmm512",
41021	"Punpckhwd_mm_mmm64",
41022	"Punpckhwd_xmm_xmmm128",
41023	"VEX_Vpunpckhwd_xmm_xmm_xmmm128",
41024	"VEX_Vpunpckhwd_ymm_ymm_ymmm256",
41025	"EVEX_Vpunpckhwd_xmm_k1z_xmm_xmmm128",
41026	"EVEX_Vpunpckhwd_ymm_k1z_ymm_ymmm256",
41027	"EVEX_Vpunpckhwd_zmm_k1z_zmm_zmmm512",
41028	"Punpckhdq_mm_mmm64",
41029	"Punpckhdq_xmm_xmmm128",
41030	"VEX_Vpunpckhdq_xmm_xmm_xmmm128",
41031	"VEX_Vpunpckhdq_ymm_ymm_ymmm256",
41032	"EVEX_Vpunpckhdq_xmm_k1z_xmm_xmmm128b32",
41033	"EVEX_Vpunpckhdq_ymm_k1z_ymm_ymmm256b32",
41034	"EVEX_Vpunpckhdq_zmm_k1z_zmm_zmmm512b32",
41035	"Packssdw_mm_mmm64",
41036	"Packssdw_xmm_xmmm128",
41037	"VEX_Vpackssdw_xmm_xmm_xmmm128",
41038	"VEX_Vpackssdw_ymm_ymm_ymmm256",
41039	"EVEX_Vpackssdw_xmm_k1z_xmm_xmmm128b32",
41040	"EVEX_Vpackssdw_ymm_k1z_ymm_ymmm256b32",
41041	"EVEX_Vpackssdw_zmm_k1z_zmm_zmmm512b32",
41042	"Punpcklqdq_xmm_xmmm128",
41043	"VEX_Vpunpcklqdq_xmm_xmm_xmmm128",
41044	"VEX_Vpunpcklqdq_ymm_ymm_ymmm256",
41045	"EVEX_Vpunpcklqdq_xmm_k1z_xmm_xmmm128b64",
41046	"EVEX_Vpunpcklqdq_ymm_k1z_ymm_ymmm256b64",
41047	"EVEX_Vpunpcklqdq_zmm_k1z_zmm_zmmm512b64",
41048	"Punpckhqdq_xmm_xmmm128",
41049	"VEX_Vpunpckhqdq_xmm_xmm_xmmm128",
41050	"VEX_Vpunpckhqdq_ymm_ymm_ymmm256",
41051	"EVEX_Vpunpckhqdq_xmm_k1z_xmm_xmmm128b64",
41052	"EVEX_Vpunpckhqdq_ymm_k1z_ymm_ymmm256b64",
41053	"EVEX_Vpunpckhqdq_zmm_k1z_zmm_zmmm512b64",
41054	"Movd_mm_rm32",
41055	"Movq_mm_rm64",
41056	"Movd_xmm_rm32",
41057	"Movq_xmm_rm64",
41058	"VEX_Vmovd_xmm_rm32",
41059	"VEX_Vmovq_xmm_rm64",
41060	"EVEX_Vmovd_xmm_rm32",
41061	"EVEX_Vmovq_xmm_rm64",
41062	"Movq_mm_mmm64",
41063	"Movdqa_xmm_xmmm128",
41064	"VEX_Vmovdqa_xmm_xmmm128",
41065	"VEX_Vmovdqa_ymm_ymmm256",
41066	"EVEX_Vmovdqa32_xmm_k1z_xmmm128",
41067	"EVEX_Vmovdqa32_ymm_k1z_ymmm256",
41068	"EVEX_Vmovdqa32_zmm_k1z_zmmm512",
41069	"EVEX_Vmovdqa64_xmm_k1z_xmmm128",
41070	"EVEX_Vmovdqa64_ymm_k1z_ymmm256",
41071	"EVEX_Vmovdqa64_zmm_k1z_zmmm512",
41072	"Movdqu_xmm_xmmm128",
41073	"VEX_Vmovdqu_xmm_xmmm128",
41074	"VEX_Vmovdqu_ymm_ymmm256",
41075	"EVEX_Vmovdqu32_xmm_k1z_xmmm128",
41076	"EVEX_Vmovdqu32_ymm_k1z_ymmm256",
41077	"EVEX_Vmovdqu32_zmm_k1z_zmmm512",
41078	"EVEX_Vmovdqu64_xmm_k1z_xmmm128",
41079	"EVEX_Vmovdqu64_ymm_k1z_ymmm256",
41080	"EVEX_Vmovdqu64_zmm_k1z_zmmm512",
41081	"EVEX_Vmovdqu8_xmm_k1z_xmmm128",
41082	"EVEX_Vmovdqu8_ymm_k1z_ymmm256",
41083	"EVEX_Vmovdqu8_zmm_k1z_zmmm512",
41084	"EVEX_Vmovdqu16_xmm_k1z_xmmm128",
41085	"EVEX_Vmovdqu16_ymm_k1z_ymmm256",
41086	"EVEX_Vmovdqu16_zmm_k1z_zmmm512",
41087	"Pshufw_mm_mmm64_imm8",
41088	"Pshufd_xmm_xmmm128_imm8",
41089	"VEX_Vpshufd_xmm_xmmm128_imm8",
41090	"VEX_Vpshufd_ymm_ymmm256_imm8",
41091	"EVEX_Vpshufd_xmm_k1z_xmmm128b32_imm8",
41092	"EVEX_Vpshufd_ymm_k1z_ymmm256b32_imm8",
41093	"EVEX_Vpshufd_zmm_k1z_zmmm512b32_imm8",
41094	"Pshufhw_xmm_xmmm128_imm8",
41095	"VEX_Vpshufhw_xmm_xmmm128_imm8",
41096	"VEX_Vpshufhw_ymm_ymmm256_imm8",
41097	"EVEX_Vpshufhw_xmm_k1z_xmmm128_imm8",
41098	"EVEX_Vpshufhw_ymm_k1z_ymmm256_imm8",
41099	"EVEX_Vpshufhw_zmm_k1z_zmmm512_imm8",
41100	"Pshuflw_xmm_xmmm128_imm8",
41101	"VEX_Vpshuflw_xmm_xmmm128_imm8",
41102	"VEX_Vpshuflw_ymm_ymmm256_imm8",
41103	"EVEX_Vpshuflw_xmm_k1z_xmmm128_imm8",
41104	"EVEX_Vpshuflw_ymm_k1z_ymmm256_imm8",
41105	"EVEX_Vpshuflw_zmm_k1z_zmmm512_imm8",
41106	"Psrlw_mm_imm8",
41107	"Psrlw_xmm_imm8",
41108	"VEX_Vpsrlw_xmm_xmm_imm8",
41109	"VEX_Vpsrlw_ymm_ymm_imm8",
41110	"EVEX_Vpsrlw_xmm_k1z_xmmm128_imm8",
41111	"EVEX_Vpsrlw_ymm_k1z_ymmm256_imm8",
41112	"EVEX_Vpsrlw_zmm_k1z_zmmm512_imm8",
41113	"Psraw_mm_imm8",
41114	"Psraw_xmm_imm8",
41115	"VEX_Vpsraw_xmm_xmm_imm8",
41116	"VEX_Vpsraw_ymm_ymm_imm8",
41117	"EVEX_Vpsraw_xmm_k1z_xmmm128_imm8",
41118	"EVEX_Vpsraw_ymm_k1z_ymmm256_imm8",
41119	"EVEX_Vpsraw_zmm_k1z_zmmm512_imm8",
41120	"Psllw_mm_imm8",
41121	"Psllw_xmm_imm8",
41122	"VEX_Vpsllw_xmm_xmm_imm8",
41123	"VEX_Vpsllw_ymm_ymm_imm8",
41124	"EVEX_Vpsllw_xmm_k1z_xmmm128_imm8",
41125	"EVEX_Vpsllw_ymm_k1z_ymmm256_imm8",
41126	"EVEX_Vpsllw_zmm_k1z_zmmm512_imm8",
41127	"EVEX_Vprord_xmm_k1z_xmmm128b32_imm8",
41128	"EVEX_Vprord_ymm_k1z_ymmm256b32_imm8",
41129	"EVEX_Vprord_zmm_k1z_zmmm512b32_imm8",
41130	"EVEX_Vprorq_xmm_k1z_xmmm128b64_imm8",
41131	"EVEX_Vprorq_ymm_k1z_ymmm256b64_imm8",
41132	"EVEX_Vprorq_zmm_k1z_zmmm512b64_imm8",
41133	"EVEX_Vprold_xmm_k1z_xmmm128b32_imm8",
41134	"EVEX_Vprold_ymm_k1z_ymmm256b32_imm8",
41135	"EVEX_Vprold_zmm_k1z_zmmm512b32_imm8",
41136	"EVEX_Vprolq_xmm_k1z_xmmm128b64_imm8",
41137	"EVEX_Vprolq_ymm_k1z_ymmm256b64_imm8",
41138	"EVEX_Vprolq_zmm_k1z_zmmm512b64_imm8",
41139	"Psrld_mm_imm8",
41140	"Psrld_xmm_imm8",
41141	"VEX_Vpsrld_xmm_xmm_imm8",
41142	"VEX_Vpsrld_ymm_ymm_imm8",
41143	"EVEX_Vpsrld_xmm_k1z_xmmm128b32_imm8",
41144	"EVEX_Vpsrld_ymm_k1z_ymmm256b32_imm8",
41145	"EVEX_Vpsrld_zmm_k1z_zmmm512b32_imm8",
41146	"Psrad_mm_imm8",
41147	"Psrad_xmm_imm8",
41148	"VEX_Vpsrad_xmm_xmm_imm8",
41149	"VEX_Vpsrad_ymm_ymm_imm8",
41150	"EVEX_Vpsrad_xmm_k1z_xmmm128b32_imm8",
41151	"EVEX_Vpsrad_ymm_k1z_ymmm256b32_imm8",
41152	"EVEX_Vpsrad_zmm_k1z_zmmm512b32_imm8",
41153	"EVEX_Vpsraq_xmm_k1z_xmmm128b64_imm8",
41154	"EVEX_Vpsraq_ymm_k1z_ymmm256b64_imm8",
41155	"EVEX_Vpsraq_zmm_k1z_zmmm512b64_imm8",
41156	"Pslld_mm_imm8",
41157	"Pslld_xmm_imm8",
41158	"VEX_Vpslld_xmm_xmm_imm8",
41159	"VEX_Vpslld_ymm_ymm_imm8",
41160	"EVEX_Vpslld_xmm_k1z_xmmm128b32_imm8",
41161	"EVEX_Vpslld_ymm_k1z_ymmm256b32_imm8",
41162	"EVEX_Vpslld_zmm_k1z_zmmm512b32_imm8",
41163	"Psrlq_mm_imm8",
41164	"Psrlq_xmm_imm8",
41165	"VEX_Vpsrlq_xmm_xmm_imm8",
41166	"VEX_Vpsrlq_ymm_ymm_imm8",
41167	"EVEX_Vpsrlq_xmm_k1z_xmmm128b64_imm8",
41168	"EVEX_Vpsrlq_ymm_k1z_ymmm256b64_imm8",
41169	"EVEX_Vpsrlq_zmm_k1z_zmmm512b64_imm8",
41170	"Psrldq_xmm_imm8",
41171	"VEX_Vpsrldq_xmm_xmm_imm8",
41172	"VEX_Vpsrldq_ymm_ymm_imm8",
41173	"EVEX_Vpsrldq_xmm_xmmm128_imm8",
41174	"EVEX_Vpsrldq_ymm_ymmm256_imm8",
41175	"EVEX_Vpsrldq_zmm_zmmm512_imm8",
41176	"Psllq_mm_imm8",
41177	"Psllq_xmm_imm8",
41178	"VEX_Vpsllq_xmm_xmm_imm8",
41179	"VEX_Vpsllq_ymm_ymm_imm8",
41180	"EVEX_Vpsllq_xmm_k1z_xmmm128b64_imm8",
41181	"EVEX_Vpsllq_ymm_k1z_ymmm256b64_imm8",
41182	"EVEX_Vpsllq_zmm_k1z_zmmm512b64_imm8",
41183	"Pslldq_xmm_imm8",
41184	"VEX_Vpslldq_xmm_xmm_imm8",
41185	"VEX_Vpslldq_ymm_ymm_imm8",
41186	"EVEX_Vpslldq_xmm_xmmm128_imm8",
41187	"EVEX_Vpslldq_ymm_ymmm256_imm8",
41188	"EVEX_Vpslldq_zmm_zmmm512_imm8",
41189	"Pcmpeqb_mm_mmm64",
41190	"Pcmpeqb_xmm_xmmm128",
41191	"VEX_Vpcmpeqb_xmm_xmm_xmmm128",
41192	"VEX_Vpcmpeqb_ymm_ymm_ymmm256",
41193	"EVEX_Vpcmpeqb_kr_k1_xmm_xmmm128",
41194	"EVEX_Vpcmpeqb_kr_k1_ymm_ymmm256",
41195	"EVEX_Vpcmpeqb_kr_k1_zmm_zmmm512",
41196	"Pcmpeqw_mm_mmm64",
41197	"Pcmpeqw_xmm_xmmm128",
41198	"VEX_Vpcmpeqw_xmm_xmm_xmmm128",
41199	"VEX_Vpcmpeqw_ymm_ymm_ymmm256",
41200	"EVEX_Vpcmpeqw_kr_k1_xmm_xmmm128",
41201	"EVEX_Vpcmpeqw_kr_k1_ymm_ymmm256",
41202	"EVEX_Vpcmpeqw_kr_k1_zmm_zmmm512",
41203	"Pcmpeqd_mm_mmm64",
41204	"Pcmpeqd_xmm_xmmm128",
41205	"VEX_Vpcmpeqd_xmm_xmm_xmmm128",
41206	"VEX_Vpcmpeqd_ymm_ymm_ymmm256",
41207	"EVEX_Vpcmpeqd_kr_k1_xmm_xmmm128b32",
41208	"EVEX_Vpcmpeqd_kr_k1_ymm_ymmm256b32",
41209	"EVEX_Vpcmpeqd_kr_k1_zmm_zmmm512b32",
41210	"Emms",
41211	"VEX_Vzeroupper",
41212	"VEX_Vzeroall",
41213	"Vmread_rm32_r32",
41214	"Vmread_rm64_r64",
41215	"EVEX_Vcvttps2udq_xmm_k1z_xmmm128b32",
41216	"EVEX_Vcvttps2udq_ymm_k1z_ymmm256b32",
41217	"EVEX_Vcvttps2udq_zmm_k1z_zmmm512b32_sae",
41218	"EVEX_Vcvttpd2udq_xmm_k1z_xmmm128b64",
41219	"EVEX_Vcvttpd2udq_xmm_k1z_ymmm256b64",
41220	"EVEX_Vcvttpd2udq_ymm_k1z_zmmm512b64_sae",
41221	"Extrq_xmm_imm8_imm8",
41222	"EVEX_Vcvttps2uqq_xmm_k1z_xmmm64b32",
41223	"EVEX_Vcvttps2uqq_ymm_k1z_xmmm128b32",
41224	"EVEX_Vcvttps2uqq_zmm_k1z_ymmm256b32_sae",
41225	"EVEX_Vcvttpd2uqq_xmm_k1z_xmmm128b64",
41226	"EVEX_Vcvttpd2uqq_ymm_k1z_ymmm256b64",
41227	"EVEX_Vcvttpd2uqq_zmm_k1z_zmmm512b64_sae",
41228	"EVEX_Vcvttss2usi_r32_xmmm32_sae",
41229	"EVEX_Vcvttss2usi_r64_xmmm32_sae",
41230	"Insertq_xmm_xmm_imm8_imm8",
41231	"EVEX_Vcvttsd2usi_r32_xmmm64_sae",
41232	"EVEX_Vcvttsd2usi_r64_xmmm64_sae",
41233	"Vmwrite_r32_rm32",
41234	"Vmwrite_r64_rm64",
41235	"EVEX_Vcvtps2udq_xmm_k1z_xmmm128b32",
41236	"EVEX_Vcvtps2udq_ymm_k1z_ymmm256b32",
41237	"EVEX_Vcvtps2udq_zmm_k1z_zmmm512b32_er",
41238	"EVEX_Vcvtpd2udq_xmm_k1z_xmmm128b64",
41239	"EVEX_Vcvtpd2udq_xmm_k1z_ymmm256b64",
41240	"EVEX_Vcvtpd2udq_ymm_k1z_zmmm512b64_er",
41241	"Extrq_xmm_xmm",
41242	"EVEX_Vcvtps2uqq_xmm_k1z_xmmm64b32",
41243	"EVEX_Vcvtps2uqq_ymm_k1z_xmmm128b32",
41244	"EVEX_Vcvtps2uqq_zmm_k1z_ymmm256b32_er",
41245	"EVEX_Vcvtpd2uqq_xmm_k1z_xmmm128b64",
41246	"EVEX_Vcvtpd2uqq_ymm_k1z_ymmm256b64",
41247	"EVEX_Vcvtpd2uqq_zmm_k1z_zmmm512b64_er",
41248	"EVEX_Vcvtss2usi_r32_xmmm32_er",
41249	"EVEX_Vcvtss2usi_r64_xmmm32_er",
41250	"Insertq_xmm_xmm",
41251	"EVEX_Vcvtsd2usi_r32_xmmm64_er",
41252	"EVEX_Vcvtsd2usi_r64_xmmm64_er",
41253	"EVEX_Vcvttps2qq_xmm_k1z_xmmm64b32",
41254	"EVEX_Vcvttps2qq_ymm_k1z_xmmm128b32",
41255	"EVEX_Vcvttps2qq_zmm_k1z_ymmm256b32_sae",
41256	"EVEX_Vcvttpd2qq_xmm_k1z_xmmm128b64",
41257	"EVEX_Vcvttpd2qq_ymm_k1z_ymmm256b64",
41258	"EVEX_Vcvttpd2qq_zmm_k1z_zmmm512b64_sae",
41259	"EVEX_Vcvtudq2pd_xmm_k1z_xmmm64b32",
41260	"EVEX_Vcvtudq2pd_ymm_k1z_xmmm128b32",
41261	"EVEX_Vcvtudq2pd_zmm_k1z_ymmm256b32_er",
41262	"EVEX_Vcvtuqq2pd_xmm_k1z_xmmm128b64",
41263	"EVEX_Vcvtuqq2pd_ymm_k1z_ymmm256b64",
41264	"EVEX_Vcvtuqq2pd_zmm_k1z_zmmm512b64_er",
41265	"EVEX_Vcvtudq2ps_xmm_k1z_xmmm128b32",
41266	"EVEX_Vcvtudq2ps_ymm_k1z_ymmm256b32",
41267	"EVEX_Vcvtudq2ps_zmm_k1z_zmmm512b32_er",
41268	"EVEX_Vcvtuqq2ps_xmm_k1z_xmmm128b64",
41269	"EVEX_Vcvtuqq2ps_xmm_k1z_ymmm256b64",
41270	"EVEX_Vcvtuqq2ps_ymm_k1z_zmmm512b64_er",
41271	"EVEX_Vcvtps2qq_xmm_k1z_xmmm64b32",
41272	"EVEX_Vcvtps2qq_ymm_k1z_xmmm128b32",
41273	"EVEX_Vcvtps2qq_zmm_k1z_ymmm256b32_er",
41274	"EVEX_Vcvtpd2qq_xmm_k1z_xmmm128b64",
41275	"EVEX_Vcvtpd2qq_ymm_k1z_ymmm256b64",
41276	"EVEX_Vcvtpd2qq_zmm_k1z_zmmm512b64_er",
41277	"EVEX_Vcvtusi2ss_xmm_xmm_rm32_er",
41278	"EVEX_Vcvtusi2ss_xmm_xmm_rm64_er",
41279	"EVEX_Vcvtusi2sd_xmm_xmm_rm32_er",
41280	"EVEX_Vcvtusi2sd_xmm_xmm_rm64_er",
41281	"Haddpd_xmm_xmmm128",
41282	"VEX_Vhaddpd_xmm_xmm_xmmm128",
41283	"VEX_Vhaddpd_ymm_ymm_ymmm256",
41284	"Haddps_xmm_xmmm128",
41285	"VEX_Vhaddps_xmm_xmm_xmmm128",
41286	"VEX_Vhaddps_ymm_ymm_ymmm256",
41287	"Hsubpd_xmm_xmmm128",
41288	"VEX_Vhsubpd_xmm_xmm_xmmm128",
41289	"VEX_Vhsubpd_ymm_ymm_ymmm256",
41290	"Hsubps_xmm_xmmm128",
41291	"VEX_Vhsubps_xmm_xmm_xmmm128",
41292	"VEX_Vhsubps_ymm_ymm_ymmm256",
41293	"Movd_rm32_mm",
41294	"Movq_rm64_mm",
41295	"Movd_rm32_xmm",
41296	"Movq_rm64_xmm",
41297	"VEX_Vmovd_rm32_xmm",
41298	"VEX_Vmovq_rm64_xmm",
41299	"EVEX_Vmovd_rm32_xmm",
41300	"EVEX_Vmovq_rm64_xmm",
41301	"Movq_xmm_xmmm64",
41302	"VEX_Vmovq_xmm_xmmm64",
41303	"EVEX_Vmovq_xmm_xmmm64",
41304	"Movq_mmm64_mm",
41305	"Movdqa_xmmm128_xmm",
41306	"VEX_Vmovdqa_xmmm128_xmm",
41307	"VEX_Vmovdqa_ymmm256_ymm",
41308	"EVEX_Vmovdqa32_xmmm128_k1z_xmm",
41309	"EVEX_Vmovdqa32_ymmm256_k1z_ymm",
41310	"EVEX_Vmovdqa32_zmmm512_k1z_zmm",
41311	"EVEX_Vmovdqa64_xmmm128_k1z_xmm",
41312	"EVEX_Vmovdqa64_ymmm256_k1z_ymm",
41313	"EVEX_Vmovdqa64_zmmm512_k1z_zmm",
41314	"Movdqu_xmmm128_xmm",
41315	"VEX_Vmovdqu_xmmm128_xmm",
41316	"VEX_Vmovdqu_ymmm256_ymm",
41317	"EVEX_Vmovdqu32_xmmm128_k1z_xmm",
41318	"EVEX_Vmovdqu32_ymmm256_k1z_ymm",
41319	"EVEX_Vmovdqu32_zmmm512_k1z_zmm",
41320	"EVEX_Vmovdqu64_xmmm128_k1z_xmm",
41321	"EVEX_Vmovdqu64_ymmm256_k1z_ymm",
41322	"EVEX_Vmovdqu64_zmmm512_k1z_zmm",
41323	"EVEX_Vmovdqu8_xmmm128_k1z_xmm",
41324	"EVEX_Vmovdqu8_ymmm256_k1z_ymm",
41325	"EVEX_Vmovdqu8_zmmm512_k1z_zmm",
41326	"EVEX_Vmovdqu16_xmmm128_k1z_xmm",
41327	"EVEX_Vmovdqu16_ymmm256_k1z_ymm",
41328	"EVEX_Vmovdqu16_zmmm512_k1z_zmm",
41329	"Jo_rel16",
41330	"Jo_rel32_32",
41331	"Jo_rel32_64",
41332	"Jno_rel16",
41333	"Jno_rel32_32",
41334	"Jno_rel32_64",
41335	"Jb_rel16",
41336	"Jb_rel32_32",
41337	"Jb_rel32_64",
41338	"Jae_rel16",
41339	"Jae_rel32_32",
41340	"Jae_rel32_64",
41341	"Je_rel16",
41342	"Je_rel32_32",
41343	"Je_rel32_64",
41344	"Jne_rel16",
41345	"Jne_rel32_32",
41346	"Jne_rel32_64",
41347	"Jbe_rel16",
41348	"Jbe_rel32_32",
41349	"Jbe_rel32_64",
41350	"Ja_rel16",
41351	"Ja_rel32_32",
41352	"Ja_rel32_64",
41353	"Js_rel16",
41354	"Js_rel32_32",
41355	"Js_rel32_64",
41356	"Jns_rel16",
41357	"Jns_rel32_32",
41358	"Jns_rel32_64",
41359	"Jp_rel16",
41360	"Jp_rel32_32",
41361	"Jp_rel32_64",
41362	"Jnp_rel16",
41363	"Jnp_rel32_32",
41364	"Jnp_rel32_64",
41365	"Jl_rel16",
41366	"Jl_rel32_32",
41367	"Jl_rel32_64",
41368	"Jge_rel16",
41369	"Jge_rel32_32",
41370	"Jge_rel32_64",
41371	"Jle_rel16",
41372	"Jle_rel32_32",
41373	"Jle_rel32_64",
41374	"Jg_rel16",
41375	"Jg_rel32_32",
41376	"Jg_rel32_64",
41377	"Seto_rm8",
41378	"Setno_rm8",
41379	"Setb_rm8",
41380	"Setae_rm8",
41381	"Sete_rm8",
41382	"Setne_rm8",
41383	"Setbe_rm8",
41384	"Seta_rm8",
41385	"Sets_rm8",
41386	"Setns_rm8",
41387	"Setp_rm8",
41388	"Setnp_rm8",
41389	"Setl_rm8",
41390	"Setge_rm8",
41391	"Setle_rm8",
41392	"Setg_rm8",
41393	"VEX_Kmovw_kr_km16",
41394	"VEX_Kmovq_kr_km64",
41395	"VEX_Kmovb_kr_km8",
41396	"VEX_Kmovd_kr_km32",
41397	"VEX_Kmovw_m16_kr",
41398	"VEX_Kmovq_m64_kr",
41399	"VEX_Kmovb_m8_kr",
41400	"VEX_Kmovd_m32_kr",
41401	"VEX_Kmovw_kr_r32",
41402	"VEX_Kmovb_kr_r32",
41403	"VEX_Kmovd_kr_r32",
41404	"VEX_Kmovq_kr_r64",
41405	"VEX_Kmovw_r32_kr",
41406	"VEX_Kmovb_r32_kr",
41407	"VEX_Kmovd_r32_kr",
41408	"VEX_Kmovq_r64_kr",
41409	"VEX_Kortestw_kr_kr",
41410	"VEX_Kortestq_kr_kr",
41411	"VEX_Kortestb_kr_kr",
41412	"VEX_Kortestd_kr_kr",
41413	"VEX_Ktestw_kr_kr",
41414	"VEX_Ktestq_kr_kr",
41415	"VEX_Ktestb_kr_kr",
41416	"VEX_Ktestd_kr_kr",
41417	"Pushw_FS",
41418	"Pushd_FS",
41419	"Pushq_FS",
41420	"Popw_FS",
41421	"Popd_FS",
41422	"Popq_FS",
41423	"Cpuid",
41424	"Bt_rm16_r16",
41425	"Bt_rm32_r32",
41426	"Bt_rm64_r64",
41427	"Shld_rm16_r16_imm8",
41428	"Shld_rm32_r32_imm8",
41429	"Shld_rm64_r64_imm8",
41430	"Shld_rm16_r16_CL",
41431	"Shld_rm32_r32_CL",
41432	"Shld_rm64_r64_CL",
41433	"Montmul_16",
41434	"Montmul_32",
41435	"Montmul_64",
41436	"Xsha1_16",
41437	"Xsha1_32",
41438	"Xsha1_64",
41439	"Xsha256_16",
41440	"Xsha256_32",
41441	"Xsha256_64",
41442	"Xbts_r16_rm16",
41443	"Xbts_r32_rm32",
41444	"Xstore_16",
41445	"Xstore_32",
41446	"Xstore_64",
41447	"Xcryptecb_16",
41448	"Xcryptecb_32",
41449	"Xcryptecb_64",
41450	"Xcryptcbc_16",
41451	"Xcryptcbc_32",
41452	"Xcryptcbc_64",
41453	"Xcryptctr_16",
41454	"Xcryptctr_32",
41455	"Xcryptctr_64",
41456	"Xcryptcfb_16",
41457	"Xcryptcfb_32",
41458	"Xcryptcfb_64",
41459	"Xcryptofb_16",
41460	"Xcryptofb_32",
41461	"Xcryptofb_64",
41462	"Ibts_rm16_r16",
41463	"Ibts_rm32_r32",
41464	"Cmpxchg486_rm8_r8",
41465	"Cmpxchg486_rm16_r16",
41466	"Cmpxchg486_rm32_r32",
41467	"Pushw_GS",
41468	"Pushd_GS",
41469	"Pushq_GS",
41470	"Popw_GS",
41471	"Popd_GS",
41472	"Popq_GS",
41473	"Rsm",
41474	"Bts_rm16_r16",
41475	"Bts_rm32_r32",
41476	"Bts_rm64_r64",
41477	"Shrd_rm16_r16_imm8",
41478	"Shrd_rm32_r32_imm8",
41479	"Shrd_rm64_r64_imm8",
41480	"Shrd_rm16_r16_CL",
41481	"Shrd_rm32_r32_CL",
41482	"Shrd_rm64_r64_CL",
41483	"Fxsave_m512byte",
41484	"Fxsave64_m512byte",
41485	"Rdfsbase_r32",
41486	"Rdfsbase_r64",
41487	"Fxrstor_m512byte",
41488	"Fxrstor64_m512byte",
41489	"Rdgsbase_r32",
41490	"Rdgsbase_r64",
41491	"Ldmxcsr_m32",
41492	"Wrfsbase_r32",
41493	"Wrfsbase_r64",
41494	"VEX_Vldmxcsr_m32",
41495	"Stmxcsr_m32",
41496	"Wrgsbase_r32",
41497	"Wrgsbase_r64",
41498	"VEX_Vstmxcsr_m32",
41499	"Xsave_mem",
41500	"Xsave64_mem",
41501	"Ptwrite_rm32",
41502	"Ptwrite_rm64",
41503	"Xrstor_mem",
41504	"Xrstor64_mem",
41505	"Incsspd_r32",
41506	"Incsspq_r64",
41507	"Xsaveopt_mem",
41508	"Xsaveopt64_mem",
41509	"Clwb_m8",
41510	"Tpause_r32",
41511	"Tpause_r64",
41512	"Clrssbsy_m64",
41513	"Umonitor_r16",
41514	"Umonitor_r32",
41515	"Umonitor_r64",
41516	"Umwait_r32",
41517	"Umwait_r64",
41518	"Clflush_m8",
41519	"Clflushopt_m8",
41520	"Lfence",
41521	"Lfence_E9",
41522	"Lfence_EA",
41523	"Lfence_EB",
41524	"Lfence_EC",
41525	"Lfence_ED",
41526	"Lfence_EE",
41527	"Lfence_EF",
41528	"Mfence",
41529	"Mfence_F1",
41530	"Mfence_F2",
41531	"Mfence_F3",
41532	"Mfence_F4",
41533	"Mfence_F5",
41534	"Mfence_F6",
41535	"Mfence_F7",
41536	"Sfence",
41537	"Sfence_F9",
41538	"Sfence_FA",
41539	"Sfence_FB",
41540	"Sfence_FC",
41541	"Sfence_FD",
41542	"Sfence_FE",
41543	"Sfence_FF",
41544	"Pcommit",
41545	"Imul_r16_rm16",
41546	"Imul_r32_rm32",
41547	"Imul_r64_rm64",
41548	"Cmpxchg_rm8_r8",
41549	"Cmpxchg_rm16_r16",
41550	"Cmpxchg_rm32_r32",
41551	"Cmpxchg_rm64_r64",
41552	"Lss_r16_m1616",
41553	"Lss_r32_m1632",
41554	"Lss_r64_m1664",
41555	"Btr_rm16_r16",
41556	"Btr_rm32_r32",
41557	"Btr_rm64_r64",
41558	"Lfs_r16_m1616",
41559	"Lfs_r32_m1632",
41560	"Lfs_r64_m1664",
41561	"Lgs_r16_m1616",
41562	"Lgs_r32_m1632",
41563	"Lgs_r64_m1664",
41564	"Movzx_r16_rm8",
41565	"Movzx_r32_rm8",
41566	"Movzx_r64_rm8",
41567	"Movzx_r16_rm16",
41568	"Movzx_r32_rm16",
41569	"Movzx_r64_rm16",
41570	"Jmpe_disp16",
41571	"Jmpe_disp32",
41572	"Popcnt_r16_rm16",
41573	"Popcnt_r32_rm32",
41574	"Popcnt_r64_rm64",
41575	"Ud1_r16_rm16",
41576	"Ud1_r32_rm32",
41577	"Ud1_r64_rm64",
41578	"Bt_rm16_imm8",
41579	"Bt_rm32_imm8",
41580	"Bt_rm64_imm8",
41581	"Bts_rm16_imm8",
41582	"Bts_rm32_imm8",
41583	"Bts_rm64_imm8",
41584	"Btr_rm16_imm8",
41585	"Btr_rm32_imm8",
41586	"Btr_rm64_imm8",
41587	"Btc_rm16_imm8",
41588	"Btc_rm32_imm8",
41589	"Btc_rm64_imm8",
41590	"Btc_rm16_r16",
41591	"Btc_rm32_r32",
41592	"Btc_rm64_r64",
41593	"Bsf_r16_rm16",
41594	"Bsf_r32_rm32",
41595	"Bsf_r64_rm64",
41596	"Tzcnt_r16_rm16",
41597	"Tzcnt_r32_rm32",
41598	"Tzcnt_r64_rm64",
41599	"Bsr_r16_rm16",
41600	"Bsr_r32_rm32",
41601	"Bsr_r64_rm64",
41602	"Lzcnt_r16_rm16",
41603	"Lzcnt_r32_rm32",
41604	"Lzcnt_r64_rm64",
41605	"Movsx_r16_rm8",
41606	"Movsx_r32_rm8",
41607	"Movsx_r64_rm8",
41608	"Movsx_r16_rm16",
41609	"Movsx_r32_rm16",
41610	"Movsx_r64_rm16",
41611	"Xadd_rm8_r8",
41612	"Xadd_rm16_r16",
41613	"Xadd_rm32_r32",
41614	"Xadd_rm64_r64",
41615	"Cmpps_xmm_xmmm128_imm8",
41616	"VEX_Vcmpps_xmm_xmm_xmmm128_imm8",
41617	"VEX_Vcmpps_ymm_ymm_ymmm256_imm8",
41618	"EVEX_Vcmpps_kr_k1_xmm_xmmm128b32_imm8",
41619	"EVEX_Vcmpps_kr_k1_ymm_ymmm256b32_imm8",
41620	"EVEX_Vcmpps_kr_k1_zmm_zmmm512b32_imm8_sae",
41621	"Cmppd_xmm_xmmm128_imm8",
41622	"VEX_Vcmppd_xmm_xmm_xmmm128_imm8",
41623	"VEX_Vcmppd_ymm_ymm_ymmm256_imm8",
41624	"EVEX_Vcmppd_kr_k1_xmm_xmmm128b64_imm8",
41625	"EVEX_Vcmppd_kr_k1_ymm_ymmm256b64_imm8",
41626	"EVEX_Vcmppd_kr_k1_zmm_zmmm512b64_imm8_sae",
41627	"Cmpss_xmm_xmmm32_imm8",
41628	"VEX_Vcmpss_xmm_xmm_xmmm32_imm8",
41629	"EVEX_Vcmpss_kr_k1_xmm_xmmm32_imm8_sae",
41630	"Cmpsd_xmm_xmmm64_imm8",
41631	"VEX_Vcmpsd_xmm_xmm_xmmm64_imm8",
41632	"EVEX_Vcmpsd_kr_k1_xmm_xmmm64_imm8_sae",
41633	"Movnti_m32_r32",
41634	"Movnti_m64_r64",
41635	"Pinsrw_mm_r32m16_imm8",
41636	"Pinsrw_mm_r64m16_imm8",
41637	"Pinsrw_xmm_r32m16_imm8",
41638	"Pinsrw_xmm_r64m16_imm8",
41639	"VEX_Vpinsrw_xmm_xmm_r32m16_imm8",
41640	"VEX_Vpinsrw_xmm_xmm_r64m16_imm8",
41641	"EVEX_Vpinsrw_xmm_xmm_r32m16_imm8",
41642	"EVEX_Vpinsrw_xmm_xmm_r64m16_imm8",
41643	"Pextrw_r32_mm_imm8",
41644	"Pextrw_r64_mm_imm8",
41645	"Pextrw_r32_xmm_imm8",
41646	"Pextrw_r64_xmm_imm8",
41647	"VEX_Vpextrw_r32_xmm_imm8",
41648	"VEX_Vpextrw_r64_xmm_imm8",
41649	"EVEX_Vpextrw_r32_xmm_imm8",
41650	"EVEX_Vpextrw_r64_xmm_imm8",
41651	"Shufps_xmm_xmmm128_imm8",
41652	"VEX_Vshufps_xmm_xmm_xmmm128_imm8",
41653	"VEX_Vshufps_ymm_ymm_ymmm256_imm8",
41654	"EVEX_Vshufps_xmm_k1z_xmm_xmmm128b32_imm8",
41655	"EVEX_Vshufps_ymm_k1z_ymm_ymmm256b32_imm8",
41656	"EVEX_Vshufps_zmm_k1z_zmm_zmmm512b32_imm8",
41657	"Shufpd_xmm_xmmm128_imm8",
41658	"VEX_Vshufpd_xmm_xmm_xmmm128_imm8",
41659	"VEX_Vshufpd_ymm_ymm_ymmm256_imm8",
41660	"EVEX_Vshufpd_xmm_k1z_xmm_xmmm128b64_imm8",
41661	"EVEX_Vshufpd_ymm_k1z_ymm_ymmm256b64_imm8",
41662	"EVEX_Vshufpd_zmm_k1z_zmm_zmmm512b64_imm8",
41663	"Cmpxchg8b_m64",
41664	"Cmpxchg16b_m128",
41665	"Xrstors_mem",
41666	"Xrstors64_mem",
41667	"Xsavec_mem",
41668	"Xsavec64_mem",
41669	"Xsaves_mem",
41670	"Xsaves64_mem",
41671	"Vmptrld_m64",
41672	"Vmclear_m64",
41673	"Vmxon_m64",
41674	"Rdrand_r16",
41675	"Rdrand_r32",
41676	"Rdrand_r64",
41677	"Vmptrst_m64",
41678	"Rdseed_r16",
41679	"Rdseed_r32",
41680	"Rdseed_r64",
41681	"Rdpid_r32",
41682	"Rdpid_r64",
41683	"Bswap_r16",
41684	"Bswap_r32",
41685	"Bswap_r64",
41686	"Addsubpd_xmm_xmmm128",
41687	"VEX_Vaddsubpd_xmm_xmm_xmmm128",
41688	"VEX_Vaddsubpd_ymm_ymm_ymmm256",
41689	"Addsubps_xmm_xmmm128",
41690	"VEX_Vaddsubps_xmm_xmm_xmmm128",
41691	"VEX_Vaddsubps_ymm_ymm_ymmm256",
41692	"Psrlw_mm_mmm64",
41693	"Psrlw_xmm_xmmm128",
41694	"VEX_Vpsrlw_xmm_xmm_xmmm128",
41695	"VEX_Vpsrlw_ymm_ymm_xmmm128",
41696	"EVEX_Vpsrlw_xmm_k1z_xmm_xmmm128",
41697	"EVEX_Vpsrlw_ymm_k1z_ymm_xmmm128",
41698	"EVEX_Vpsrlw_zmm_k1z_zmm_xmmm128",
41699	"Psrld_mm_mmm64",
41700	"Psrld_xmm_xmmm128",
41701	"VEX_Vpsrld_xmm_xmm_xmmm128",
41702	"VEX_Vpsrld_ymm_ymm_xmmm128",
41703	"EVEX_Vpsrld_xmm_k1z_xmm_xmmm128",
41704	"EVEX_Vpsrld_ymm_k1z_ymm_xmmm128",
41705	"EVEX_Vpsrld_zmm_k1z_zmm_xmmm128",
41706	"Psrlq_mm_mmm64",
41707	"Psrlq_xmm_xmmm128",
41708	"VEX_Vpsrlq_xmm_xmm_xmmm128",
41709	"VEX_Vpsrlq_ymm_ymm_xmmm128",
41710	"EVEX_Vpsrlq_xmm_k1z_xmm_xmmm128",
41711	"EVEX_Vpsrlq_ymm_k1z_ymm_xmmm128",
41712	"EVEX_Vpsrlq_zmm_k1z_zmm_xmmm128",
41713	"Paddq_mm_mmm64",
41714	"Paddq_xmm_xmmm128",
41715	"VEX_Vpaddq_xmm_xmm_xmmm128",
41716	"VEX_Vpaddq_ymm_ymm_ymmm256",
41717	"EVEX_Vpaddq_xmm_k1z_xmm_xmmm128b64",
41718	"EVEX_Vpaddq_ymm_k1z_ymm_ymmm256b64",
41719	"EVEX_Vpaddq_zmm_k1z_zmm_zmmm512b64",
41720	"Pmullw_mm_mmm64",
41721	"Pmullw_xmm_xmmm128",
41722	"VEX_Vpmullw_xmm_xmm_xmmm128",
41723	"VEX_Vpmullw_ymm_ymm_ymmm256",
41724	"EVEX_Vpmullw_xmm_k1z_xmm_xmmm128",
41725	"EVEX_Vpmullw_ymm_k1z_ymm_ymmm256",
41726	"EVEX_Vpmullw_zmm_k1z_zmm_zmmm512",
41727	"Movq_xmmm64_xmm",
41728	"VEX_Vmovq_xmmm64_xmm",
41729	"EVEX_Vmovq_xmmm64_xmm",
41730	"Movq2dq_xmm_mm",
41731	"Movdq2q_mm_xmm",
41732	"Pmovmskb_r32_mm",
41733	"Pmovmskb_r64_mm",
41734	"Pmovmskb_r32_xmm",
41735	"Pmovmskb_r64_xmm",
41736	"VEX_Vpmovmskb_r32_xmm",
41737	"VEX_Vpmovmskb_r64_xmm",
41738	"VEX_Vpmovmskb_r32_ymm",
41739	"VEX_Vpmovmskb_r64_ymm",
41740	"Psubusb_mm_mmm64",
41741	"Psubusb_xmm_xmmm128",
41742	"VEX_Vpsubusb_xmm_xmm_xmmm128",
41743	"VEX_Vpsubusb_ymm_ymm_ymmm256",
41744	"EVEX_Vpsubusb_xmm_k1z_xmm_xmmm128",
41745	"EVEX_Vpsubusb_ymm_k1z_ymm_ymmm256",
41746	"EVEX_Vpsubusb_zmm_k1z_zmm_zmmm512",
41747	"Psubusw_mm_mmm64",
41748	"Psubusw_xmm_xmmm128",
41749	"VEX_Vpsubusw_xmm_xmm_xmmm128",
41750	"VEX_Vpsubusw_ymm_ymm_ymmm256",
41751	"EVEX_Vpsubusw_xmm_k1z_xmm_xmmm128",
41752	"EVEX_Vpsubusw_ymm_k1z_ymm_ymmm256",
41753	"EVEX_Vpsubusw_zmm_k1z_zmm_zmmm512",
41754	"Pminub_mm_mmm64",
41755	"Pminub_xmm_xmmm128",
41756	"VEX_Vpminub_xmm_xmm_xmmm128",
41757	"VEX_Vpminub_ymm_ymm_ymmm256",
41758	"EVEX_Vpminub_xmm_k1z_xmm_xmmm128",
41759	"EVEX_Vpminub_ymm_k1z_ymm_ymmm256",
41760	"EVEX_Vpminub_zmm_k1z_zmm_zmmm512",
41761	"Pand_mm_mmm64",
41762	"Pand_xmm_xmmm128",
41763	"VEX_Vpand_xmm_xmm_xmmm128",
41764	"VEX_Vpand_ymm_ymm_ymmm256",
41765	"EVEX_Vpandd_xmm_k1z_xmm_xmmm128b32",
41766	"EVEX_Vpandd_ymm_k1z_ymm_ymmm256b32",
41767	"EVEX_Vpandd_zmm_k1z_zmm_zmmm512b32",
41768	"EVEX_Vpandq_xmm_k1z_xmm_xmmm128b64",
41769	"EVEX_Vpandq_ymm_k1z_ymm_ymmm256b64",
41770	"EVEX_Vpandq_zmm_k1z_zmm_zmmm512b64",
41771	"Paddusb_mm_mmm64",
41772	"Paddusb_xmm_xmmm128",
41773	"VEX_Vpaddusb_xmm_xmm_xmmm128",
41774	"VEX_Vpaddusb_ymm_ymm_ymmm256",
41775	"EVEX_Vpaddusb_xmm_k1z_xmm_xmmm128",
41776	"EVEX_Vpaddusb_ymm_k1z_ymm_ymmm256",
41777	"EVEX_Vpaddusb_zmm_k1z_zmm_zmmm512",
41778	"Paddusw_mm_mmm64",
41779	"Paddusw_xmm_xmmm128",
41780	"VEX_Vpaddusw_xmm_xmm_xmmm128",
41781	"VEX_Vpaddusw_ymm_ymm_ymmm256",
41782	"EVEX_Vpaddusw_xmm_k1z_xmm_xmmm128",
41783	"EVEX_Vpaddusw_ymm_k1z_ymm_ymmm256",
41784	"EVEX_Vpaddusw_zmm_k1z_zmm_zmmm512",
41785	"Pmaxub_mm_mmm64",
41786	"Pmaxub_xmm_xmmm128",
41787	"VEX_Vpmaxub_xmm_xmm_xmmm128",
41788	"VEX_Vpmaxub_ymm_ymm_ymmm256",
41789	"EVEX_Vpmaxub_xmm_k1z_xmm_xmmm128",
41790	"EVEX_Vpmaxub_ymm_k1z_ymm_ymmm256",
41791	"EVEX_Vpmaxub_zmm_k1z_zmm_zmmm512",
41792	"Pandn_mm_mmm64",
41793	"Pandn_xmm_xmmm128",
41794	"VEX_Vpandn_xmm_xmm_xmmm128",
41795	"VEX_Vpandn_ymm_ymm_ymmm256",
41796	"EVEX_Vpandnd_xmm_k1z_xmm_xmmm128b32",
41797	"EVEX_Vpandnd_ymm_k1z_ymm_ymmm256b32",
41798	"EVEX_Vpandnd_zmm_k1z_zmm_zmmm512b32",
41799	"EVEX_Vpandnq_xmm_k1z_xmm_xmmm128b64",
41800	"EVEX_Vpandnq_ymm_k1z_ymm_ymmm256b64",
41801	"EVEX_Vpandnq_zmm_k1z_zmm_zmmm512b64",
41802	"Pavgb_mm_mmm64",
41803	"Pavgb_xmm_xmmm128",
41804	"VEX_Vpavgb_xmm_xmm_xmmm128",
41805	"VEX_Vpavgb_ymm_ymm_ymmm256",
41806	"EVEX_Vpavgb_xmm_k1z_xmm_xmmm128",
41807	"EVEX_Vpavgb_ymm_k1z_ymm_ymmm256",
41808	"EVEX_Vpavgb_zmm_k1z_zmm_zmmm512",
41809	"Psraw_mm_mmm64",
41810	"Psraw_xmm_xmmm128",
41811	"VEX_Vpsraw_xmm_xmm_xmmm128",
41812	"VEX_Vpsraw_ymm_ymm_xmmm128",
41813	"EVEX_Vpsraw_xmm_k1z_xmm_xmmm128",
41814	"EVEX_Vpsraw_ymm_k1z_ymm_xmmm128",
41815	"EVEX_Vpsraw_zmm_k1z_zmm_xmmm128",
41816	"Psrad_mm_mmm64",
41817	"Psrad_xmm_xmmm128",
41818	"VEX_Vpsrad_xmm_xmm_xmmm128",
41819	"VEX_Vpsrad_ymm_ymm_xmmm128",
41820	"EVEX_Vpsrad_xmm_k1z_xmm_xmmm128",
41821	"EVEX_Vpsrad_ymm_k1z_ymm_xmmm128",
41822	"EVEX_Vpsrad_zmm_k1z_zmm_xmmm128",
41823	"EVEX_Vpsraq_xmm_k1z_xmm_xmmm128",
41824	"EVEX_Vpsraq_ymm_k1z_ymm_xmmm128",
41825	"EVEX_Vpsraq_zmm_k1z_zmm_xmmm128",
41826	"Pavgw_mm_mmm64",
41827	"Pavgw_xmm_xmmm128",
41828	"VEX_Vpavgw_xmm_xmm_xmmm128",
41829	"VEX_Vpavgw_ymm_ymm_ymmm256",
41830	"EVEX_Vpavgw_xmm_k1z_xmm_xmmm128",
41831	"EVEX_Vpavgw_ymm_k1z_ymm_ymmm256",
41832	"EVEX_Vpavgw_zmm_k1z_zmm_zmmm512",
41833	"Pmulhuw_mm_mmm64",
41834	"Pmulhuw_xmm_xmmm128",
41835	"VEX_Vpmulhuw_xmm_xmm_xmmm128",
41836	"VEX_Vpmulhuw_ymm_ymm_ymmm256",
41837	"EVEX_Vpmulhuw_xmm_k1z_xmm_xmmm128",
41838	"EVEX_Vpmulhuw_ymm_k1z_ymm_ymmm256",
41839	"EVEX_Vpmulhuw_zmm_k1z_zmm_zmmm512",
41840	"Pmulhw_mm_mmm64",
41841	"Pmulhw_xmm_xmmm128",
41842	"VEX_Vpmulhw_xmm_xmm_xmmm128",
41843	"VEX_Vpmulhw_ymm_ymm_ymmm256",
41844	"EVEX_Vpmulhw_xmm_k1z_xmm_xmmm128",
41845	"EVEX_Vpmulhw_ymm_k1z_ymm_ymmm256",
41846	"EVEX_Vpmulhw_zmm_k1z_zmm_zmmm512",
41847	"Cvttpd2dq_xmm_xmmm128",
41848	"VEX_Vcvttpd2dq_xmm_xmmm128",
41849	"VEX_Vcvttpd2dq_xmm_ymmm256",
41850	"EVEX_Vcvttpd2dq_xmm_k1z_xmmm128b64",
41851	"EVEX_Vcvttpd2dq_xmm_k1z_ymmm256b64",
41852	"EVEX_Vcvttpd2dq_ymm_k1z_zmmm512b64_sae",
41853	"Cvtdq2pd_xmm_xmmm64",
41854	"VEX_Vcvtdq2pd_xmm_xmmm64",
41855	"VEX_Vcvtdq2pd_ymm_xmmm128",
41856	"EVEX_Vcvtdq2pd_xmm_k1z_xmmm64b32",
41857	"EVEX_Vcvtdq2pd_ymm_k1z_xmmm128b32",
41858	"EVEX_Vcvtdq2pd_zmm_k1z_ymmm256b32_er",
41859	"EVEX_Vcvtqq2pd_xmm_k1z_xmmm128b64",
41860	"EVEX_Vcvtqq2pd_ymm_k1z_ymmm256b64",
41861	"EVEX_Vcvtqq2pd_zmm_k1z_zmmm512b64_er",
41862	"Cvtpd2dq_xmm_xmmm128",
41863	"VEX_Vcvtpd2dq_xmm_xmmm128",
41864	"VEX_Vcvtpd2dq_xmm_ymmm256",
41865	"EVEX_Vcvtpd2dq_xmm_k1z_xmmm128b64",
41866	"EVEX_Vcvtpd2dq_xmm_k1z_ymmm256b64",
41867	"EVEX_Vcvtpd2dq_ymm_k1z_zmmm512b64_er",
41868	"Movntq_m64_mm",
41869	"Movntdq_m128_xmm",
41870	"VEX_Vmovntdq_m128_xmm",
41871	"VEX_Vmovntdq_m256_ymm",
41872	"EVEX_Vmovntdq_m128_xmm",
41873	"EVEX_Vmovntdq_m256_ymm",
41874	"EVEX_Vmovntdq_m512_zmm",
41875	"Psubsb_mm_mmm64",
41876	"Psubsb_xmm_xmmm128",
41877	"VEX_Vpsubsb_xmm_xmm_xmmm128",
41878	"VEX_Vpsubsb_ymm_ymm_ymmm256",
41879	"EVEX_Vpsubsb_xmm_k1z_xmm_xmmm128",
41880	"EVEX_Vpsubsb_ymm_k1z_ymm_ymmm256",
41881	"EVEX_Vpsubsb_zmm_k1z_zmm_zmmm512",
41882	"Psubsw_mm_mmm64",
41883	"Psubsw_xmm_xmmm128",
41884	"VEX_Vpsubsw_xmm_xmm_xmmm128",
41885	"VEX_Vpsubsw_ymm_ymm_ymmm256",
41886	"EVEX_Vpsubsw_xmm_k1z_xmm_xmmm128",
41887	"EVEX_Vpsubsw_ymm_k1z_ymm_ymmm256",
41888	"EVEX_Vpsubsw_zmm_k1z_zmm_zmmm512",
41889	"Pminsw_mm_mmm64",
41890	"Pminsw_xmm_xmmm128",
41891	"VEX_Vpminsw_xmm_xmm_xmmm128",
41892	"VEX_Vpminsw_ymm_ymm_ymmm256",
41893	"EVEX_Vpminsw_xmm_k1z_xmm_xmmm128",
41894	"EVEX_Vpminsw_ymm_k1z_ymm_ymmm256",
41895	"EVEX_Vpminsw_zmm_k1z_zmm_zmmm512",
41896	"Por_mm_mmm64",
41897	"Por_xmm_xmmm128",
41898	"VEX_Vpor_xmm_xmm_xmmm128",
41899	"VEX_Vpor_ymm_ymm_ymmm256",
41900	"EVEX_Vpord_xmm_k1z_xmm_xmmm128b32",
41901	"EVEX_Vpord_ymm_k1z_ymm_ymmm256b32",
41902	"EVEX_Vpord_zmm_k1z_zmm_zmmm512b32",
41903	"EVEX_Vporq_xmm_k1z_xmm_xmmm128b64",
41904	"EVEX_Vporq_ymm_k1z_ymm_ymmm256b64",
41905	"EVEX_Vporq_zmm_k1z_zmm_zmmm512b64",
41906	"Paddsb_mm_mmm64",
41907	"Paddsb_xmm_xmmm128",
41908	"VEX_Vpaddsb_xmm_xmm_xmmm128",
41909	"VEX_Vpaddsb_ymm_ymm_ymmm256",
41910	"EVEX_Vpaddsb_xmm_k1z_xmm_xmmm128",
41911	"EVEX_Vpaddsb_ymm_k1z_ymm_ymmm256",
41912	"EVEX_Vpaddsb_zmm_k1z_zmm_zmmm512",
41913	"Paddsw_mm_mmm64",
41914	"Paddsw_xmm_xmmm128",
41915	"VEX_Vpaddsw_xmm_xmm_xmmm128",
41916	"VEX_Vpaddsw_ymm_ymm_ymmm256",
41917	"EVEX_Vpaddsw_xmm_k1z_xmm_xmmm128",
41918	"EVEX_Vpaddsw_ymm_k1z_ymm_ymmm256",
41919	"EVEX_Vpaddsw_zmm_k1z_zmm_zmmm512",
41920	"Pmaxsw_mm_mmm64",
41921	"Pmaxsw_xmm_xmmm128",
41922	"VEX_Vpmaxsw_xmm_xmm_xmmm128",
41923	"VEX_Vpmaxsw_ymm_ymm_ymmm256",
41924	"EVEX_Vpmaxsw_xmm_k1z_xmm_xmmm128",
41925	"EVEX_Vpmaxsw_ymm_k1z_ymm_ymmm256",
41926	"EVEX_Vpmaxsw_zmm_k1z_zmm_zmmm512",
41927	"Pxor_mm_mmm64",
41928	"Pxor_xmm_xmmm128",
41929	"VEX_Vpxor_xmm_xmm_xmmm128",
41930	"VEX_Vpxor_ymm_ymm_ymmm256",
41931	"EVEX_Vpxord_xmm_k1z_xmm_xmmm128b32",
41932	"EVEX_Vpxord_ymm_k1z_ymm_ymmm256b32",
41933	"EVEX_Vpxord_zmm_k1z_zmm_zmmm512b32",
41934	"EVEX_Vpxorq_xmm_k1z_xmm_xmmm128b64",
41935	"EVEX_Vpxorq_ymm_k1z_ymm_ymmm256b64",
41936	"EVEX_Vpxorq_zmm_k1z_zmm_zmmm512b64",
41937	"Lddqu_xmm_m128",
41938	"VEX_Vlddqu_xmm_m128",
41939	"VEX_Vlddqu_ymm_m256",
41940	"Psllw_mm_mmm64",
41941	"Psllw_xmm_xmmm128",
41942	"VEX_Vpsllw_xmm_xmm_xmmm128",
41943	"VEX_Vpsllw_ymm_ymm_xmmm128",
41944	"EVEX_Vpsllw_xmm_k1z_xmm_xmmm128",
41945	"EVEX_Vpsllw_ymm_k1z_ymm_xmmm128",
41946	"EVEX_Vpsllw_zmm_k1z_zmm_xmmm128",
41947	"Pslld_mm_mmm64",
41948	"Pslld_xmm_xmmm128",
41949	"VEX_Vpslld_xmm_xmm_xmmm128",
41950	"VEX_Vpslld_ymm_ymm_xmmm128",
41951	"EVEX_Vpslld_xmm_k1z_xmm_xmmm128",
41952	"EVEX_Vpslld_ymm_k1z_ymm_xmmm128",
41953	"EVEX_Vpslld_zmm_k1z_zmm_xmmm128",
41954	"Psllq_mm_mmm64",
41955	"Psllq_xmm_xmmm128",
41956	"VEX_Vpsllq_xmm_xmm_xmmm128",
41957	"VEX_Vpsllq_ymm_ymm_xmmm128",
41958	"EVEX_Vpsllq_xmm_k1z_xmm_xmmm128",
41959	"EVEX_Vpsllq_ymm_k1z_ymm_xmmm128",
41960	"EVEX_Vpsllq_zmm_k1z_zmm_xmmm128",
41961	"Pmuludq_mm_mmm64",
41962	"Pmuludq_xmm_xmmm128",
41963	"VEX_Vpmuludq_xmm_xmm_xmmm128",
41964	"VEX_Vpmuludq_ymm_ymm_ymmm256",
41965	"EVEX_Vpmuludq_xmm_k1z_xmm_xmmm128b64",
41966	"EVEX_Vpmuludq_ymm_k1z_ymm_ymmm256b64",
41967	"EVEX_Vpmuludq_zmm_k1z_zmm_zmmm512b64",
41968	"Pmaddwd_mm_mmm64",
41969	"Pmaddwd_xmm_xmmm128",
41970	"VEX_Vpmaddwd_xmm_xmm_xmmm128",
41971	"VEX_Vpmaddwd_ymm_ymm_ymmm256",
41972	"EVEX_Vpmaddwd_xmm_k1z_xmm_xmmm128",
41973	"EVEX_Vpmaddwd_ymm_k1z_ymm_ymmm256",
41974	"EVEX_Vpmaddwd_zmm_k1z_zmm_zmmm512",
41975	"Psadbw_mm_mmm64",
41976	"Psadbw_xmm_xmmm128",
41977	"VEX_Vpsadbw_xmm_xmm_xmmm128",
41978	"VEX_Vpsadbw_ymm_ymm_ymmm256",
41979	"EVEX_Vpsadbw_xmm_xmm_xmmm128",
41980	"EVEX_Vpsadbw_ymm_ymm_ymmm256",
41981	"EVEX_Vpsadbw_zmm_zmm_zmmm512",
41982	"Maskmovq_rDI_mm_mm",
41983	"Maskmovdqu_rDI_xmm_xmm",
41984	"VEX_Vmaskmovdqu_rDI_xmm_xmm",
41985	"Psubb_mm_mmm64",
41986	"Psubb_xmm_xmmm128",
41987	"VEX_Vpsubb_xmm_xmm_xmmm128",
41988	"VEX_Vpsubb_ymm_ymm_ymmm256",
41989	"EVEX_Vpsubb_xmm_k1z_xmm_xmmm128",
41990	"EVEX_Vpsubb_ymm_k1z_ymm_ymmm256",
41991	"EVEX_Vpsubb_zmm_k1z_zmm_zmmm512",
41992	"Psubw_mm_mmm64",
41993	"Psubw_xmm_xmmm128",
41994	"VEX_Vpsubw_xmm_xmm_xmmm128",
41995	"VEX_Vpsubw_ymm_ymm_ymmm256",
41996	"EVEX_Vpsubw_xmm_k1z_xmm_xmmm128",
41997	"EVEX_Vpsubw_ymm_k1z_ymm_ymmm256",
41998	"EVEX_Vpsubw_zmm_k1z_zmm_zmmm512",
41999	"Psubd_mm_mmm64",
42000	"Psubd_xmm_xmmm128",
42001	"VEX_Vpsubd_xmm_xmm_xmmm128",
42002	"VEX_Vpsubd_ymm_ymm_ymmm256",
42003	"EVEX_Vpsubd_xmm_k1z_xmm_xmmm128b32",
42004	"EVEX_Vpsubd_ymm_k1z_ymm_ymmm256b32",
42005	"EVEX_Vpsubd_zmm_k1z_zmm_zmmm512b32",
42006	"Psubq_mm_mmm64",
42007	"Psubq_xmm_xmmm128",
42008	"VEX_Vpsubq_xmm_xmm_xmmm128",
42009	"VEX_Vpsubq_ymm_ymm_ymmm256",
42010	"EVEX_Vpsubq_xmm_k1z_xmm_xmmm128b64",
42011	"EVEX_Vpsubq_ymm_k1z_ymm_ymmm256b64",
42012	"EVEX_Vpsubq_zmm_k1z_zmm_zmmm512b64",
42013	"Paddb_mm_mmm64",
42014	"Paddb_xmm_xmmm128",
42015	"VEX_Vpaddb_xmm_xmm_xmmm128",
42016	"VEX_Vpaddb_ymm_ymm_ymmm256",
42017	"EVEX_Vpaddb_xmm_k1z_xmm_xmmm128",
42018	"EVEX_Vpaddb_ymm_k1z_ymm_ymmm256",
42019	"EVEX_Vpaddb_zmm_k1z_zmm_zmmm512",
42020	"Paddw_mm_mmm64",
42021	"Paddw_xmm_xmmm128",
42022	"VEX_Vpaddw_xmm_xmm_xmmm128",
42023	"VEX_Vpaddw_ymm_ymm_ymmm256",
42024	"EVEX_Vpaddw_xmm_k1z_xmm_xmmm128",
42025	"EVEX_Vpaddw_ymm_k1z_ymm_ymmm256",
42026	"EVEX_Vpaddw_zmm_k1z_zmm_zmmm512",
42027	"Paddd_mm_mmm64",
42028	"Paddd_xmm_xmmm128",
42029	"VEX_Vpaddd_xmm_xmm_xmmm128",
42030	"VEX_Vpaddd_ymm_ymm_ymmm256",
42031	"EVEX_Vpaddd_xmm_k1z_xmm_xmmm128b32",
42032	"EVEX_Vpaddd_ymm_k1z_ymm_ymmm256b32",
42033	"EVEX_Vpaddd_zmm_k1z_zmm_zmmm512b32",
42034	"Ud0_r16_rm16",
42035	"Ud0_r32_rm32",
42036	"Ud0_r64_rm64",
42037	"Pshufb_mm_mmm64",
42038	"Pshufb_xmm_xmmm128",
42039	"VEX_Vpshufb_xmm_xmm_xmmm128",
42040	"VEX_Vpshufb_ymm_ymm_ymmm256",
42041	"EVEX_Vpshufb_xmm_k1z_xmm_xmmm128",
42042	"EVEX_Vpshufb_ymm_k1z_ymm_ymmm256",
42043	"EVEX_Vpshufb_zmm_k1z_zmm_zmmm512",
42044	"Phaddw_mm_mmm64",
42045	"Phaddw_xmm_xmmm128",
42046	"VEX_Vphaddw_xmm_xmm_xmmm128",
42047	"VEX_Vphaddw_ymm_ymm_ymmm256",
42048	"Phaddd_mm_mmm64",
42049	"Phaddd_xmm_xmmm128",
42050	"VEX_Vphaddd_xmm_xmm_xmmm128",
42051	"VEX_Vphaddd_ymm_ymm_ymmm256",
42052	"Phaddsw_mm_mmm64",
42053	"Phaddsw_xmm_xmmm128",
42054	"VEX_Vphaddsw_xmm_xmm_xmmm128",
42055	"VEX_Vphaddsw_ymm_ymm_ymmm256",
42056	"Pmaddubsw_mm_mmm64",
42057	"Pmaddubsw_xmm_xmmm128",
42058	"VEX_Vpmaddubsw_xmm_xmm_xmmm128",
42059	"VEX_Vpmaddubsw_ymm_ymm_ymmm256",
42060	"EVEX_Vpmaddubsw_xmm_k1z_xmm_xmmm128",
42061	"EVEX_Vpmaddubsw_ymm_k1z_ymm_ymmm256",
42062	"EVEX_Vpmaddubsw_zmm_k1z_zmm_zmmm512",
42063	"Phsubw_mm_mmm64",
42064	"Phsubw_xmm_xmmm128",
42065	"VEX_Vphsubw_xmm_xmm_xmmm128",
42066	"VEX_Vphsubw_ymm_ymm_ymmm256",
42067	"Phsubd_mm_mmm64",
42068	"Phsubd_xmm_xmmm128",
42069	"VEX_Vphsubd_xmm_xmm_xmmm128",
42070	"VEX_Vphsubd_ymm_ymm_ymmm256",
42071	"Phsubsw_mm_mmm64",
42072	"Phsubsw_xmm_xmmm128",
42073	"VEX_Vphsubsw_xmm_xmm_xmmm128",
42074	"VEX_Vphsubsw_ymm_ymm_ymmm256",
42075	"Psignb_mm_mmm64",
42076	"Psignb_xmm_xmmm128",
42077	"VEX_Vpsignb_xmm_xmm_xmmm128",
42078	"VEX_Vpsignb_ymm_ymm_ymmm256",
42079	"Psignw_mm_mmm64",
42080	"Psignw_xmm_xmmm128",
42081	"VEX_Vpsignw_xmm_xmm_xmmm128",
42082	"VEX_Vpsignw_ymm_ymm_ymmm256",
42083	"Psignd_mm_mmm64",
42084	"Psignd_xmm_xmmm128",
42085	"VEX_Vpsignd_xmm_xmm_xmmm128",
42086	"VEX_Vpsignd_ymm_ymm_ymmm256",
42087	"Pmulhrsw_mm_mmm64",
42088	"Pmulhrsw_xmm_xmmm128",
42089	"VEX_Vpmulhrsw_xmm_xmm_xmmm128",
42090	"VEX_Vpmulhrsw_ymm_ymm_ymmm256",
42091	"EVEX_Vpmulhrsw_xmm_k1z_xmm_xmmm128",
42092	"EVEX_Vpmulhrsw_ymm_k1z_ymm_ymmm256",
42093	"EVEX_Vpmulhrsw_zmm_k1z_zmm_zmmm512",
42094	"VEX_Vpermilps_xmm_xmm_xmmm128",
42095	"VEX_Vpermilps_ymm_ymm_ymmm256",
42096	"EVEX_Vpermilps_xmm_k1z_xmm_xmmm128b32",
42097	"EVEX_Vpermilps_ymm_k1z_ymm_ymmm256b32",
42098	"EVEX_Vpermilps_zmm_k1z_zmm_zmmm512b32",
42099	"VEX_Vpermilpd_xmm_xmm_xmmm128",
42100	"VEX_Vpermilpd_ymm_ymm_ymmm256",
42101	"EVEX_Vpermilpd_xmm_k1z_xmm_xmmm128b64",
42102	"EVEX_Vpermilpd_ymm_k1z_ymm_ymmm256b64",
42103	"EVEX_Vpermilpd_zmm_k1z_zmm_zmmm512b64",
42104	"VEX_Vtestps_xmm_xmmm128",
42105	"VEX_Vtestps_ymm_ymmm256",
42106	"VEX_Vtestpd_xmm_xmmm128",
42107	"VEX_Vtestpd_ymm_ymmm256",
42108	"Pblendvb_xmm_xmmm128",
42109	"EVEX_Vpsrlvw_xmm_k1z_xmm_xmmm128",
42110	"EVEX_Vpsrlvw_ymm_k1z_ymm_ymmm256",
42111	"EVEX_Vpsrlvw_zmm_k1z_zmm_zmmm512",
42112	"EVEX_Vpmovuswb_xmmm64_k1z_xmm",
42113	"EVEX_Vpmovuswb_xmmm128_k1z_ymm",
42114	"EVEX_Vpmovuswb_ymmm256_k1z_zmm",
42115	"EVEX_Vpsravw_xmm_k1z_xmm_xmmm128",
42116	"EVEX_Vpsravw_ymm_k1z_ymm_ymmm256",
42117	"EVEX_Vpsravw_zmm_k1z_zmm_zmmm512",
42118	"EVEX_Vpmovusdb_xmmm32_k1z_xmm",
42119	"EVEX_Vpmovusdb_xmmm64_k1z_ymm",
42120	"EVEX_Vpmovusdb_xmmm128_k1z_zmm",
42121	"EVEX_Vpsllvw_xmm_k1z_xmm_xmmm128",
42122	"EVEX_Vpsllvw_ymm_k1z_ymm_ymmm256",
42123	"EVEX_Vpsllvw_zmm_k1z_zmm_zmmm512",
42124	"EVEX_Vpmovusqb_xmmm16_k1z_xmm",
42125	"EVEX_Vpmovusqb_xmmm32_k1z_ymm",
42126	"EVEX_Vpmovusqb_xmmm64_k1z_zmm",
42127	"VEX_Vcvtph2ps_xmm_xmmm64",
42128	"VEX_Vcvtph2ps_ymm_xmmm128",
42129	"EVEX_Vcvtph2ps_xmm_k1z_xmmm64",
42130	"EVEX_Vcvtph2ps_ymm_k1z_xmmm128",
42131	"EVEX_Vcvtph2ps_zmm_k1z_ymmm256_sae",
42132	"EVEX_Vpmovusdw_xmmm64_k1z_xmm",
42133	"EVEX_Vpmovusdw_xmmm128_k1z_ymm",
42134	"EVEX_Vpmovusdw_ymmm256_k1z_zmm",
42135	"Blendvps_xmm_xmmm128",
42136	"EVEX_Vprorvd_xmm_k1z_xmm_xmmm128b32",
42137	"EVEX_Vprorvd_ymm_k1z_ymm_ymmm256b32",
42138	"EVEX_Vprorvd_zmm_k1z_zmm_zmmm512b32",
42139	"EVEX_Vprorvq_xmm_k1z_xmm_xmmm128b64",
42140	"EVEX_Vprorvq_ymm_k1z_ymm_ymmm256b64",
42141	"EVEX_Vprorvq_zmm_k1z_zmm_zmmm512b64",
42142	"EVEX_Vpmovusqw_xmmm32_k1z_xmm",
42143	"EVEX_Vpmovusqw_xmmm64_k1z_ymm",
42144	"EVEX_Vpmovusqw_xmmm128_k1z_zmm",
42145	"Blendvpd_xmm_xmmm128",
42146	"EVEX_Vprolvd_xmm_k1z_xmm_xmmm128b32",
42147	"EVEX_Vprolvd_ymm_k1z_ymm_ymmm256b32",
42148	"EVEX_Vprolvd_zmm_k1z_zmm_zmmm512b32",
42149	"EVEX_Vprolvq_xmm_k1z_xmm_xmmm128b64",
42150	"EVEX_Vprolvq_ymm_k1z_ymm_ymmm256b64",
42151	"EVEX_Vprolvq_zmm_k1z_zmm_zmmm512b64",
42152	"EVEX_Vpmovusqd_xmmm64_k1z_xmm",
42153	"EVEX_Vpmovusqd_xmmm128_k1z_ymm",
42154	"EVEX_Vpmovusqd_ymmm256_k1z_zmm",
42155	"VEX_Vpermps_ymm_ymm_ymmm256",
42156	"EVEX_Vpermps_ymm_k1z_ymm_ymmm256b32",
42157	"EVEX_Vpermps_zmm_k1z_zmm_zmmm512b32",
42158	"EVEX_Vpermpd_ymm_k1z_ymm_ymmm256b64",
42159	"EVEX_Vpermpd_zmm_k1z_zmm_zmmm512b64",
42160	"Ptest_xmm_xmmm128",
42161	"VEX_Vptest_xmm_xmmm128",
42162	"VEX_Vptest_ymm_ymmm256",
42163	"VEX_Vbroadcastss_xmm_m32",
42164	"VEX_Vbroadcastss_ymm_m32",
42165	"EVEX_Vbroadcastss_xmm_k1z_xmmm32",
42166	"EVEX_Vbroadcastss_ymm_k1z_xmmm32",
42167	"EVEX_Vbroadcastss_zmm_k1z_xmmm32",
42168	"VEX_Vbroadcastsd_ymm_m64",
42169	"EVEX_Vbroadcastf32x2_ymm_k1z_xmmm64",
42170	"EVEX_Vbroadcastf32x2_zmm_k1z_xmmm64",
42171	"EVEX_Vbroadcastsd_ymm_k1z_xmmm64",
42172	"EVEX_Vbroadcastsd_zmm_k1z_xmmm64",
42173	"VEX_Vbroadcastf128_ymm_m128",
42174	"EVEX_Vbroadcastf32x4_ymm_k1z_m128",
42175	"EVEX_Vbroadcastf32x4_zmm_k1z_m128",
42176	"EVEX_Vbroadcastf64x2_ymm_k1z_m128",
42177	"EVEX_Vbroadcastf64x2_zmm_k1z_m128",
42178	"EVEX_Vbroadcastf32x8_zmm_k1z_m256",
42179	"EVEX_Vbroadcastf64x4_zmm_k1z_m256",
42180	"Pabsb_mm_mmm64",
42181	"Pabsb_xmm_xmmm128",
42182	"VEX_Vpabsb_xmm_xmmm128",
42183	"VEX_Vpabsb_ymm_ymmm256",
42184	"EVEX_Vpabsb_xmm_k1z_xmmm128",
42185	"EVEX_Vpabsb_ymm_k1z_ymmm256",
42186	"EVEX_Vpabsb_zmm_k1z_zmmm512",
42187	"Pabsw_mm_mmm64",
42188	"Pabsw_xmm_xmmm128",
42189	"VEX_Vpabsw_xmm_xmmm128",
42190	"VEX_Vpabsw_ymm_ymmm256",
42191	"EVEX_Vpabsw_xmm_k1z_xmmm128",
42192	"EVEX_Vpabsw_ymm_k1z_ymmm256",
42193	"EVEX_Vpabsw_zmm_k1z_zmmm512",
42194	"Pabsd_mm_mmm64",
42195	"Pabsd_xmm_xmmm128",
42196	"VEX_Vpabsd_xmm_xmmm128",
42197	"VEX_Vpabsd_ymm_ymmm256",
42198	"EVEX_Vpabsd_xmm_k1z_xmmm128b32",
42199	"EVEX_Vpabsd_ymm_k1z_ymmm256b32",
42200	"EVEX_Vpabsd_zmm_k1z_zmmm512b32",
42201	"EVEX_Vpabsq_xmm_k1z_xmmm128b64",
42202	"EVEX_Vpabsq_ymm_k1z_ymmm256b64",
42203	"EVEX_Vpabsq_zmm_k1z_zmmm512b64",
42204	"Pmovsxbw_xmm_xmmm64",
42205	"VEX_Vpmovsxbw_xmm_xmmm64",
42206	"VEX_Vpmovsxbw_ymm_xmmm128",
42207	"EVEX_Vpmovsxbw_xmm_k1z_xmmm64",
42208	"EVEX_Vpmovsxbw_ymm_k1z_xmmm128",
42209	"EVEX_Vpmovsxbw_zmm_k1z_ymmm256",
42210	"EVEX_Vpmovswb_xmmm64_k1z_xmm",
42211	"EVEX_Vpmovswb_xmmm128_k1z_ymm",
42212	"EVEX_Vpmovswb_ymmm256_k1z_zmm",
42213	"Pmovsxbd_xmm_xmmm32",
42214	"VEX_Vpmovsxbd_xmm_xmmm32",
42215	"VEX_Vpmovsxbd_ymm_xmmm64",
42216	"EVEX_Vpmovsxbd_xmm_k1z_xmmm32",
42217	"EVEX_Vpmovsxbd_ymm_k1z_xmmm64",
42218	"EVEX_Vpmovsxbd_zmm_k1z_xmmm128",
42219	"EVEX_Vpmovsdb_xmmm32_k1z_xmm",
42220	"EVEX_Vpmovsdb_xmmm64_k1z_ymm",
42221	"EVEX_Vpmovsdb_xmmm128_k1z_zmm",
42222	"Pmovsxbq_xmm_xmmm16",
42223	"VEX_Vpmovsxbq_xmm_xmmm16",
42224	"VEX_Vpmovsxbq_ymm_xmmm32",
42225	"EVEX_Vpmovsxbq_xmm_k1z_xmmm16",
42226	"EVEX_Vpmovsxbq_ymm_k1z_xmmm32",
42227	"EVEX_Vpmovsxbq_zmm_k1z_xmmm64",
42228	"EVEX_Vpmovsqb_xmmm16_k1z_xmm",
42229	"EVEX_Vpmovsqb_xmmm32_k1z_ymm",
42230	"EVEX_Vpmovsqb_xmmm64_k1z_zmm",
42231	"Pmovsxwd_xmm_xmmm64",
42232	"VEX_Vpmovsxwd_xmm_xmmm64",
42233	"VEX_Vpmovsxwd_ymm_xmmm128",
42234	"EVEX_Vpmovsxwd_xmm_k1z_xmmm64",
42235	"EVEX_Vpmovsxwd_ymm_k1z_xmmm128",
42236	"EVEX_Vpmovsxwd_zmm_k1z_ymmm256",
42237	"EVEX_Vpmovsdw_xmmm64_k1z_xmm",
42238	"EVEX_Vpmovsdw_xmmm128_k1z_ymm",
42239	"EVEX_Vpmovsdw_ymmm256_k1z_zmm",
42240	"Pmovsxwq_xmm_xmmm32",
42241	"VEX_Vpmovsxwq_xmm_xmmm32",
42242	"VEX_Vpmovsxwq_ymm_xmmm64",
42243	"EVEX_Vpmovsxwq_xmm_k1z_xmmm32",
42244	"EVEX_Vpmovsxwq_ymm_k1z_xmmm64",
42245	"EVEX_Vpmovsxwq_zmm_k1z_xmmm128",
42246	"EVEX_Vpmovsqw_xmmm32_k1z_xmm",
42247	"EVEX_Vpmovsqw_xmmm64_k1z_ymm",
42248	"EVEX_Vpmovsqw_xmmm128_k1z_zmm",
42249	"Pmovsxdq_xmm_xmmm64",
42250	"VEX_Vpmovsxdq_xmm_xmmm64",
42251	"VEX_Vpmovsxdq_ymm_xmmm128",
42252	"EVEX_Vpmovsxdq_xmm_k1z_xmmm64",
42253	"EVEX_Vpmovsxdq_ymm_k1z_xmmm128",
42254	"EVEX_Vpmovsxdq_zmm_k1z_ymmm256",
42255	"EVEX_Vpmovsqd_xmmm64_k1z_xmm",
42256	"EVEX_Vpmovsqd_xmmm128_k1z_ymm",
42257	"EVEX_Vpmovsqd_ymmm256_k1z_zmm",
42258	"EVEX_Vptestmb_kr_k1_xmm_xmmm128",
42259	"EVEX_Vptestmb_kr_k1_ymm_ymmm256",
42260	"EVEX_Vptestmb_kr_k1_zmm_zmmm512",
42261	"EVEX_Vptestmw_kr_k1_xmm_xmmm128",
42262	"EVEX_Vptestmw_kr_k1_ymm_ymmm256",
42263	"EVEX_Vptestmw_kr_k1_zmm_zmmm512",
42264	"EVEX_Vptestnmb_kr_k1_xmm_xmmm128",
42265	"EVEX_Vptestnmb_kr_k1_ymm_ymmm256",
42266	"EVEX_Vptestnmb_kr_k1_zmm_zmmm512",
42267	"EVEX_Vptestnmw_kr_k1_xmm_xmmm128",
42268	"EVEX_Vptestnmw_kr_k1_ymm_ymmm256",
42269	"EVEX_Vptestnmw_kr_k1_zmm_zmmm512",
42270	"EVEX_Vptestmd_kr_k1_xmm_xmmm128b32",
42271	"EVEX_Vptestmd_kr_k1_ymm_ymmm256b32",
42272	"EVEX_Vptestmd_kr_k1_zmm_zmmm512b32",
42273	"EVEX_Vptestmq_kr_k1_xmm_xmmm128b64",
42274	"EVEX_Vptestmq_kr_k1_ymm_ymmm256b64",
42275	"EVEX_Vptestmq_kr_k1_zmm_zmmm512b64",
42276	"EVEX_Vptestnmd_kr_k1_xmm_xmmm128b32",
42277	"EVEX_Vptestnmd_kr_k1_ymm_ymmm256b32",
42278	"EVEX_Vptestnmd_kr_k1_zmm_zmmm512b32",
42279	"EVEX_Vptestnmq_kr_k1_xmm_xmmm128b64",
42280	"EVEX_Vptestnmq_kr_k1_ymm_ymmm256b64",
42281	"EVEX_Vptestnmq_kr_k1_zmm_zmmm512b64",
42282	"Pmuldq_xmm_xmmm128",
42283	"VEX_Vpmuldq_xmm_xmm_xmmm128",
42284	"VEX_Vpmuldq_ymm_ymm_ymmm256",
42285	"EVEX_Vpmuldq_xmm_k1z_xmm_xmmm128b64",
42286	"EVEX_Vpmuldq_ymm_k1z_ymm_ymmm256b64",
42287	"EVEX_Vpmuldq_zmm_k1z_zmm_zmmm512b64",
42288	"EVEX_Vpmovm2b_xmm_kr",
42289	"EVEX_Vpmovm2b_ymm_kr",
42290	"EVEX_Vpmovm2b_zmm_kr",
42291	"EVEX_Vpmovm2w_xmm_kr",
42292	"EVEX_Vpmovm2w_ymm_kr",
42293	"EVEX_Vpmovm2w_zmm_kr",
42294	"Pcmpeqq_xmm_xmmm128",
42295	"VEX_Vpcmpeqq_xmm_xmm_xmmm128",
42296	"VEX_Vpcmpeqq_ymm_ymm_ymmm256",
42297	"EVEX_Vpcmpeqq_kr_k1_xmm_xmmm128b64",
42298	"EVEX_Vpcmpeqq_kr_k1_ymm_ymmm256b64",
42299	"EVEX_Vpcmpeqq_kr_k1_zmm_zmmm512b64",
42300	"EVEX_Vpmovb2m_kr_xmm",
42301	"EVEX_Vpmovb2m_kr_ymm",
42302	"EVEX_Vpmovb2m_kr_zmm",
42303	"EVEX_Vpmovw2m_kr_xmm",
42304	"EVEX_Vpmovw2m_kr_ymm",
42305	"EVEX_Vpmovw2m_kr_zmm",
42306	"Movntdqa_xmm_m128",
42307	"VEX_Vmovntdqa_xmm_m128",
42308	"VEX_Vmovntdqa_ymm_m256",
42309	"EVEX_Vmovntdqa_xmm_m128",
42310	"EVEX_Vmovntdqa_ymm_m256",
42311	"EVEX_Vmovntdqa_zmm_m512",
42312	"EVEX_Vpbroadcastmb2q_xmm_kr",
42313	"EVEX_Vpbroadcastmb2q_ymm_kr",
42314	"EVEX_Vpbroadcastmb2q_zmm_kr",
42315	"Packusdw_xmm_xmmm128",
42316	"VEX_Vpackusdw_xmm_xmm_xmmm128",
42317	"VEX_Vpackusdw_ymm_ymm_ymmm256",
42318	"EVEX_Vpackusdw_xmm_k1z_xmm_xmmm128b32",
42319	"EVEX_Vpackusdw_ymm_k1z_ymm_ymmm256b32",
42320	"EVEX_Vpackusdw_zmm_k1z_zmm_zmmm512b32",
42321	"VEX_Vmaskmovps_xmm_xmm_m128",
42322	"VEX_Vmaskmovps_ymm_ymm_m256",
42323	"EVEX_Vscalefps_xmm_k1z_xmm_xmmm128b32",
42324	"EVEX_Vscalefps_ymm_k1z_ymm_ymmm256b32",
42325	"EVEX_Vscalefps_zmm_k1z_zmm_zmmm512b32_er",
42326	"EVEX_Vscalefpd_xmm_k1z_xmm_xmmm128b64",
42327	"EVEX_Vscalefpd_ymm_k1z_ymm_ymmm256b64",
42328	"EVEX_Vscalefpd_zmm_k1z_zmm_zmmm512b64_er",
42329	"VEX_Vmaskmovpd_xmm_xmm_m128",
42330	"VEX_Vmaskmovpd_ymm_ymm_m256",
42331	"EVEX_Vscalefss_xmm_k1z_xmm_xmmm32_er",
42332	"EVEX_Vscalefsd_xmm_k1z_xmm_xmmm64_er",
42333	"VEX_Vmaskmovps_m128_xmm_xmm",
42334	"VEX_Vmaskmovps_m256_ymm_ymm",
42335	"VEX_Vmaskmovpd_m128_xmm_xmm",
42336	"VEX_Vmaskmovpd_m256_ymm_ymm",
42337	"Pmovzxbw_xmm_xmmm64",
42338	"VEX_Vpmovzxbw_xmm_xmmm64",
42339	"VEX_Vpmovzxbw_ymm_xmmm128",
42340	"EVEX_Vpmovzxbw_xmm_k1z_xmmm64",
42341	"EVEX_Vpmovzxbw_ymm_k1z_xmmm128",
42342	"EVEX_Vpmovzxbw_zmm_k1z_ymmm256",
42343	"EVEX_Vpmovwb_xmmm64_k1z_xmm",
42344	"EVEX_Vpmovwb_xmmm128_k1z_ymm",
42345	"EVEX_Vpmovwb_ymmm256_k1z_zmm",
42346	"Pmovzxbd_xmm_xmmm32",
42347	"VEX_Vpmovzxbd_xmm_xmmm32",
42348	"VEX_Vpmovzxbd_ymm_xmmm64",
42349	"EVEX_Vpmovzxbd_xmm_k1z_xmmm32",
42350	"EVEX_Vpmovzxbd_ymm_k1z_xmmm64",
42351	"EVEX_Vpmovzxbd_zmm_k1z_xmmm128",
42352	"EVEX_Vpmovdb_xmmm32_k1z_xmm",
42353	"EVEX_Vpmovdb_xmmm64_k1z_ymm",
42354	"EVEX_Vpmovdb_xmmm128_k1z_zmm",
42355	"Pmovzxbq_xmm_xmmm16",
42356	"VEX_Vpmovzxbq_xmm_xmmm16",
42357	"VEX_Vpmovzxbq_ymm_xmmm32",
42358	"EVEX_Vpmovzxbq_xmm_k1z_xmmm16",
42359	"EVEX_Vpmovzxbq_ymm_k1z_xmmm32",
42360	"EVEX_Vpmovzxbq_zmm_k1z_xmmm64",
42361	"EVEX_Vpmovqb_xmmm16_k1z_xmm",
42362	"EVEX_Vpmovqb_xmmm32_k1z_ymm",
42363	"EVEX_Vpmovqb_xmmm64_k1z_zmm",
42364	"Pmovzxwd_xmm_xmmm64",
42365	"VEX_Vpmovzxwd_xmm_xmmm64",
42366	"VEX_Vpmovzxwd_ymm_xmmm128",
42367	"EVEX_Vpmovzxwd_xmm_k1z_xmmm64",
42368	"EVEX_Vpmovzxwd_ymm_k1z_xmmm128",
42369	"EVEX_Vpmovzxwd_zmm_k1z_ymmm256",
42370	"EVEX_Vpmovdw_xmmm64_k1z_xmm",
42371	"EVEX_Vpmovdw_xmmm128_k1z_ymm",
42372	"EVEX_Vpmovdw_ymmm256_k1z_zmm",
42373	"Pmovzxwq_xmm_xmmm32",
42374	"VEX_Vpmovzxwq_xmm_xmmm32",
42375	"VEX_Vpmovzxwq_ymm_xmmm64",
42376	"EVEX_Vpmovzxwq_xmm_k1z_xmmm32",
42377	"EVEX_Vpmovzxwq_ymm_k1z_xmmm64",
42378	"EVEX_Vpmovzxwq_zmm_k1z_xmmm128",
42379	"EVEX_Vpmovqw_xmmm32_k1z_xmm",
42380	"EVEX_Vpmovqw_xmmm64_k1z_ymm",
42381	"EVEX_Vpmovqw_xmmm128_k1z_zmm",
42382	"Pmovzxdq_xmm_xmmm64",
42383	"VEX_Vpmovzxdq_xmm_xmmm64",
42384	"VEX_Vpmovzxdq_ymm_xmmm128",
42385	"EVEX_Vpmovzxdq_xmm_k1z_xmmm64",
42386	"EVEX_Vpmovzxdq_ymm_k1z_xmmm128",
42387	"EVEX_Vpmovzxdq_zmm_k1z_ymmm256",
42388	"EVEX_Vpmovqd_xmmm64_k1z_xmm",
42389	"EVEX_Vpmovqd_xmmm128_k1z_ymm",
42390	"EVEX_Vpmovqd_ymmm256_k1z_zmm",
42391	"VEX_Vpermd_ymm_ymm_ymmm256",
42392	"EVEX_Vpermd_ymm_k1z_ymm_ymmm256b32",
42393	"EVEX_Vpermd_zmm_k1z_zmm_zmmm512b32",
42394	"EVEX_Vpermq_ymm_k1z_ymm_ymmm256b64",
42395	"EVEX_Vpermq_zmm_k1z_zmm_zmmm512b64",
42396	"Pcmpgtq_xmm_xmmm128",
42397	"VEX_Vpcmpgtq_xmm_xmm_xmmm128",
42398	"VEX_Vpcmpgtq_ymm_ymm_ymmm256",
42399	"EVEX_Vpcmpgtq_kr_k1_xmm_xmmm128b64",
42400	"EVEX_Vpcmpgtq_kr_k1_ymm_ymmm256b64",
42401	"EVEX_Vpcmpgtq_kr_k1_zmm_zmmm512b64",
42402	"Pminsb_xmm_xmmm128",
42403	"VEX_Vpminsb_xmm_xmm_xmmm128",
42404	"VEX_Vpminsb_ymm_ymm_ymmm256",
42405	"EVEX_Vpminsb_xmm_k1z_xmm_xmmm128",
42406	"EVEX_Vpminsb_ymm_k1z_ymm_ymmm256",
42407	"EVEX_Vpminsb_zmm_k1z_zmm_zmmm512",
42408	"EVEX_Vpmovm2d_xmm_kr",
42409	"EVEX_Vpmovm2d_ymm_kr",
42410	"EVEX_Vpmovm2d_zmm_kr",
42411	"EVEX_Vpmovm2q_xmm_kr",
42412	"EVEX_Vpmovm2q_ymm_kr",
42413	"EVEX_Vpmovm2q_zmm_kr",
42414	"Pminsd_xmm_xmmm128",
42415	"VEX_Vpminsd_xmm_xmm_xmmm128",
42416	"VEX_Vpminsd_ymm_ymm_ymmm256",
42417	"EVEX_Vpminsd_xmm_k1z_xmm_xmmm128b32",
42418	"EVEX_Vpminsd_ymm_k1z_ymm_ymmm256b32",
42419	"EVEX_Vpminsd_zmm_k1z_zmm_zmmm512b32",
42420	"EVEX_Vpminsq_xmm_k1z_xmm_xmmm128b64",
42421	"EVEX_Vpminsq_ymm_k1z_ymm_ymmm256b64",
42422	"EVEX_Vpminsq_zmm_k1z_zmm_zmmm512b64",
42423	"EVEX_Vpmovd2m_kr_xmm",
42424	"EVEX_Vpmovd2m_kr_ymm",
42425	"EVEX_Vpmovd2m_kr_zmm",
42426	"EVEX_Vpmovq2m_kr_xmm",
42427	"EVEX_Vpmovq2m_kr_ymm",
42428	"EVEX_Vpmovq2m_kr_zmm",
42429	"Pminuw_xmm_xmmm128",
42430	"VEX_Vpminuw_xmm_xmm_xmmm128",
42431	"VEX_Vpminuw_ymm_ymm_ymmm256",
42432	"EVEX_Vpminuw_xmm_k1z_xmm_xmmm128",
42433	"EVEX_Vpminuw_ymm_k1z_ymm_ymmm256",
42434	"EVEX_Vpminuw_zmm_k1z_zmm_zmmm512",
42435	"EVEX_Vpbroadcastmw2d_xmm_kr",
42436	"EVEX_Vpbroadcastmw2d_ymm_kr",
42437	"EVEX_Vpbroadcastmw2d_zmm_kr",
42438	"Pminud_xmm_xmmm128",
42439	"VEX_Vpminud_xmm_xmm_xmmm128",
42440	"VEX_Vpminud_ymm_ymm_ymmm256",
42441	"EVEX_Vpminud_xmm_k1z_xmm_xmmm128b32",
42442	"EVEX_Vpminud_ymm_k1z_ymm_ymmm256b32",
42443	"EVEX_Vpminud_zmm_k1z_zmm_zmmm512b32",
42444	"EVEX_Vpminuq_xmm_k1z_xmm_xmmm128b64",
42445	"EVEX_Vpminuq_ymm_k1z_ymm_ymmm256b64",
42446	"EVEX_Vpminuq_zmm_k1z_zmm_zmmm512b64",
42447	"Pmaxsb_xmm_xmmm128",
42448	"VEX_Vpmaxsb_xmm_xmm_xmmm128",
42449	"VEX_Vpmaxsb_ymm_ymm_ymmm256",
42450	"EVEX_Vpmaxsb_xmm_k1z_xmm_xmmm128",
42451	"EVEX_Vpmaxsb_ymm_k1z_ymm_ymmm256",
42452	"EVEX_Vpmaxsb_zmm_k1z_zmm_zmmm512",
42453	"Pmaxsd_xmm_xmmm128",
42454	"VEX_Vpmaxsd_xmm_xmm_xmmm128",
42455	"VEX_Vpmaxsd_ymm_ymm_ymmm256",
42456	"EVEX_Vpmaxsd_xmm_k1z_xmm_xmmm128b32",
42457	"EVEX_Vpmaxsd_ymm_k1z_ymm_ymmm256b32",
42458	"EVEX_Vpmaxsd_zmm_k1z_zmm_zmmm512b32",
42459	"EVEX_Vpmaxsq_xmm_k1z_xmm_xmmm128b64",
42460	"EVEX_Vpmaxsq_ymm_k1z_ymm_ymmm256b64",
42461	"EVEX_Vpmaxsq_zmm_k1z_zmm_zmmm512b64",
42462	"Pmaxuw_xmm_xmmm128",
42463	"VEX_Vpmaxuw_xmm_xmm_xmmm128",
42464	"VEX_Vpmaxuw_ymm_ymm_ymmm256",
42465	"EVEX_Vpmaxuw_xmm_k1z_xmm_xmmm128",
42466	"EVEX_Vpmaxuw_ymm_k1z_ymm_ymmm256",
42467	"EVEX_Vpmaxuw_zmm_k1z_zmm_zmmm512",
42468	"Pmaxud_xmm_xmmm128",
42469	"VEX_Vpmaxud_xmm_xmm_xmmm128",
42470	"VEX_Vpmaxud_ymm_ymm_ymmm256",
42471	"EVEX_Vpmaxud_xmm_k1z_xmm_xmmm128b32",
42472	"EVEX_Vpmaxud_ymm_k1z_ymm_ymmm256b32",
42473	"EVEX_Vpmaxud_zmm_k1z_zmm_zmmm512b32",
42474	"EVEX_Vpmaxuq_xmm_k1z_xmm_xmmm128b64",
42475	"EVEX_Vpmaxuq_ymm_k1z_ymm_ymmm256b64",
42476	"EVEX_Vpmaxuq_zmm_k1z_zmm_zmmm512b64",
42477	"Pmulld_xmm_xmmm128",
42478	"VEX_Vpmulld_xmm_xmm_xmmm128",
42479	"VEX_Vpmulld_ymm_ymm_ymmm256",
42480	"EVEX_Vpmulld_xmm_k1z_xmm_xmmm128b32",
42481	"EVEX_Vpmulld_ymm_k1z_ymm_ymmm256b32",
42482	"EVEX_Vpmulld_zmm_k1z_zmm_zmmm512b32",
42483	"EVEX_Vpmullq_xmm_k1z_xmm_xmmm128b64",
42484	"EVEX_Vpmullq_ymm_k1z_ymm_ymmm256b64",
42485	"EVEX_Vpmullq_zmm_k1z_zmm_zmmm512b64",
42486	"Phminposuw_xmm_xmmm128",
42487	"VEX_Vphminposuw_xmm_xmmm128",
42488	"EVEX_Vgetexpps_xmm_k1z_xmmm128b32",
42489	"EVEX_Vgetexpps_ymm_k1z_ymmm256b32",
42490	"EVEX_Vgetexpps_zmm_k1z_zmmm512b32_sae",
42491	"EVEX_Vgetexppd_xmm_k1z_xmmm128b64",
42492	"EVEX_Vgetexppd_ymm_k1z_ymmm256b64",
42493	"EVEX_Vgetexppd_zmm_k1z_zmmm512b64_sae",
42494	"EVEX_Vgetexpss_xmm_k1z_xmm_xmmm32_sae",
42495	"EVEX_Vgetexpsd_xmm_k1z_xmm_xmmm64_sae",
42496	"EVEX_Vplzcntd_xmm_k1z_xmmm128b32",
42497	"EVEX_Vplzcntd_ymm_k1z_ymmm256b32",
42498	"EVEX_Vplzcntd_zmm_k1z_zmmm512b32",
42499	"EVEX_Vplzcntq_xmm_k1z_xmmm128b64",
42500	"EVEX_Vplzcntq_ymm_k1z_ymmm256b64",
42501	"EVEX_Vplzcntq_zmm_k1z_zmmm512b64",
42502	"VEX_Vpsrlvd_xmm_xmm_xmmm128",
42503	"VEX_Vpsrlvd_ymm_ymm_ymmm256",
42504	"VEX_Vpsrlvq_xmm_xmm_xmmm128",
42505	"VEX_Vpsrlvq_ymm_ymm_ymmm256",
42506	"EVEX_Vpsrlvd_xmm_k1z_xmm_xmmm128b32",
42507	"EVEX_Vpsrlvd_ymm_k1z_ymm_ymmm256b32",
42508	"EVEX_Vpsrlvd_zmm_k1z_zmm_zmmm512b32",
42509	"EVEX_Vpsrlvq_xmm_k1z_xmm_xmmm128b64",
42510	"EVEX_Vpsrlvq_ymm_k1z_ymm_ymmm256b64",
42511	"EVEX_Vpsrlvq_zmm_k1z_zmm_zmmm512b64",
42512	"VEX_Vpsravd_xmm_xmm_xmmm128",
42513	"VEX_Vpsravd_ymm_ymm_ymmm256",
42514	"EVEX_Vpsravd_xmm_k1z_xmm_xmmm128b32",
42515	"EVEX_Vpsravd_ymm_k1z_ymm_ymmm256b32",
42516	"EVEX_Vpsravd_zmm_k1z_zmm_zmmm512b32",
42517	"EVEX_Vpsravq_xmm_k1z_xmm_xmmm128b64",
42518	"EVEX_Vpsravq_ymm_k1z_ymm_ymmm256b64",
42519	"EVEX_Vpsravq_zmm_k1z_zmm_zmmm512b64",
42520	"VEX_Vpsllvd_xmm_xmm_xmmm128",
42521	"VEX_Vpsllvd_ymm_ymm_ymmm256",
42522	"VEX_Vpsllvq_xmm_xmm_xmmm128",
42523	"VEX_Vpsllvq_ymm_ymm_ymmm256",
42524	"EVEX_Vpsllvd_xmm_k1z_xmm_xmmm128b32",
42525	"EVEX_Vpsllvd_ymm_k1z_ymm_ymmm256b32",
42526	"EVEX_Vpsllvd_zmm_k1z_zmm_zmmm512b32",
42527	"EVEX_Vpsllvq_xmm_k1z_xmm_xmmm128b64",
42528	"EVEX_Vpsllvq_ymm_k1z_ymm_ymmm256b64",
42529	"EVEX_Vpsllvq_zmm_k1z_zmm_zmmm512b64",
42530	"EVEX_Vrcp14ps_xmm_k1z_xmmm128b32",
42531	"EVEX_Vrcp14ps_ymm_k1z_ymmm256b32",
42532	"EVEX_Vrcp14ps_zmm_k1z_zmmm512b32",
42533	"EVEX_Vrcp14pd_xmm_k1z_xmmm128b64",
42534	"EVEX_Vrcp14pd_ymm_k1z_ymmm256b64",
42535	"EVEX_Vrcp14pd_zmm_k1z_zmmm512b64",
42536	"EVEX_Vrcp14ss_xmm_k1z_xmm_xmmm32",
42537	"EVEX_Vrcp14sd_xmm_k1z_xmm_xmmm64",
42538	"EVEX_Vrsqrt14ps_xmm_k1z_xmmm128b32",
42539	"EVEX_Vrsqrt14ps_ymm_k1z_ymmm256b32",
42540	"EVEX_Vrsqrt14ps_zmm_k1z_zmmm512b32",
42541	"EVEX_Vrsqrt14pd_xmm_k1z_xmmm128b64",
42542	"EVEX_Vrsqrt14pd_ymm_k1z_ymmm256b64",
42543	"EVEX_Vrsqrt14pd_zmm_k1z_zmmm512b64",
42544	"EVEX_Vrsqrt14ss_xmm_k1z_xmm_xmmm32",
42545	"EVEX_Vrsqrt14sd_xmm_k1z_xmm_xmmm64",
42546	"EVEX_Vpdpbusd_xmm_k1z_xmm_xmmm128b32",
42547	"EVEX_Vpdpbusd_ymm_k1z_ymm_ymmm256b32",
42548	"EVEX_Vpdpbusd_zmm_k1z_zmm_zmmm512b32",
42549	"EVEX_Vpdpbusds_xmm_k1z_xmm_xmmm128b32",
42550	"EVEX_Vpdpbusds_ymm_k1z_ymm_ymmm256b32",
42551	"EVEX_Vpdpbusds_zmm_k1z_zmm_zmmm512b32",
42552	"EVEX_Vpdpwssd_xmm_k1z_xmm_xmmm128b32",
42553	"EVEX_Vpdpwssd_ymm_k1z_ymm_ymmm256b32",
42554	"EVEX_Vpdpwssd_zmm_k1z_zmm_zmmm512b32",
42555	"EVEX_Vdpbf16ps_xmm_k1z_xmm_xmmm128b32",
42556	"EVEX_Vdpbf16ps_ymm_k1z_ymm_ymmm256b32",
42557	"EVEX_Vdpbf16ps_zmm_k1z_zmm_zmmm512b32",
42558	"EVEX_Vp4dpwssd_zmm_k1z_zmmp3_m128",
42559	"EVEX_Vpdpwssds_xmm_k1z_xmm_xmmm128b32",
42560	"EVEX_Vpdpwssds_ymm_k1z_ymm_ymmm256b32",
42561	"EVEX_Vpdpwssds_zmm_k1z_zmm_zmmm512b32",
42562	"EVEX_Vp4dpwssds_zmm_k1z_zmmp3_m128",
42563	"EVEX_Vpopcntb_xmm_k1z_xmmm128",
42564	"EVEX_Vpopcntb_ymm_k1z_ymmm256",
42565	"EVEX_Vpopcntb_zmm_k1z_zmmm512",
42566	"EVEX_Vpopcntw_xmm_k1z_xmmm128",
42567	"EVEX_Vpopcntw_ymm_k1z_ymmm256",
42568	"EVEX_Vpopcntw_zmm_k1z_zmmm512",
42569	"EVEX_Vpopcntd_xmm_k1z_xmmm128b32",
42570	"EVEX_Vpopcntd_ymm_k1z_ymmm256b32",
42571	"EVEX_Vpopcntd_zmm_k1z_zmmm512b32",
42572	"EVEX_Vpopcntq_xmm_k1z_xmmm128b64",
42573	"EVEX_Vpopcntq_ymm_k1z_ymmm256b64",
42574	"EVEX_Vpopcntq_zmm_k1z_zmmm512b64",
42575	"VEX_Vpbroadcastd_xmm_xmmm32",
42576	"VEX_Vpbroadcastd_ymm_xmmm32",
42577	"EVEX_Vpbroadcastd_xmm_k1z_xmmm32",
42578	"EVEX_Vpbroadcastd_ymm_k1z_xmmm32",
42579	"EVEX_Vpbroadcastd_zmm_k1z_xmmm32",
42580	"VEX_Vpbroadcastq_xmm_xmmm64",
42581	"VEX_Vpbroadcastq_ymm_xmmm64",
42582	"EVEX_Vbroadcasti32x2_xmm_k1z_xmmm64",
42583	"EVEX_Vbroadcasti32x2_ymm_k1z_xmmm64",
42584	"EVEX_Vbroadcasti32x2_zmm_k1z_xmmm64",
42585	"EVEX_Vpbroadcastq_xmm_k1z_xmmm64",
42586	"EVEX_Vpbroadcastq_ymm_k1z_xmmm64",
42587	"EVEX_Vpbroadcastq_zmm_k1z_xmmm64",
42588	"VEX_Vbroadcasti128_ymm_m128",
42589	"EVEX_Vbroadcasti32x4_ymm_k1z_m128",
42590	"EVEX_Vbroadcasti32x4_zmm_k1z_m128",
42591	"EVEX_Vbroadcasti64x2_ymm_k1z_m128",
42592	"EVEX_Vbroadcasti64x2_zmm_k1z_m128",
42593	"EVEX_Vbroadcasti32x8_zmm_k1z_m256",
42594	"EVEX_Vbroadcasti64x4_zmm_k1z_m256",
42595	"EVEX_Vpexpandb_xmm_k1z_xmmm128",
42596	"EVEX_Vpexpandb_ymm_k1z_ymmm256",
42597	"EVEX_Vpexpandb_zmm_k1z_zmmm512",
42598	"EVEX_Vpexpandw_xmm_k1z_xmmm128",
42599	"EVEX_Vpexpandw_ymm_k1z_ymmm256",
42600	"EVEX_Vpexpandw_zmm_k1z_zmmm512",
42601	"EVEX_Vpcompressb_xmmm128_k1z_xmm",
42602	"EVEX_Vpcompressb_ymmm256_k1z_ymm",
42603	"EVEX_Vpcompressb_zmmm512_k1z_zmm",
42604	"EVEX_Vpcompressw_xmmm128_k1z_xmm",
42605	"EVEX_Vpcompressw_ymmm256_k1z_ymm",
42606	"EVEX_Vpcompressw_zmmm512_k1z_zmm",
42607	"EVEX_Vpblendmd_xmm_k1z_xmm_xmmm128b32",
42608	"EVEX_Vpblendmd_ymm_k1z_ymm_ymmm256b32",
42609	"EVEX_Vpblendmd_zmm_k1z_zmm_zmmm512b32",
42610	"EVEX_Vpblendmq_xmm_k1z_xmm_xmmm128b64",
42611	"EVEX_Vpblendmq_ymm_k1z_ymm_ymmm256b64",
42612	"EVEX_Vpblendmq_zmm_k1z_zmm_zmmm512b64",
42613	"EVEX_Vblendmps_xmm_k1z_xmm_xmmm128b32",
42614	"EVEX_Vblendmps_ymm_k1z_ymm_ymmm256b32",
42615	"EVEX_Vblendmps_zmm_k1z_zmm_zmmm512b32",
42616	"EVEX_Vblendmpd_xmm_k1z_xmm_xmmm128b64",
42617	"EVEX_Vblendmpd_ymm_k1z_ymm_ymmm256b64",
42618	"EVEX_Vblendmpd_zmm_k1z_zmm_zmmm512b64",
42619	"EVEX_Vpblendmb_xmm_k1z_xmm_xmmm128",
42620	"EVEX_Vpblendmb_ymm_k1z_ymm_ymmm256",
42621	"EVEX_Vpblendmb_zmm_k1z_zmm_zmmm512",
42622	"EVEX_Vpblendmw_xmm_k1z_xmm_xmmm128",
42623	"EVEX_Vpblendmw_ymm_k1z_ymm_ymmm256",
42624	"EVEX_Vpblendmw_zmm_k1z_zmm_zmmm512",
42625	"EVEX_Vp2intersectd_kp1_xmm_xmmm128b32",
42626	"EVEX_Vp2intersectd_kp1_ymm_ymmm256b32",
42627	"EVEX_Vp2intersectd_kp1_zmm_zmmm512b32",
42628	"EVEX_Vp2intersectq_kp1_xmm_xmmm128b64",
42629	"EVEX_Vp2intersectq_kp1_ymm_ymmm256b64",
42630	"EVEX_Vp2intersectq_kp1_zmm_zmmm512b64",
42631	"EVEX_Vpshldvw_xmm_k1z_xmm_xmmm128",
42632	"EVEX_Vpshldvw_ymm_k1z_ymm_ymmm256",
42633	"EVEX_Vpshldvw_zmm_k1z_zmm_zmmm512",
42634	"EVEX_Vpshldvd_xmm_k1z_xmm_xmmm128b32",
42635	"EVEX_Vpshldvd_ymm_k1z_ymm_ymmm256b32",
42636	"EVEX_Vpshldvd_zmm_k1z_zmm_zmmm512b32",
42637	"EVEX_Vpshldvq_xmm_k1z_xmm_xmmm128b64",
42638	"EVEX_Vpshldvq_ymm_k1z_ymm_ymmm256b64",
42639	"EVEX_Vpshldvq_zmm_k1z_zmm_zmmm512b64",
42640	"EVEX_Vpshrdvw_xmm_k1z_xmm_xmmm128",
42641	"EVEX_Vpshrdvw_ymm_k1z_ymm_ymmm256",
42642	"EVEX_Vpshrdvw_zmm_k1z_zmm_zmmm512",
42643	"EVEX_Vcvtneps2bf16_xmm_k1z_xmmm128b32",
42644	"EVEX_Vcvtneps2bf16_xmm_k1z_ymmm256b32",
42645	"EVEX_Vcvtneps2bf16_ymm_k1z_zmmm512b32",
42646	"EVEX_Vcvtne2ps2bf16_xmm_k1z_xmm_xmmm128b32",
42647	"EVEX_Vcvtne2ps2bf16_ymm_k1z_ymm_ymmm256b32",
42648	"EVEX_Vcvtne2ps2bf16_zmm_k1z_zmm_zmmm512b32",
42649	"EVEX_Vpshrdvd_xmm_k1z_xmm_xmmm128b32",
42650	"EVEX_Vpshrdvd_ymm_k1z_ymm_ymmm256b32",
42651	"EVEX_Vpshrdvd_zmm_k1z_zmm_zmmm512b32",
42652	"EVEX_Vpshrdvq_xmm_k1z_xmm_xmmm128b64",
42653	"EVEX_Vpshrdvq_ymm_k1z_ymm_ymmm256b64",
42654	"EVEX_Vpshrdvq_zmm_k1z_zmm_zmmm512b64",
42655	"EVEX_Vpermi2b_xmm_k1z_xmm_xmmm128",
42656	"EVEX_Vpermi2b_ymm_k1z_ymm_ymmm256",
42657	"EVEX_Vpermi2b_zmm_k1z_zmm_zmmm512",
42658	"EVEX_Vpermi2w_xmm_k1z_xmm_xmmm128",
42659	"EVEX_Vpermi2w_ymm_k1z_ymm_ymmm256",
42660	"EVEX_Vpermi2w_zmm_k1z_zmm_zmmm512",
42661	"EVEX_Vpermi2d_xmm_k1z_xmm_xmmm128b32",
42662	"EVEX_Vpermi2d_ymm_k1z_ymm_ymmm256b32",
42663	"EVEX_Vpermi2d_zmm_k1z_zmm_zmmm512b32",
42664	"EVEX_Vpermi2q_xmm_k1z_xmm_xmmm128b64",
42665	"EVEX_Vpermi2q_ymm_k1z_ymm_ymmm256b64",
42666	"EVEX_Vpermi2q_zmm_k1z_zmm_zmmm512b64",
42667	"EVEX_Vpermi2ps_xmm_k1z_xmm_xmmm128b32",
42668	"EVEX_Vpermi2ps_ymm_k1z_ymm_ymmm256b32",
42669	"EVEX_Vpermi2ps_zmm_k1z_zmm_zmmm512b32",
42670	"EVEX_Vpermi2pd_xmm_k1z_xmm_xmmm128b64",
42671	"EVEX_Vpermi2pd_ymm_k1z_ymm_ymmm256b64",
42672	"EVEX_Vpermi2pd_zmm_k1z_zmm_zmmm512b64",
42673	"VEX_Vpbroadcastb_xmm_xmmm8",
42674	"VEX_Vpbroadcastb_ymm_xmmm8",
42675	"EVEX_Vpbroadcastb_xmm_k1z_xmmm8",
42676	"EVEX_Vpbroadcastb_ymm_k1z_xmmm8",
42677	"EVEX_Vpbroadcastb_zmm_k1z_xmmm8",
42678	"VEX_Vpbroadcastw_xmm_xmmm16",
42679	"VEX_Vpbroadcastw_ymm_xmmm16",
42680	"EVEX_Vpbroadcastw_xmm_k1z_xmmm16",
42681	"EVEX_Vpbroadcastw_ymm_k1z_xmmm16",
42682	"EVEX_Vpbroadcastw_zmm_k1z_xmmm16",
42683	"EVEX_Vpbroadcastb_xmm_k1z_r32",
42684	"EVEX_Vpbroadcastb_ymm_k1z_r32",
42685	"EVEX_Vpbroadcastb_zmm_k1z_r32",
42686	"EVEX_Vpbroadcastw_xmm_k1z_r32",
42687	"EVEX_Vpbroadcastw_ymm_k1z_r32",
42688	"EVEX_Vpbroadcastw_zmm_k1z_r32",
42689	"EVEX_Vpbroadcastd_xmm_k1z_r32",
42690	"EVEX_Vpbroadcastd_ymm_k1z_r32",
42691	"EVEX_Vpbroadcastd_zmm_k1z_r32",
42692	"EVEX_Vpbroadcastq_xmm_k1z_r64",
42693	"EVEX_Vpbroadcastq_ymm_k1z_r64",
42694	"EVEX_Vpbroadcastq_zmm_k1z_r64",
42695	"EVEX_Vpermt2b_xmm_k1z_xmm_xmmm128",
42696	"EVEX_Vpermt2b_ymm_k1z_ymm_ymmm256",
42697	"EVEX_Vpermt2b_zmm_k1z_zmm_zmmm512",
42698	"EVEX_Vpermt2w_xmm_k1z_xmm_xmmm128",
42699	"EVEX_Vpermt2w_ymm_k1z_ymm_ymmm256",
42700	"EVEX_Vpermt2w_zmm_k1z_zmm_zmmm512",
42701	"EVEX_Vpermt2d_xmm_k1z_xmm_xmmm128b32",
42702	"EVEX_Vpermt2d_ymm_k1z_ymm_ymmm256b32",
42703	"EVEX_Vpermt2d_zmm_k1z_zmm_zmmm512b32",
42704	"EVEX_Vpermt2q_xmm_k1z_xmm_xmmm128b64",
42705	"EVEX_Vpermt2q_ymm_k1z_ymm_ymmm256b64",
42706	"EVEX_Vpermt2q_zmm_k1z_zmm_zmmm512b64",
42707	"EVEX_Vpermt2ps_xmm_k1z_xmm_xmmm128b32",
42708	"EVEX_Vpermt2ps_ymm_k1z_ymm_ymmm256b32",
42709	"EVEX_Vpermt2ps_zmm_k1z_zmm_zmmm512b32",
42710	"EVEX_Vpermt2pd_xmm_k1z_xmm_xmmm128b64",
42711	"EVEX_Vpermt2pd_ymm_k1z_ymm_ymmm256b64",
42712	"EVEX_Vpermt2pd_zmm_k1z_zmm_zmmm512b64",
42713	"Invept_r32_m128",
42714	"Invept_r64_m128",
42715	"Invvpid_r32_m128",
42716	"Invvpid_r64_m128",
42717	"Invpcid_r32_m128",
42718	"Invpcid_r64_m128",
42719	"EVEX_Vpmultishiftqb_xmm_k1z_xmm_xmmm128b64",
42720	"EVEX_Vpmultishiftqb_ymm_k1z_ymm_ymmm256b64",
42721	"EVEX_Vpmultishiftqb_zmm_k1z_zmm_zmmm512b64",
42722	"EVEX_Vexpandps_xmm_k1z_xmmm128",
42723	"EVEX_Vexpandps_ymm_k1z_ymmm256",
42724	"EVEX_Vexpandps_zmm_k1z_zmmm512",
42725	"EVEX_Vexpandpd_xmm_k1z_xmmm128",
42726	"EVEX_Vexpandpd_ymm_k1z_ymmm256",
42727	"EVEX_Vexpandpd_zmm_k1z_zmmm512",
42728	"EVEX_Vpexpandd_xmm_k1z_xmmm128",
42729	"EVEX_Vpexpandd_ymm_k1z_ymmm256",
42730	"EVEX_Vpexpandd_zmm_k1z_zmmm512",
42731	"EVEX_Vpexpandq_xmm_k1z_xmmm128",
42732	"EVEX_Vpexpandq_ymm_k1z_ymmm256",
42733	"EVEX_Vpexpandq_zmm_k1z_zmmm512",
42734	"EVEX_Vcompressps_xmmm128_k1z_xmm",
42735	"EVEX_Vcompressps_ymmm256_k1z_ymm",
42736	"EVEX_Vcompressps_zmmm512_k1z_zmm",
42737	"EVEX_Vcompresspd_xmmm128_k1z_xmm",
42738	"EVEX_Vcompresspd_ymmm256_k1z_ymm",
42739	"EVEX_Vcompresspd_zmmm512_k1z_zmm",
42740	"EVEX_Vpcompressd_xmmm128_k1z_xmm",
42741	"EVEX_Vpcompressd_ymmm256_k1z_ymm",
42742	"EVEX_Vpcompressd_zmmm512_k1z_zmm",
42743	"EVEX_Vpcompressq_xmmm128_k1z_xmm",
42744	"EVEX_Vpcompressq_ymmm256_k1z_ymm",
42745	"EVEX_Vpcompressq_zmmm512_k1z_zmm",
42746	"VEX_Vpmaskmovd_xmm_xmm_m128",
42747	"VEX_Vpmaskmovd_ymm_ymm_m256",
42748	"VEX_Vpmaskmovq_xmm_xmm_m128",
42749	"VEX_Vpmaskmovq_ymm_ymm_m256",
42750	"EVEX_Vpermb_xmm_k1z_xmm_xmmm128",
42751	"EVEX_Vpermb_ymm_k1z_ymm_ymmm256",
42752	"EVEX_Vpermb_zmm_k1z_zmm_zmmm512",
42753	"EVEX_Vpermw_xmm_k1z_xmm_xmmm128",
42754	"EVEX_Vpermw_ymm_k1z_ymm_ymmm256",
42755	"EVEX_Vpermw_zmm_k1z_zmm_zmmm512",
42756	"VEX_Vpmaskmovd_m128_xmm_xmm",
42757	"VEX_Vpmaskmovd_m256_ymm_ymm",
42758	"VEX_Vpmaskmovq_m128_xmm_xmm",
42759	"VEX_Vpmaskmovq_m256_ymm_ymm",
42760	"EVEX_Vpshufbitqmb_kr_k1_xmm_xmmm128",
42761	"EVEX_Vpshufbitqmb_kr_k1_ymm_ymmm256",
42762	"EVEX_Vpshufbitqmb_kr_k1_zmm_zmmm512",
42763	"VEX_Vpgatherdd_xmm_vm32x_xmm",
42764	"VEX_Vpgatherdd_ymm_vm32y_ymm",
42765	"VEX_Vpgatherdq_xmm_vm32x_xmm",
42766	"VEX_Vpgatherdq_ymm_vm32x_ymm",
42767	"EVEX_Vpgatherdd_xmm_k1_vm32x",
42768	"EVEX_Vpgatherdd_ymm_k1_vm32y",
42769	"EVEX_Vpgatherdd_zmm_k1_vm32z",
42770	"EVEX_Vpgatherdq_xmm_k1_vm32x",
42771	"EVEX_Vpgatherdq_ymm_k1_vm32x",
42772	"EVEX_Vpgatherdq_zmm_k1_vm32y",
42773	"VEX_Vpgatherqd_xmm_vm64x_xmm",
42774	"VEX_Vpgatherqd_xmm_vm64y_xmm",
42775	"VEX_Vpgatherqq_xmm_vm64x_xmm",
42776	"VEX_Vpgatherqq_ymm_vm64y_ymm",
42777	"EVEX_Vpgatherqd_xmm_k1_vm64x",
42778	"EVEX_Vpgatherqd_xmm_k1_vm64y",
42779	"EVEX_Vpgatherqd_ymm_k1_vm64z",
42780	"EVEX_Vpgatherqq_xmm_k1_vm64x",
42781	"EVEX_Vpgatherqq_ymm_k1_vm64y",
42782	"EVEX_Vpgatherqq_zmm_k1_vm64z",
42783	"VEX_Vgatherdps_xmm_vm32x_xmm",
42784	"VEX_Vgatherdps_ymm_vm32y_ymm",
42785	"VEX_Vgatherdpd_xmm_vm32x_xmm",
42786	"VEX_Vgatherdpd_ymm_vm32x_ymm",
42787	"EVEX_Vgatherdps_xmm_k1_vm32x",
42788	"EVEX_Vgatherdps_ymm_k1_vm32y",
42789	"EVEX_Vgatherdps_zmm_k1_vm32z",
42790	"EVEX_Vgatherdpd_xmm_k1_vm32x",
42791	"EVEX_Vgatherdpd_ymm_k1_vm32x",
42792	"EVEX_Vgatherdpd_zmm_k1_vm32y",
42793	"VEX_Vgatherqps_xmm_vm64x_xmm",
42794	"VEX_Vgatherqps_xmm_vm64y_xmm",
42795	"VEX_Vgatherqpd_xmm_vm64x_xmm",
42796	"VEX_Vgatherqpd_ymm_vm64y_ymm",
42797	"EVEX_Vgatherqps_xmm_k1_vm64x",
42798	"EVEX_Vgatherqps_xmm_k1_vm64y",
42799	"EVEX_Vgatherqps_ymm_k1_vm64z",
42800	"EVEX_Vgatherqpd_xmm_k1_vm64x",
42801	"EVEX_Vgatherqpd_ymm_k1_vm64y",
42802	"EVEX_Vgatherqpd_zmm_k1_vm64z",
42803	"VEX_Vfmaddsub132ps_xmm_xmm_xmmm128",
42804	"VEX_Vfmaddsub132ps_ymm_ymm_ymmm256",
42805	"VEX_Vfmaddsub132pd_xmm_xmm_xmmm128",
42806	"VEX_Vfmaddsub132pd_ymm_ymm_ymmm256",
42807	"EVEX_Vfmaddsub132ps_xmm_k1z_xmm_xmmm128b32",
42808	"EVEX_Vfmaddsub132ps_ymm_k1z_ymm_ymmm256b32",
42809	"EVEX_Vfmaddsub132ps_zmm_k1z_zmm_zmmm512b32_er",
42810	"EVEX_Vfmaddsub132pd_xmm_k1z_xmm_xmmm128b64",
42811	"EVEX_Vfmaddsub132pd_ymm_k1z_ymm_ymmm256b64",
42812	"EVEX_Vfmaddsub132pd_zmm_k1z_zmm_zmmm512b64_er",
42813	"VEX_Vfmsubadd132ps_xmm_xmm_xmmm128",
42814	"VEX_Vfmsubadd132ps_ymm_ymm_ymmm256",
42815	"VEX_Vfmsubadd132pd_xmm_xmm_xmmm128",
42816	"VEX_Vfmsubadd132pd_ymm_ymm_ymmm256",
42817	"EVEX_Vfmsubadd132ps_xmm_k1z_xmm_xmmm128b32",
42818	"EVEX_Vfmsubadd132ps_ymm_k1z_ymm_ymmm256b32",
42819	"EVEX_Vfmsubadd132ps_zmm_k1z_zmm_zmmm512b32_er",
42820	"EVEX_Vfmsubadd132pd_xmm_k1z_xmm_xmmm128b64",
42821	"EVEX_Vfmsubadd132pd_ymm_k1z_ymm_ymmm256b64",
42822	"EVEX_Vfmsubadd132pd_zmm_k1z_zmm_zmmm512b64_er",
42823	"VEX_Vfmadd132ps_xmm_xmm_xmmm128",
42824	"VEX_Vfmadd132ps_ymm_ymm_ymmm256",
42825	"VEX_Vfmadd132pd_xmm_xmm_xmmm128",
42826	"VEX_Vfmadd132pd_ymm_ymm_ymmm256",
42827	"EVEX_Vfmadd132ps_xmm_k1z_xmm_xmmm128b32",
42828	"EVEX_Vfmadd132ps_ymm_k1z_ymm_ymmm256b32",
42829	"EVEX_Vfmadd132ps_zmm_k1z_zmm_zmmm512b32_er",
42830	"EVEX_Vfmadd132pd_xmm_k1z_xmm_xmmm128b64",
42831	"EVEX_Vfmadd132pd_ymm_k1z_ymm_ymmm256b64",
42832	"EVEX_Vfmadd132pd_zmm_k1z_zmm_zmmm512b64_er",
42833	"VEX_Vfmadd132ss_xmm_xmm_xmmm32",
42834	"VEX_Vfmadd132sd_xmm_xmm_xmmm64",
42835	"EVEX_Vfmadd132ss_xmm_k1z_xmm_xmmm32_er",
42836	"EVEX_Vfmadd132sd_xmm_k1z_xmm_xmmm64_er",
42837	"VEX_Vfmsub132ps_xmm_xmm_xmmm128",
42838	"VEX_Vfmsub132ps_ymm_ymm_ymmm256",
42839	"VEX_Vfmsub132pd_xmm_xmm_xmmm128",
42840	"VEX_Vfmsub132pd_ymm_ymm_ymmm256",
42841	"EVEX_Vfmsub132ps_xmm_k1z_xmm_xmmm128b32",
42842	"EVEX_Vfmsub132ps_ymm_k1z_ymm_ymmm256b32",
42843	"EVEX_Vfmsub132ps_zmm_k1z_zmm_zmmm512b32_er",
42844	"EVEX_Vfmsub132pd_xmm_k1z_xmm_xmmm128b64",
42845	"EVEX_Vfmsub132pd_ymm_k1z_ymm_ymmm256b64",
42846	"EVEX_Vfmsub132pd_zmm_k1z_zmm_zmmm512b64_er",
42847	"EVEX_V4fmaddps_zmm_k1z_zmmp3_m128",
42848	"VEX_Vfmsub132ss_xmm_xmm_xmmm32",
42849	"VEX_Vfmsub132sd_xmm_xmm_xmmm64",
42850	"EVEX_Vfmsub132ss_xmm_k1z_xmm_xmmm32_er",
42851	"EVEX_Vfmsub132sd_xmm_k1z_xmm_xmmm64_er",
42852	"EVEX_V4fmaddss_xmm_k1z_xmmp3_m128",
42853	"VEX_Vfnmadd132ps_xmm_xmm_xmmm128",
42854	"VEX_Vfnmadd132ps_ymm_ymm_ymmm256",
42855	"VEX_Vfnmadd132pd_xmm_xmm_xmmm128",
42856	"VEX_Vfnmadd132pd_ymm_ymm_ymmm256",
42857	"EVEX_Vfnmadd132ps_xmm_k1z_xmm_xmmm128b32",
42858	"EVEX_Vfnmadd132ps_ymm_k1z_ymm_ymmm256b32",
42859	"EVEX_Vfnmadd132ps_zmm_k1z_zmm_zmmm512b32_er",
42860	"EVEX_Vfnmadd132pd_xmm_k1z_xmm_xmmm128b64",
42861	"EVEX_Vfnmadd132pd_ymm_k1z_ymm_ymmm256b64",
42862	"EVEX_Vfnmadd132pd_zmm_k1z_zmm_zmmm512b64_er",
42863	"VEX_Vfnmadd132ss_xmm_xmm_xmmm32",
42864	"VEX_Vfnmadd132sd_xmm_xmm_xmmm64",
42865	"EVEX_Vfnmadd132ss_xmm_k1z_xmm_xmmm32_er",
42866	"EVEX_Vfnmadd132sd_xmm_k1z_xmm_xmmm64_er",
42867	"VEX_Vfnmsub132ps_xmm_xmm_xmmm128",
42868	"VEX_Vfnmsub132ps_ymm_ymm_ymmm256",
42869	"VEX_Vfnmsub132pd_xmm_xmm_xmmm128",
42870	"VEX_Vfnmsub132pd_ymm_ymm_ymmm256",
42871	"EVEX_Vfnmsub132ps_xmm_k1z_xmm_xmmm128b32",
42872	"EVEX_Vfnmsub132ps_ymm_k1z_ymm_ymmm256b32",
42873	"EVEX_Vfnmsub132ps_zmm_k1z_zmm_zmmm512b32_er",
42874	"EVEX_Vfnmsub132pd_xmm_k1z_xmm_xmmm128b64",
42875	"EVEX_Vfnmsub132pd_ymm_k1z_ymm_ymmm256b64",
42876	"EVEX_Vfnmsub132pd_zmm_k1z_zmm_zmmm512b64_er",
42877	"VEX_Vfnmsub132ss_xmm_xmm_xmmm32",
42878	"VEX_Vfnmsub132sd_xmm_xmm_xmmm64",
42879	"EVEX_Vfnmsub132ss_xmm_k1z_xmm_xmmm32_er",
42880	"EVEX_Vfnmsub132sd_xmm_k1z_xmm_xmmm64_er",
42881	"EVEX_Vpscatterdd_vm32x_k1_xmm",
42882	"EVEX_Vpscatterdd_vm32y_k1_ymm",
42883	"EVEX_Vpscatterdd_vm32z_k1_zmm",
42884	"EVEX_Vpscatterdq_vm32x_k1_xmm",
42885	"EVEX_Vpscatterdq_vm32x_k1_ymm",
42886	"EVEX_Vpscatterdq_vm32y_k1_zmm",
42887	"EVEX_Vpscatterqd_vm64x_k1_xmm",
42888	"EVEX_Vpscatterqd_vm64y_k1_xmm",
42889	"EVEX_Vpscatterqd_vm64z_k1_ymm",
42890	"EVEX_Vpscatterqq_vm64x_k1_xmm",
42891	"EVEX_Vpscatterqq_vm64y_k1_ymm",
42892	"EVEX_Vpscatterqq_vm64z_k1_zmm",
42893	"EVEX_Vscatterdps_vm32x_k1_xmm",
42894	"EVEX_Vscatterdps_vm32y_k1_ymm",
42895	"EVEX_Vscatterdps_vm32z_k1_zmm",
42896	"EVEX_Vscatterdpd_vm32x_k1_xmm",
42897	"EVEX_Vscatterdpd_vm32x_k1_ymm",
42898	"EVEX_Vscatterdpd_vm32y_k1_zmm",
42899	"EVEX_Vscatterqps_vm64x_k1_xmm",
42900	"EVEX_Vscatterqps_vm64y_k1_xmm",
42901	"EVEX_Vscatterqps_vm64z_k1_ymm",
42902	"EVEX_Vscatterqpd_vm64x_k1_xmm",
42903	"EVEX_Vscatterqpd_vm64y_k1_ymm",
42904	"EVEX_Vscatterqpd_vm64z_k1_zmm",
42905	"VEX_Vfmaddsub213ps_xmm_xmm_xmmm128",
42906	"VEX_Vfmaddsub213ps_ymm_ymm_ymmm256",
42907	"VEX_Vfmaddsub213pd_xmm_xmm_xmmm128",
42908	"VEX_Vfmaddsub213pd_ymm_ymm_ymmm256",
42909	"EVEX_Vfmaddsub213ps_xmm_k1z_xmm_xmmm128b32",
42910	"EVEX_Vfmaddsub213ps_ymm_k1z_ymm_ymmm256b32",
42911	"EVEX_Vfmaddsub213ps_zmm_k1z_zmm_zmmm512b32_er",
42912	"EVEX_Vfmaddsub213pd_xmm_k1z_xmm_xmmm128b64",
42913	"EVEX_Vfmaddsub213pd_ymm_k1z_ymm_ymmm256b64",
42914	"EVEX_Vfmaddsub213pd_zmm_k1z_zmm_zmmm512b64_er",
42915	"VEX_Vfmsubadd213ps_xmm_xmm_xmmm128",
42916	"VEX_Vfmsubadd213ps_ymm_ymm_ymmm256",
42917	"VEX_Vfmsubadd213pd_xmm_xmm_xmmm128",
42918	"VEX_Vfmsubadd213pd_ymm_ymm_ymmm256",
42919	"EVEX_Vfmsubadd213ps_xmm_k1z_xmm_xmmm128b32",
42920	"EVEX_Vfmsubadd213ps_ymm_k1z_ymm_ymmm256b32",
42921	"EVEX_Vfmsubadd213ps_zmm_k1z_zmm_zmmm512b32_er",
42922	"EVEX_Vfmsubadd213pd_xmm_k1z_xmm_xmmm128b64",
42923	"EVEX_Vfmsubadd213pd_ymm_k1z_ymm_ymmm256b64",
42924	"EVEX_Vfmsubadd213pd_zmm_k1z_zmm_zmmm512b64_er",
42925	"VEX_Vfmadd213ps_xmm_xmm_xmmm128",
42926	"VEX_Vfmadd213ps_ymm_ymm_ymmm256",
42927	"VEX_Vfmadd213pd_xmm_xmm_xmmm128",
42928	"VEX_Vfmadd213pd_ymm_ymm_ymmm256",
42929	"EVEX_Vfmadd213ps_xmm_k1z_xmm_xmmm128b32",
42930	"EVEX_Vfmadd213ps_ymm_k1z_ymm_ymmm256b32",
42931	"EVEX_Vfmadd213ps_zmm_k1z_zmm_zmmm512b32_er",
42932	"EVEX_Vfmadd213pd_xmm_k1z_xmm_xmmm128b64",
42933	"EVEX_Vfmadd213pd_ymm_k1z_ymm_ymmm256b64",
42934	"EVEX_Vfmadd213pd_zmm_k1z_zmm_zmmm512b64_er",
42935	"VEX_Vfmadd213ss_xmm_xmm_xmmm32",
42936	"VEX_Vfmadd213sd_xmm_xmm_xmmm64",
42937	"EVEX_Vfmadd213ss_xmm_k1z_xmm_xmmm32_er",
42938	"EVEX_Vfmadd213sd_xmm_k1z_xmm_xmmm64_er",
42939	"VEX_Vfmsub213ps_xmm_xmm_xmmm128",
42940	"VEX_Vfmsub213ps_ymm_ymm_ymmm256",
42941	"VEX_Vfmsub213pd_xmm_xmm_xmmm128",
42942	"VEX_Vfmsub213pd_ymm_ymm_ymmm256",
42943	"EVEX_Vfmsub213ps_xmm_k1z_xmm_xmmm128b32",
42944	"EVEX_Vfmsub213ps_ymm_k1z_ymm_ymmm256b32",
42945	"EVEX_Vfmsub213ps_zmm_k1z_zmm_zmmm512b32_er",
42946	"EVEX_Vfmsub213pd_xmm_k1z_xmm_xmmm128b64",
42947	"EVEX_Vfmsub213pd_ymm_k1z_ymm_ymmm256b64",
42948	"EVEX_Vfmsub213pd_zmm_k1z_zmm_zmmm512b64_er",
42949	"EVEX_V4fnmaddps_zmm_k1z_zmmp3_m128",
42950	"VEX_Vfmsub213ss_xmm_xmm_xmmm32",
42951	"VEX_Vfmsub213sd_xmm_xmm_xmmm64",
42952	"EVEX_Vfmsub213ss_xmm_k1z_xmm_xmmm32_er",
42953	"EVEX_Vfmsub213sd_xmm_k1z_xmm_xmmm64_er",
42954	"EVEX_V4fnmaddss_xmm_k1z_xmmp3_m128",
42955	"VEX_Vfnmadd213ps_xmm_xmm_xmmm128",
42956	"VEX_Vfnmadd213ps_ymm_ymm_ymmm256",
42957	"VEX_Vfnmadd213pd_xmm_xmm_xmmm128",
42958	"VEX_Vfnmadd213pd_ymm_ymm_ymmm256",
42959	"EVEX_Vfnmadd213ps_xmm_k1z_xmm_xmmm128b32",
42960	"EVEX_Vfnmadd213ps_ymm_k1z_ymm_ymmm256b32",
42961	"EVEX_Vfnmadd213ps_zmm_k1z_zmm_zmmm512b32_er",
42962	"EVEX_Vfnmadd213pd_xmm_k1z_xmm_xmmm128b64",
42963	"EVEX_Vfnmadd213pd_ymm_k1z_ymm_ymmm256b64",
42964	"EVEX_Vfnmadd213pd_zmm_k1z_zmm_zmmm512b64_er",
42965	"VEX_Vfnmadd213ss_xmm_xmm_xmmm32",
42966	"VEX_Vfnmadd213sd_xmm_xmm_xmmm64",
42967	"EVEX_Vfnmadd213ss_xmm_k1z_xmm_xmmm32_er",
42968	"EVEX_Vfnmadd213sd_xmm_k1z_xmm_xmmm64_er",
42969	"VEX_Vfnmsub213ps_xmm_xmm_xmmm128",
42970	"VEX_Vfnmsub213ps_ymm_ymm_ymmm256",
42971	"VEX_Vfnmsub213pd_xmm_xmm_xmmm128",
42972	"VEX_Vfnmsub213pd_ymm_ymm_ymmm256",
42973	"EVEX_Vfnmsub213ps_xmm_k1z_xmm_xmmm128b32",
42974	"EVEX_Vfnmsub213ps_ymm_k1z_ymm_ymmm256b32",
42975	"EVEX_Vfnmsub213ps_zmm_k1z_zmm_zmmm512b32_er",
42976	"EVEX_Vfnmsub213pd_xmm_k1z_xmm_xmmm128b64",
42977	"EVEX_Vfnmsub213pd_ymm_k1z_ymm_ymmm256b64",
42978	"EVEX_Vfnmsub213pd_zmm_k1z_zmm_zmmm512b64_er",
42979	"VEX_Vfnmsub213ss_xmm_xmm_xmmm32",
42980	"VEX_Vfnmsub213sd_xmm_xmm_xmmm64",
42981	"EVEX_Vfnmsub213ss_xmm_k1z_xmm_xmmm32_er",
42982	"EVEX_Vfnmsub213sd_xmm_k1z_xmm_xmmm64_er",
42983	"EVEX_Vpmadd52luq_xmm_k1z_xmm_xmmm128b64",
42984	"EVEX_Vpmadd52luq_ymm_k1z_ymm_ymmm256b64",
42985	"EVEX_Vpmadd52luq_zmm_k1z_zmm_zmmm512b64",
42986	"EVEX_Vpmadd52huq_xmm_k1z_xmm_xmmm128b64",
42987	"EVEX_Vpmadd52huq_ymm_k1z_ymm_ymmm256b64",
42988	"EVEX_Vpmadd52huq_zmm_k1z_zmm_zmmm512b64",
42989	"VEX_Vfmaddsub231ps_xmm_xmm_xmmm128",
42990	"VEX_Vfmaddsub231ps_ymm_ymm_ymmm256",
42991	"VEX_Vfmaddsub231pd_xmm_xmm_xmmm128",
42992	"VEX_Vfmaddsub231pd_ymm_ymm_ymmm256",
42993	"EVEX_Vfmaddsub231ps_xmm_k1z_xmm_xmmm128b32",
42994	"EVEX_Vfmaddsub231ps_ymm_k1z_ymm_ymmm256b32",
42995	"EVEX_Vfmaddsub231ps_zmm_k1z_zmm_zmmm512b32_er",
42996	"EVEX_Vfmaddsub231pd_xmm_k1z_xmm_xmmm128b64",
42997	"EVEX_Vfmaddsub231pd_ymm_k1z_ymm_ymmm256b64",
42998	"EVEX_Vfmaddsub231pd_zmm_k1z_zmm_zmmm512b64_er",
42999	"VEX_Vfmsubadd231ps_xmm_xmm_xmmm128",
43000	"VEX_Vfmsubadd231ps_ymm_ymm_ymmm256",
43001	"VEX_Vfmsubadd231pd_xmm_xmm_xmmm128",
43002	"VEX_Vfmsubadd231pd_ymm_ymm_ymmm256",
43003	"EVEX_Vfmsubadd231ps_xmm_k1z_xmm_xmmm128b32",
43004	"EVEX_Vfmsubadd231ps_ymm_k1z_ymm_ymmm256b32",
43005	"EVEX_Vfmsubadd231ps_zmm_k1z_zmm_zmmm512b32_er",
43006	"EVEX_Vfmsubadd231pd_xmm_k1z_xmm_xmmm128b64",
43007	"EVEX_Vfmsubadd231pd_ymm_k1z_ymm_ymmm256b64",
43008	"EVEX_Vfmsubadd231pd_zmm_k1z_zmm_zmmm512b64_er",
43009	"VEX_Vfmadd231ps_xmm_xmm_xmmm128",
43010	"VEX_Vfmadd231ps_ymm_ymm_ymmm256",
43011	"VEX_Vfmadd231pd_xmm_xmm_xmmm128",
43012	"VEX_Vfmadd231pd_ymm_ymm_ymmm256",
43013	"EVEX_Vfmadd231ps_xmm_k1z_xmm_xmmm128b32",
43014	"EVEX_Vfmadd231ps_ymm_k1z_ymm_ymmm256b32",
43015	"EVEX_Vfmadd231ps_zmm_k1z_zmm_zmmm512b32_er",
43016	"EVEX_Vfmadd231pd_xmm_k1z_xmm_xmmm128b64",
43017	"EVEX_Vfmadd231pd_ymm_k1z_ymm_ymmm256b64",
43018	"EVEX_Vfmadd231pd_zmm_k1z_zmm_zmmm512b64_er",
43019	"VEX_Vfmadd231ss_xmm_xmm_xmmm32",
43020	"VEX_Vfmadd231sd_xmm_xmm_xmmm64",
43021	"EVEX_Vfmadd231ss_xmm_k1z_xmm_xmmm32_er",
43022	"EVEX_Vfmadd231sd_xmm_k1z_xmm_xmmm64_er",
43023	"VEX_Vfmsub231ps_xmm_xmm_xmmm128",
43024	"VEX_Vfmsub231ps_ymm_ymm_ymmm256",
43025	"VEX_Vfmsub231pd_xmm_xmm_xmmm128",
43026	"VEX_Vfmsub231pd_ymm_ymm_ymmm256",
43027	"EVEX_Vfmsub231ps_xmm_k1z_xmm_xmmm128b32",
43028	"EVEX_Vfmsub231ps_ymm_k1z_ymm_ymmm256b32",
43029	"EVEX_Vfmsub231ps_zmm_k1z_zmm_zmmm512b32_er",
43030	"EVEX_Vfmsub231pd_xmm_k1z_xmm_xmmm128b64",
43031	"EVEX_Vfmsub231pd_ymm_k1z_ymm_ymmm256b64",
43032	"EVEX_Vfmsub231pd_zmm_k1z_zmm_zmmm512b64_er",
43033	"VEX_Vfmsub231ss_xmm_xmm_xmmm32",
43034	"VEX_Vfmsub231sd_xmm_xmm_xmmm64",
43035	"EVEX_Vfmsub231ss_xmm_k1z_xmm_xmmm32_er",
43036	"EVEX_Vfmsub231sd_xmm_k1z_xmm_xmmm64_er",
43037	"VEX_Vfnmadd231ps_xmm_xmm_xmmm128",
43038	"VEX_Vfnmadd231ps_ymm_ymm_ymmm256",
43039	"VEX_Vfnmadd231pd_xmm_xmm_xmmm128",
43040	"VEX_Vfnmadd231pd_ymm_ymm_ymmm256",
43041	"EVEX_Vfnmadd231ps_xmm_k1z_xmm_xmmm128b32",
43042	"EVEX_Vfnmadd231ps_ymm_k1z_ymm_ymmm256b32",
43043	"EVEX_Vfnmadd231ps_zmm_k1z_zmm_zmmm512b32_er",
43044	"EVEX_Vfnmadd231pd_xmm_k1z_xmm_xmmm128b64",
43045	"EVEX_Vfnmadd231pd_ymm_k1z_ymm_ymmm256b64",
43046	"EVEX_Vfnmadd231pd_zmm_k1z_zmm_zmmm512b64_er",
43047	"VEX_Vfnmadd231ss_xmm_xmm_xmmm32",
43048	"VEX_Vfnmadd231sd_xmm_xmm_xmmm64",
43049	"EVEX_Vfnmadd231ss_xmm_k1z_xmm_xmmm32_er",
43050	"EVEX_Vfnmadd231sd_xmm_k1z_xmm_xmmm64_er",
43051	"VEX_Vfnmsub231ps_xmm_xmm_xmmm128",
43052	"VEX_Vfnmsub231ps_ymm_ymm_ymmm256",
43053	"VEX_Vfnmsub231pd_xmm_xmm_xmmm128",
43054	"VEX_Vfnmsub231pd_ymm_ymm_ymmm256",
43055	"EVEX_Vfnmsub231ps_xmm_k1z_xmm_xmmm128b32",
43056	"EVEX_Vfnmsub231ps_ymm_k1z_ymm_ymmm256b32",
43057	"EVEX_Vfnmsub231ps_zmm_k1z_zmm_zmmm512b32_er",
43058	"EVEX_Vfnmsub231pd_xmm_k1z_xmm_xmmm128b64",
43059	"EVEX_Vfnmsub231pd_ymm_k1z_ymm_ymmm256b64",
43060	"EVEX_Vfnmsub231pd_zmm_k1z_zmm_zmmm512b64_er",
43061	"VEX_Vfnmsub231ss_xmm_xmm_xmmm32",
43062	"VEX_Vfnmsub231sd_xmm_xmm_xmmm64",
43063	"EVEX_Vfnmsub231ss_xmm_k1z_xmm_xmmm32_er",
43064	"EVEX_Vfnmsub231sd_xmm_k1z_xmm_xmmm64_er",
43065	"EVEX_Vpconflictd_xmm_k1z_xmmm128b32",
43066	"EVEX_Vpconflictd_ymm_k1z_ymmm256b32",
43067	"EVEX_Vpconflictd_zmm_k1z_zmmm512b32",
43068	"EVEX_Vpconflictq_xmm_k1z_xmmm128b64",
43069	"EVEX_Vpconflictq_ymm_k1z_ymmm256b64",
43070	"EVEX_Vpconflictq_zmm_k1z_zmmm512b64",
43071	"EVEX_Vgatherpf0dps_vm32z_k1",
43072	"EVEX_Vgatherpf0dpd_vm32y_k1",
43073	"EVEX_Vgatherpf1dps_vm32z_k1",
43074	"EVEX_Vgatherpf1dpd_vm32y_k1",
43075	"EVEX_Vscatterpf0dps_vm32z_k1",
43076	"EVEX_Vscatterpf0dpd_vm32y_k1",
43077	"EVEX_Vscatterpf1dps_vm32z_k1",
43078	"EVEX_Vscatterpf1dpd_vm32y_k1",
43079	"EVEX_Vgatherpf0qps_vm64z_k1",
43080	"EVEX_Vgatherpf0qpd_vm64z_k1",
43081	"EVEX_Vgatherpf1qps_vm64z_k1",
43082	"EVEX_Vgatherpf1qpd_vm64z_k1",
43083	"EVEX_Vscatterpf0qps_vm64z_k1",
43084	"EVEX_Vscatterpf0qpd_vm64z_k1",
43085	"EVEX_Vscatterpf1qps_vm64z_k1",
43086	"EVEX_Vscatterpf1qpd_vm64z_k1",
43087	"Sha1nexte_xmm_xmmm128",
43088	"EVEX_Vexp2ps_zmm_k1z_zmmm512b32_sae",
43089	"EVEX_Vexp2pd_zmm_k1z_zmmm512b64_sae",
43090	"Sha1msg1_xmm_xmmm128",
43091	"Sha1msg2_xmm_xmmm128",
43092	"EVEX_Vrcp28ps_zmm_k1z_zmmm512b32_sae",
43093	"EVEX_Vrcp28pd_zmm_k1z_zmmm512b64_sae",
43094	"Sha256rnds2_xmm_xmmm128",
43095	"EVEX_Vrcp28ss_xmm_k1z_xmm_xmmm32_sae",
43096	"EVEX_Vrcp28sd_xmm_k1z_xmm_xmmm64_sae",
43097	"Sha256msg1_xmm_xmmm128",
43098	"EVEX_Vrsqrt28ps_zmm_k1z_zmmm512b32_sae",
43099	"EVEX_Vrsqrt28pd_zmm_k1z_zmmm512b64_sae",
43100	"Sha256msg2_xmm_xmmm128",
43101	"EVEX_Vrsqrt28ss_xmm_k1z_xmm_xmmm32_sae",
43102	"EVEX_Vrsqrt28sd_xmm_k1z_xmm_xmmm64_sae",
43103	"Gf2p8mulb_xmm_xmmm128",
43104	"VEX_Vgf2p8mulb_xmm_xmm_xmmm128",
43105	"VEX_Vgf2p8mulb_ymm_ymm_ymmm256",
43106	"EVEX_Vgf2p8mulb_xmm_k1z_xmm_xmmm128",
43107	"EVEX_Vgf2p8mulb_ymm_k1z_ymm_ymmm256",
43108	"EVEX_Vgf2p8mulb_zmm_k1z_zmm_zmmm512",
43109	"Aesimc_xmm_xmmm128",
43110	"VEX_Vaesimc_xmm_xmmm128",
43111	"Aesenc_xmm_xmmm128",
43112	"VEX_Vaesenc_xmm_xmm_xmmm128",
43113	"VEX_Vaesenc_ymm_ymm_ymmm256",
43114	"EVEX_Vaesenc_xmm_xmm_xmmm128",
43115	"EVEX_Vaesenc_ymm_ymm_ymmm256",
43116	"EVEX_Vaesenc_zmm_zmm_zmmm512",
43117	"Aesenclast_xmm_xmmm128",
43118	"VEX_Vaesenclast_xmm_xmm_xmmm128",
43119	"VEX_Vaesenclast_ymm_ymm_ymmm256",
43120	"EVEX_Vaesenclast_xmm_xmm_xmmm128",
43121	"EVEX_Vaesenclast_ymm_ymm_ymmm256",
43122	"EVEX_Vaesenclast_zmm_zmm_zmmm512",
43123	"Aesdec_xmm_xmmm128",
43124	"VEX_Vaesdec_xmm_xmm_xmmm128",
43125	"VEX_Vaesdec_ymm_ymm_ymmm256",
43126	"EVEX_Vaesdec_xmm_xmm_xmmm128",
43127	"EVEX_Vaesdec_ymm_ymm_ymmm256",
43128	"EVEX_Vaesdec_zmm_zmm_zmmm512",
43129	"Aesdeclast_xmm_xmmm128",
43130	"VEX_Vaesdeclast_xmm_xmm_xmmm128",
43131	"VEX_Vaesdeclast_ymm_ymm_ymmm256",
43132	"EVEX_Vaesdeclast_xmm_xmm_xmmm128",
43133	"EVEX_Vaesdeclast_ymm_ymm_ymmm256",
43134	"EVEX_Vaesdeclast_zmm_zmm_zmmm512",
43135	"Movbe_r16_m16",
43136	"Movbe_r32_m32",
43137	"Movbe_r64_m64",
43138	"Crc32_r32_rm8",
43139	"Crc32_r64_rm8",
43140	"Movbe_m16_r16",
43141	"Movbe_m32_r32",
43142	"Movbe_m64_r64",
43143	"Crc32_r32_rm16",
43144	"Crc32_r32_rm32",
43145	"Crc32_r64_rm64",
43146	"VEX_Andn_r32_r32_rm32",
43147	"VEX_Andn_r64_r64_rm64",
43148	"VEX_Blsr_r32_rm32",
43149	"VEX_Blsr_r64_rm64",
43150	"VEX_Blsmsk_r32_rm32",
43151	"VEX_Blsmsk_r64_rm64",
43152	"VEX_Blsi_r32_rm32",
43153	"VEX_Blsi_r64_rm64",
43154	"VEX_Bzhi_r32_rm32_r32",
43155	"VEX_Bzhi_r64_rm64_r64",
43156	"Wrussd_m32_r32",
43157	"Wrussq_m64_r64",
43158	"VEX_Pext_r32_r32_rm32",
43159	"VEX_Pext_r64_r64_rm64",
43160	"VEX_Pdep_r32_r32_rm32",
43161	"VEX_Pdep_r64_r64_rm64",
43162	"Wrssd_m32_r32",
43163	"Wrssq_m64_r64",
43164	"Adcx_r32_rm32",
43165	"Adcx_r64_rm64",
43166	"Adox_r32_rm32",
43167	"Adox_r64_rm64",
43168	"VEX_Mulx_r32_r32_rm32",
43169	"VEX_Mulx_r64_r64_rm64",
43170	"VEX_Bextr_r32_rm32_r32",
43171	"VEX_Bextr_r64_rm64_r64",
43172	"VEX_Shlx_r32_rm32_r32",
43173	"VEX_Shlx_r64_rm64_r64",
43174	"VEX_Sarx_r32_rm32_r32",
43175	"VEX_Sarx_r64_rm64_r64",
43176	"VEX_Shrx_r32_rm32_r32",
43177	"VEX_Shrx_r64_rm64_r64",
43178	"Movdir64b_r16_m512",
43179	"Movdir64b_r32_m512",
43180	"Movdir64b_r64_m512",
43181	"Enqcmds_r16_m512",
43182	"Enqcmds_r32_m512",
43183	"Enqcmds_r64_m512",
43184	"Enqcmd_r16_m512",
43185	"Enqcmd_r32_m512",
43186	"Enqcmd_r64_m512",
43187	"Movdiri_m32_r32",
43188	"Movdiri_m64_r64",
43189	"VEX_Vpermq_ymm_ymmm256_imm8",
43190	"EVEX_Vpermq_ymm_k1z_ymmm256b64_imm8",
43191	"EVEX_Vpermq_zmm_k1z_zmmm512b64_imm8",
43192	"VEX_Vpermpd_ymm_ymmm256_imm8",
43193	"EVEX_Vpermpd_ymm_k1z_ymmm256b64_imm8",
43194	"EVEX_Vpermpd_zmm_k1z_zmmm512b64_imm8",
43195	"VEX_Vpblendd_xmm_xmm_xmmm128_imm8",
43196	"VEX_Vpblendd_ymm_ymm_ymmm256_imm8",
43197	"EVEX_Valignd_xmm_k1z_xmm_xmmm128b32_imm8",
43198	"EVEX_Valignd_ymm_k1z_ymm_ymmm256b32_imm8",
43199	"EVEX_Valignd_zmm_k1z_zmm_zmmm512b32_imm8",
43200	"EVEX_Valignq_xmm_k1z_xmm_xmmm128b64_imm8",
43201	"EVEX_Valignq_ymm_k1z_ymm_ymmm256b64_imm8",
43202	"EVEX_Valignq_zmm_k1z_zmm_zmmm512b64_imm8",
43203	"VEX_Vpermilps_xmm_xmmm128_imm8",
43204	"VEX_Vpermilps_ymm_ymmm256_imm8",
43205	"EVEX_Vpermilps_xmm_k1z_xmmm128b32_imm8",
43206	"EVEX_Vpermilps_ymm_k1z_ymmm256b32_imm8",
43207	"EVEX_Vpermilps_zmm_k1z_zmmm512b32_imm8",
43208	"VEX_Vpermilpd_xmm_xmmm128_imm8",
43209	"VEX_Vpermilpd_ymm_ymmm256_imm8",
43210	"EVEX_Vpermilpd_xmm_k1z_xmmm128b64_imm8",
43211	"EVEX_Vpermilpd_ymm_k1z_ymmm256b64_imm8",
43212	"EVEX_Vpermilpd_zmm_k1z_zmmm512b64_imm8",
43213	"VEX_Vperm2f128_ymm_ymm_ymmm256_imm8",
43214	"Roundps_xmm_xmmm128_imm8",
43215	"VEX_Vroundps_xmm_xmmm128_imm8",
43216	"VEX_Vroundps_ymm_ymmm256_imm8",
43217	"EVEX_Vrndscaleps_xmm_k1z_xmmm128b32_imm8",
43218	"EVEX_Vrndscaleps_ymm_k1z_ymmm256b32_imm8",
43219	"EVEX_Vrndscaleps_zmm_k1z_zmmm512b32_imm8_sae",
43220	"Roundpd_xmm_xmmm128_imm8",
43221	"VEX_Vroundpd_xmm_xmmm128_imm8",
43222	"VEX_Vroundpd_ymm_ymmm256_imm8",
43223	"EVEX_Vrndscalepd_xmm_k1z_xmmm128b64_imm8",
43224	"EVEX_Vrndscalepd_ymm_k1z_ymmm256b64_imm8",
43225	"EVEX_Vrndscalepd_zmm_k1z_zmmm512b64_imm8_sae",
43226	"Roundss_xmm_xmmm32_imm8",
43227	"VEX_Vroundss_xmm_xmm_xmmm32_imm8",
43228	"EVEX_Vrndscaless_xmm_k1z_xmm_xmmm32_imm8_sae",
43229	"Roundsd_xmm_xmmm64_imm8",
43230	"VEX_Vroundsd_xmm_xmm_xmmm64_imm8",
43231	"EVEX_Vrndscalesd_xmm_k1z_xmm_xmmm64_imm8_sae",
43232	"Blendps_xmm_xmmm128_imm8",
43233	"VEX_Vblendps_xmm_xmm_xmmm128_imm8",
43234	"VEX_Vblendps_ymm_ymm_ymmm256_imm8",
43235	"Blendpd_xmm_xmmm128_imm8",
43236	"VEX_Vblendpd_xmm_xmm_xmmm128_imm8",
43237	"VEX_Vblendpd_ymm_ymm_ymmm256_imm8",
43238	"Pblendw_xmm_xmmm128_imm8",
43239	"VEX_Vpblendw_xmm_xmm_xmmm128_imm8",
43240	"VEX_Vpblendw_ymm_ymm_ymmm256_imm8",
43241	"Palignr_mm_mmm64_imm8",
43242	"Palignr_xmm_xmmm128_imm8",
43243	"VEX_Vpalignr_xmm_xmm_xmmm128_imm8",
43244	"VEX_Vpalignr_ymm_ymm_ymmm256_imm8",
43245	"EVEX_Vpalignr_xmm_k1z_xmm_xmmm128_imm8",
43246	"EVEX_Vpalignr_ymm_k1z_ymm_ymmm256_imm8",
43247	"EVEX_Vpalignr_zmm_k1z_zmm_zmmm512_imm8",
43248	"Pextrb_r32m8_xmm_imm8",
43249	"Pextrb_r64m8_xmm_imm8",
43250	"VEX_Vpextrb_r32m8_xmm_imm8",
43251	"VEX_Vpextrb_r64m8_xmm_imm8",
43252	"EVEX_Vpextrb_r32m8_xmm_imm8",
43253	"EVEX_Vpextrb_r64m8_xmm_imm8",
43254	"Pextrw_r32m16_xmm_imm8",
43255	"Pextrw_r64m16_xmm_imm8",
43256	"VEX_Vpextrw_r32m16_xmm_imm8",
43257	"VEX_Vpextrw_r64m16_xmm_imm8",
43258	"EVEX_Vpextrw_r32m16_xmm_imm8",
43259	"EVEX_Vpextrw_r64m16_xmm_imm8",
43260	"Pextrd_rm32_xmm_imm8",
43261	"Pextrq_rm64_xmm_imm8",
43262	"VEX_Vpextrd_rm32_xmm_imm8",
43263	"VEX_Vpextrq_rm64_xmm_imm8",
43264	"EVEX_Vpextrd_rm32_xmm_imm8",
43265	"EVEX_Vpextrq_rm64_xmm_imm8",
43266	"Extractps_rm32_xmm_imm8",
43267	"Extractps_r64m32_xmm_imm8",
43268	"VEX_Vextractps_rm32_xmm_imm8",
43269	"VEX_Vextractps_r64m32_xmm_imm8",
43270	"EVEX_Vextractps_rm32_xmm_imm8",
43271	"EVEX_Vextractps_r64m32_xmm_imm8",
43272	"VEX_Vinsertf128_ymm_ymm_xmmm128_imm8",
43273	"EVEX_Vinsertf32x4_ymm_k1z_ymm_xmmm128_imm8",
43274	"EVEX_Vinsertf32x4_zmm_k1z_zmm_xmmm128_imm8",
43275	"EVEX_Vinsertf64x2_ymm_k1z_ymm_xmmm128_imm8",
43276	"EVEX_Vinsertf64x2_zmm_k1z_zmm_xmmm128_imm8",
43277	"VEX_Vextractf128_xmmm128_ymm_imm8",
43278	"EVEX_Vextractf32x4_xmmm128_k1z_ymm_imm8",
43279	"EVEX_Vextractf32x4_xmmm128_k1z_zmm_imm8",
43280	"EVEX_Vextractf64x2_xmmm128_k1z_ymm_imm8",
43281	"EVEX_Vextractf64x2_xmmm128_k1z_zmm_imm8",
43282	"EVEX_Vinsertf32x8_zmm_k1z_zmm_ymmm256_imm8",
43283	"EVEX_Vinsertf64x4_zmm_k1z_zmm_ymmm256_imm8",
43284	"EVEX_Vextractf32x8_ymmm256_k1z_zmm_imm8",
43285	"EVEX_Vextractf64x4_ymmm256_k1z_zmm_imm8",
43286	"VEX_Vcvtps2ph_xmmm64_xmm_imm8",
43287	"VEX_Vcvtps2ph_xmmm128_ymm_imm8",
43288	"EVEX_Vcvtps2ph_xmmm64_k1z_xmm_imm8",
43289	"EVEX_Vcvtps2ph_xmmm128_k1z_ymm_imm8",
43290	"EVEX_Vcvtps2ph_ymmm256_k1z_zmm_imm8_sae",
43291	"EVEX_Vpcmpud_kr_k1_xmm_xmmm128b32_imm8",
43292	"EVEX_Vpcmpud_kr_k1_ymm_ymmm256b32_imm8",
43293	"EVEX_Vpcmpud_kr_k1_zmm_zmmm512b32_imm8",
43294	"EVEX_Vpcmpuq_kr_k1_xmm_xmmm128b64_imm8",
43295	"EVEX_Vpcmpuq_kr_k1_ymm_ymmm256b64_imm8",
43296	"EVEX_Vpcmpuq_kr_k1_zmm_zmmm512b64_imm8",
43297	"EVEX_Vpcmpd_kr_k1_xmm_xmmm128b32_imm8",
43298	"EVEX_Vpcmpd_kr_k1_ymm_ymmm256b32_imm8",
43299	"EVEX_Vpcmpd_kr_k1_zmm_zmmm512b32_imm8",
43300	"EVEX_Vpcmpq_kr_k1_xmm_xmmm128b64_imm8",
43301	"EVEX_Vpcmpq_kr_k1_ymm_ymmm256b64_imm8",
43302	"EVEX_Vpcmpq_kr_k1_zmm_zmmm512b64_imm8",
43303	"Pinsrb_xmm_r32m8_imm8",
43304	"Pinsrb_xmm_r64m8_imm8",
43305	"VEX_Vpinsrb_xmm_xmm_r32m8_imm8",
43306	"VEX_Vpinsrb_xmm_xmm_r64m8_imm8",
43307	"EVEX_Vpinsrb_xmm_xmm_r32m8_imm8",
43308	"EVEX_Vpinsrb_xmm_xmm_r64m8_imm8",
43309	"Insertps_xmm_xmmm32_imm8",
43310	"VEX_Vinsertps_xmm_xmm_xmmm32_imm8",
43311	"EVEX_Vinsertps_xmm_xmm_xmmm32_imm8",
43312	"Pinsrd_xmm_rm32_imm8",
43313	"Pinsrq_xmm_rm64_imm8",
43314	"VEX_Vpinsrd_xmm_xmm_rm32_imm8",
43315	"VEX_Vpinsrq_xmm_xmm_rm64_imm8",
43316	"EVEX_Vpinsrd_xmm_xmm_rm32_imm8",
43317	"EVEX_Vpinsrq_xmm_xmm_rm64_imm8",
43318	"EVEX_Vshuff32x4_ymm_k1z_ymm_ymmm256b32_imm8",
43319	"EVEX_Vshuff32x4_zmm_k1z_zmm_zmmm512b32_imm8",
43320	"EVEX_Vshuff64x2_ymm_k1z_ymm_ymmm256b64_imm8",
43321	"EVEX_Vshuff64x2_zmm_k1z_zmm_zmmm512b64_imm8",
43322	"EVEX_Vpternlogd_xmm_k1z_xmm_xmmm128b32_imm8",
43323	"EVEX_Vpternlogd_ymm_k1z_ymm_ymmm256b32_imm8",
43324	"EVEX_Vpternlogd_zmm_k1z_zmm_zmmm512b32_imm8",
43325	"EVEX_Vpternlogq_xmm_k1z_xmm_xmmm128b64_imm8",
43326	"EVEX_Vpternlogq_ymm_k1z_ymm_ymmm256b64_imm8",
43327	"EVEX_Vpternlogq_zmm_k1z_zmm_zmmm512b64_imm8",
43328	"EVEX_Vgetmantps_xmm_k1z_xmmm128b32_imm8",
43329	"EVEX_Vgetmantps_ymm_k1z_ymmm256b32_imm8",
43330	"EVEX_Vgetmantps_zmm_k1z_zmmm512b32_imm8_sae",
43331	"EVEX_Vgetmantpd_xmm_k1z_xmmm128b64_imm8",
43332	"EVEX_Vgetmantpd_ymm_k1z_ymmm256b64_imm8",
43333	"EVEX_Vgetmantpd_zmm_k1z_zmmm512b64_imm8_sae",
43334	"EVEX_Vgetmantss_xmm_k1z_xmm_xmmm32_imm8_sae",
43335	"EVEX_Vgetmantsd_xmm_k1z_xmm_xmmm64_imm8_sae",
43336	"VEX_Kshiftrb_kr_kr_imm8",
43337	"VEX_Kshiftrw_kr_kr_imm8",
43338	"VEX_Kshiftrd_kr_kr_imm8",
43339	"VEX_Kshiftrq_kr_kr_imm8",
43340	"VEX_Kshiftlb_kr_kr_imm8",
43341	"VEX_Kshiftlw_kr_kr_imm8",
43342	"VEX_Kshiftld_kr_kr_imm8",
43343	"VEX_Kshiftlq_kr_kr_imm8",
43344	"VEX_Vinserti128_ymm_ymm_xmmm128_imm8",
43345	"EVEX_Vinserti32x4_ymm_k1z_ymm_xmmm128_imm8",
43346	"EVEX_Vinserti32x4_zmm_k1z_zmm_xmmm128_imm8",
43347	"EVEX_Vinserti64x2_ymm_k1z_ymm_xmmm128_imm8",
43348	"EVEX_Vinserti64x2_zmm_k1z_zmm_xmmm128_imm8",
43349	"VEX_Vextracti128_xmmm128_ymm_imm8",
43350	"EVEX_Vextracti32x4_xmmm128_k1z_ymm_imm8",
43351	"EVEX_Vextracti32x4_xmmm128_k1z_zmm_imm8",
43352	"EVEX_Vextracti64x2_xmmm128_k1z_ymm_imm8",
43353	"EVEX_Vextracti64x2_xmmm128_k1z_zmm_imm8",
43354	"EVEX_Vinserti32x8_zmm_k1z_zmm_ymmm256_imm8",
43355	"EVEX_Vinserti64x4_zmm_k1z_zmm_ymmm256_imm8",
43356	"EVEX_Vextracti32x8_ymmm256_k1z_zmm_imm8",
43357	"EVEX_Vextracti64x4_ymmm256_k1z_zmm_imm8",
43358	"EVEX_Vpcmpub_kr_k1_xmm_xmmm128_imm8",
43359	"EVEX_Vpcmpub_kr_k1_ymm_ymmm256_imm8",
43360	"EVEX_Vpcmpub_kr_k1_zmm_zmmm512_imm8",
43361	"EVEX_Vpcmpuw_kr_k1_xmm_xmmm128_imm8",
43362	"EVEX_Vpcmpuw_kr_k1_ymm_ymmm256_imm8",
43363	"EVEX_Vpcmpuw_kr_k1_zmm_zmmm512_imm8",
43364	"EVEX_Vpcmpb_kr_k1_xmm_xmmm128_imm8",
43365	"EVEX_Vpcmpb_kr_k1_ymm_ymmm256_imm8",
43366	"EVEX_Vpcmpb_kr_k1_zmm_zmmm512_imm8",
43367	"EVEX_Vpcmpw_kr_k1_xmm_xmmm128_imm8",
43368	"EVEX_Vpcmpw_kr_k1_ymm_ymmm256_imm8",
43369	"EVEX_Vpcmpw_kr_k1_zmm_zmmm512_imm8",
43370	"Dpps_xmm_xmmm128_imm8",
43371	"VEX_Vdpps_xmm_xmm_xmmm128_imm8",
43372	"VEX_Vdpps_ymm_ymm_ymmm256_imm8",
43373	"Dppd_xmm_xmmm128_imm8",
43374	"VEX_Vdppd_xmm_xmm_xmmm128_imm8",
43375	"Mpsadbw_xmm_xmmm128_imm8",
43376	"VEX_Vmpsadbw_xmm_xmm_xmmm128_imm8",
43377	"VEX_Vmpsadbw_ymm_ymm_ymmm256_imm8",
43378	"EVEX_Vdbpsadbw_xmm_k1z_xmm_xmmm128_imm8",
43379	"EVEX_Vdbpsadbw_ymm_k1z_ymm_ymmm256_imm8",
43380	"EVEX_Vdbpsadbw_zmm_k1z_zmm_zmmm512_imm8",
43381	"EVEX_Vshufi32x4_ymm_k1z_ymm_ymmm256b32_imm8",
43382	"EVEX_Vshufi32x4_zmm_k1z_zmm_zmmm512b32_imm8",
43383	"EVEX_Vshufi64x2_ymm_k1z_ymm_ymmm256b64_imm8",
43384	"EVEX_Vshufi64x2_zmm_k1z_zmm_zmmm512b64_imm8",
43385	"Pclmulqdq_xmm_xmmm128_imm8",
43386	"VEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8",
43387	"VEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8",
43388	"EVEX_Vpclmulqdq_xmm_xmm_xmmm128_imm8",
43389	"EVEX_Vpclmulqdq_ymm_ymm_ymmm256_imm8",
43390	"EVEX_Vpclmulqdq_zmm_zmm_zmmm512_imm8",
43391	"VEX_Vperm2i128_ymm_ymm_ymmm256_imm8",
43392	"VEX_Vpermil2ps_xmm_xmm_xmmm128_xmm_imm4",
43393	"VEX_Vpermil2ps_ymm_ymm_ymmm256_ymm_imm4",
43394	"VEX_Vpermil2ps_xmm_xmm_xmm_xmmm128_imm4",
43395	"VEX_Vpermil2ps_ymm_ymm_ymm_ymmm256_imm4",
43396	"VEX_Vpermil2pd_xmm_xmm_xmmm128_xmm_imm4",
43397	"VEX_Vpermil2pd_ymm_ymm_ymmm256_ymm_imm4",
43398	"VEX_Vpermil2pd_xmm_xmm_xmm_xmmm128_imm4",
43399	"VEX_Vpermil2pd_ymm_ymm_ymm_ymmm256_imm4",
43400	"VEX_Vblendvps_xmm_xmm_xmmm128_xmm",
43401	"VEX_Vblendvps_ymm_ymm_ymmm256_ymm",
43402	"VEX_Vblendvpd_xmm_xmm_xmmm128_xmm",
43403	"VEX_Vblendvpd_ymm_ymm_ymmm256_ymm",
43404	"VEX_Vpblendvb_xmm_xmm_xmmm128_xmm",
43405	"VEX_Vpblendvb_ymm_ymm_ymmm256_ymm",
43406	"EVEX_Vrangeps_xmm_k1z_xmm_xmmm128b32_imm8",
43407	"EVEX_Vrangeps_ymm_k1z_ymm_ymmm256b32_imm8",
43408	"EVEX_Vrangeps_zmm_k1z_zmm_zmmm512b32_imm8_sae",
43409	"EVEX_Vrangepd_xmm_k1z_xmm_xmmm128b64_imm8",
43410	"EVEX_Vrangepd_ymm_k1z_ymm_ymmm256b64_imm8",
43411	"EVEX_Vrangepd_zmm_k1z_zmm_zmmm512b64_imm8_sae",
43412	"EVEX_Vrangess_xmm_k1z_xmm_xmmm32_imm8_sae",
43413	"EVEX_Vrangesd_xmm_k1z_xmm_xmmm64_imm8_sae",
43414	"EVEX_Vfixupimmps_xmm_k1z_xmm_xmmm128b32_imm8",
43415	"EVEX_Vfixupimmps_ymm_k1z_ymm_ymmm256b32_imm8",
43416	"EVEX_Vfixupimmps_zmm_k1z_zmm_zmmm512b32_imm8_sae",
43417	"EVEX_Vfixupimmpd_xmm_k1z_xmm_xmmm128b64_imm8",
43418	"EVEX_Vfixupimmpd_ymm_k1z_ymm_ymmm256b64_imm8",
43419	"EVEX_Vfixupimmpd_zmm_k1z_zmm_zmmm512b64_imm8_sae",
43420	"EVEX_Vfixupimmss_xmm_k1z_xmm_xmmm32_imm8_sae",
43421	"EVEX_Vfixupimmsd_xmm_k1z_xmm_xmmm64_imm8_sae",
43422	"EVEX_Vreduceps_xmm_k1z_xmmm128b32_imm8",
43423	"EVEX_Vreduceps_ymm_k1z_ymmm256b32_imm8",
43424	"EVEX_Vreduceps_zmm_k1z_zmmm512b32_imm8_sae",
43425	"EVEX_Vreducepd_xmm_k1z_xmmm128b64_imm8",
43426	"EVEX_Vreducepd_ymm_k1z_ymmm256b64_imm8",
43427	"EVEX_Vreducepd_zmm_k1z_zmmm512b64_imm8_sae",
43428	"EVEX_Vreducess_xmm_k1z_xmm_xmmm32_imm8_sae",
43429	"EVEX_Vreducesd_xmm_k1z_xmm_xmmm64_imm8_sae",
43430	"VEX_Vfmaddsubps_xmm_xmm_xmmm128_xmm",
43431	"VEX_Vfmaddsubps_ymm_ymm_ymmm256_ymm",
43432	"VEX_Vfmaddsubps_xmm_xmm_xmm_xmmm128",
43433	"VEX_Vfmaddsubps_ymm_ymm_ymm_ymmm256",
43434	"VEX_Vfmaddsubpd_xmm_xmm_xmmm128_xmm",
43435	"VEX_Vfmaddsubpd_ymm_ymm_ymmm256_ymm",
43436	"VEX_Vfmaddsubpd_xmm_xmm_xmm_xmmm128",
43437	"VEX_Vfmaddsubpd_ymm_ymm_ymm_ymmm256",
43438	"VEX_Vfmsubaddps_xmm_xmm_xmmm128_xmm",
43439	"VEX_Vfmsubaddps_ymm_ymm_ymmm256_ymm",
43440	"VEX_Vfmsubaddps_xmm_xmm_xmm_xmmm128",
43441	"VEX_Vfmsubaddps_ymm_ymm_ymm_ymmm256",
43442	"VEX_Vfmsubaddpd_xmm_xmm_xmmm128_xmm",
43443	"VEX_Vfmsubaddpd_ymm_ymm_ymmm256_ymm",
43444	"VEX_Vfmsubaddpd_xmm_xmm_xmm_xmmm128",
43445	"VEX_Vfmsubaddpd_ymm_ymm_ymm_ymmm256",
43446	"Pcmpestrm_xmm_xmmm128_imm8",
43447	"Pcmpestrm64_xmm_xmmm128_imm8",
43448	"VEX_Vpcmpestrm_xmm_xmmm128_imm8",
43449	"VEX_Vpcmpestrm64_xmm_xmmm128_imm8",
43450	"Pcmpestri_xmm_xmmm128_imm8",
43451	"Pcmpestri64_xmm_xmmm128_imm8",
43452	"VEX_Vpcmpestri_xmm_xmmm128_imm8",
43453	"VEX_Vpcmpestri64_xmm_xmmm128_imm8",
43454	"Pcmpistrm_xmm_xmmm128_imm8",
43455	"VEX_Vpcmpistrm_xmm_xmmm128_imm8",
43456	"Pcmpistri_xmm_xmmm128_imm8",
43457	"VEX_Vpcmpistri_xmm_xmmm128_imm8",
43458	"EVEX_Vfpclassps_kr_k1_xmmm128b32_imm8",
43459	"EVEX_Vfpclassps_kr_k1_ymmm256b32_imm8",
43460	"EVEX_Vfpclassps_kr_k1_zmmm512b32_imm8",
43461	"EVEX_Vfpclasspd_kr_k1_xmmm128b64_imm8",
43462	"EVEX_Vfpclasspd_kr_k1_ymmm256b64_imm8",
43463	"EVEX_Vfpclasspd_kr_k1_zmmm512b64_imm8",
43464	"EVEX_Vfpclassss_kr_k1_xmmm32_imm8",
43465	"EVEX_Vfpclasssd_kr_k1_xmmm64_imm8",
43466	"VEX_Vfmaddps_xmm_xmm_xmmm128_xmm",
43467	"VEX_Vfmaddps_ymm_ymm_ymmm256_ymm",
43468	"VEX_Vfmaddps_xmm_xmm_xmm_xmmm128",
43469	"VEX_Vfmaddps_ymm_ymm_ymm_ymmm256",
43470	"VEX_Vfmaddpd_xmm_xmm_xmmm128_xmm",
43471	"VEX_Vfmaddpd_ymm_ymm_ymmm256_ymm",
43472	"VEX_Vfmaddpd_xmm_xmm_xmm_xmmm128",
43473	"VEX_Vfmaddpd_ymm_ymm_ymm_ymmm256",
43474	"VEX_Vfmaddss_xmm_xmm_xmmm32_xmm",
43475	"VEX_Vfmaddss_xmm_xmm_xmm_xmmm32",
43476	"VEX_Vfmaddsd_xmm_xmm_xmmm64_xmm",
43477	"VEX_Vfmaddsd_xmm_xmm_xmm_xmmm64",
43478	"VEX_Vfmsubps_xmm_xmm_xmmm128_xmm",
43479	"VEX_Vfmsubps_ymm_ymm_ymmm256_ymm",
43480	"VEX_Vfmsubps_xmm_xmm_xmm_xmmm128",
43481	"VEX_Vfmsubps_ymm_ymm_ymm_ymmm256",
43482	"VEX_Vfmsubpd_xmm_xmm_xmmm128_xmm",
43483	"VEX_Vfmsubpd_ymm_ymm_ymmm256_ymm",
43484	"VEX_Vfmsubpd_xmm_xmm_xmm_xmmm128",
43485	"VEX_Vfmsubpd_ymm_ymm_ymm_ymmm256",
43486	"VEX_Vfmsubss_xmm_xmm_xmmm32_xmm",
43487	"VEX_Vfmsubss_xmm_xmm_xmm_xmmm32",
43488	"VEX_Vfmsubsd_xmm_xmm_xmmm64_xmm",
43489	"VEX_Vfmsubsd_xmm_xmm_xmm_xmmm64",
43490	"EVEX_Vpshldw_xmm_k1z_xmm_xmmm128_imm8",
43491	"EVEX_Vpshldw_ymm_k1z_ymm_ymmm256_imm8",
43492	"EVEX_Vpshldw_zmm_k1z_zmm_zmmm512_imm8",
43493	"EVEX_Vpshldd_xmm_k1z_xmm_xmmm128b32_imm8",
43494	"EVEX_Vpshldd_ymm_k1z_ymm_ymmm256b32_imm8",
43495	"EVEX_Vpshldd_zmm_k1z_zmm_zmmm512b32_imm8",
43496	"EVEX_Vpshldq_xmm_k1z_xmm_xmmm128b64_imm8",
43497	"EVEX_Vpshldq_ymm_k1z_ymm_ymmm256b64_imm8",
43498	"EVEX_Vpshldq_zmm_k1z_zmm_zmmm512b64_imm8",
43499	"EVEX_Vpshrdw_xmm_k1z_xmm_xmmm128_imm8",
43500	"EVEX_Vpshrdw_ymm_k1z_ymm_ymmm256_imm8",
43501	"EVEX_Vpshrdw_zmm_k1z_zmm_zmmm512_imm8",
43502	"EVEX_Vpshrdd_xmm_k1z_xmm_xmmm128b32_imm8",
43503	"EVEX_Vpshrdd_ymm_k1z_ymm_ymmm256b32_imm8",
43504	"EVEX_Vpshrdd_zmm_k1z_zmm_zmmm512b32_imm8",
43505	"EVEX_Vpshrdq_xmm_k1z_xmm_xmmm128b64_imm8",
43506	"EVEX_Vpshrdq_ymm_k1z_ymm_ymmm256b64_imm8",
43507	"EVEX_Vpshrdq_zmm_k1z_zmm_zmmm512b64_imm8",
43508	"VEX_Vfnmaddps_xmm_xmm_xmmm128_xmm",
43509	"VEX_Vfnmaddps_ymm_ymm_ymmm256_ymm",
43510	"VEX_Vfnmaddps_xmm_xmm_xmm_xmmm128",
43511	"VEX_Vfnmaddps_ymm_ymm_ymm_ymmm256",
43512	"VEX_Vfnmaddpd_xmm_xmm_xmmm128_xmm",
43513	"VEX_Vfnmaddpd_ymm_ymm_ymmm256_ymm",
43514	"VEX_Vfnmaddpd_xmm_xmm_xmm_xmmm128",
43515	"VEX_Vfnmaddpd_ymm_ymm_ymm_ymmm256",
43516	"VEX_Vfnmaddss_xmm_xmm_xmmm32_xmm",
43517	"VEX_Vfnmaddss_xmm_xmm_xmm_xmmm32",
43518	"VEX_Vfnmaddsd_xmm_xmm_xmmm64_xmm",
43519	"VEX_Vfnmaddsd_xmm_xmm_xmm_xmmm64",
43520	"VEX_Vfnmsubps_xmm_xmm_xmmm128_xmm",
43521	"VEX_Vfnmsubps_ymm_ymm_ymmm256_ymm",
43522	"VEX_Vfnmsubps_xmm_xmm_xmm_xmmm128",
43523	"VEX_Vfnmsubps_ymm_ymm_ymm_ymmm256",
43524	"VEX_Vfnmsubpd_xmm_xmm_xmmm128_xmm",
43525	"VEX_Vfnmsubpd_ymm_ymm_ymmm256_ymm",
43526	"VEX_Vfnmsubpd_xmm_xmm_xmm_xmmm128",
43527	"VEX_Vfnmsubpd_ymm_ymm_ymm_ymmm256",
43528	"VEX_Vfnmsubss_xmm_xmm_xmmm32_xmm",
43529	"VEX_Vfnmsubss_xmm_xmm_xmm_xmmm32",
43530	"VEX_Vfnmsubsd_xmm_xmm_xmmm64_xmm",
43531	"VEX_Vfnmsubsd_xmm_xmm_xmm_xmmm64",
43532	"Sha1rnds4_xmm_xmmm128_imm8",
43533	"Gf2p8affineqb_xmm_xmmm128_imm8",
43534	"VEX_Vgf2p8affineqb_xmm_xmm_xmmm128_imm8",
43535	"VEX_Vgf2p8affineqb_ymm_ymm_ymmm256_imm8",
43536	"EVEX_Vgf2p8affineqb_xmm_k1z_xmm_xmmm128b64_imm8",
43537	"EVEX_Vgf2p8affineqb_ymm_k1z_ymm_ymmm256b64_imm8",
43538	"EVEX_Vgf2p8affineqb_zmm_k1z_zmm_zmmm512b64_imm8",
43539	"Gf2p8affineinvqb_xmm_xmmm128_imm8",
43540	"VEX_Vgf2p8affineinvqb_xmm_xmm_xmmm128_imm8",
43541	"VEX_Vgf2p8affineinvqb_ymm_ymm_ymmm256_imm8",
43542	"EVEX_Vgf2p8affineinvqb_xmm_k1z_xmm_xmmm128b64_imm8",
43543	"EVEX_Vgf2p8affineinvqb_ymm_k1z_ymm_ymmm256b64_imm8",
43544	"EVEX_Vgf2p8affineinvqb_zmm_k1z_zmm_zmmm512b64_imm8",
43545	"Aeskeygenassist_xmm_xmmm128_imm8",
43546	"VEX_Vaeskeygenassist_xmm_xmmm128_imm8",
43547	"VEX_Rorx_r32_rm32_imm8",
43548	"VEX_Rorx_r64_rm64_imm8",
43549	"XOP_Vpmacssww_xmm_xmm_xmmm128_xmm",
43550	"XOP_Vpmacsswd_xmm_xmm_xmmm128_xmm",
43551	"XOP_Vpmacssdql_xmm_xmm_xmmm128_xmm",
43552	"XOP_Vpmacssdd_xmm_xmm_xmmm128_xmm",
43553	"XOP_Vpmacssdqh_xmm_xmm_xmmm128_xmm",
43554	"XOP_Vpmacsww_xmm_xmm_xmmm128_xmm",
43555	"XOP_Vpmacswd_xmm_xmm_xmmm128_xmm",
43556	"XOP_Vpmacsdql_xmm_xmm_xmmm128_xmm",
43557	"XOP_Vpmacsdd_xmm_xmm_xmmm128_xmm",
43558	"XOP_Vpmacsdqh_xmm_xmm_xmmm128_xmm",
43559	"XOP_Vpcmov_xmm_xmm_xmmm128_xmm",
43560	"XOP_Vpcmov_ymm_ymm_ymmm256_ymm",
43561	"XOP_Vpcmov_xmm_xmm_xmm_xmmm128",
43562	"XOP_Vpcmov_ymm_ymm_ymm_ymmm256",
43563	"XOP_Vpperm_xmm_xmm_xmmm128_xmm",
43564	"XOP_Vpperm_xmm_xmm_xmm_xmmm128",
43565	"XOP_Vpmadcsswd_xmm_xmm_xmmm128_xmm",
43566	"XOP_Vpmadcswd_xmm_xmm_xmmm128_xmm",
43567	"XOP_Vprotb_xmm_xmmm128_imm8",
43568	"XOP_Vprotw_xmm_xmmm128_imm8",
43569	"XOP_Vprotd_xmm_xmmm128_imm8",
43570	"XOP_Vprotq_xmm_xmmm128_imm8",
43571	"XOP_Vpcomb_xmm_xmm_xmmm128_imm8",
43572	"XOP_Vpcomw_xmm_xmm_xmmm128_imm8",
43573	"XOP_Vpcomd_xmm_xmm_xmmm128_imm8",
43574	"XOP_Vpcomq_xmm_xmm_xmmm128_imm8",
43575	"XOP_Vpcomub_xmm_xmm_xmmm128_imm8",
43576	"XOP_Vpcomuw_xmm_xmm_xmmm128_imm8",
43577	"XOP_Vpcomud_xmm_xmm_xmmm128_imm8",
43578	"XOP_Vpcomuq_xmm_xmm_xmmm128_imm8",
43579	"XOP_Blcfill_r32_rm32",
43580	"XOP_Blcfill_r64_rm64",
43581	"XOP_Blsfill_r32_rm32",
43582	"XOP_Blsfill_r64_rm64",
43583	"XOP_Blcs_r32_rm32",
43584	"XOP_Blcs_r64_rm64",
43585	"XOP_Tzmsk_r32_rm32",
43586	"XOP_Tzmsk_r64_rm64",
43587	"XOP_Blcic_r32_rm32",
43588	"XOP_Blcic_r64_rm64",
43589	"XOP_Blsic_r32_rm32",
43590	"XOP_Blsic_r64_rm64",
43591	"XOP_T1mskc_r32_rm32",
43592	"XOP_T1mskc_r64_rm64",
43593	"XOP_Blcmsk_r32_rm32",
43594	"XOP_Blcmsk_r64_rm64",
43595	"XOP_Blci_r32_rm32",
43596	"XOP_Blci_r64_rm64",
43597	"XOP_Llwpcb_r32",
43598	"XOP_Llwpcb_r64",
43599	"XOP_Slwpcb_r32",
43600	"XOP_Slwpcb_r64",
43601	"XOP_Vfrczps_xmm_xmmm128",
43602	"XOP_Vfrczps_ymm_ymmm256",
43603	"XOP_Vfrczpd_xmm_xmmm128",
43604	"XOP_Vfrczpd_ymm_ymmm256",
43605	"XOP_Vfrczss_xmm_xmmm32",
43606	"XOP_Vfrczsd_xmm_xmmm64",
43607	"XOP_Vprotb_xmm_xmmm128_xmm",
43608	"XOP_Vprotb_xmm_xmm_xmmm128",
43609	"XOP_Vprotw_xmm_xmmm128_xmm",
43610	"XOP_Vprotw_xmm_xmm_xmmm128",
43611	"XOP_Vprotd_xmm_xmmm128_xmm",
43612	"XOP_Vprotd_xmm_xmm_xmmm128",
43613	"XOP_Vprotq_xmm_xmmm128_xmm",
43614	"XOP_Vprotq_xmm_xmm_xmmm128",
43615	"XOP_Vpshlb_xmm_xmmm128_xmm",
43616	"XOP_Vpshlb_xmm_xmm_xmmm128",
43617	"XOP_Vpshlw_xmm_xmmm128_xmm",
43618	"XOP_Vpshlw_xmm_xmm_xmmm128",
43619	"XOP_Vpshld_xmm_xmmm128_xmm",
43620	"XOP_Vpshld_xmm_xmm_xmmm128",
43621	"XOP_Vpshlq_xmm_xmmm128_xmm",
43622	"XOP_Vpshlq_xmm_xmm_xmmm128",
43623	"XOP_Vpshab_xmm_xmmm128_xmm",
43624	"XOP_Vpshab_xmm_xmm_xmmm128",
43625	"XOP_Vpshaw_xmm_xmmm128_xmm",
43626	"XOP_Vpshaw_xmm_xmm_xmmm128",
43627	"XOP_Vpshad_xmm_xmmm128_xmm",
43628	"XOP_Vpshad_xmm_xmm_xmmm128",
43629	"XOP_Vpshaq_xmm_xmmm128_xmm",
43630	"XOP_Vpshaq_xmm_xmm_xmmm128",
43631	"XOP_Vphaddbw_xmm_xmmm128",
43632	"XOP_Vphaddbd_xmm_xmmm128",
43633	"XOP_Vphaddbq_xmm_xmmm128",
43634	"XOP_Vphaddwd_xmm_xmmm128",
43635	"XOP_Vphaddwq_xmm_xmmm128",
43636	"XOP_Vphadddq_xmm_xmmm128",
43637	"XOP_Vphaddubw_xmm_xmmm128",
43638	"XOP_Vphaddubd_xmm_xmmm128",
43639	"XOP_Vphaddubq_xmm_xmmm128",
43640	"XOP_Vphadduwd_xmm_xmmm128",
43641	"XOP_Vphadduwq_xmm_xmmm128",
43642	"XOP_Vphaddudq_xmm_xmmm128",
43643	"XOP_Vphsubbw_xmm_xmmm128",
43644	"XOP_Vphsubwd_xmm_xmmm128",
43645	"XOP_Vphsubdq_xmm_xmmm128",
43646	"XOP_Bextr_r32_rm32_imm32",
43647	"XOP_Bextr_r64_rm64_imm32",
43648	"XOP_Lwpins_r32_rm32_imm32",
43649	"XOP_Lwpins_r64_rm32_imm32",
43650	"XOP_Lwpval_r32_rm32_imm32",
43651	"XOP_Lwpval_r64_rm32_imm32",
43652	"D3NOW_Pi2fw_mm_mmm64",
43653	"D3NOW_Pi2fd_mm_mmm64",
43654	"D3NOW_Pf2iw_mm_mmm64",
43655	"D3NOW_Pf2id_mm_mmm64",
43656	"D3NOW_Pfrcpv_mm_mmm64",
43657	"D3NOW_Pfrsqrtv_mm_mmm64",
43658	"D3NOW_Pfnacc_mm_mmm64",
43659	"D3NOW_Pfpnacc_mm_mmm64",
43660	"D3NOW_Pfcmpge_mm_mmm64",
43661	"D3NOW_Pfmin_mm_mmm64",
43662	"D3NOW_Pfrcp_mm_mmm64",
43663	"D3NOW_Pfrsqrt_mm_mmm64",
43664	"D3NOW_Pfsub_mm_mmm64",
43665	"D3NOW_Pfadd_mm_mmm64",
43666	"D3NOW_Pfcmpgt_mm_mmm64",
43667	"D3NOW_Pfmax_mm_mmm64",
43668	"D3NOW_Pfrcpit1_mm_mmm64",
43669	"D3NOW_Pfrsqit1_mm_mmm64",
43670	"D3NOW_Pfsubr_mm_mmm64",
43671	"D3NOW_Pfacc_mm_mmm64",
43672	"D3NOW_Pfcmpeq_mm_mmm64",
43673	"D3NOW_Pfmul_mm_mmm64",
43674	"D3NOW_Pfrcpit2_mm_mmm64",
43675	"D3NOW_Pmulhrw_mm_mmm64",
43676	"D3NOW_Pswapd_mm_mmm64",
43677	"D3NOW_Pavgusb_mm_mmm64",
43678	"Rmpadjust",
43679	"Rmpupdate",
43680	"Psmash",
43681	"Pvalidatew",
43682	"Pvalidated",
43683	"Pvalidateq",
43684	"Serialize",
43685	"Xsusldtrk",
43686	"Xresldtrk",
43687	"Invlpgbw",
43688	"Invlpgbd",
43689	"Invlpgbq",
43690	"Tlbsync",
43691	"Prefetchreserved3_m8",
43692	"Prefetchreserved4_m8",
43693	"Prefetchreserved5_m8",
43694	"Prefetchreserved6_m8",
43695	"Prefetchreserved7_m8",
43696	"Ud0",
43697	"Vmgexit",
43698	"Getsecq",
43699	"VEX_Ldtilecfg_m512",
43700	"VEX_Tilerelease",
43701	"VEX_Sttilecfg_m512",
43702	"VEX_Tilezero_tmm",
43703	"VEX_Tileloaddt1_tmm_sibmem",
43704	"VEX_Tilestored_sibmem_tmm",
43705	"VEX_Tileloadd_tmm_sibmem",
43706	"VEX_Tdpbf16ps_tmm_tmm_tmm",
43707	"VEX_Tdpbuud_tmm_tmm_tmm",
43708	"VEX_Tdpbusd_tmm_tmm_tmm",
43709	"VEX_Tdpbsud_tmm_tmm_tmm",
43710	"VEX_Tdpbssd_tmm_tmm_tmm",
43711	"Fnstdw_AX",
43712	"Fnstsg_AX",
43713	"Rdshr_rm32",
43714	"Wrshr_rm32",
43715	"Smint",
43716	"Dmint",
43717	"Rdm",
43718	"Svdc_m80_Sreg",
43719	"Rsdc_Sreg_m80",
43720	"Svldt_m80",
43721	"Rsldt_m80",
43722	"Svts_m80",
43723	"Rsts_m80",
43724	"Smint_0F7E",
43725	"Bb0_reset",
43726	"Bb1_reset",
43727	"Cpu_write",
43728	"Cpu_read",
43729	"Altinst",
43730	"Paveb_mm_mmm64",
43731	"Paddsiw_mm_mmm64",
43732	"Pmagw_mm_mmm64",
43733	"Pdistib_mm_m64",
43734	"Psubsiw_mm_mmm64",
43735	"Pmvzb_mm_m64",
43736	"Pmulhrw_mm_mmm64",
43737	"Pmvnzb_mm_m64",
43738	"Pmvlzb_mm_m64",
43739	"Pmvgezb_mm_m64",
43740	"Pmulhriw_mm_mmm64",
43741	"Pmachriw_mm_m64",
43742	"Cyrix_D9D7",
43743	"Cyrix_D9E2",
43744	"Ftstp",
43745	"Cyrix_D9E7",
43746	"Frint2",
43747	"Frichop",
43748	"Cyrix_DED8",
43749	"Cyrix_DEDA",
43750	"Cyrix_DEDC",
43751	"Cyrix_DEDD",
43752	"Cyrix_DEDE",
43753	"Frinear",
43754	"Tdcall",
43755	"Seamret",
43756	"Seamops",
43757	"Seamcall",
43758	"Aesencwide128kl_m384",
43759	"Aesdecwide128kl_m384",
43760	"Aesencwide256kl_m512",
43761	"Aesdecwide256kl_m512",
43762	"Loadiwkey_xmm_xmm",
43763	"Aesenc128kl_xmm_m384",
43764	"Aesdec128kl_xmm_m384",
43765	"Aesenc256kl_xmm_m512",
43766	"Aesdec256kl_xmm_m512",
43767	"Encodekey128_r32_r32",
43768	"Encodekey256_r32_r32",
43769	"VEX_Vbroadcastss_xmm_xmm",
43770	"VEX_Vbroadcastss_ymm_xmm",
43771	"VEX_Vbroadcastsd_ymm_xmm",
43772	"Vmgexit_F2",
43773	"Uiret",
43774	"Testui",
43775	"Clui",
43776	"Stui",
43777	"Senduipi_r64",
43778	"Hreset_imm8",
43779	"VEX_Vpdpbusd_xmm_xmm_xmmm128",
43780	"VEX_Vpdpbusd_ymm_ymm_ymmm256",
43781	"VEX_Vpdpbusds_xmm_xmm_xmmm128",
43782	"VEX_Vpdpbusds_ymm_ymm_ymmm256",
43783	"VEX_Vpdpwssd_xmm_xmm_xmmm128",
43784	"VEX_Vpdpwssd_ymm_ymm_ymmm256",
43785	"VEX_Vpdpwssds_xmm_xmm_xmmm128",
43786	"VEX_Vpdpwssds_ymm_ymm_ymmm256",
43787	"Ccs_hash_16",
43788	"Ccs_hash_32",
43789	"Ccs_hash_64",
43790	"Ccs_encrypt_16",
43791	"Ccs_encrypt_32",
43792	"Ccs_encrypt_64",
43793	"Lkgs_rm16",
43794	"Lkgs_r32m16",
43795	"Lkgs_r64m16",
43796	"Eretu",
43797	"Erets",
43798	"EVEX_Vaddph_xmm_k1z_xmm_xmmm128b16",
43799	"EVEX_Vaddph_ymm_k1z_ymm_ymmm256b16",
43800	"EVEX_Vaddph_zmm_k1z_zmm_zmmm512b16_er",
43801	"EVEX_Vaddsh_xmm_k1z_xmm_xmmm16_er",
43802	"EVEX_Vcmpph_kr_k1_xmm_xmmm128b16_imm8",
43803	"EVEX_Vcmpph_kr_k1_ymm_ymmm256b16_imm8",
43804	"EVEX_Vcmpph_kr_k1_zmm_zmmm512b16_imm8_sae",
43805	"EVEX_Vcmpsh_kr_k1_xmm_xmmm16_imm8_sae",
43806	"EVEX_Vcomish_xmm_xmmm16_sae",
43807	"EVEX_Vcvtdq2ph_xmm_k1z_xmmm128b32",
43808	"EVEX_Vcvtdq2ph_xmm_k1z_ymmm256b32",
43809	"EVEX_Vcvtdq2ph_ymm_k1z_zmmm512b32_er",
43810	"EVEX_Vcvtpd2ph_xmm_k1z_xmmm128b64",
43811	"EVEX_Vcvtpd2ph_xmm_k1z_ymmm256b64",
43812	"EVEX_Vcvtpd2ph_xmm_k1z_zmmm512b64_er",
43813	"EVEX_Vcvtph2dq_xmm_k1z_xmmm64b16",
43814	"EVEX_Vcvtph2dq_ymm_k1z_xmmm128b16",
43815	"EVEX_Vcvtph2dq_zmm_k1z_ymmm256b16_er",
43816	"EVEX_Vcvtph2pd_xmm_k1z_xmmm32b16",
43817	"EVEX_Vcvtph2pd_ymm_k1z_xmmm64b16",
43818	"EVEX_Vcvtph2pd_zmm_k1z_xmmm128b16_sae",
43819	"EVEX_Vcvtph2psx_xmm_k1z_xmmm64b16",
43820	"EVEX_Vcvtph2psx_ymm_k1z_xmmm128b16",
43821	"EVEX_Vcvtph2psx_zmm_k1z_ymmm256b16_sae",
43822	"EVEX_Vcvtph2qq_xmm_k1z_xmmm32b16",
43823	"EVEX_Vcvtph2qq_ymm_k1z_xmmm64b16",
43824	"EVEX_Vcvtph2qq_zmm_k1z_xmmm128b16_er",
43825	"EVEX_Vcvtph2udq_xmm_k1z_xmmm64b16",
43826	"EVEX_Vcvtph2udq_ymm_k1z_xmmm128b16",
43827	"EVEX_Vcvtph2udq_zmm_k1z_ymmm256b16_er",
43828	"EVEX_Vcvtph2uqq_xmm_k1z_xmmm32b16",
43829	"EVEX_Vcvtph2uqq_ymm_k1z_xmmm64b16",
43830	"EVEX_Vcvtph2uqq_zmm_k1z_xmmm128b16_er",
43831	"EVEX_Vcvtph2uw_xmm_k1z_xmmm128b16",
43832	"EVEX_Vcvtph2uw_ymm_k1z_ymmm256b16",
43833	"EVEX_Vcvtph2uw_zmm_k1z_zmmm512b16_er",
43834	"EVEX_Vcvtph2w_xmm_k1z_xmmm128b16",
43835	"EVEX_Vcvtph2w_ymm_k1z_ymmm256b16",
43836	"EVEX_Vcvtph2w_zmm_k1z_zmmm512b16_er",
43837	"EVEX_Vcvtps2phx_xmm_k1z_xmmm128b32",
43838	"EVEX_Vcvtps2phx_xmm_k1z_ymmm256b32",
43839	"EVEX_Vcvtps2phx_ymm_k1z_zmmm512b32_er",
43840	"EVEX_Vcvtqq2ph_xmm_k1z_xmmm128b64",
43841	"EVEX_Vcvtqq2ph_xmm_k1z_ymmm256b64",
43842	"EVEX_Vcvtqq2ph_xmm_k1z_zmmm512b64_er",
43843	"EVEX_Vcvtsd2sh_xmm_k1z_xmm_xmmm64_er",
43844	"EVEX_Vcvtsh2sd_xmm_k1z_xmm_xmmm16_sae",
43845	"EVEX_Vcvtsh2si_r32_xmmm16_er",
43846	"EVEX_Vcvtsh2si_r64_xmmm16_er",
43847	"EVEX_Vcvtsh2ss_xmm_k1z_xmm_xmmm16_sae",
43848	"EVEX_Vcvtsh2usi_r32_xmmm16_er",
43849	"EVEX_Vcvtsh2usi_r64_xmmm16_er",
43850	"EVEX_Vcvtsi2sh_xmm_xmm_rm32_er",
43851	"EVEX_Vcvtsi2sh_xmm_xmm_rm64_er",
43852	"EVEX_Vcvtss2sh_xmm_k1z_xmm_xmmm32_er",
43853	"EVEX_Vcvttph2dq_xmm_k1z_xmmm64b16",
43854	"EVEX_Vcvttph2dq_ymm_k1z_xmmm128b16",
43855	"EVEX_Vcvttph2dq_zmm_k1z_ymmm256b16_sae",
43856	"EVEX_Vcvttph2qq_xmm_k1z_xmmm32b16",
43857	"EVEX_Vcvttph2qq_ymm_k1z_xmmm64b16",
43858	"EVEX_Vcvttph2qq_zmm_k1z_xmmm128b16_sae",
43859	"EVEX_Vcvttph2udq_xmm_k1z_xmmm64b16",
43860	"EVEX_Vcvttph2udq_ymm_k1z_xmmm128b16",
43861	"EVEX_Vcvttph2udq_zmm_k1z_ymmm256b16_sae",
43862	"EVEX_Vcvttph2uqq_xmm_k1z_xmmm32b16",
43863	"EVEX_Vcvttph2uqq_ymm_k1z_xmmm64b16",
43864	"EVEX_Vcvttph2uqq_zmm_k1z_xmmm128b16_sae",
43865	"EVEX_Vcvttph2uw_xmm_k1z_xmmm128b16",
43866	"EVEX_Vcvttph2uw_ymm_k1z_ymmm256b16",
43867	"EVEX_Vcvttph2uw_zmm_k1z_zmmm512b16_sae",
43868	"EVEX_Vcvttph2w_xmm_k1z_xmmm128b16",
43869	"EVEX_Vcvttph2w_ymm_k1z_ymmm256b16",
43870	"EVEX_Vcvttph2w_zmm_k1z_zmmm512b16_sae",
43871	"EVEX_Vcvttsh2si_r32_xmmm16_sae",
43872	"EVEX_Vcvttsh2si_r64_xmmm16_sae",
43873	"EVEX_Vcvttsh2usi_r32_xmmm16_sae",
43874	"EVEX_Vcvttsh2usi_r64_xmmm16_sae",
43875	"EVEX_Vcvtudq2ph_xmm_k1z_xmmm128b32",
43876	"EVEX_Vcvtudq2ph_xmm_k1z_ymmm256b32",
43877	"EVEX_Vcvtudq2ph_ymm_k1z_zmmm512b32_er",
43878	"EVEX_Vcvtuqq2ph_xmm_k1z_xmmm128b64",
43879	"EVEX_Vcvtuqq2ph_xmm_k1z_ymmm256b64",
43880	"EVEX_Vcvtuqq2ph_xmm_k1z_zmmm512b64_er",
43881	"EVEX_Vcvtusi2sh_xmm_xmm_rm32_er",
43882	"EVEX_Vcvtusi2sh_xmm_xmm_rm64_er",
43883	"EVEX_Vcvtuw2ph_xmm_k1z_xmmm128b16",
43884	"EVEX_Vcvtuw2ph_ymm_k1z_ymmm256b16",
43885	"EVEX_Vcvtuw2ph_zmm_k1z_zmmm512b16_er",
43886	"EVEX_Vcvtw2ph_xmm_k1z_xmmm128b16",
43887	"EVEX_Vcvtw2ph_ymm_k1z_ymmm256b16",
43888	"EVEX_Vcvtw2ph_zmm_k1z_zmmm512b16_er",
43889	"EVEX_Vdivph_xmm_k1z_xmm_xmmm128b16",
43890	"EVEX_Vdivph_ymm_k1z_ymm_ymmm256b16",
43891	"EVEX_Vdivph_zmm_k1z_zmm_zmmm512b16_er",
43892	"EVEX_Vdivsh_xmm_k1z_xmm_xmmm16_er",
43893	"EVEX_Vfcmaddcph_xmm_k1z_xmm_xmmm128b32",
43894	"EVEX_Vfcmaddcph_ymm_k1z_ymm_ymmm256b32",
43895	"EVEX_Vfcmaddcph_zmm_k1z_zmm_zmmm512b32_er",
43896	"EVEX_Vfmaddcph_xmm_k1z_xmm_xmmm128b32",
43897	"EVEX_Vfmaddcph_ymm_k1z_ymm_ymmm256b32",
43898	"EVEX_Vfmaddcph_zmm_k1z_zmm_zmmm512b32_er",
43899	"EVEX_Vfcmaddcsh_xmm_k1z_xmm_xmmm32_er",
43900	"EVEX_Vfmaddcsh_xmm_k1z_xmm_xmmm32_er",
43901	"EVEX_Vfcmulcph_xmm_k1z_xmm_xmmm128b32",
43902	"EVEX_Vfcmulcph_ymm_k1z_ymm_ymmm256b32",
43903	"EVEX_Vfcmulcph_zmm_k1z_zmm_zmmm512b32_er",
43904	"EVEX_Vfmulcph_xmm_k1z_xmm_xmmm128b32",
43905	"EVEX_Vfmulcph_ymm_k1z_ymm_ymmm256b32",
43906	"EVEX_Vfmulcph_zmm_k1z_zmm_zmmm512b32_er",
43907	"EVEX_Vfcmulcsh_xmm_k1z_xmm_xmmm32_er",
43908	"EVEX_Vfmulcsh_xmm_k1z_xmm_xmmm32_er",
43909	"EVEX_Vfmaddsub132ph_xmm_k1z_xmm_xmmm128b16",
43910	"EVEX_Vfmaddsub132ph_ymm_k1z_ymm_ymmm256b16",
43911	"EVEX_Vfmaddsub132ph_zmm_k1z_zmm_zmmm512b16_er",
43912	"EVEX_Vfmaddsub213ph_xmm_k1z_xmm_xmmm128b16",
43913	"EVEX_Vfmaddsub213ph_ymm_k1z_ymm_ymmm256b16",
43914	"EVEX_Vfmaddsub213ph_zmm_k1z_zmm_zmmm512b16_er",
43915	"EVEX_Vfmaddsub231ph_xmm_k1z_xmm_xmmm128b16",
43916	"EVEX_Vfmaddsub231ph_ymm_k1z_ymm_ymmm256b16",
43917	"EVEX_Vfmaddsub231ph_zmm_k1z_zmm_zmmm512b16_er",
43918	"EVEX_Vfmsubadd132ph_xmm_k1z_xmm_xmmm128b16",
43919	"EVEX_Vfmsubadd132ph_ymm_k1z_ymm_ymmm256b16",
43920	"EVEX_Vfmsubadd132ph_zmm_k1z_zmm_zmmm512b16_er",
43921	"EVEX_Vfmsubadd213ph_xmm_k1z_xmm_xmmm128b16",
43922	"EVEX_Vfmsubadd213ph_ymm_k1z_ymm_ymmm256b16",
43923	"EVEX_Vfmsubadd213ph_zmm_k1z_zmm_zmmm512b16_er",
43924	"EVEX_Vfmsubadd231ph_xmm_k1z_xmm_xmmm128b16",
43925	"EVEX_Vfmsubadd231ph_ymm_k1z_ymm_ymmm256b16",
43926	"EVEX_Vfmsubadd231ph_zmm_k1z_zmm_zmmm512b16_er",
43927	"EVEX_Vfmadd132ph_xmm_k1z_xmm_xmmm128b16",
43928	"EVEX_Vfmadd132ph_ymm_k1z_ymm_ymmm256b16",
43929	"EVEX_Vfmadd132ph_zmm_k1z_zmm_zmmm512b16_er",
43930	"EVEX_Vfmadd213ph_xmm_k1z_xmm_xmmm128b16",
43931	"EVEX_Vfmadd213ph_ymm_k1z_ymm_ymmm256b16",
43932	"EVEX_Vfmadd213ph_zmm_k1z_zmm_zmmm512b16_er",
43933	"EVEX_Vfmadd231ph_xmm_k1z_xmm_xmmm128b16",
43934	"EVEX_Vfmadd231ph_ymm_k1z_ymm_ymmm256b16",
43935	"EVEX_Vfmadd231ph_zmm_k1z_zmm_zmmm512b16_er",
43936	"EVEX_Vfnmadd132ph_xmm_k1z_xmm_xmmm128b16",
43937	"EVEX_Vfnmadd132ph_ymm_k1z_ymm_ymmm256b16",
43938	"EVEX_Vfnmadd132ph_zmm_k1z_zmm_zmmm512b16_er",
43939	"EVEX_Vfnmadd213ph_xmm_k1z_xmm_xmmm128b16",
43940	"EVEX_Vfnmadd213ph_ymm_k1z_ymm_ymmm256b16",
43941	"EVEX_Vfnmadd213ph_zmm_k1z_zmm_zmmm512b16_er",
43942	"EVEX_Vfnmadd231ph_xmm_k1z_xmm_xmmm128b16",
43943	"EVEX_Vfnmadd231ph_ymm_k1z_ymm_ymmm256b16",
43944	"EVEX_Vfnmadd231ph_zmm_k1z_zmm_zmmm512b16_er",
43945	"EVEX_Vfmadd132sh_xmm_k1z_xmm_xmmm16_er",
43946	"EVEX_Vfmadd213sh_xmm_k1z_xmm_xmmm16_er",
43947	"EVEX_Vfmadd231sh_xmm_k1z_xmm_xmmm16_er",
43948	"EVEX_Vfnmadd132sh_xmm_k1z_xmm_xmmm16_er",
43949	"EVEX_Vfnmadd213sh_xmm_k1z_xmm_xmmm16_er",
43950	"EVEX_Vfnmadd231sh_xmm_k1z_xmm_xmmm16_er",
43951	"EVEX_Vfmsub132ph_xmm_k1z_xmm_xmmm128b16",
43952	"EVEX_Vfmsub132ph_ymm_k1z_ymm_ymmm256b16",
43953	"EVEX_Vfmsub132ph_zmm_k1z_zmm_zmmm512b16_er",
43954	"EVEX_Vfmsub213ph_xmm_k1z_xmm_xmmm128b16",
43955	"EVEX_Vfmsub213ph_ymm_k1z_ymm_ymmm256b16",
43956	"EVEX_Vfmsub213ph_zmm_k1z_zmm_zmmm512b16_er",
43957	"EVEX_Vfmsub231ph_xmm_k1z_xmm_xmmm128b16",
43958	"EVEX_Vfmsub231ph_ymm_k1z_ymm_ymmm256b16",
43959	"EVEX_Vfmsub231ph_zmm_k1z_zmm_zmmm512b16_er",
43960	"EVEX_Vfnmsub132ph_xmm_k1z_xmm_xmmm128b16",
43961	"EVEX_Vfnmsub132ph_ymm_k1z_ymm_ymmm256b16",
43962	"EVEX_Vfnmsub132ph_zmm_k1z_zmm_zmmm512b16_er",
43963	"EVEX_Vfnmsub213ph_xmm_k1z_xmm_xmmm128b16",
43964	"EVEX_Vfnmsub213ph_ymm_k1z_ymm_ymmm256b16",
43965	"EVEX_Vfnmsub213ph_zmm_k1z_zmm_zmmm512b16_er",
43966	"EVEX_Vfnmsub231ph_xmm_k1z_xmm_xmmm128b16",
43967	"EVEX_Vfnmsub231ph_ymm_k1z_ymm_ymmm256b16",
43968	"EVEX_Vfnmsub231ph_zmm_k1z_zmm_zmmm512b16_er",
43969	"EVEX_Vfmsub132sh_xmm_k1z_xmm_xmmm16_er",
43970	"EVEX_Vfmsub213sh_xmm_k1z_xmm_xmmm16_er",
43971	"EVEX_Vfmsub231sh_xmm_k1z_xmm_xmmm16_er",
43972	"EVEX_Vfnmsub132sh_xmm_k1z_xmm_xmmm16_er",
43973	"EVEX_Vfnmsub213sh_xmm_k1z_xmm_xmmm16_er",
43974	"EVEX_Vfnmsub231sh_xmm_k1z_xmm_xmmm16_er",
43975	"EVEX_Vfpclassph_kr_k1_xmmm128b16_imm8",
43976	"EVEX_Vfpclassph_kr_k1_ymmm256b16_imm8",
43977	"EVEX_Vfpclassph_kr_k1_zmmm512b16_imm8",
43978	"EVEX_Vfpclasssh_kr_k1_xmmm16_imm8",
43979	"EVEX_Vgetexpph_xmm_k1z_xmmm128b16",
43980	"EVEX_Vgetexpph_ymm_k1z_ymmm256b16",
43981	"EVEX_Vgetexpph_zmm_k1z_zmmm512b16_sae",
43982	"EVEX_Vgetexpsh_xmm_k1z_xmm_xmmm16_sae",
43983	"EVEX_Vgetmantph_xmm_k1z_xmmm128b16_imm8",
43984	"EVEX_Vgetmantph_ymm_k1z_ymmm256b16_imm8",
43985	"EVEX_Vgetmantph_zmm_k1z_zmmm512b16_imm8_sae",
43986	"EVEX_Vgetmantsh_xmm_k1z_xmm_xmmm16_imm8_sae",
43987	"EVEX_Vmaxph_xmm_k1z_xmm_xmmm128b16",
43988	"EVEX_Vmaxph_ymm_k1z_ymm_ymmm256b16",
43989	"EVEX_Vmaxph_zmm_k1z_zmm_zmmm512b16_sae",
43990	"EVEX_Vmaxsh_xmm_k1z_xmm_xmmm16_sae",
43991	"EVEX_Vminph_xmm_k1z_xmm_xmmm128b16",
43992	"EVEX_Vminph_ymm_k1z_ymm_ymmm256b16",
43993	"EVEX_Vminph_zmm_k1z_zmm_zmmm512b16_sae",
43994	"EVEX_Vminsh_xmm_k1z_xmm_xmmm16_sae",
43995	"EVEX_Vmovsh_xmm_k1z_m16",
43996	"EVEX_Vmovsh_m16_k1_xmm",
43997	"EVEX_Vmovsh_xmm_k1z_xmm_xmm",
43998	"EVEX_Vmovsh_xmm_k1z_xmm_xmm_MAP5_11",
43999	"EVEX_Vmovw_xmm_r32m16",
44000	"EVEX_Vmovw_xmm_r64m16",
44001	"EVEX_Vmovw_r32m16_xmm",
44002	"EVEX_Vmovw_r64m16_xmm",
44003	"EVEX_Vmulph_xmm_k1z_xmm_xmmm128b16",
44004	"EVEX_Vmulph_ymm_k1z_ymm_ymmm256b16",
44005	"EVEX_Vmulph_zmm_k1z_zmm_zmmm512b16_er",
44006	"EVEX_Vmulsh_xmm_k1z_xmm_xmmm16_er",
44007	"EVEX_Vrcpph_xmm_k1z_xmmm128b16",
44008	"EVEX_Vrcpph_ymm_k1z_ymmm256b16",
44009	"EVEX_Vrcpph_zmm_k1z_zmmm512b16",
44010	"EVEX_Vrcpsh_xmm_k1z_xmm_xmmm16",
44011	"EVEX_Vreduceph_xmm_k1z_xmmm128b16_imm8",
44012	"EVEX_Vreduceph_ymm_k1z_ymmm256b16_imm8",
44013	"EVEX_Vreduceph_zmm_k1z_zmmm512b16_imm8_sae",
44014	"EVEX_Vreducesh_xmm_k1z_xmm_xmmm16_imm8_sae",
44015	"EVEX_Vrndscaleph_xmm_k1z_xmmm128b16_imm8",
44016	"EVEX_Vrndscaleph_ymm_k1z_ymmm256b16_imm8",
44017	"EVEX_Vrndscaleph_zmm_k1z_zmmm512b16_imm8_sae",
44018	"EVEX_Vrndscalesh_xmm_k1z_xmm_xmmm16_imm8_sae",
44019	"EVEX_Vrsqrtph_xmm_k1z_xmmm128b16",
44020	"EVEX_Vrsqrtph_ymm_k1z_ymmm256b16",
44021	"EVEX_Vrsqrtph_zmm_k1z_zmmm512b16",
44022	"EVEX_Vrsqrtsh_xmm_k1z_xmm_xmmm16",
44023	"EVEX_Vscalefph_xmm_k1z_xmm_xmmm128b16",
44024	"EVEX_Vscalefph_ymm_k1z_ymm_ymmm256b16",
44025	"EVEX_Vscalefph_zmm_k1z_zmm_zmmm512b16_er",
44026	"EVEX_Vscalefsh_xmm_k1z_xmm_xmmm16_er",
44027	"EVEX_Vsqrtph_xmm_k1z_xmmm128b16",
44028	"EVEX_Vsqrtph_ymm_k1z_ymmm256b16",
44029	"EVEX_Vsqrtph_zmm_k1z_zmmm512b16_er",
44030	"EVEX_Vsqrtsh_xmm_k1z_xmm_xmmm16_er",
44031	"EVEX_Vsubph_xmm_k1z_xmm_xmmm128b16",
44032	"EVEX_Vsubph_ymm_k1z_ymm_ymmm256b16",
44033	"EVEX_Vsubph_zmm_k1z_zmm_zmmm512b16_er",
44034	"EVEX_Vsubsh_xmm_k1z_xmm_xmmm16_er",
44035	"EVEX_Vucomish_xmm_xmmm16_sae",
44036	"Rdudbg",
44037	"Wrudbg",
44038	"VEX_KNC_Jkzd_kr_rel8_64",
44039	"VEX_KNC_Jknzd_kr_rel8_64",
44040	"VEX_KNC_Vprefetchnta_m8",
44041	"VEX_KNC_Vprefetch0_m8",
44042	"VEX_KNC_Vprefetch1_m8",
44043	"VEX_KNC_Vprefetch2_m8",
44044	"VEX_KNC_Vprefetchenta_m8",
44045	"VEX_KNC_Vprefetche0_m8",
44046	"VEX_KNC_Vprefetche1_m8",
44047	"VEX_KNC_Vprefetche2_m8",
44048	"VEX_KNC_Kand_kr_kr",
44049	"VEX_KNC_Kandn_kr_kr",
44050	"VEX_KNC_Kandnr_kr_kr",
44051	"VEX_KNC_Knot_kr_kr",
44052	"VEX_KNC_Kor_kr_kr",
44053	"VEX_KNC_Kxnor_kr_kr",
44054	"VEX_KNC_Kxor_kr_kr",
44055	"VEX_KNC_Kmerge2l1h_kr_kr",
44056	"VEX_KNC_Kmerge2l1l_kr_kr",
44057	"VEX_KNC_Jkzd_kr_rel32_64",
44058	"VEX_KNC_Jknzd_kr_rel32_64",
44059	"VEX_KNC_Kmov_kr_kr",
44060	"VEX_KNC_Kmov_kr_r32",
44061	"VEX_KNC_Kmov_r32_kr",
44062	"VEX_KNC_Kconcath_r64_kr_kr",
44063	"VEX_KNC_Kconcatl_r64_kr_kr",
44064	"VEX_KNC_Kortest_kr_kr",
44065	"VEX_KNC_Delay_r32",
44066	"VEX_KNC_Delay_r64",
44067	"VEX_KNC_Spflt_r32",
44068	"VEX_KNC_Spflt_r64",
44069	"VEX_KNC_Clevict1_m8",
44070	"VEX_KNC_Clevict0_m8",
44071	"VEX_KNC_Popcnt_r32_r32",
44072	"VEX_KNC_Popcnt_r64_r64",
44073	"VEX_KNC_Tzcnt_r32_r32",
44074	"VEX_KNC_Tzcnt_r64_r64",
44075	"VEX_KNC_Tzcnti_r32_r32",
44076	"VEX_KNC_Tzcnti_r64_r64",
44077	"VEX_KNC_Lzcnt_r32_r32",
44078	"VEX_KNC_Lzcnt_r64_r64",
44079	"VEX_KNC_Undoc_r32_rm32_128_F3_0F38_W0_F0",
44080	"VEX_KNC_Undoc_r64_rm64_128_F3_0F38_W1_F0",
44081	"VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F0",
44082	"VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F0",
44083	"VEX_KNC_Undoc_r32_rm32_128_F2_0F38_W0_F1",
44084	"VEX_KNC_Undoc_r64_rm64_128_F2_0F38_W1_F1",
44085	"VEX_KNC_Kextract_kr_r64_imm8",
44086	"MVEX_Vprefetchnta_m",
44087	"MVEX_Vprefetch0_m",
44088	"MVEX_Vprefetch1_m",
44089	"MVEX_Vprefetch2_m",
44090	"MVEX_Vprefetchenta_m",
44091	"MVEX_Vprefetche0_m",
44092	"MVEX_Vprefetche1_m",
44093	"MVEX_Vprefetche2_m",
44094	"MVEX_Vmovaps_zmm_k1_zmmmt",
44095	"MVEX_Vmovapd_zmm_k1_zmmmt",
44096	"MVEX_Vmovaps_mt_k1_zmm",
44097	"MVEX_Vmovapd_mt_k1_zmm",
44098	"MVEX_Vmovnrapd_m_k1_zmm",
44099	"MVEX_Vmovnrngoapd_m_k1_zmm",
44100	"MVEX_Vmovnraps_m_k1_zmm",
44101	"MVEX_Vmovnrngoaps_m_k1_zmm",
44102	"MVEX_Vaddps_zmm_k1_zmm_zmmmt",
44103	"MVEX_Vaddpd_zmm_k1_zmm_zmmmt",
44104	"MVEX_Vmulps_zmm_k1_zmm_zmmmt",
44105	"MVEX_Vmulpd_zmm_k1_zmm_zmmmt",
44106	"MVEX_Vcvtps2pd_zmm_k1_zmmmt",
44107	"MVEX_Vcvtpd2ps_zmm_k1_zmmmt",
44108	"MVEX_Vsubps_zmm_k1_zmm_zmmmt",
44109	"MVEX_Vsubpd_zmm_k1_zmm_zmmmt",
44110	"MVEX_Vpcmpgtd_kr_k1_zmm_zmmmt",
44111	"MVEX_Vmovdqa32_zmm_k1_zmmmt",
44112	"MVEX_Vmovdqa64_zmm_k1_zmmmt",
44113	"MVEX_Vpshufd_zmm_k1_zmmmt_imm8",
44114	"MVEX_Vpsrld_zmm_k1_zmmmt_imm8",
44115	"MVEX_Vpsrad_zmm_k1_zmmmt_imm8",
44116	"MVEX_Vpslld_zmm_k1_zmmmt_imm8",
44117	"MVEX_Vpcmpeqd_kr_k1_zmm_zmmmt",
44118	"MVEX_Vcvtudq2pd_zmm_k1_zmmmt",
44119	"MVEX_Vmovdqa32_mt_k1_zmm",
44120	"MVEX_Vmovdqa64_mt_k1_zmm",
44121	"MVEX_Clevict1_m",
44122	"MVEX_Clevict0_m",
44123	"MVEX_Vcmpps_kr_k1_zmm_zmmmt_imm8",
44124	"MVEX_Vcmppd_kr_k1_zmm_zmmmt_imm8",
44125	"MVEX_Vpandd_zmm_k1_zmm_zmmmt",
44126	"MVEX_Vpandq_zmm_k1_zmm_zmmmt",
44127	"MVEX_Vpandnd_zmm_k1_zmm_zmmmt",
44128	"MVEX_Vpandnq_zmm_k1_zmm_zmmmt",
44129	"MVEX_Vcvtdq2pd_zmm_k1_zmmmt",
44130	"MVEX_Vpord_zmm_k1_zmm_zmmmt",
44131	"MVEX_Vporq_zmm_k1_zmm_zmmmt",
44132	"MVEX_Vpxord_zmm_k1_zmm_zmmmt",
44133	"MVEX_Vpxorq_zmm_k1_zmm_zmmmt",
44134	"MVEX_Vpsubd_zmm_k1_zmm_zmmmt",
44135	"MVEX_Vpaddd_zmm_k1_zmm_zmmmt",
44136	"MVEX_Vbroadcastss_zmm_k1_mt",
44137	"MVEX_Vbroadcastsd_zmm_k1_mt",
44138	"MVEX_Vbroadcastf32x4_zmm_k1_mt",
44139	"MVEX_Vbroadcastf64x4_zmm_k1_mt",
44140	"MVEX_Vptestmd_kr_k1_zmm_zmmmt",
44141	"MVEX_Vpermd_zmm_k1_zmm_zmmmt",
44142	"MVEX_Vpminsd_zmm_k1_zmm_zmmmt",
44143	"MVEX_Vpminud_zmm_k1_zmm_zmmmt",
44144	"MVEX_Vpmaxsd_zmm_k1_zmm_zmmmt",
44145	"MVEX_Vpmaxud_zmm_k1_zmm_zmmmt",
44146	"MVEX_Vpmulld_zmm_k1_zmm_zmmmt",
44147	"MVEX_Vgetexpps_zmm_k1_zmmmt",
44148	"MVEX_Vgetexppd_zmm_k1_zmmmt",
44149	"MVEX_Vpsrlvd_zmm_k1_zmm_zmmmt",
44150	"MVEX_Vpsravd_zmm_k1_zmm_zmmmt",
44151	"MVEX_Vpsllvd_zmm_k1_zmm_zmmmt",
44152	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_48",
44153	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_49",
44154	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4A",
44155	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_4B",
44156	"MVEX_Vaddnps_zmm_k1_zmm_zmmmt",
44157	"MVEX_Vaddnpd_zmm_k1_zmm_zmmmt",
44158	"MVEX_Vgmaxabsps_zmm_k1_zmm_zmmmt",
44159	"MVEX_Vgminps_zmm_k1_zmm_zmmmt",
44160	"MVEX_Vgminpd_zmm_k1_zmm_zmmmt",
44161	"MVEX_Vgmaxps_zmm_k1_zmm_zmmmt",
44162	"MVEX_Vgmaxpd_zmm_k1_zmm_zmmmt",
44163	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_54",
44164	"MVEX_Vfixupnanps_zmm_k1_zmm_zmmmt",
44165	"MVEX_Vfixupnanpd_zmm_k1_zmm_zmmmt",
44166	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_56",
44167	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_57",
44168	"MVEX_Vpbroadcastd_zmm_k1_mt",
44169	"MVEX_Vpbroadcastq_zmm_k1_mt",
44170	"MVEX_Vbroadcasti32x4_zmm_k1_mt",
44171	"MVEX_Vbroadcasti64x4_zmm_k1_mt",
44172	"MVEX_Vpadcd_zmm_k1_kr_zmmmt",
44173	"MVEX_Vpaddsetcd_zmm_k1_kr_zmmmt",
44174	"MVEX_Vpsbbd_zmm_k1_kr_zmmmt",
44175	"MVEX_Vpsubsetbd_zmm_k1_kr_zmmmt",
44176	"MVEX_Vpblendmd_zmm_k1_zmm_zmmmt",
44177	"MVEX_Vpblendmq_zmm_k1_zmm_zmmmt",
44178	"MVEX_Vblendmps_zmm_k1_zmm_zmmmt",
44179	"MVEX_Vblendmpd_zmm_k1_zmm_zmmmt",
44180	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_67",
44181	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_68",
44182	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_69",
44183	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6A",
44184	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_6B",
44185	"MVEX_Vpsubrd_zmm_k1_zmm_zmmmt",
44186	"MVEX_Vsubrps_zmm_k1_zmm_zmmmt",
44187	"MVEX_Vsubrpd_zmm_k1_zmm_zmmmt",
44188	"MVEX_Vpsbbrd_zmm_k1_kr_zmmmt",
44189	"MVEX_Vpsubrsetbd_zmm_k1_kr_zmmmt",
44190	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_70",
44191	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_71",
44192	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_72",
44193	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_73",
44194	"MVEX_Vpcmpltd_kr_k1_zmm_zmmmt",
44195	"MVEX_Vscaleps_zmm_k1_zmm_zmmmt",
44196	"MVEX_Vpmulhud_zmm_k1_zmm_zmmmt",
44197	"MVEX_Vpmulhd_zmm_k1_zmm_zmmmt",
44198	"MVEX_Vpgatherdd_zmm_k1_mvt",
44199	"MVEX_Vpgatherdq_zmm_k1_mvt",
44200	"MVEX_Vgatherdps_zmm_k1_mvt",
44201	"MVEX_Vgatherdpd_zmm_k1_mvt",
44202	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_94",
44203	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_94",
44204	"MVEX_Vfmadd132ps_zmm_k1_zmm_zmmmt",
44205	"MVEX_Vfmadd132pd_zmm_k1_zmm_zmmmt",
44206	"MVEX_Vfmsub132ps_zmm_k1_zmm_zmmmt",
44207	"MVEX_Vfmsub132pd_zmm_k1_zmm_zmmmt",
44208	"MVEX_Vfnmadd132ps_zmm_k1_zmm_zmmmt",
44209	"MVEX_Vfnmadd132pd_zmm_k1_zmm_zmmmt",
44210	"MVEX_Vfnmsub132ps_zmm_k1_zmm_zmmmt",
44211	"MVEX_Vfnmsub132pd_zmm_k1_zmm_zmmmt",
44212	"MVEX_Vpscatterdd_mvt_k1_zmm",
44213	"MVEX_Vpscatterdq_mvt_k1_zmm",
44214	"MVEX_Vscatterdps_mvt_k1_zmm",
44215	"MVEX_Vscatterdpd_mvt_k1_zmm",
44216	"MVEX_Vfmadd233ps_zmm_k1_zmm_zmmmt",
44217	"MVEX_Vfmadd213ps_zmm_k1_zmm_zmmmt",
44218	"MVEX_Vfmadd213pd_zmm_k1_zmm_zmmmt",
44219	"MVEX_Vfmsub213ps_zmm_k1_zmm_zmmmt",
44220	"MVEX_Vfmsub213pd_zmm_k1_zmm_zmmmt",
44221	"MVEX_Vfnmadd213ps_zmm_k1_zmm_zmmmt",
44222	"MVEX_Vfnmadd213pd_zmm_k1_zmm_zmmmt",
44223	"MVEX_Vfnmsub213ps_zmm_k1_zmm_zmmmt",
44224	"MVEX_Vfnmsub213pd_zmm_k1_zmm_zmmmt",
44225	"MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B0",
44226	"MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_B2",
44227	"MVEX_Vpmadd233d_zmm_k1_zmm_zmmmt",
44228	"MVEX_Vpmadd231d_zmm_k1_zmm_zmmmt",
44229	"MVEX_Vfmadd231ps_zmm_k1_zmm_zmmmt",
44230	"MVEX_Vfmadd231pd_zmm_k1_zmm_zmmmt",
44231	"MVEX_Vfmsub231ps_zmm_k1_zmm_zmmmt",
44232	"MVEX_Vfmsub231pd_zmm_k1_zmm_zmmmt",
44233	"MVEX_Vfnmadd231ps_zmm_k1_zmm_zmmmt",
44234	"MVEX_Vfnmadd231pd_zmm_k1_zmm_zmmmt",
44235	"MVEX_Vfnmsub231ps_zmm_k1_zmm_zmmmt",
44236	"MVEX_Vfnmsub231pd_zmm_k1_zmm_zmmmt",
44237	"MVEX_Undoc_zmm_k1_mvt_512_66_0F38_W0_C0",
44238	"MVEX_Vgatherpf0hintdps_mvt_k1",
44239	"MVEX_Vgatherpf0hintdpd_mvt_k1",
44240	"MVEX_Vgatherpf0dps_mvt_k1",
44241	"MVEX_Vgatherpf1dps_mvt_k1",
44242	"MVEX_Vscatterpf0hintdps_mvt_k1",
44243	"MVEX_Vscatterpf0hintdpd_mvt_k1",
44244	"MVEX_Vscatterpf0dps_mvt_k1",
44245	"MVEX_Vscatterpf1dps_mvt_k1",
44246	"MVEX_Vexp223ps_zmm_k1_zmmmt",
44247	"MVEX_Vlog2ps_zmm_k1_zmmmt",
44248	"MVEX_Vrcp23ps_zmm_k1_zmmmt",
44249	"MVEX_Vrsqrt23ps_zmm_k1_zmmmt",
44250	"MVEX_Vaddsetsps_zmm_k1_zmm_zmmmt",
44251	"MVEX_Vpaddsetsd_zmm_k1_zmm_zmmmt",
44252	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CE",
44253	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W1_CE",
44254	"MVEX_Undoc_zmm_k1_zmm_zmmmt_512_66_0F38_W0_CF",
44255	"MVEX_Vloadunpackld_zmm_k1_mt",
44256	"MVEX_Vloadunpacklq_zmm_k1_mt",
44257	"MVEX_Vpackstoreld_mt_k1_zmm",
44258	"MVEX_Vpackstorelq_mt_k1_zmm",
44259	"MVEX_Vloadunpacklps_zmm_k1_mt",
44260	"MVEX_Vloadunpacklpd_zmm_k1_mt",
44261	"MVEX_Vpackstorelps_mt_k1_zmm",
44262	"MVEX_Vpackstorelpd_mt_k1_zmm",
44263	"MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D2",
44264	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D2",
44265	"MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D3",
44266	"MVEX_Vloadunpackhd_zmm_k1_mt",
44267	"MVEX_Vloadunpackhq_zmm_k1_mt",
44268	"MVEX_Vpackstorehd_mt_k1_zmm",
44269	"MVEX_Vpackstorehq_mt_k1_zmm",
44270	"MVEX_Vloadunpackhps_zmm_k1_mt",
44271	"MVEX_Vloadunpackhpd_zmm_k1_mt",
44272	"MVEX_Vpackstorehps_mt_k1_zmm",
44273	"MVEX_Vpackstorehpd_mt_k1_zmm",
44274	"MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D6",
44275	"MVEX_Undoc_zmm_k1_zmmmt_512_66_0F38_W0_D6",
44276	"MVEX_Undoc_zmm_k1_zmmmt_512_0F38_W0_D7",
44277	"MVEX_Valignd_zmm_k1_zmm_zmmmt_imm8",
44278	"MVEX_Vpermf32x4_zmm_k1_zmmmt_imm8",
44279	"MVEX_Vpcmpud_kr_k1_zmm_zmmmt_imm8",
44280	"MVEX_Vpcmpd_kr_k1_zmm_zmmmt_imm8",
44281	"MVEX_Vgetmantps_zmm_k1_zmmmt_imm8",
44282	"MVEX_Vgetmantpd_zmm_k1_zmmmt_imm8",
44283	"MVEX_Vrndfxpntps_zmm_k1_zmmmt_imm8",
44284	"MVEX_Vrndfxpntpd_zmm_k1_zmmmt_imm8",
44285	"MVEX_Vcvtfxpntudq2ps_zmm_k1_zmmmt_imm8",
44286	"MVEX_Vcvtfxpntps2udq_zmm_k1_zmmmt_imm8",
44287	"MVEX_Vcvtfxpntpd2udq_zmm_k1_zmmmt_imm8",
44288	"MVEX_Vcvtfxpntdq2ps_zmm_k1_zmmmt_imm8",
44289	"MVEX_Vcvtfxpntps2dq_zmm_k1_zmmmt_imm8",
44290	"MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D0",
44291	"MVEX_Undoc_zmm_k1_zmmmt_imm8_512_66_0F3A_W0_D1",
44292	"MVEX_Vcvtfxpntpd2dq_zmm_k1_zmmmt_imm8",
44293	"Via_undoc_F30FA6F0_16",
44294	"Via_undoc_F30FA6F0_32",
44295	"Via_undoc_F30FA6F0_64",
44296	"Via_undoc_F30FA6F8_16",
44297	"Via_undoc_F30FA6F8_32",
44298	"Via_undoc_F30FA6F8_64",
44299	"Xsha512_16",
44300	"Xsha512_32",
44301	"Xsha512_64",
44302	"Xstore_alt_16",
44303	"Xstore_alt_32",
44304	"Xstore_alt_64",
44305	"Xsha512_alt_16",
44306	"Xsha512_alt_32",
44307	"Xsha512_alt_64",
44308	"Zero_bytes",
44309	"Wrmsrns",
44310	"Wrmsrlist",
44311	"Rdmsrlist",
44312	"Rmpquery",
44313	"Prefetchit1_m8",
44314	"Prefetchit0_m8",
44315	"Aadd_m32_r32",
44316	"Aadd_m64_r64",
44317	"Aand_m32_r32",
44318	"Aand_m64_r64",
44319	"Axor_m32_r32",
44320	"Axor_m64_r64",
44321	"Aor_m32_r32",
44322	"Aor_m64_r64",
44323	"VEX_Vpdpbuud_xmm_xmm_xmmm128",
44324	"VEX_Vpdpbuud_ymm_ymm_ymmm256",
44325	"VEX_Vpdpbsud_xmm_xmm_xmmm128",
44326	"VEX_Vpdpbsud_ymm_ymm_ymmm256",
44327	"VEX_Vpdpbssd_xmm_xmm_xmmm128",
44328	"VEX_Vpdpbssd_ymm_ymm_ymmm256",
44329	"VEX_Vpdpbuuds_xmm_xmm_xmmm128",
44330	"VEX_Vpdpbuuds_ymm_ymm_ymmm256",
44331	"VEX_Vpdpbsuds_xmm_xmm_xmmm128",
44332	"VEX_Vpdpbsuds_ymm_ymm_ymmm256",
44333	"VEX_Vpdpbssds_xmm_xmm_xmmm128",
44334	"VEX_Vpdpbssds_ymm_ymm_ymmm256",
44335	"VEX_Tdpfp16ps_tmm_tmm_tmm",
44336	"VEX_Vcvtneps2bf16_xmm_xmmm128",
44337	"VEX_Vcvtneps2bf16_xmm_ymmm256",
44338	"VEX_Vcvtneoph2ps_xmm_m128",
44339	"VEX_Vcvtneoph2ps_ymm_m256",
44340	"VEX_Vcvtneeph2ps_xmm_m128",
44341	"VEX_Vcvtneeph2ps_ymm_m256",
44342	"VEX_Vcvtneebf162ps_xmm_m128",
44343	"VEX_Vcvtneebf162ps_ymm_m256",
44344	"VEX_Vcvtneobf162ps_xmm_m128",
44345	"VEX_Vcvtneobf162ps_ymm_m256",
44346	"VEX_Vbcstnesh2ps_xmm_m16",
44347	"VEX_Vbcstnesh2ps_ymm_m16",
44348	"VEX_Vbcstnebf162ps_xmm_m16",
44349	"VEX_Vbcstnebf162ps_ymm_m16",
44350	"VEX_Vpmadd52luq_xmm_xmm_xmmm128",
44351	"VEX_Vpmadd52luq_ymm_ymm_ymmm256",
44352	"VEX_Vpmadd52huq_xmm_xmm_xmmm128",
44353	"VEX_Vpmadd52huq_ymm_ymm_ymmm256",
44354	"VEX_Cmpoxadd_m32_r32_r32",
44355	"VEX_Cmpoxadd_m64_r64_r64",
44356	"VEX_Cmpnoxadd_m32_r32_r32",
44357	"VEX_Cmpnoxadd_m64_r64_r64",
44358	"VEX_Cmpbxadd_m32_r32_r32",
44359	"VEX_Cmpbxadd_m64_r64_r64",
44360	"VEX_Cmpnbxadd_m32_r32_r32",
44361	"VEX_Cmpnbxadd_m64_r64_r64",
44362	"VEX_Cmpzxadd_m32_r32_r32",
44363	"VEX_Cmpzxadd_m64_r64_r64",
44364	"VEX_Cmpnzxadd_m32_r32_r32",
44365	"VEX_Cmpnzxadd_m64_r64_r64",
44366	"VEX_Cmpbexadd_m32_r32_r32",
44367	"VEX_Cmpbexadd_m64_r64_r64",
44368	"VEX_Cmpnbexadd_m32_r32_r32",
44369	"VEX_Cmpnbexadd_m64_r64_r64",
44370	"VEX_Cmpsxadd_m32_r32_r32",
44371	"VEX_Cmpsxadd_m64_r64_r64",
44372	"VEX_Cmpnsxadd_m32_r32_r32",
44373	"VEX_Cmpnsxadd_m64_r64_r64",
44374	"VEX_Cmppxadd_m32_r32_r32",
44375	"VEX_Cmppxadd_m64_r64_r64",
44376	"VEX_Cmpnpxadd_m32_r32_r32",
44377	"VEX_Cmpnpxadd_m64_r64_r64",
44378	"VEX_Cmplxadd_m32_r32_r32",
44379	"VEX_Cmplxadd_m64_r64_r64",
44380	"VEX_Cmpnlxadd_m32_r32_r32",
44381	"VEX_Cmpnlxadd_m64_r64_r64",
44382	"VEX_Cmplexadd_m32_r32_r32",
44383	"VEX_Cmplexadd_m64_r64_r64",
44384	"VEX_Cmpnlexadd_m32_r32_r32",
44385	"VEX_Cmpnlexadd_m64_r64_r64",
44386	"VEX_Tcmmrlfp16ps_tmm_tmm_tmm",
44387	"VEX_Tcmmimfp16ps_tmm_tmm_tmm",
44388	"Pbndkb",
44389	"VEX_Vsha512rnds2_ymm_ymm_xmm",
44390	"VEX_Vsha512msg1_ymm_xmm",
44391	"VEX_Vsha512msg2_ymm_ymm",
44392	"VEX_Vpdpwuud_xmm_xmm_xmmm128",
44393	"VEX_Vpdpwuud_ymm_ymm_ymmm256",
44394	"VEX_Vpdpwusd_xmm_xmm_xmmm128",
44395	"VEX_Vpdpwusd_ymm_ymm_ymmm256",
44396	"VEX_Vpdpwsud_xmm_xmm_xmmm128",
44397	"VEX_Vpdpwsud_ymm_ymm_ymmm256",
44398	"VEX_Vpdpwuuds_xmm_xmm_xmmm128",
44399	"VEX_Vpdpwuuds_ymm_ymm_ymmm256",
44400	"VEX_Vpdpwusds_xmm_xmm_xmmm128",
44401	"VEX_Vpdpwusds_ymm_ymm_ymmm256",
44402	"VEX_Vpdpwsuds_xmm_xmm_xmmm128",
44403	"VEX_Vpdpwsuds_ymm_ymm_ymmm256",
44404	"VEX_Vsm3msg1_xmm_xmm_xmmm128",
44405	"VEX_Vsm3msg2_xmm_xmm_xmmm128",
44406	"VEX_Vsm4key4_xmm_xmm_xmmm128",
44407	"VEX_Vsm4key4_ymm_ymm_ymmm256",
44408	"VEX_Vsm4rnds4_xmm_xmm_xmmm128",
44409	"VEX_Vsm4rnds4_ymm_ymm_ymmm256",
44410	"VEX_Vsm3rnds2_xmm_xmm_xmmm128_imm8",
44411];
44412impl fmt::Debug for Code {
44413	#[inline]
44414	fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
44415		write!(f, "{}", GEN_DEBUG_CODE[*self as usize])
44416	}
44417}
44418impl Default for Code {
44419	#[must_use]
44420	#[inline]
44421	fn default() -> Self {
44422		Code::INVALID
44423	}
44424}
44425#[allow(non_camel_case_types)]
44426#[allow(dead_code)]
44427pub(crate) type CodeUnderlyingType = u16;
44428#[rustfmt::skip]
44429impl Code {
44430	/// Iterates over all `Code` enum values
44431	#[inline]
44432	pub fn values() -> impl Iterator<Item = Code> + DoubleEndedIterator + ExactSizeIterator + FusedIterator {
44433		// SAFETY: all values 0-max are valid enum values
44434		(0..IcedConstants::CODE_ENUM_COUNT).map(|x| unsafe { mem::transmute::<u16, Code>(x as u16) })
44435	}
44436}
44437#[test]
44438#[rustfmt::skip]
44439fn test_code_values() {
44440	let mut iter = Code::values();
44441	assert_eq!(iter.size_hint(), (IcedConstants::CODE_ENUM_COUNT, Some(IcedConstants::CODE_ENUM_COUNT)));
44442	assert_eq!(iter.len(), IcedConstants::CODE_ENUM_COUNT);
44443	assert!(iter.next().is_some());
44444	assert_eq!(iter.size_hint(), (IcedConstants::CODE_ENUM_COUNT - 1, Some(IcedConstants::CODE_ENUM_COUNT - 1)));
44445	assert_eq!(iter.len(), IcedConstants::CODE_ENUM_COUNT - 1);
44446
44447	let values: Vec<Code> = Code::values().collect();
44448	assert_eq!(values.len(), IcedConstants::CODE_ENUM_COUNT);
44449	for (i, value) in values.into_iter().enumerate() {
44450		assert_eq!(i, value as usize);
44451	}
44452
44453	let values1: Vec<Code> = Code::values().collect();
44454	let mut values2: Vec<Code> = Code::values().rev().collect();
44455	values2.reverse();
44456	assert_eq!(values1, values2);
44457}
44458#[rustfmt::skip]
44459impl TryFrom<usize> for Code {
44460	type Error = IcedError;
44461	#[inline]
44462	fn try_from(value: usize) -> Result<Self, Self::Error> {
44463		if value < IcedConstants::CODE_ENUM_COUNT {
44464			// SAFETY: all values 0-max are valid enum values
44465			Ok(unsafe { mem::transmute(value as u16) })
44466		} else {
44467			Err(IcedError::new("Invalid Code value"))
44468		}
44469	}
44470}
44471#[test]
44472#[rustfmt::skip]
44473fn test_code_try_from_usize() {
44474	for value in Code::values() {
44475		let converted = <Code as TryFrom<usize>>::try_from(value as usize).unwrap();
44476		assert_eq!(converted, value);
44477	}
44478	assert!(<Code as TryFrom<usize>>::try_from(IcedConstants::CODE_ENUM_COUNT).is_err());
44479	assert!(<Code as TryFrom<usize>>::try_from(core::usize::MAX).is_err());
44480}
44481#[cfg(feature = "serde")]
44482#[rustfmt::skip]
44483#[allow(clippy::zero_sized_map_values)]
44484const _: () = {
44485	use core::marker::PhantomData;
44486	use serde::de;
44487	use serde::{Deserialize, Deserializer, Serialize, Serializer};
44488	type EnumType = Code;
44489	impl Serialize for EnumType {
44490		#[inline]
44491		fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
44492		where
44493			S: Serializer,
44494		{
44495			serializer.serialize_u16(*self as u16)
44496		}
44497	}
44498	impl<'de> Deserialize<'de> for EnumType {
44499		#[inline]
44500		fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
44501		where
44502			D: Deserializer<'de>,
44503		{
44504			struct Visitor<'de> {
44505				marker: PhantomData<EnumType>,
44506				lifetime: PhantomData<&'de ()>,
44507			}
44508			impl<'de> de::Visitor<'de> for Visitor<'de> {
44509				type Value = EnumType;
44510				#[inline]
44511				fn expecting(&self, formatter: &mut fmt::Formatter<'_>) -> fmt::Result {
44512					formatter.write_str("enum Code")
44513				}
44514				#[inline]
44515				fn visit_u64<E>(self, v: u64) -> Result<Self::Value, E>
44516				where
44517					E: de::Error,
44518				{
44519					if let Ok(v) = <usize as TryFrom<_>>::try_from(v) {
44520						if let Ok(value) = <EnumType as TryFrom<_>>::try_from(v) {
44521							return Ok(value);
44522						}
44523					}
44524					Err(de::Error::invalid_value(de::Unexpected::Unsigned(v), &"a valid Code variant value"))
44525				}
44526			}
44527			deserializer.deserialize_u16(Visitor { marker: PhantomData::<EnumType>, lifetime: PhantomData })
44528		}
44529	}
44530};
44531// GENERATOR-END: Code
44532
44533impl Code {
44534	/// Gets the mnemonic
44535	///
44536	/// # Examples
44537	///
44538	/// ```
44539	/// use iced_x86::*;
44540	/// assert_eq!(Code::Add_rm32_r32.mnemonic(), Mnemonic::Add);
44541	/// ```
44542	#[must_use]
44543	#[inline]
44544	pub fn mnemonic(self) -> Mnemonic {
44545		mnemonics::TO_MNEMONIC[self as usize]
44546	}
44547}
44548
44549#[cfg(all(feature = "encoder", feature = "op_code_info"))]
44550impl Code {
44551	/// Gets a [`OpCodeInfo`]
44552	///
44553	/// [`OpCodeInfo`]: struct.OpCodeInfo.html
44554	#[must_use]
44555	#[inline]
44556	pub fn op_code(self) -> &'static OpCodeInfo {
44557		&self::encoder::op_code_tbl::OP_CODE_INFO_TBL[self as usize]
44558	}
44559}
44560
44561#[cfg(feature = "instr_info")]
44562impl Code {
44563	/// Gets the encoding, eg. Legacy, 3DNow!, VEX, EVEX, XOP
44564	///
44565	/// # Examples
44566	///
44567	/// ```
44568	/// use iced_x86::*;
44569	/// assert_eq!(Code::Add_rm32_r32.encoding(), EncodingKind::Legacy);
44570	/// assert_eq!(Code::VEX_Vmovups_xmm_xmmm128.encoding(), EncodingKind::VEX);
44571	/// assert_eq!(Code::EVEX_Vmovups_xmm_k1z_xmmm128.encoding(), EncodingKind::EVEX);
44572	/// assert_eq!(Code::XOP_Vpmacssww_xmm_xmm_xmmm128_xmm.encoding(), EncodingKind::XOP);
44573	/// assert_eq!(Code::D3NOW_Pi2fw_mm_mmm64.encoding(), EncodingKind::D3NOW);
44574	/// assert_eq!(Code::MVEX_Vpackstoreld_mt_k1_zmm.encoding(), EncodingKind::MVEX);
44575	/// ```
44576	#[must_use]
44577	#[inline]
44578	pub fn encoding(self) -> EncodingKind {
44579		// SAFETY: The table is generated and only contains valid enum variants
44580		unsafe {
44581			mem::transmute(
44582				((crate::info::info_table::TABLE[self as usize].1 >> InfoFlags2::ENCODING_SHIFT) & InfoFlags2::ENCODING_MASK)
44583					as EncodingKindUnderlyingType,
44584			)
44585		}
44586	}
44587
44588	/// Gets the CPU or CPUID feature flags
44589	///
44590	/// # Examples
44591	///
44592	/// ```
44593	/// use iced_x86::*;
44594	///
44595	/// let cpuid = Code::VEX_Vmovups_xmm_xmmm128.cpuid_features();
44596	/// assert_eq!(cpuid.len(), 1);
44597	/// assert_eq!(cpuid[0], CpuidFeature::AVX);
44598	///
44599	/// let cpuid = Code::EVEX_Vmovaps_xmm_k1z_xmmm128.cpuid_features();
44600	/// assert_eq!(cpuid.len(), 2);
44601	/// assert_eq!(cpuid[0], CpuidFeature::AVX512VL);
44602	/// assert_eq!(cpuid[1], CpuidFeature::AVX512F);
44603	/// ```
44604	#[must_use]
44605	#[inline]
44606	pub fn cpuid_features(self) -> &'static [CpuidFeature] {
44607		// SAFETY: The table is generated and only contains valid enum variants
44608		let index: CpuidFeatureInternal = unsafe {
44609			mem::transmute(
44610				((crate::info::info_table::TABLE[self as usize].1 >> InfoFlags2::CPUID_FEATURE_INTERNAL_SHIFT)
44611					& InfoFlags2::CPUID_FEATURE_INTERNAL_MASK) as u8,
44612			)
44613		};
44614		crate::info::cpuid_table::CPUID[index as usize]
44615	}
44616
44617	/// Gets control flow info
44618	///
44619	/// # Examples
44620	///
44621	/// ```
44622	/// use iced_x86::*;
44623	/// assert_eq!(Code::Or_r32_rm32.flow_control(), FlowControl::Next);
44624	/// assert_eq!(Code::Ud0_r64_rm64.flow_control(), FlowControl::Exception);
44625	/// assert_eq!(Code::Call_rm64.flow_control(), FlowControl::IndirectCall);
44626	/// ```
44627	#[must_use]
44628	#[inline]
44629	pub fn flow_control(self) -> FlowControl {
44630		// SAFETY: The table is generated and only contains valid enum variants
44631		unsafe {
44632			mem::transmute(
44633				((crate::info::info_table::TABLE[self as usize].1 >> InfoFlags2::FLOW_CONTROL_SHIFT) & InfoFlags2::FLOW_CONTROL_MASK)
44634					as FlowControlUnderlyingType,
44635			)
44636		}
44637	}
44638
44639	/// Checks if it's a privileged instruction (all CPL=0 instructions (except `VMCALL`) and IOPL instructions `IN`, `INS`, `OUT`, `OUTS`, `CLI`, `STI`)
44640	#[must_use]
44641	#[inline]
44642	pub fn is_privileged(self) -> bool {
44643		(crate::info::info_table::TABLE[self as usize].1 & InfoFlags2::PRIVILEGED) != 0
44644	}
44645
44646	/// Checks if this is an instruction that implicitly uses the stack pointer (`SP`/`ESP`/`RSP`), eg. `CALL`, `PUSH`, `POP`, `RET`, etc.
44647	/// See also [`Instruction::stack_pointer_increment()`]
44648	///
44649	/// [`Instruction::stack_pointer_increment()`]: struct.Instruction.html#method.stack_pointer_increment
44650	///
44651	/// # Examples
44652	///
44653	/// ```
44654	/// use iced_x86::*;
44655	/// assert!(!Code::Or_r32_rm32.is_stack_instruction());
44656	/// assert!(Code::Push_r64.is_stack_instruction());
44657	/// assert!(Code::Call_rm64.is_stack_instruction());
44658	/// ```
44659	#[must_use]
44660	#[inline]
44661	pub fn is_stack_instruction(self) -> bool {
44662		(crate::info::info_table::TABLE[self as usize].1 & InfoFlags2::STACK_INSTRUCTION) != 0
44663	}
44664
44665	/// Checks if it's an instruction that saves or restores too many registers (eg. `FXRSTOR`, `XSAVE`, etc).
44666	#[must_use]
44667	#[inline]
44668	pub fn is_save_restore_instruction(self) -> bool {
44669		(crate::info::info_table::TABLE[self as usize].1 & InfoFlags2::SAVE_RESTORE) != 0
44670	}
44671
44672	/// Checks if it's a `Jcc NEAR` instruction
44673	#[must_use]
44674	#[inline]
44675	pub const fn is_jcc_near(self) -> bool {
44676		(self as u32).wrapping_sub(Code::Jo_rel16 as u32) <= (Code::Jg_rel32_64 as u32 - Code::Jo_rel16 as u32)
44677	}
44678
44679	/// Checks if it's a `Jcc SHORT` instruction
44680	#[must_use]
44681	#[inline]
44682	pub const fn is_jcc_short(self) -> bool {
44683		(self as u32).wrapping_sub(Code::Jo_rel8_16 as u32) <= (Code::Jg_rel8_64 as u32 - Code::Jo_rel8_16 as u32)
44684	}
44685
44686	/// Checks if it's a `JMP SHORT` instruction
44687	#[must_use]
44688	#[inline]
44689	pub const fn is_jmp_short(self) -> bool {
44690		(self as u32).wrapping_sub(Code::Jmp_rel8_16 as u32) <= (Code::Jmp_rel8_64 as u32 - Code::Jmp_rel8_16 as u32)
44691	}
44692
44693	/// Checks if it's a `JMP NEAR` instruction
44694	#[must_use]
44695	#[inline]
44696	pub const fn is_jmp_near(self) -> bool {
44697		(self as u32).wrapping_sub(Code::Jmp_rel16 as u32) <= (Code::Jmp_rel32_64 as u32 - Code::Jmp_rel16 as u32)
44698	}
44699
44700	/// Checks if it's a `JMP SHORT` or a `JMP NEAR` instruction
44701	#[must_use]
44702	#[inline]
44703	pub const fn is_jmp_short_or_near(self) -> bool {
44704		(self as u32).wrapping_sub(Code::Jmp_rel8_16 as u32) <= (Code::Jmp_rel8_64 as u32 - Code::Jmp_rel8_16 as u32)
44705			|| (self as u32).wrapping_sub(Code::Jmp_rel16 as u32) <= (Code::Jmp_rel32_64 as u32 - Code::Jmp_rel16 as u32)
44706	}
44707
44708	/// Checks if it's a `JMP FAR` instruction
44709	#[must_use]
44710	#[inline]
44711	pub const fn is_jmp_far(self) -> bool {
44712		(self as u32).wrapping_sub(Code::Jmp_ptr1616 as u32) <= (Code::Jmp_ptr1632 as u32 - Code::Jmp_ptr1616 as u32)
44713	}
44714
44715	/// Checks if it's a `CALL NEAR` instruction
44716	#[must_use]
44717	#[inline]
44718	pub const fn is_call_near(self) -> bool {
44719		(self as u32).wrapping_sub(Code::Call_rel16 as u32) <= (Code::Call_rel32_64 as u32 - Code::Call_rel16 as u32)
44720	}
44721
44722	/// Checks if it's a `CALL FAR` instruction
44723	#[must_use]
44724	#[inline]
44725	pub const fn is_call_far(self) -> bool {
44726		(self as u32).wrapping_sub(Code::Call_ptr1616 as u32) <= (Code::Call_ptr1632 as u32 - Code::Call_ptr1616 as u32)
44727	}
44728
44729	/// Checks if it's a `JMP NEAR reg/[mem]` instruction
44730	#[must_use]
44731	#[inline]
44732	pub const fn is_jmp_near_indirect(self) -> bool {
44733		(self as u32).wrapping_sub(Code::Jmp_rm16 as u32) <= (Code::Jmp_rm64 as u32 - Code::Jmp_rm16 as u32)
44734	}
44735
44736	/// Checks if it's a `JMP FAR [mem]` instruction
44737	#[must_use]
44738	#[inline]
44739	pub const fn is_jmp_far_indirect(self) -> bool {
44740		(self as u32).wrapping_sub(Code::Jmp_m1616 as u32) <= (Code::Jmp_m1664 as u32 - Code::Jmp_m1616 as u32)
44741	}
44742
44743	/// Checks if it's a `CALL NEAR reg/[mem]` instruction
44744	#[must_use]
44745	#[inline]
44746	pub const fn is_call_near_indirect(self) -> bool {
44747		(self as u32).wrapping_sub(Code::Call_rm16 as u32) <= (Code::Call_rm64 as u32 - Code::Call_rm16 as u32)
44748	}
44749
44750	/// Checks if it's a `CALL FAR [mem]` instruction
44751	#[must_use]
44752	#[inline]
44753	pub const fn is_call_far_indirect(self) -> bool {
44754		(self as u32).wrapping_sub(Code::Call_m1616 as u32) <= (Code::Call_m1664 as u32 - Code::Call_m1616 as u32)
44755	}
44756
44757	/// Checks if it's a `JKccD SHORT` or `JKccD NEAR` instruction
44758	#[must_use]
44759	#[inline]
44760	#[cfg(feature = "mvex")]
44761	pub const fn is_jkcc_short_or_near(self) -> bool {
44762		matches!(
44763			self,
44764			Code::VEX_KNC_Jkzd_kr_rel8_64 | Code::VEX_KNC_Jknzd_kr_rel8_64 | Code::VEX_KNC_Jkzd_kr_rel32_64 | Code::VEX_KNC_Jknzd_kr_rel32_64
44765		)
44766	}
44767
44768	/// Checks if it's a `JKccD NEAR` instruction
44769	#[must_use]
44770	#[inline]
44771	#[cfg(feature = "mvex")]
44772	pub const fn is_jkcc_near(self) -> bool {
44773		matches!(self, Code::VEX_KNC_Jkzd_kr_rel32_64 | Code::VEX_KNC_Jknzd_kr_rel32_64)
44774	}
44775
44776	/// Checks if it's a `JKccD SHORT` instruction
44777	#[must_use]
44778	#[inline]
44779	#[cfg(feature = "mvex")]
44780	pub const fn is_jkcc_short(self) -> bool {
44781		matches!(self, Code::VEX_KNC_Jkzd_kr_rel8_64 | Code::VEX_KNC_Jknzd_kr_rel8_64)
44782	}
44783
44784	/// Gets the condition code if it's `Jcc`, `SETcc`, `CMOVcc`, `CMPccXADD`, `LOOPcc` else [`ConditionCode::None`] is returned
44785	///
44786	/// [`ConditionCode::None`]: enum.ConditionCode.html#variant.None
44787	///
44788	/// # Examples
44789	///
44790	/// ```
44791	/// use iced_x86::*;
44792	/// assert_eq!(Code::Jbe_rel8_64.condition_code(), ConditionCode::be);
44793	/// assert_eq!(Code::Cmovo_r64_rm64.condition_code(), ConditionCode::o);
44794	/// assert_eq!(Code::Setne_rm8.condition_code(), ConditionCode::ne);
44795	/// assert_eq!(Code::Pause.condition_code(), ConditionCode::None);
44796	/// ```
44797	#[must_use]
44798	#[allow(clippy::missing_inline_in_public_items)]
44799	pub fn condition_code(self) -> ConditionCode {
44800		let mut t;
44801
44802		// SAFETY: All valid input (all Code values) have been tested successfully, the transmutes are correct
44803
44804		t = (self as u32).wrapping_sub(Code::Jo_rel16 as u32);
44805		if t <= (Code::Jg_rel32_64 as u32 - Code::Jo_rel16 as u32) {
44806			return unsafe { mem::transmute(((t / 3) + ConditionCode::o as u32) as ConditionCodeUnderlyingType) };
44807		}
44808
44809		t = (self as u32).wrapping_sub(Code::Jo_rel8_16 as u32);
44810		if t <= (Code::Jg_rel8_64 as u32 - Code::Jo_rel8_16 as u32) {
44811			return unsafe { mem::transmute(((t / 3) + ConditionCode::o as u32) as ConditionCodeUnderlyingType) };
44812		}
44813
44814		t = (self as u32).wrapping_sub(Code::Cmovo_r16_rm16 as u32);
44815		if t <= (Code::Cmovg_r64_rm64 as u32 - Code::Cmovo_r16_rm16 as u32) {
44816			return unsafe { mem::transmute(((t / 3) + ConditionCode::o as u32) as ConditionCodeUnderlyingType) };
44817		}
44818
44819		t = (self as u32).wrapping_sub(Code::Seto_rm8 as u32);
44820		if t <= (Code::Setg_rm8 as u32 - Code::Seto_rm8 as u32) {
44821			return unsafe { mem::transmute((t + ConditionCode::o as u32) as ConditionCodeUnderlyingType) };
44822		}
44823
44824		t = (self as u32).wrapping_sub(Code::Loopne_rel8_16_CX as u32);
44825		if t <= (Code::Loopne_rel8_64_RCX as u32 - Code::Loopne_rel8_16_CX as u32) {
44826			return ConditionCode::ne;
44827		}
44828
44829		t = (self as u32).wrapping_sub(Code::Loope_rel8_16_CX as u32);
44830		if t <= (Code::Loope_rel8_64_RCX as u32 - Code::Loope_rel8_16_CX as u32) {
44831			return ConditionCode::e;
44832		}
44833
44834		t = (self as u32).wrapping_sub(Code::VEX_Cmpoxadd_m32_r32_r32 as u32);
44835		if t <= (Code::VEX_Cmpnlexadd_m64_r64_r64 as u32 - Code::VEX_Cmpoxadd_m32_r32_r32 as u32) {
44836			return unsafe { mem::transmute(((t / 2) + ConditionCode::o as u32) as ConditionCodeUnderlyingType) };
44837		}
44838
44839		#[cfg(feature = "mvex")]
44840		{
44841			match self {
44842				Code::VEX_KNC_Jkzd_kr_rel8_64 | Code::VEX_KNC_Jkzd_kr_rel32_64 => return ConditionCode::e,
44843				Code::VEX_KNC_Jknzd_kr_rel8_64 | Code::VEX_KNC_Jknzd_kr_rel32_64 => return ConditionCode::ne,
44844				_ => {}
44845			}
44846		}
44847
44848		ConditionCode::None
44849	}
44850
44851	/// `true` if this `Code` corresponds to a "string" operation, such as `MOVS`, `LODS`,
44852	/// `STOS`, etc.
44853	#[must_use]
44854	#[inline]
44855	#[allow(clippy::match_like_matches_macro)]
44856	pub const fn is_string_instruction(self) -> bool {
44857		#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
44858		match self {
44859			// GENERATOR-BEGIN: IsStringOpTable
44860			// ⚠️This was generated by GENERATOR!🦹‍♂️
44861			Code::Insb_m8_DX
44862			| Code::Insw_m16_DX
44863			| Code::Insd_m32_DX
44864			| Code::Outsb_DX_m8
44865			| Code::Outsw_DX_m16
44866			| Code::Outsd_DX_m32
44867			| Code::Movsb_m8_m8
44868			| Code::Movsw_m16_m16
44869			| Code::Movsd_m32_m32
44870			| Code::Movsq_m64_m64
44871			| Code::Cmpsb_m8_m8
44872			| Code::Cmpsw_m16_m16
44873			| Code::Cmpsd_m32_m32
44874			| Code::Cmpsq_m64_m64
44875			| Code::Stosb_m8_AL
44876			| Code::Stosw_m16_AX
44877			| Code::Stosd_m32_EAX
44878			| Code::Stosq_m64_RAX
44879			| Code::Lodsb_AL_m8
44880			| Code::Lodsw_AX_m16
44881			| Code::Lodsd_EAX_m32
44882			| Code::Lodsq_RAX_m64
44883			| Code::Scasb_AL_m8
44884			| Code::Scasw_AX_m16
44885			| Code::Scasd_EAX_m32
44886			| Code::Scasq_RAX_m64
44887			=> true,
44888			// GENERATOR-END: IsStringOpTable
44889			_ => false,
44890		}
44891	}
44892
44893	/// Checks if it's a `JCXZ SHORT`, `JECXZ SHORT` or `JRCXZ SHORT` instruction
44894	#[must_use]
44895	#[inline]
44896	pub const fn is_jcx_short(self) -> bool {
44897		(self as u32).wrapping_sub(Code::Jcxz_rel8_16 as u32) <= (Code::Jrcxz_rel8_64 as u32 - Code::Jcxz_rel8_16 as u32)
44898	}
44899
44900	/// Checks if it's a `LOOPcc SHORT` instruction
44901	#[must_use]
44902	#[inline]
44903	pub const fn is_loopcc(self) -> bool {
44904		(self as u32).wrapping_sub(Code::Loopne_rel8_16_CX as u32) <= (Code::Loope_rel8_64_RCX as u32 - Code::Loopne_rel8_16_CX as u32)
44905	}
44906
44907	/// Checks if it's a `LOOP SHORT` instruction
44908	#[must_use]
44909	#[inline]
44910	pub const fn is_loop(self) -> bool {
44911		(self as u32).wrapping_sub(Code::Loop_rel8_16_CX as u32) <= (Code::Loop_rel8_64_RCX as u32 - Code::Loop_rel8_16_CX as u32)
44912	}
44913}
44914
44915#[cfg(any(feature = "instr_info", feature = "fast_fmt"))]
44916impl Code {
44917	/// Checks if it's a `Jcc SHORT` or `Jcc NEAR` instruction
44918	#[must_use]
44919	#[inline]
44920	pub const fn is_jcc_short_or_near(self) -> bool {
44921		(self as u32).wrapping_sub(Code::Jo_rel8_16 as u32) <= (Code::Jg_rel8_64 as u32 - Code::Jo_rel8_16 as u32)
44922			|| (self as u32).wrapping_sub(Code::Jo_rel16 as u32) <= (Code::Jg_rel32_64 as u32 - Code::Jo_rel16 as u32)
44923	}
44924}
44925
44926#[cfg(any(feature = "instr_info", feature = "encoder"))]
44927impl Code {
44928	/// Negates the condition code, eg. `JE` -> `JNE`. Can be used if it's `Jcc`, `SETcc`, `CMOVcc`, `CMPccXADD`, `LOOPcc`
44929	/// and returns the original value if it's none of those instructions.
44930	///
44931	/// # Examples
44932	///
44933	/// ```
44934	/// use iced_x86::*;
44935	/// assert_eq!(Code::Setbe_rm8.negate_condition_code(), Code::Seta_rm8);
44936	/// assert_eq!(Code::Seta_rm8.negate_condition_code(), Code::Setbe_rm8);
44937	/// ```
44938	#[must_use]
44939	#[allow(clippy::missing_inline_in_public_items)]
44940	pub fn negate_condition_code(self) -> Self {
44941		let mut t;
44942
44943		// SAFETY: All valid input (all Code values) have been tested successfully, the transmutes are correct
44944
44945		t = (self as u32).wrapping_sub(Code::Jo_rel16 as u32);
44946		if t <= (Code::Jg_rel32_64 as u32 - Code::Jo_rel16 as u32) {
44947			// They're ordered, eg. je_16, je_32, je_64, jne_16, jne_32, jne_64
44948			// if low 3, add 3, else if high 3, subtract 3.
44949			if ((t / 3) & 1) != 0 {
44950				return unsafe { mem::transmute(self as CodeUnderlyingType - 3) };
44951			}
44952			return unsafe { mem::transmute(self as CodeUnderlyingType + 3) };
44953		}
44954
44955		t = (self as u32).wrapping_sub(Code::Jo_rel8_16 as u32);
44956		if t <= (Code::Jg_rel8_64 as u32 - Code::Jo_rel8_16 as u32) {
44957			if ((t / 3) & 1) != 0 {
44958				return unsafe { mem::transmute(self as CodeUnderlyingType - 3) };
44959			}
44960			return unsafe { mem::transmute(self as CodeUnderlyingType + 3) };
44961		}
44962
44963		t = (self as u32).wrapping_sub(Code::Cmovo_r16_rm16 as u32);
44964		if t <= (Code::Cmovg_r64_rm64 as u32 - Code::Cmovo_r16_rm16 as u32) {
44965			if ((t / 3) & 1) != 0 {
44966				return unsafe { mem::transmute(self as CodeUnderlyingType - 3) };
44967			}
44968			return unsafe { mem::transmute(self as CodeUnderlyingType + 3) };
44969		}
44970
44971		t = (self as u32).wrapping_sub(Code::Seto_rm8 as u32);
44972		if t <= (Code::Setg_rm8 as u32 - Code::Seto_rm8 as u32) {
44973			return unsafe { mem::transmute(((t ^ 1) + Code::Seto_rm8 as u32) as CodeUnderlyingType) };
44974		}
44975
44976		const _: () = assert!(Code::Loopne_rel8_16_CX as u32 + 7 == Code::Loope_rel8_16_CX as u32);
44977		t = (self as u32).wrapping_sub(Code::Loopne_rel8_16_CX as u32);
44978		if t <= (Code::Loope_rel8_64_RCX as u32 - Code::Loopne_rel8_16_CX as u32) {
44979			return unsafe { mem::transmute((Code::Loopne_rel8_16_CX as u32 + (t + 7) % 14) as CodeUnderlyingType) };
44980		}
44981
44982		t = (self as u32).wrapping_sub(Code::VEX_Cmpoxadd_m32_r32_r32 as u32);
44983		if t <= (Code::VEX_Cmpnlexadd_m64_r64_r64 as u32 - Code::VEX_Cmpoxadd_m32_r32_r32 as u32) {
44984			if (t & 2) != 0 {
44985				return unsafe { mem::transmute(self as CodeUnderlyingType - 2) };
44986			}
44987			return unsafe { mem::transmute(self as CodeUnderlyingType + 2) };
44988		}
44989
44990		#[cfg(feature = "mvex")]
44991		{
44992			match self {
44993				Code::VEX_KNC_Jkzd_kr_rel8_64 => return Code::VEX_KNC_Jknzd_kr_rel8_64,
44994				Code::VEX_KNC_Jknzd_kr_rel8_64 => return Code::VEX_KNC_Jkzd_kr_rel8_64,
44995				Code::VEX_KNC_Jkzd_kr_rel32_64 => return Code::VEX_KNC_Jknzd_kr_rel32_64,
44996				Code::VEX_KNC_Jknzd_kr_rel32_64 => return Code::VEX_KNC_Jkzd_kr_rel32_64,
44997				_ => {}
44998			}
44999		}
45000
45001		self
45002	}
45003
45004	/// Converts `Jcc/JMP NEAR` to `Jcc/JMP SHORT`. Returns the input if it's not a `Jcc/JMP NEAR` instruction.
45005	///
45006	/// # Examples
45007	///
45008	/// ```
45009	/// use iced_x86::*;
45010	/// assert_eq!(Code::Jbe_rel32_64.as_short_branch(), Code::Jbe_rel8_64);
45011	/// assert_eq!(Code::Jbe_rel8_64.as_short_branch(), Code::Jbe_rel8_64);
45012	/// assert_eq!(Code::Pause.as_short_branch(), Code::Pause);
45013	/// ```
45014	#[must_use]
45015	#[allow(clippy::missing_inline_in_public_items)]
45016	pub fn as_short_branch(self) -> Self {
45017		let mut t;
45018
45019		// SAFETY: All valid input (all Code values) have been tested successfully, the transmutes are correct
45020
45021		t = (self as u32).wrapping_sub(Code::Jo_rel16 as u32);
45022		if t <= (Code::Jg_rel32_64 as u32 - Code::Jo_rel16 as u32) {
45023			return unsafe { mem::transmute((t + Code::Jo_rel8_16 as u32) as CodeUnderlyingType) };
45024		}
45025
45026		t = (self as u32).wrapping_sub(Code::Jmp_rel16 as u32);
45027		if t <= (Code::Jmp_rel32_64 as u32 - Code::Jmp_rel16 as u32) {
45028			return unsafe { mem::transmute((t + Code::Jmp_rel8_16 as u32) as CodeUnderlyingType) };
45029		}
45030
45031		#[cfg(feature = "mvex")]
45032		{
45033			match self {
45034				Code::VEX_KNC_Jkzd_kr_rel32_64 => return Code::VEX_KNC_Jkzd_kr_rel8_64,
45035				Code::VEX_KNC_Jknzd_kr_rel32_64 => return Code::VEX_KNC_Jknzd_kr_rel8_64,
45036				_ => {}
45037			}
45038		}
45039
45040		self
45041	}
45042
45043	/// Converts `Jcc/JMP SHORT` to `Jcc/JMP NEAR`. Returns the input if it's not a `Jcc/JMP SHORT` instruction.
45044	///
45045	/// # Examples
45046	///
45047	/// ```
45048	/// use iced_x86::*;
45049	/// assert_eq!(Code::Jbe_rel8_64.as_near_branch(), Code::Jbe_rel32_64);
45050	/// assert_eq!(Code::Jbe_rel32_64.as_near_branch(), Code::Jbe_rel32_64);
45051	/// assert_eq!(Code::Pause.as_near_branch(), Code::Pause);
45052	/// ```
45053	#[must_use]
45054	#[allow(clippy::missing_inline_in_public_items)]
45055	pub fn as_near_branch(self) -> Self {
45056		let mut t;
45057
45058		// SAFETY: All valid input (all Code values) have been tested successfully, the transmutes are correct
45059
45060		t = (self as u32).wrapping_sub(Code::Jo_rel8_16 as u32);
45061		if t <= (Code::Jg_rel8_64 as u32 - Code::Jo_rel8_16 as u32) {
45062			return unsafe { mem::transmute((t + Code::Jo_rel16 as u32) as CodeUnderlyingType) };
45063		}
45064
45065		t = (self as u32).wrapping_sub(Code::Jmp_rel8_16 as u32);
45066		if t <= (Code::Jmp_rel8_64 as u32 - Code::Jmp_rel8_16 as u32) {
45067			return unsafe { mem::transmute((t + Code::Jmp_rel16 as u32) as CodeUnderlyingType) };
45068		}
45069
45070		#[cfg(feature = "mvex")]
45071		{
45072			match self {
45073				Code::VEX_KNC_Jkzd_kr_rel8_64 => return Code::VEX_KNC_Jkzd_kr_rel32_64,
45074				Code::VEX_KNC_Jknzd_kr_rel8_64 => return Code::VEX_KNC_Jknzd_kr_rel32_64,
45075				_ => {}
45076			}
45077		}
45078
45079		self
45080	}
45081}
45082
45083impl Code {
45084	#[must_use]
45085	#[allow(clippy::match_like_matches_macro)]
45086	pub(crate) const fn ignores_segment(self) -> bool {
45087		#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
45088		match self {
45089			// GENERATOR-BEGIN: IgnoresSegmentTable
45090			// ⚠️This was generated by GENERATOR!🦹‍♂️
45091			Code::Lea_r16_m
45092			| Code::Lea_r32_m
45093			| Code::Lea_r64_m
45094			| Code::Bndcl_bnd_rm32
45095			| Code::Bndcl_bnd_rm64
45096			| Code::Bndcu_bnd_rm32
45097			| Code::Bndcu_bnd_rm64
45098			| Code::Bndmk_bnd_m32
45099			| Code::Bndmk_bnd_m64
45100			| Code::Bndcn_bnd_rm32
45101			| Code::Bndcn_bnd_rm64
45102			=> true,
45103			// GENERATOR-END: IgnoresSegmentTable
45104			_ => false,
45105		}
45106	}
45107
45108	#[must_use]
45109	#[inline]
45110	#[allow(clippy::match_like_matches_macro)]
45111	pub(crate) const fn ignores_index(self) -> bool {
45112		#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
45113		match self {
45114			// GENERATOR-BEGIN: IgnoresIndexTable
45115			// ⚠️This was generated by GENERATOR!🦹‍♂️
45116			Code::Bndldx_bnd_mib
45117			| Code::Bndstx_mib_bnd
45118			=> true,
45119			// GENERATOR-END: IgnoresIndexTable
45120			_ => false,
45121		}
45122	}
45123
45124	#[must_use]
45125	#[inline]
45126	pub(crate) const fn is_tile_stride_index(self) -> bool {
45127		#[cfg_attr(feature = "cargo-fmt", rustfmt::skip)]
45128		match self {
45129			// GENERATOR-BEGIN: TileStrideIndexTable
45130			// ⚠️This was generated by GENERATOR!🦹‍♂️
45131			#[cfg(not(feature = "no_vex"))]
45132			Code::VEX_Tileloaddt1_tmm_sibmem
45133			| Code::VEX_Tilestored_sibmem_tmm
45134			| Code::VEX_Tileloadd_tmm_sibmem
45135			=> true,
45136			// GENERATOR-END: TileStrideIndexTable
45137			_ => false,
45138		}
45139	}
45140}
iced_x86/code.rs

iced_x86/
code.rs
