py32_metapac::adc

Module regs

Structsยง

  • desc CCSR.
  • control register 1
  • control register 2
  • regular data register
  • watchdog higher threshold register
  • injected data register x
  • injected channel data offset register x
  • desc JSQR.
  • watchdog lower threshold register
  • sample time register 1
  • desc SMPR2.
  • desc SMPR2.
  • regular sequence register 1
  • regular sequence register 2
  • regular sequence register 3
  • status register