[−][src]Struct raw_cpuid::ThermalPowerInfo
Implementations
impl ThermalPowerInfo
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pub fn dts_irq_threshold(&self) -> u8
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Number of Interrupt Thresholds in Digital Thermal Sensor
pub fn has_dts(&self) -> bool
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Digital temperature sensor is supported if set.
pub fn has_turbo_boost(&self) -> bool
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Intel Turbo Boost Technology Available (see description of IA32_MISC_ENABLE[38]).
pub fn has_arat(&self) -> bool
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ARAT. APIC-Timer-always-running feature is supported if set.
pub fn has_pln(&self) -> bool
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PLN. Power limit notification controls are supported if set.
pub fn has_ecmd(&self) -> bool
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ECMD. Clock modulation duty cycle extension is supported if set.
pub fn has_ptm(&self) -> bool
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PTM. Package thermal management is supported if set.
pub fn has_hwp(&self) -> bool
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HWP. HWP base registers (IA32_PM_ENABLE[bit 0], IA32_HWP_CAPABILITIES, IA32_HWP_REQUEST, IA32_HWP_STATUS) are supported if set.
pub fn has_hwp_notification(&self) -> bool
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HWP Notification. IA32_HWP_INTERRUPT MSR is supported if set.
pub fn has_hwp_activity_window(&self) -> bool
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HWP Activity Window. IA32_HWP_REQUEST[bits 41:32] is supported if set.
pub fn has_hwp_energy_performance_preference(&self) -> bool
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HWP Energy Performance Preference. IA32_HWP_REQUEST[bits 31:24] is supported if set.
pub fn has_hwp_package_level_request(&self) -> bool
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HWP Package Level Request. IA32_HWP_REQUEST_PKG MSR is supported if set.
pub fn has_hdc(&self) -> bool
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HDC. HDC base registers IA32_PKG_HDC_CTL, IA32_PM_CTL1, IA32_THREAD_STALL MSRs are supported if set.
pub fn has_turbo_boost3(&self) -> bool
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Intel® Turbo Boost Max Technology 3.0 available.
pub fn has_hwp_capabilities(&self) -> bool
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HWP Capabilities. Highest Performance change is supported if set.
pub fn has_hwp_peci_override(&self) -> bool
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HWP PECI override is supported if set.
pub fn has_flexible_hwp(&self) -> bool
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Flexible HWP is supported if set.
pub fn has_hwp_fast_access_mode(&self) -> bool
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Fast access mode for the IA32_HWP_REQUEST MSR is supported if set.
pub fn has_ignore_idle_processor_hwp_request(&self) -> bool
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Ignoring Idle Logical Processor HWP request is supported if set.
pub fn has_hw_coord_feedback(&self) -> bool
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Hardware Coordination Feedback Capability (Presence of IA32_MPERF and IA32_APERF). The capability to provide a measure of delivered processor performance (since last reset of the counters), as a percentage of expected processor performance at frequency specified in CPUID Brand String Bits 02 - 01
pub fn has_energy_bias_pref(&self) -> bool
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The processor supports performance-energy bias preference if CPUID.06H:ECX.SETBH[bit 3] is set and it also implies the presence of a new architectural MSR called IA32_ENERGY_PERF_BIAS (1B0H)
Trait Implementations
impl Debug for ThermalPowerInfo
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impl Default for ThermalPowerInfo
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fn default() -> ThermalPowerInfo
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Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,