pub unsafe trait CoreInterruptNumber: InterruptNumber { }Expand description
Marker trait for enums of target-specific core interrupt numbers.
Core interrupts are interrupts are retrieved from the mcause CSR. Usually, vectored mode is
only available for core interrupts. The riscv crate provides a default implementation for
the RISC-V ISA. However, a PAC may override the default implementation if the target has a
different interrupt numbering scheme (e.g., ESP32C3).
§Safety
Each enum variant must represent a valid core interrupt number read from the mcause CSR.
Dyn Compatibility§
This trait is not dyn compatible.
In older versions of Rust, dyn compatibility was called "object safety", so this trait is not object safe.