1#![deny(missing_docs)]
27#![cfg_attr(not(feature = "std"), no_std)]
28
29#[cfg(feature = "std")]
30extern crate std as alloc;
31
32#[cfg(not(feature = "std"))]
33extern crate alloc;
34
35#[macro_export]
123macro_rules! for_each_operator {
124 ($mac:ident) => {
125 $mac! {
126 @mvp Unreachable => visit_unreachable
127 @mvp Nop => visit_nop
128 @mvp Block { blockty: $crate::BlockType } => visit_block
129 @mvp Loop { blockty: $crate::BlockType } => visit_loop
130 @mvp If { blockty: $crate::BlockType } => visit_if
131 @mvp Else => visit_else
132 @exceptions Try { blockty: $crate::BlockType } => visit_try
133 @exceptions Catch { tag_index: u32 } => visit_catch
134 @exceptions Throw { tag_index: u32 } => visit_throw
135 @exceptions Rethrow { relative_depth: u32 } => visit_rethrow
136 @mvp End => visit_end
137 @mvp Br { relative_depth: u32 } => visit_br
138 @mvp BrIf { relative_depth: u32 } => visit_br_if
139 @mvp BrTable { targets: $crate::BrTable<'a> } => visit_br_table
140 @mvp Return => visit_return
141 @mvp Call { function_index: u32 } => visit_call
142 @mvp CallIndirect { type_index: u32, table_index: u32, table_byte: u8 } => visit_call_indirect
143 @tail_call ReturnCall { function_index: u32 } => visit_return_call
144 @tail_call ReturnCallIndirect { type_index: u32, table_index: u32 } => visit_return_call_indirect
145 @exceptions Delegate { relative_depth: u32 } => visit_delegate
146 @exceptions CatchAll => visit_catch_all
147 @mvp Drop => visit_drop
148 @mvp Select => visit_select
149 @reference_types TypedSelect { ty: $crate::ValType } => visit_typed_select
150 @mvp LocalGet { local_index: u32 } => visit_local_get
151 @mvp LocalSet { local_index: u32 } => visit_local_set
152 @mvp LocalTee { local_index: u32 } => visit_local_tee
153 @mvp GlobalGet { global_index: u32 } => visit_global_get
154 @mvp GlobalSet { global_index: u32 } => visit_global_set
155 @mvp I32Load { memarg: $crate::MemArg } => visit_i32_load
156 @mvp I64Load { memarg: $crate::MemArg } => visit_i64_load
157 @mvp F32Load { memarg: $crate::MemArg } => visit_f32_load
158 @mvp F64Load { memarg: $crate::MemArg } => visit_f64_load
159 @mvp I32Load8S { memarg: $crate::MemArg } => visit_i32_load8_s
160 @mvp I32Load8U { memarg: $crate::MemArg } => visit_i32_load8_u
161 @mvp I32Load16S { memarg: $crate::MemArg } => visit_i32_load16_s
162 @mvp I32Load16U { memarg: $crate::MemArg } => visit_i32_load16_u
163 @mvp I64Load8S { memarg: $crate::MemArg } => visit_i64_load8_s
164 @mvp I64Load8U { memarg: $crate::MemArg } => visit_i64_load8_u
165 @mvp I64Load16S { memarg: $crate::MemArg } => visit_i64_load16_s
166 @mvp I64Load16U { memarg: $crate::MemArg } => visit_i64_load16_u
167 @mvp I64Load32S { memarg: $crate::MemArg } => visit_i64_load32_s
168 @mvp I64Load32U { memarg: $crate::MemArg } => visit_i64_load32_u
169 @mvp I32Store { memarg: $crate::MemArg } => visit_i32_store
170 @mvp I64Store { memarg: $crate::MemArg } => visit_i64_store
171 @mvp F32Store { memarg: $crate::MemArg } => visit_f32_store
172 @mvp F64Store { memarg: $crate::MemArg } => visit_f64_store
173 @mvp I32Store8 { memarg: $crate::MemArg } => visit_i32_store8
174 @mvp I32Store16 { memarg: $crate::MemArg } => visit_i32_store16
175 @mvp I64Store8 { memarg: $crate::MemArg } => visit_i64_store8
176 @mvp I64Store16 { memarg: $crate::MemArg } => visit_i64_store16
177 @mvp I64Store32 { memarg: $crate::MemArg } => visit_i64_store32
178 @mvp MemorySize { mem: u32, mem_byte: u8 } => visit_memory_size
179 @mvp MemoryGrow { mem: u32, mem_byte: u8 } => visit_memory_grow
180 @mvp I32Const { value: i32 } => visit_i32_const
181 @mvp I64Const { value: i64 } => visit_i64_const
182 @mvp F32Const { value: $crate::Ieee32 } => visit_f32_const
183 @mvp F64Const { value: $crate::Ieee64 } => visit_f64_const
184 @reference_types RefNull { ty: $crate::ValType } => visit_ref_null
185 @reference_types RefIsNull => visit_ref_is_null
186 @reference_types RefFunc { function_index: u32 } => visit_ref_func
187 @mvp I32Eqz => visit_i32_eqz
188 @mvp I32Eq => visit_i32_eq
189 @mvp I32Ne => visit_i32_ne
190 @mvp I32LtS => visit_i32_lt_s
191 @mvp I32LtU => visit_i32_lt_u
192 @mvp I32GtS => visit_i32_gt_s
193 @mvp I32GtU => visit_i32_gt_u
194 @mvp I32LeS => visit_i32_le_s
195 @mvp I32LeU => visit_i32_le_u
196 @mvp I32GeS => visit_i32_ge_s
197 @mvp I32GeU => visit_i32_ge_u
198 @mvp I64Eqz => visit_i64_eqz
199 @mvp I64Eq => visit_i64_eq
200 @mvp I64Ne => visit_i64_ne
201 @mvp I64LtS => visit_i64_lt_s
202 @mvp I64LtU => visit_i64_lt_u
203 @mvp I64GtS => visit_i64_gt_s
204 @mvp I64GtU => visit_i64_gt_u
205 @mvp I64LeS => visit_i64_le_s
206 @mvp I64LeU => visit_i64_le_u
207 @mvp I64GeS => visit_i64_ge_s
208 @mvp I64GeU => visit_i64_ge_u
209 @mvp F32Eq => visit_f32_eq
210 @mvp F32Ne => visit_f32_ne
211 @mvp F32Lt => visit_f32_lt
212 @mvp F32Gt => visit_f32_gt
213 @mvp F32Le => visit_f32_le
214 @mvp F32Ge => visit_f32_ge
215 @mvp F64Eq => visit_f64_eq
216 @mvp F64Ne => visit_f64_ne
217 @mvp F64Lt => visit_f64_lt
218 @mvp F64Gt => visit_f64_gt
219 @mvp F64Le => visit_f64_le
220 @mvp F64Ge => visit_f64_ge
221 @mvp I32Clz => visit_i32_clz
222 @mvp I32Ctz => visit_i32_ctz
223 @mvp I32Popcnt => visit_i32_popcnt
224 @mvp I32Add => visit_i32_add
225 @mvp I32Sub => visit_i32_sub
226 @mvp I32Mul => visit_i32_mul
227 @mvp I32DivS => visit_i32_div_s
228 @mvp I32DivU => visit_i32_div_u
229 @mvp I32RemS => visit_i32_rem_s
230 @mvp I32RemU => visit_i32_rem_u
231 @mvp I32And => visit_i32_and
232 @mvp I32Or => visit_i32_or
233 @mvp I32Xor => visit_i32_xor
234 @mvp I32Shl => visit_i32_shl
235 @mvp I32ShrS => visit_i32_shr_s
236 @mvp I32ShrU => visit_i32_shr_u
237 @mvp I32Rotl => visit_i32_rotl
238 @mvp I32Rotr => visit_i32_rotr
239 @mvp I64Clz => visit_i64_clz
240 @mvp I64Ctz => visit_i64_ctz
241 @mvp I64Popcnt => visit_i64_popcnt
242 @mvp I64Add => visit_i64_add
243 @mvp I64Sub => visit_i64_sub
244 @mvp I64Mul => visit_i64_mul
245 @mvp I64DivS => visit_i64_div_s
246 @mvp I64DivU => visit_i64_div_u
247 @mvp I64RemS => visit_i64_rem_s
248 @mvp I64RemU => visit_i64_rem_u
249 @mvp I64And => visit_i64_and
250 @mvp I64Or => visit_i64_or
251 @mvp I64Xor => visit_i64_xor
252 @mvp I64Shl => visit_i64_shl
253 @mvp I64ShrS => visit_i64_shr_s
254 @mvp I64ShrU => visit_i64_shr_u
255 @mvp I64Rotl => visit_i64_rotl
256 @mvp I64Rotr => visit_i64_rotr
257 @mvp F32Abs => visit_f32_abs
258 @mvp F32Neg => visit_f32_neg
259 @mvp F32Ceil => visit_f32_ceil
260 @mvp F32Floor => visit_f32_floor
261 @mvp F32Trunc => visit_f32_trunc
262 @mvp F32Nearest => visit_f32_nearest
263 @mvp F32Sqrt => visit_f32_sqrt
264 @mvp F32Add => visit_f32_add
265 @mvp F32Sub => visit_f32_sub
266 @mvp F32Mul => visit_f32_mul
267 @mvp F32Div => visit_f32_div
268 @mvp F32Min => visit_f32_min
269 @mvp F32Max => visit_f32_max
270 @mvp F32Copysign => visit_f32_copysign
271 @mvp F64Abs => visit_f64_abs
272 @mvp F64Neg => visit_f64_neg
273 @mvp F64Ceil => visit_f64_ceil
274 @mvp F64Floor => visit_f64_floor
275 @mvp F64Trunc => visit_f64_trunc
276 @mvp F64Nearest => visit_f64_nearest
277 @mvp F64Sqrt => visit_f64_sqrt
278 @mvp F64Add => visit_f64_add
279 @mvp F64Sub => visit_f64_sub
280 @mvp F64Mul => visit_f64_mul
281 @mvp F64Div => visit_f64_div
282 @mvp F64Min => visit_f64_min
283 @mvp F64Max => visit_f64_max
284 @mvp F64Copysign => visit_f64_copysign
285 @mvp I32WrapI64 => visit_i32_wrap_i64
286 @mvp I32TruncF32S => visit_i32_trunc_f32_s
287 @mvp I32TruncF32U => visit_i32_trunc_f32_u
288 @mvp I32TruncF64S => visit_i32_trunc_f64_s
289 @mvp I32TruncF64U => visit_i32_trunc_f64_u
290 @mvp I64ExtendI32S => visit_i64_extend_i32_s
291 @mvp I64ExtendI32U => visit_i64_extend_i32_u
292 @mvp I64TruncF32S => visit_i64_trunc_f32_s
293 @mvp I64TruncF32U => visit_i64_trunc_f32_u
294 @mvp I64TruncF64S => visit_i64_trunc_f64_s
295 @mvp I64TruncF64U => visit_i64_trunc_f64_u
296 @mvp F32ConvertI32S => visit_f32_convert_i32_s
297 @mvp F32ConvertI32U => visit_f32_convert_i32_u
298 @mvp F32ConvertI64S => visit_f32_convert_i64_s
299 @mvp F32ConvertI64U => visit_f32_convert_i64_u
300 @mvp F32DemoteF64 => visit_f32_demote_f64
301 @mvp F64ConvertI32S => visit_f64_convert_i32_s
302 @mvp F64ConvertI32U => visit_f64_convert_i32_u
303 @mvp F64ConvertI64S => visit_f64_convert_i64_s
304 @mvp F64ConvertI64U => visit_f64_convert_i64_u
305 @mvp F64PromoteF32 => visit_f64_promote_f32
306 @mvp I32ReinterpretF32 => visit_i32_reinterpret_f32
307 @mvp I64ReinterpretF64 => visit_i64_reinterpret_f64
308 @mvp F32ReinterpretI32 => visit_f32_reinterpret_i32
309 @mvp F64ReinterpretI64 => visit_f64_reinterpret_i64
310 @sign_extension I32Extend8S => visit_i32_extend8_s
311 @sign_extension I32Extend16S => visit_i32_extend16_s
312 @sign_extension I64Extend8S => visit_i64_extend8_s
313 @sign_extension I64Extend16S => visit_i64_extend16_s
314 @sign_extension I64Extend32S => visit_i64_extend32_s
315
316 @saturating_float_to_int I32TruncSatF32S => visit_i32_trunc_sat_f32_s
320 @saturating_float_to_int I32TruncSatF32U => visit_i32_trunc_sat_f32_u
321 @saturating_float_to_int I32TruncSatF64S => visit_i32_trunc_sat_f64_s
322 @saturating_float_to_int I32TruncSatF64U => visit_i32_trunc_sat_f64_u
323 @saturating_float_to_int I64TruncSatF32S => visit_i64_trunc_sat_f32_s
324 @saturating_float_to_int I64TruncSatF32U => visit_i64_trunc_sat_f32_u
325 @saturating_float_to_int I64TruncSatF64S => visit_i64_trunc_sat_f64_s
326 @saturating_float_to_int I64TruncSatF64U => visit_i64_trunc_sat_f64_u
327
328 @bulk_memory MemoryInit { data_index: u32, mem: u32 } => visit_memory_init
332 @bulk_memory DataDrop { data_index: u32 } => visit_data_drop
333 @bulk_memory MemoryCopy { dst_mem: u32, src_mem: u32 } => visit_memory_copy
334 @bulk_memory MemoryFill { mem: u32 } => visit_memory_fill
335 @bulk_memory TableInit { elem_index: u32, table: u32 } => visit_table_init
336 @bulk_memory ElemDrop { elem_index: u32 } => visit_elem_drop
337 @bulk_memory TableCopy { dst_table: u32, src_table: u32 } => visit_table_copy
338
339 @reference_types TableFill { table: u32 } => visit_table_fill
343 @reference_types TableGet { table: u32 } => visit_table_get
344 @reference_types TableSet { table: u32 } => visit_table_set
345 @reference_types TableGrow { table: u32 } => visit_table_grow
346 @reference_types TableSize { table: u32 } => visit_table_size
347
348 @memory_control MemoryDiscard { mem: u32 } => visit_memory_discard
352
353 @threads MemoryAtomicNotify { memarg: $crate::MemArg } => visit_memory_atomic_notify
357 @threads MemoryAtomicWait32 { memarg: $crate::MemArg } => visit_memory_atomic_wait32
358 @threads MemoryAtomicWait64 { memarg: $crate::MemArg } => visit_memory_atomic_wait64
359 @threads AtomicFence => visit_atomic_fence
360 @threads I32AtomicLoad { memarg: $crate::MemArg } => visit_i32_atomic_load
361 @threads I64AtomicLoad { memarg: $crate::MemArg } => visit_i64_atomic_load
362 @threads I32AtomicLoad8U { memarg: $crate::MemArg } => visit_i32_atomic_load8_u
363 @threads I32AtomicLoad16U { memarg: $crate::MemArg } => visit_i32_atomic_load16_u
364 @threads I64AtomicLoad8U { memarg: $crate::MemArg } => visit_i64_atomic_load8_u
365 @threads I64AtomicLoad16U { memarg: $crate::MemArg } => visit_i64_atomic_load16_u
366 @threads I64AtomicLoad32U { memarg: $crate::MemArg } => visit_i64_atomic_load32_u
367 @threads I32AtomicStore { memarg: $crate::MemArg } => visit_i32_atomic_store
368 @threads I64AtomicStore { memarg: $crate::MemArg } => visit_i64_atomic_store
369 @threads I32AtomicStore8 { memarg: $crate::MemArg } => visit_i32_atomic_store8
370 @threads I32AtomicStore16 { memarg: $crate::MemArg } => visit_i32_atomic_store16
371 @threads I64AtomicStore8 { memarg: $crate::MemArg } => visit_i64_atomic_store8
372 @threads I64AtomicStore16 { memarg: $crate::MemArg } => visit_i64_atomic_store16
373 @threads I64AtomicStore32 { memarg: $crate::MemArg } => visit_i64_atomic_store32
374 @threads I32AtomicRmwAdd { memarg: $crate::MemArg } => visit_i32_atomic_rmw_add
375 @threads I64AtomicRmwAdd { memarg: $crate::MemArg } => visit_i64_atomic_rmw_add
376 @threads I32AtomicRmw8AddU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_add_u
377 @threads I32AtomicRmw16AddU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_add_u
378 @threads I64AtomicRmw8AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_add_u
379 @threads I64AtomicRmw16AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_add_u
380 @threads I64AtomicRmw32AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_add_u
381 @threads I32AtomicRmwSub { memarg: $crate::MemArg } => visit_i32_atomic_rmw_sub
382 @threads I64AtomicRmwSub { memarg: $crate::MemArg } => visit_i64_atomic_rmw_sub
383 @threads I32AtomicRmw8SubU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_sub_u
384 @threads I32AtomicRmw16SubU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_sub_u
385 @threads I64AtomicRmw8SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_sub_u
386 @threads I64AtomicRmw16SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_sub_u
387 @threads I64AtomicRmw32SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_sub_u
388 @threads I32AtomicRmwAnd { memarg: $crate::MemArg } => visit_i32_atomic_rmw_and
389 @threads I64AtomicRmwAnd { memarg: $crate::MemArg } => visit_i64_atomic_rmw_and
390 @threads I32AtomicRmw8AndU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_and_u
391 @threads I32AtomicRmw16AndU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_and_u
392 @threads I64AtomicRmw8AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_and_u
393 @threads I64AtomicRmw16AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_and_u
394 @threads I64AtomicRmw32AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_and_u
395 @threads I32AtomicRmwOr { memarg: $crate::MemArg } => visit_i32_atomic_rmw_or
396 @threads I64AtomicRmwOr { memarg: $crate::MemArg } => visit_i64_atomic_rmw_or
397 @threads I32AtomicRmw8OrU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_or_u
398 @threads I32AtomicRmw16OrU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_or_u
399 @threads I64AtomicRmw8OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_or_u
400 @threads I64AtomicRmw16OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_or_u
401 @threads I64AtomicRmw32OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_or_u
402 @threads I32AtomicRmwXor { memarg: $crate::MemArg } => visit_i32_atomic_rmw_xor
403 @threads I64AtomicRmwXor { memarg: $crate::MemArg } => visit_i64_atomic_rmw_xor
404 @threads I32AtomicRmw8XorU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_xor_u
405 @threads I32AtomicRmw16XorU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_xor_u
406 @threads I64AtomicRmw8XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_xor_u
407 @threads I64AtomicRmw16XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_xor_u
408 @threads I64AtomicRmw32XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_xor_u
409 @threads I32AtomicRmwXchg { memarg: $crate::MemArg } => visit_i32_atomic_rmw_xchg
410 @threads I64AtomicRmwXchg { memarg: $crate::MemArg } => visit_i64_atomic_rmw_xchg
411 @threads I32AtomicRmw8XchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_xchg_u
412 @threads I32AtomicRmw16XchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_xchg_u
413 @threads I64AtomicRmw8XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_xchg_u
414 @threads I64AtomicRmw16XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_xchg_u
415 @threads I64AtomicRmw32XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_xchg_u
416 @threads I32AtomicRmwCmpxchg { memarg: $crate::MemArg } => visit_i32_atomic_rmw_cmpxchg
417 @threads I64AtomicRmwCmpxchg { memarg: $crate::MemArg } => visit_i64_atomic_rmw_cmpxchg
418 @threads I32AtomicRmw8CmpxchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_cmpxchg_u
419 @threads I32AtomicRmw16CmpxchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_cmpxchg_u
420 @threads I64AtomicRmw8CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_cmpxchg_u
421 @threads I64AtomicRmw16CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_cmpxchg_u
422 @threads I64AtomicRmw32CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_cmpxchg_u
423
424 @simd V128Load { memarg: $crate::MemArg } => visit_v128_load
429 @simd V128Load8x8S { memarg: $crate::MemArg } => visit_v128_load8x8_s
430 @simd V128Load8x8U { memarg: $crate::MemArg } => visit_v128_load8x8_u
431 @simd V128Load16x4S { memarg: $crate::MemArg } => visit_v128_load16x4_s
432 @simd V128Load16x4U { memarg: $crate::MemArg } => visit_v128_load16x4_u
433 @simd V128Load32x2S { memarg: $crate::MemArg } => visit_v128_load32x2_s
434 @simd V128Load32x2U { memarg: $crate::MemArg } => visit_v128_load32x2_u
435 @simd V128Load8Splat { memarg: $crate::MemArg } => visit_v128_load8_splat
436 @simd V128Load16Splat { memarg: $crate::MemArg } => visit_v128_load16_splat
437 @simd V128Load32Splat { memarg: $crate::MemArg } => visit_v128_load32_splat
438 @simd V128Load64Splat { memarg: $crate::MemArg } => visit_v128_load64_splat
439 @simd V128Load32Zero { memarg: $crate::MemArg } => visit_v128_load32_zero
440 @simd V128Load64Zero { memarg: $crate::MemArg } => visit_v128_load64_zero
441 @simd V128Store { memarg: $crate::MemArg } => visit_v128_store
442 @simd V128Load8Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load8_lane
443 @simd V128Load16Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load16_lane
444 @simd V128Load32Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load32_lane
445 @simd V128Load64Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load64_lane
446 @simd V128Store8Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store8_lane
447 @simd V128Store16Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store16_lane
448 @simd V128Store32Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store32_lane
449 @simd V128Store64Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store64_lane
450 @simd V128Const { value: $crate::V128 } => visit_v128_const
451 @simd I8x16Shuffle { lanes: [u8; 16] } => visit_i8x16_shuffle
452 @simd I8x16ExtractLaneS { lane: u8 } => visit_i8x16_extract_lane_s
453 @simd I8x16ExtractLaneU { lane: u8 } => visit_i8x16_extract_lane_u
454 @simd I8x16ReplaceLane { lane: u8 } => visit_i8x16_replace_lane
455 @simd I16x8ExtractLaneS { lane: u8 } => visit_i16x8_extract_lane_s
456 @simd I16x8ExtractLaneU { lane: u8 } => visit_i16x8_extract_lane_u
457 @simd I16x8ReplaceLane { lane: u8 } => visit_i16x8_replace_lane
458 @simd I32x4ExtractLane { lane: u8 } => visit_i32x4_extract_lane
459 @simd I32x4ReplaceLane { lane: u8 } => visit_i32x4_replace_lane
460 @simd I64x2ExtractLane { lane: u8 } => visit_i64x2_extract_lane
461 @simd I64x2ReplaceLane { lane: u8 } => visit_i64x2_replace_lane
462 @simd F32x4ExtractLane { lane: u8 } => visit_f32x4_extract_lane
463 @simd F32x4ReplaceLane { lane: u8 } => visit_f32x4_replace_lane
464 @simd F64x2ExtractLane { lane: u8 } => visit_f64x2_extract_lane
465 @simd F64x2ReplaceLane { lane: u8 } => visit_f64x2_replace_lane
466 @simd I8x16Swizzle => visit_i8x16_swizzle
467 @simd I8x16Splat => visit_i8x16_splat
468 @simd I16x8Splat => visit_i16x8_splat
469 @simd I32x4Splat => visit_i32x4_splat
470 @simd I64x2Splat => visit_i64x2_splat
471 @simd F32x4Splat => visit_f32x4_splat
472 @simd F64x2Splat => visit_f64x2_splat
473 @simd I8x16Eq => visit_i8x16_eq
474 @simd I8x16Ne => visit_i8x16_ne
475 @simd I8x16LtS => visit_i8x16_lt_s
476 @simd I8x16LtU => visit_i8x16_lt_u
477 @simd I8x16GtS => visit_i8x16_gt_s
478 @simd I8x16GtU => visit_i8x16_gt_u
479 @simd I8x16LeS => visit_i8x16_le_s
480 @simd I8x16LeU => visit_i8x16_le_u
481 @simd I8x16GeS => visit_i8x16_ge_s
482 @simd I8x16GeU => visit_i8x16_ge_u
483 @simd I16x8Eq => visit_i16x8_eq
484 @simd I16x8Ne => visit_i16x8_ne
485 @simd I16x8LtS => visit_i16x8_lt_s
486 @simd I16x8LtU => visit_i16x8_lt_u
487 @simd I16x8GtS => visit_i16x8_gt_s
488 @simd I16x8GtU => visit_i16x8_gt_u
489 @simd I16x8LeS => visit_i16x8_le_s
490 @simd I16x8LeU => visit_i16x8_le_u
491 @simd I16x8GeS => visit_i16x8_ge_s
492 @simd I16x8GeU => visit_i16x8_ge_u
493 @simd I32x4Eq => visit_i32x4_eq
494 @simd I32x4Ne => visit_i32x4_ne
495 @simd I32x4LtS => visit_i32x4_lt_s
496 @simd I32x4LtU => visit_i32x4_lt_u
497 @simd I32x4GtS => visit_i32x4_gt_s
498 @simd I32x4GtU => visit_i32x4_gt_u
499 @simd I32x4LeS => visit_i32x4_le_s
500 @simd I32x4LeU => visit_i32x4_le_u
501 @simd I32x4GeS => visit_i32x4_ge_s
502 @simd I32x4GeU => visit_i32x4_ge_u
503 @simd I64x2Eq => visit_i64x2_eq
504 @simd I64x2Ne => visit_i64x2_ne
505 @simd I64x2LtS => visit_i64x2_lt_s
506 @simd I64x2GtS => visit_i64x2_gt_s
507 @simd I64x2LeS => visit_i64x2_le_s
508 @simd I64x2GeS => visit_i64x2_ge_s
509 @simd F32x4Eq => visit_f32x4_eq
510 @simd F32x4Ne => visit_f32x4_ne
511 @simd F32x4Lt => visit_f32x4_lt
512 @simd F32x4Gt => visit_f32x4_gt
513 @simd F32x4Le => visit_f32x4_le
514 @simd F32x4Ge => visit_f32x4_ge
515 @simd F64x2Eq => visit_f64x2_eq
516 @simd F64x2Ne => visit_f64x2_ne
517 @simd F64x2Lt => visit_f64x2_lt
518 @simd F64x2Gt => visit_f64x2_gt
519 @simd F64x2Le => visit_f64x2_le
520 @simd F64x2Ge => visit_f64x2_ge
521 @simd V128Not => visit_v128_not
522 @simd V128And => visit_v128_and
523 @simd V128AndNot => visit_v128_andnot
524 @simd V128Or => visit_v128_or
525 @simd V128Xor => visit_v128_xor
526 @simd V128Bitselect => visit_v128_bitselect
527 @simd V128AnyTrue => visit_v128_any_true
528 @simd I8x16Abs => visit_i8x16_abs
529 @simd I8x16Neg => visit_i8x16_neg
530 @simd I8x16Popcnt => visit_i8x16_popcnt
531 @simd I8x16AllTrue => visit_i8x16_all_true
532 @simd I8x16Bitmask => visit_i8x16_bitmask
533 @simd I8x16NarrowI16x8S => visit_i8x16_narrow_i16x8_s
534 @simd I8x16NarrowI16x8U => visit_i8x16_narrow_i16x8_u
535 @simd I8x16Shl => visit_i8x16_shl
536 @simd I8x16ShrS => visit_i8x16_shr_s
537 @simd I8x16ShrU => visit_i8x16_shr_u
538 @simd I8x16Add => visit_i8x16_add
539 @simd I8x16AddSatS => visit_i8x16_add_sat_s
540 @simd I8x16AddSatU => visit_i8x16_add_sat_u
541 @simd I8x16Sub => visit_i8x16_sub
542 @simd I8x16SubSatS => visit_i8x16_sub_sat_s
543 @simd I8x16SubSatU => visit_i8x16_sub_sat_u
544 @simd I8x16MinS => visit_i8x16_min_s
545 @simd I8x16MinU => visit_i8x16_min_u
546 @simd I8x16MaxS => visit_i8x16_max_s
547 @simd I8x16MaxU => visit_i8x16_max_u
548 @simd I8x16AvgrU => visit_i8x16_avgr_u
549 @simd I16x8ExtAddPairwiseI8x16S => visit_i16x8_extadd_pairwise_i8x16_s
550 @simd I16x8ExtAddPairwiseI8x16U => visit_i16x8_extadd_pairwise_i8x16_u
551 @simd I16x8Abs => visit_i16x8_abs
552 @simd I16x8Neg => visit_i16x8_neg
553 @simd I16x8Q15MulrSatS => visit_i16x8_q15mulr_sat_s
554 @simd I16x8AllTrue => visit_i16x8_all_true
555 @simd I16x8Bitmask => visit_i16x8_bitmask
556 @simd I16x8NarrowI32x4S => visit_i16x8_narrow_i32x4_s
557 @simd I16x8NarrowI32x4U => visit_i16x8_narrow_i32x4_u
558 @simd I16x8ExtendLowI8x16S => visit_i16x8_extend_low_i8x16_s
559 @simd I16x8ExtendHighI8x16S => visit_i16x8_extend_high_i8x16_s
560 @simd I16x8ExtendLowI8x16U => visit_i16x8_extend_low_i8x16_u
561 @simd I16x8ExtendHighI8x16U => visit_i16x8_extend_high_i8x16_u
562 @simd I16x8Shl => visit_i16x8_shl
563 @simd I16x8ShrS => visit_i16x8_shr_s
564 @simd I16x8ShrU => visit_i16x8_shr_u
565 @simd I16x8Add => visit_i16x8_add
566 @simd I16x8AddSatS => visit_i16x8_add_sat_s
567 @simd I16x8AddSatU => visit_i16x8_add_sat_u
568 @simd I16x8Sub => visit_i16x8_sub
569 @simd I16x8SubSatS => visit_i16x8_sub_sat_s
570 @simd I16x8SubSatU => visit_i16x8_sub_sat_u
571 @simd I16x8Mul => visit_i16x8_mul
572 @simd I16x8MinS => visit_i16x8_min_s
573 @simd I16x8MinU => visit_i16x8_min_u
574 @simd I16x8MaxS => visit_i16x8_max_s
575 @simd I16x8MaxU => visit_i16x8_max_u
576 @simd I16x8AvgrU => visit_i16x8_avgr_u
577 @simd I16x8ExtMulLowI8x16S => visit_i16x8_extmul_low_i8x16_s
578 @simd I16x8ExtMulHighI8x16S => visit_i16x8_extmul_high_i8x16_s
579 @simd I16x8ExtMulLowI8x16U => visit_i16x8_extmul_low_i8x16_u
580 @simd I16x8ExtMulHighI8x16U => visit_i16x8_extmul_high_i8x16_u
581 @simd I32x4ExtAddPairwiseI16x8S => visit_i32x4_extadd_pairwise_i16x8_s
582 @simd I32x4ExtAddPairwiseI16x8U => visit_i32x4_extadd_pairwise_i16x8_u
583 @simd I32x4Abs => visit_i32x4_abs
584 @simd I32x4Neg => visit_i32x4_neg
585 @simd I32x4AllTrue => visit_i32x4_all_true
586 @simd I32x4Bitmask => visit_i32x4_bitmask
587 @simd I32x4ExtendLowI16x8S => visit_i32x4_extend_low_i16x8_s
588 @simd I32x4ExtendHighI16x8S => visit_i32x4_extend_high_i16x8_s
589 @simd I32x4ExtendLowI16x8U => visit_i32x4_extend_low_i16x8_u
590 @simd I32x4ExtendHighI16x8U => visit_i32x4_extend_high_i16x8_u
591 @simd I32x4Shl => visit_i32x4_shl
592 @simd I32x4ShrS => visit_i32x4_shr_s
593 @simd I32x4ShrU => visit_i32x4_shr_u
594 @simd I32x4Add => visit_i32x4_add
595 @simd I32x4Sub => visit_i32x4_sub
596 @simd I32x4Mul => visit_i32x4_mul
597 @simd I32x4MinS => visit_i32x4_min_s
598 @simd I32x4MinU => visit_i32x4_min_u
599 @simd I32x4MaxS => visit_i32x4_max_s
600 @simd I32x4MaxU => visit_i32x4_max_u
601 @simd I32x4DotI16x8S => visit_i32x4_dot_i16x8_s
602 @simd I32x4ExtMulLowI16x8S => visit_i32x4_extmul_low_i16x8_s
603 @simd I32x4ExtMulHighI16x8S => visit_i32x4_extmul_high_i16x8_s
604 @simd I32x4ExtMulLowI16x8U => visit_i32x4_extmul_low_i16x8_u
605 @simd I32x4ExtMulHighI16x8U => visit_i32x4_extmul_high_i16x8_u
606 @simd I64x2Abs => visit_i64x2_abs
607 @simd I64x2Neg => visit_i64x2_neg
608 @simd I64x2AllTrue => visit_i64x2_all_true
609 @simd I64x2Bitmask => visit_i64x2_bitmask
610 @simd I64x2ExtendLowI32x4S => visit_i64x2_extend_low_i32x4_s
611 @simd I64x2ExtendHighI32x4S => visit_i64x2_extend_high_i32x4_s
612 @simd I64x2ExtendLowI32x4U => visit_i64x2_extend_low_i32x4_u
613 @simd I64x2ExtendHighI32x4U => visit_i64x2_extend_high_i32x4_u
614 @simd I64x2Shl => visit_i64x2_shl
615 @simd I64x2ShrS => visit_i64x2_shr_s
616 @simd I64x2ShrU => visit_i64x2_shr_u
617 @simd I64x2Add => visit_i64x2_add
618 @simd I64x2Sub => visit_i64x2_sub
619 @simd I64x2Mul => visit_i64x2_mul
620 @simd I64x2ExtMulLowI32x4S => visit_i64x2_extmul_low_i32x4_s
621 @simd I64x2ExtMulHighI32x4S => visit_i64x2_extmul_high_i32x4_s
622 @simd I64x2ExtMulLowI32x4U => visit_i64x2_extmul_low_i32x4_u
623 @simd I64x2ExtMulHighI32x4U => visit_i64x2_extmul_high_i32x4_u
624 @simd F32x4Ceil => visit_f32x4_ceil
625 @simd F32x4Floor => visit_f32x4_floor
626 @simd F32x4Trunc => visit_f32x4_trunc
627 @simd F32x4Nearest => visit_f32x4_nearest
628 @simd F32x4Abs => visit_f32x4_abs
629 @simd F32x4Neg => visit_f32x4_neg
630 @simd F32x4Sqrt => visit_f32x4_sqrt
631 @simd F32x4Add => visit_f32x4_add
632 @simd F32x4Sub => visit_f32x4_sub
633 @simd F32x4Mul => visit_f32x4_mul
634 @simd F32x4Div => visit_f32x4_div
635 @simd F32x4Min => visit_f32x4_min
636 @simd F32x4Max => visit_f32x4_max
637 @simd F32x4PMin => visit_f32x4_pmin
638 @simd F32x4PMax => visit_f32x4_pmax
639 @simd F64x2Ceil => visit_f64x2_ceil
640 @simd F64x2Floor => visit_f64x2_floor
641 @simd F64x2Trunc => visit_f64x2_trunc
642 @simd F64x2Nearest => visit_f64x2_nearest
643 @simd F64x2Abs => visit_f64x2_abs
644 @simd F64x2Neg => visit_f64x2_neg
645 @simd F64x2Sqrt => visit_f64x2_sqrt
646 @simd F64x2Add => visit_f64x2_add
647 @simd F64x2Sub => visit_f64x2_sub
648 @simd F64x2Mul => visit_f64x2_mul
649 @simd F64x2Div => visit_f64x2_div
650 @simd F64x2Min => visit_f64x2_min
651 @simd F64x2Max => visit_f64x2_max
652 @simd F64x2PMin => visit_f64x2_pmin
653 @simd F64x2PMax => visit_f64x2_pmax
654 @simd I32x4TruncSatF32x4S => visit_i32x4_trunc_sat_f32x4_s
655 @simd I32x4TruncSatF32x4U => visit_i32x4_trunc_sat_f32x4_u
656 @simd F32x4ConvertI32x4S => visit_f32x4_convert_i32x4_s
657 @simd F32x4ConvertI32x4U => visit_f32x4_convert_i32x4_u
658 @simd I32x4TruncSatF64x2SZero => visit_i32x4_trunc_sat_f64x2_s_zero
659 @simd I32x4TruncSatF64x2UZero => visit_i32x4_trunc_sat_f64x2_u_zero
660 @simd F64x2ConvertLowI32x4S => visit_f64x2_convert_low_i32x4_s
661 @simd F64x2ConvertLowI32x4U => visit_f64x2_convert_low_i32x4_u
662 @simd F32x4DemoteF64x2Zero => visit_f32x4_demote_f64x2_zero
663 @simd F64x2PromoteLowF32x4 => visit_f64x2_promote_low_f32x4
664
665 @relaxed_simd I8x16RelaxedSwizzle => visit_i8x16_relaxed_swizzle
668 @relaxed_simd I32x4RelaxedTruncSatF32x4S => visit_i32x4_relaxed_trunc_sat_f32x4_s
669 @relaxed_simd I32x4RelaxedTruncSatF32x4U => visit_i32x4_relaxed_trunc_sat_f32x4_u
670 @relaxed_simd I32x4RelaxedTruncSatF64x2SZero => visit_i32x4_relaxed_trunc_sat_f64x2_s_zero
671 @relaxed_simd I32x4RelaxedTruncSatF64x2UZero => visit_i32x4_relaxed_trunc_sat_f64x2_u_zero
672 @relaxed_simd F32x4RelaxedFma => visit_f32x4_relaxed_fma
673 @relaxed_simd F32x4RelaxedFnma => visit_f32x4_relaxed_fnma
674 @relaxed_simd F64x2RelaxedFma => visit_f64x2_relaxed_fma
675 @relaxed_simd F64x2RelaxedFnma => visit_f64x2_relaxed_fnma
676 @relaxed_simd I8x16RelaxedLaneselect => visit_i8x16_relaxed_laneselect
677 @relaxed_simd I16x8RelaxedLaneselect => visit_i16x8_relaxed_laneselect
678 @relaxed_simd I32x4RelaxedLaneselect => visit_i32x4_relaxed_laneselect
679 @relaxed_simd I64x2RelaxedLaneselect => visit_i64x2_relaxed_laneselect
680 @relaxed_simd F32x4RelaxedMin => visit_f32x4_relaxed_min
681 @relaxed_simd F32x4RelaxedMax => visit_f32x4_relaxed_max
682 @relaxed_simd F64x2RelaxedMin => visit_f64x2_relaxed_min
683 @relaxed_simd F64x2RelaxedMax => visit_f64x2_relaxed_max
684 @relaxed_simd I16x8RelaxedQ15mulrS => visit_i16x8_relaxed_q15mulr_s
685 @relaxed_simd I16x8DotI8x16I7x16S => visit_i16x8_dot_i8x16_i7x16_s
686 @relaxed_simd I32x4DotI8x16I7x16AddS => visit_i32x4_dot_i8x16_i7x16_add_s
687 @relaxed_simd F32x4RelaxedDotBf16x8AddF32x4 => visit_f32x4_relaxed_dot_bf16x8_add_f32x4
688 }
689 };
690}
691
692macro_rules! format_err {
693 ($offset:expr, $($arg:tt)*) => {
694 crate::BinaryReaderError::fmt(format_args!($($arg)*), $offset)
695 }
696}
697
698macro_rules! bail {
699 ($($arg:tt)*) => {return Err(format_err!($($arg)*))}
700}
701
702pub use crate::binary_reader::{BinaryReader, BinaryReaderError, Result};
703pub use crate::parser::*;
704pub use crate::readers::*;
705pub use crate::resources::*;
706pub use crate::validator::*;
707
708mod binary_reader;
709mod limits;
710mod parser;
711mod readers;
712mod resources;
713mod validator;