Struct avr_device::atmega4809::cpuint::lvl1vec::LVL1VEC_SPEC

pub struct LVL1VEC_SPEC;

Interrupt Level 1 Priority Vector

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see lvl1vec module

Trait Implementations

impl Readable for LVL1VEC_SPEC

read() method returns lvl1vec::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for LVL1VEC_SPEC

type Ux = u8

Raw register type (u8, u16, u32, …).

impl Resettable for LVL1VEC_SPEC

reset() method sets LVL1VEC to value 0

const RESET_VALUE: Self::Ux = {transmute(0x00): <devices::atmega4809::cpuint::lvl1vec::LVL1VEC_SPEC as generic::RegisterSpec>::Ux}

Reset value of the register.

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for LVL1VEC_SPEC

write(|w| ..) method takes lvl1vec::W writer structure

type Writer = W

Writer type argument to write, et al.

const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00): <devices::atmega4809::cpuint::lvl1vec::LVL1VEC_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 1 and are changed if you pass 0

const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = {transmute(0x00): <devices::atmega4809::cpuint::lvl1vec::LVL1VEC_SPEC as generic::RegisterSpec>::Ux}

Specifies the register bits that are not changed if you pass 0 and are changed if you pass 1