Enum avr_device::atmega2560::adc::admux::MUX_A

#[repr(u8)]
pub enum MUX_A {
    ADC0 = 0,
    ADC1 = 1,
    ADC2 = 2,
    ADC3 = 3,
    ADC4 = 4,
    ADC5 = 5,
    ADC6 = 6,
    ADC7 = 7,
    ADC0_ADC0_10X = 8,
    ADC1_ADC0_10X = 9,
    ADC0_ADC0_200X = 10,
    ADC1_ADC0_200X = 11,
    ADC2_ADC2_10X = 12,
    ADC3_ADC2_10X = 13,
    ADC2_ADC2_200X = 14,
    ADC3_ADC2_200X = 15,
    ADC0_ADC1_1X = 16,
    ADC1_ADC1_1X = 17,
    ADC2_ADC1_1X = 18,
    ADC3_ADC1_1X = 19,
    ADC4_ADC1_1X = 20,
    ADC5_ADC1_1X = 21,
    ADC6_ADC1_1X = 22,
    ADC7_ADC1_1X = 23,
    ADC0_ADC2_1X = 24,
    ADC1_ADC2_1X = 25,
    ADC2_ADC2_1X = 26,
    ADC3_ADC2_1X = 27,
    ADC4_ADC2_1X = 28,
    ADC5_ADC2_1X = 29,
    ADC_VBG = 30,
    ADC_GND = 31,
}

Analog Channel and Gain Selection Bits

Value on reset: 0

Variants

ADC0 = 0

0: ADC Single Ended Input pin 0

ADC1 = 1

1: ADC Single Ended Input pin 1

ADC2 = 2

2: ADC Single Ended Input pin 2

ADC3 = 3

3: ADC Single Ended Input pin 3

ADC4 = 4

4: ADC Single Ended Input pin 4

ADC5 = 5

5: ADC Single Ended Input pin 5

ADC6 = 6

6: ADC Single Ended Input pin 6

ADC7 = 7

7: ADC Single Ended Input pin 7

ADC0_ADC0_10X = 8

8: ADC Differential Inputs Postive pin 0 Negative pin 0 10x Gain

ADC1_ADC0_10X = 9

9: ADC Differential Inputs Postive pin 1 Negative pin 0 10x Gain

ADC0_ADC0_200X = 10

10: ADC Differential Inputs Postive pin 0 Negative pin 0 200x Gain

ADC1_ADC0_200X = 11

11: ADC Differential Inputs Postive pin 1 Negative pin 0 200x Gain

ADC2_ADC2_10X = 12

12: ADC Differential Inputs Postive pin 2 Negative pin 2 10x Gain

ADC3_ADC2_10X = 13

13: ADC Differential Inputs Postive pin 3 Negative pin 2 10x Gain

ADC2_ADC2_200X = 14

14: ADC Differential Inputs Postive pin 2 Negative pin 2 200x Gain

ADC3_ADC2_200X = 15

15: ADC Differential Inputs Postive pin 3 Negative pin 2 200x Gain

ADC0_ADC1_1X = 16

16: ADC Differential Inputs Postive pin 0 Negative pin 1 1x Gain

ADC1_ADC1_1X = 17

17: ADC Differential Inputs Postive pin 1 Negative pin 1 1x Gain

ADC2_ADC1_1X = 18

18: ADC Differential Inputs Postive pin 2 Negative pin 1 1x Gain

ADC3_ADC1_1X = 19

19: ADC Differential Inputs Postive pin 3 Negative pin 1 1x Gain

ADC4_ADC1_1X = 20

20: ADC Differential Inputs Postive pin 4 Negative pin 1 1x Gain

ADC5_ADC1_1X = 21

21: ADC Differential Inputs Postive pin 5 Negative pin 1 1x Gain

ADC6_ADC1_1X = 22

22: ADC Differential Inputs Postive pin 6 Negative pin 1 1x Gain

ADC7_ADC1_1X = 23

23: ADC Differential Inputs Postive pin 7 Negative pin 1 1x Gain

ADC0_ADC2_1X = 24

24: ADC Differential Inputs Postive pin 0 Negative pin 2 1x Gain

ADC1_ADC2_1X = 25

25: ADC Differential Inputs Postive pin 1 Negative pin 2 1x Gain

ADC2_ADC2_1X = 26

26: ADC Differential Inputs Postive pin 2 Negative pin 2 1x Gain

ADC3_ADC2_1X = 27

27: ADC Differential Inputs Postive pin 3 Negative pin 2 1x Gain

ADC4_ADC2_1X = 28

28: ADC Differential Inputs Postive pin 4 Negative pin 2 1x Gain

ADC5_ADC2_1X = 29

29: ADC Differential Inputs Postive pin 5 Negative pin 2 1x Gain

ADC_VBG = 30

30: Internal Reference (VBG)

ADC_GND = 31

31: 0V (GND)

Trait Implementations

impl Clone for MUX_A

fn clone(&self) -> MUX_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for MUX_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<MUX_A> for u8

fn from(variant: MUX_A) -> Self

Converts to this type from the input type.

impl PartialEq for MUX_A

fn eq(&self, other: &MUX_A) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for MUX_A

impl Eq for MUX_A

impl StructuralPartialEq for MUX_A