Enum avr_device::atmega4809::Interrupt
source · #[repr(u16)]pub enum Interrupt {
Show 39 variants
CRCSCAN_NMI = 1,
BOD_VLM = 2,
RTC_CNT = 3,
RTC_PIT = 4,
CCL_CCL = 5,
PORTA_PORT = 6,
TCA0_LUNF_OVF = 7,
TCA0_HUNF = 8,
TCA0_CMP0_LCMP0 = 9,
TCA0_CMP1_LCMP1 = 10,
TCA0_CMP2_LCMP2 = 11,
TCB0_INT = 12,
TCB1_INT = 13,
TWI0_TWIS = 14,
TWI0_TWIM = 15,
SPI0_INT = 16,
USART0_RXC = 17,
USART0_DRE = 18,
USART0_TXC = 19,
PORTD_PORT = 20,
AC0_AC = 21,
ADC0_RESRDY = 22,
ADC0_WCOMP = 23,
PORTC_PORT = 24,
TCB2_INT = 25,
USART1_RXC = 26,
USART1_DRE = 27,
USART1_TXC = 28,
PORTF_PORT = 29,
NVMCTRL_EE = 30,
USART2_RXC = 31,
USART2_DRE = 32,
USART2_TXC = 33,
PORTB_PORT = 34,
PORTE_PORT = 35,
TCB3_INT = 36,
USART3_RXC = 37,
USART3_DRE = 38,
USART3_TXC = 39,
}
Expand description
Enumeration of all the interrupts.
Variants§
CRCSCAN_NMI = 1
1 - No Description.
BOD_VLM = 2
2 - No Description.
RTC_CNT = 3
3 - No Description.
RTC_PIT = 4
4 - No Description.
CCL_CCL = 5
5 - No Description.
PORTA_PORT = 6
6 - No Description.
TCA0_LUNF_OVF = 7
7 - No Description.
TCA0_HUNF = 8
8 - No Description.
TCA0_CMP0_LCMP0 = 9
9 - No Description.
TCA0_CMP1_LCMP1 = 10
10 - No Description.
TCA0_CMP2_LCMP2 = 11
11 - No Description.
TCB0_INT = 12
12 - No Description.
TCB1_INT = 13
13 - No Description.
TWI0_TWIS = 14
14 - No Description.
TWI0_TWIM = 15
15 - No Description.
SPI0_INT = 16
16 - No Description.
USART0_RXC = 17
17 - No Description.
USART0_DRE = 18
18 - No Description.
USART0_TXC = 19
19 - No Description.
PORTD_PORT = 20
20 - No Description.
AC0_AC = 21
21 - No Description.
ADC0_RESRDY = 22
22 - No Description.
ADC0_WCOMP = 23
23 - No Description.
PORTC_PORT = 24
24 - No Description.
TCB2_INT = 25
25 - No Description.
USART1_RXC = 26
26 - No Description.
USART1_DRE = 27
27 - No Description.
USART1_TXC = 28
28 - No Description.
PORTF_PORT = 29
29 - No Description.
NVMCTRL_EE = 30
30 - No Description.
USART2_RXC = 31
31 - No Description.
USART2_DRE = 32
32 - No Description.
USART2_TXC = 33
33 - No Description.
PORTB_PORT = 34
34 - No Description.
PORTE_PORT = 35
35 - No Description.
TCB3_INT = 36
36 - No Description.
USART3_RXC = 37
37 - No Description.
USART3_DRE = 38
38 - No Description.
USART3_TXC = 39
39 - No Description.
Implementations§
Trait Implementations§
impl Copy for Interrupt
impl Eq for Interrupt
impl StructuralPartialEq for Interrupt
Auto Trait Implementations§
impl Freeze for Interrupt
impl RefUnwindSafe for Interrupt
impl Send for Interrupt
impl Sync for Interrupt
impl Unpin for Interrupt
impl UnwindSafe for Interrupt
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)