Expand description
Ethernet Media Access Control
Modules§
- backed_
gap - Back-to-back inter-packet gap register
- collision
- Collision time window and maximum retries
- control_
read - Read data from MII physcial layer
- control_
write - Write data to MII physcial layer
- flow_
control - Control frame function register
- frame_
length - Minimum and maximum ethernet frame length
- hash
- Hash register
- interrupt_
mask - Interrupt mask register
- interrupt_
source - Interrupt source register
- mac_
address - Media Access Control address
- mii_
address - Physical layer bus address
- mii_
command - MII control data, read and scan state
- mii_
mode - MII clock divider and premable enable
- mii_
state - MII bus and link layer state
- mode
- Interface enables and configurations
- non_
backed_ gap_ 1 - Non back-to-back inter-packet gap register 1
- non_
backed_ gap_ 2 - Non back-to-back inter-packet gap register 2
- transmit_
buffer - Transmit buffer descriptor
- transmit_
control - Transmit control register
Structs§
- Register
Block - Register block
Type Aliases§
- BACKED_
GAP - backed_gap (rw) register accessor: Back-to-back inter-packet gap register
- COLLISION
- collision (rw) register accessor: Collision time window and maximum retries
- CONTROL_
READ - control_read (rw) register accessor: Read data from MII physcial layer
- CONTROL_
WRITE - control_write (rw) register accessor: Write data to MII physcial layer
- FLOW_
CONTROL - flow_control (rw) register accessor: Control frame function register
- FRAME_
LENGTH - frame_length (rw) register accessor: Minimum and maximum ethernet frame length
- HASH
- hash (rw) register accessor: Hash register
- INTERRUPT_
MASK - interrupt_mask (rw) register accessor: Interrupt mask register
- INTERRUPT_
SOURCE - interrupt_source (rw) register accessor: Interrupt source register
- MAC_
ADDRESS - mac_address (rw) register accessor: Media Access Control address
- MII_
ADDRESS - mii_address (rw) register accessor: Physical layer bus address
- MII_
COMMAND - mii_command (rw) register accessor: MII control data, read and scan state
- MII_
MODE - mii_mode (rw) register accessor: MII clock divider and premable enable
- MII_
STATE - mii_state (rw) register accessor: MII bus and link layer state
- MODE
- mode (rw) register accessor: Interface enables and configurations
- NON_
BACKED_ GAP_ 1 - non_backed_gap_1 (rw) register accessor: Non back-to-back inter-packet gap register 1
- NON_
BACKED_ GAP_ 2 - non_backed_gap_2 (rw) register accessor: Non back-to-back inter-packet gap register 2
- TRANSMIT_
BUFFER - transmit_buffer (rw) register accessor: Transmit buffer descriptor
- TRANSMIT_
CONTROL - transmit_control (rw) register accessor: Transmit control register