Module clock_config_1

Source
Expand description

System clock configuration register 1

Structs§

CLOCK_CONFIG_1_SPEC
System clock configuration register 1

Type Aliases§

FCLK_SW_STATE_R
Field fclk_sw_state reader -
FCLK_SW_STATE_W
Field fclk_sw_state writer -
R
Register clock_config_1 reader
REG_BCLK_DIV_ACT_PULSE_R
Field reg_bclk_div_act_pulse reader -
REG_BCLK_DIV_ACT_PULSE_W
Field reg_bclk_div_act_pulse writer -
REG_BCLK_DIV_BYPASS_R
Field reg_bclk_div_bypass reader -
REG_BCLK_DIV_BYPASS_W
Field reg_bclk_div_bypass writer -
REG_BCLK_SW_DONE_CNT_R
Field reg_bclk_sw_done_cnt reader -
REG_BCLK_SW_DONE_CNT_W
Field reg_bclk_sw_done_cnt writer -
STS_BCLK_PROT_DONE_R
Field sts_bclk_prot_done reader -
STS_BCLK_PROT_DONE_W
Field sts_bclk_prot_done writer -
W
Register clock_config_1 writer