Struct cortex_m::peripheral::cbp::RegisterBlock [−][src]
Register block
Fields
iciallu: WO<u32>
I-cache invalidate all to PoU
icimvau: WO<u32>
I-cache invalidate by MVA to PoU
dcimvac: WO<u32>
D-cache invalidate by MVA to PoC
dcisw: WO<u32>
D-cache invalidate by set-way
dccmvau: WO<u32>
D-cache clean by MVA to PoU
dccmvac: WO<u32>
D-cache clean by MVA to PoC
dccsw: WO<u32>
D-cache clean by set-way
dccimvac: WO<u32>
D-cache clean and invalidate by MVA to PoC
dccisw: WO<u32>
D-cache clean and invalidate by set-way
bpiall: WO<u32>
Branch predictor invalidate all
Auto Trait Implementations
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
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T: ?Sized,
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Should always be Self
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