[−][src]Struct cortex_m::peripheral::Peripherals

pub struct Peripherals {
    pub CBP: CBP,
    pub CPUID: CPUID,
    pub DCB: DCB,
    pub DWT: DWT,
    pub FPB: FPB,
    pub FPU: FPU,
    pub ITM: ITM,
    pub MPU: MPU,
    pub NVIC: NVIC,
    pub SCB: SCB,
    pub SYST: SYST,
    pub TPIU: TPIU,
}

Core peripherals

Fields

CBP: CBP

Cache and branch predictor maintenance operations (not present on Cortex-M0 variants)

CPUID: CPUID

CPUID

DCB: DCB

Debug Control Block

DWT: DWT

Data Watchpoint and Trace unit

FPB: FPB

Flash Patch and Breakpoint unit (not present on Cortex-M0 variants)

FPU: FPU

Floating Point Unit (only present on thumbv7em-none-eabihf)

ITM: ITM

Instrumentation Trace Macrocell (not present on Cortex-M0 variants)

MPU: MPU

Memory Protection Unit

NVIC: NVIC

Nested Vector Interrupt Controller

SCB: SCB

System Control Block

SYST: SYST

SysTick: System Timer

TPIU: TPIU

Trace Port Interface Unit (not present on Cortex-M0 variants)

Implementations

impl Peripherals[src]

pub fn take() -> Option<Self>[src]

Returns all the core peripherals once

pub unsafe fn steal() -> Self[src]

Unchecked version of Peripherals::take

Auto Trait Implementations

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impl<T> Any for T where
    T: 'static + ?Sized, [src]

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    T: ?Sized, [src]

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    T: ?Sized, [src]

impl<T> From<T> for T[src]

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    U: From<T>, [src]

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type Output = T

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    U: Into<T>, [src]

type Error = Infallible

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    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

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