[−][src]Struct cortex_m::peripheral::NVIC
Nested Vector Interrupt Controller
Implementations
impl NVIC
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pub fn request<I>(&mut self, interrupt: I) where
I: Nr,
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I: Nr,
Request an IRQ in software
Writing a value to the INTID field is the same as manually pending an interrupt by setting
the corresponding interrupt bit in an Interrupt Set Pending Register. This is similar to
set_pending
.
This method is not available on ARMv6-M chips.
pub fn clear_pending<I>(&mut self, interrupt: I) where
I: Nr,
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I: Nr,
Use NVIC::unpend
Clears interrupt
's pending state
pub fn mask<I>(interrupt: I) where
I: Nr,
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I: Nr,
Disables interrupt
pub unsafe fn unmask<I>(interrupt: I) where
I: Nr,
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I: Nr,
Enables interrupt
This function is unsafe
because it can break mask-based critical sections
pub fn disable<I>(&mut self, interrupt: I) where
I: Nr,
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I: Nr,
Use NVIC::mask
Disables interrupt
pub fn enable<I>(&mut self, interrupt: I) where
I: Nr,
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I: Nr,
Use NVIC::unmask
WARNING This method is a soundness hole in the API; it should actually be an unsafe
function. Use NVIC::unmask
which has the right unsafety.
pub fn get_priority<I>(interrupt: I) -> u8 where
I: Nr,
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I: Nr,
Returns the NVIC priority of interrupt
NOTE NVIC encodes priority in the highest bits of a byte so values like 1
and 2
map
to the same priority. Also for NVIC priorities, a lower value (e.g. 16
) has higher
priority (urgency) than a larger value (e.g. 32
).
pub fn is_active<I>(interrupt: I) -> bool where
I: Nr,
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I: Nr,
Is interrupt
active or pre-empted and stacked
pub fn is_enabled<I>(interrupt: I) -> bool where
I: Nr,
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I: Nr,
Checks if interrupt
is enabled
pub fn is_pending<I>(interrupt: I) -> bool where
I: Nr,
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I: Nr,
Checks if interrupt
is pending
pub fn pend<I>(interrupt: I) where
I: Nr,
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I: Nr,
Forces interrupt
into pending state
pub fn set_pending<I>(&mut self, interrupt: I) where
I: Nr,
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I: Nr,
Use NVIC::pend
Forces interrupt
into pending state
pub unsafe fn set_priority<I>(&mut self, interrupt: I, prio: u8) where
I: Nr,
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I: Nr,
Sets the "priority" of interrupt
to prio
NOTE See get_priority
method for an explanation
of how NVIC priorities work.
On ARMv6-M, updating an interrupt priority requires a read-modify-write operation. On ARMv7-M, the operation is performed in a single atomic write operation.
Unsafety
Changing priority levels can break priority-based critical sections (see
register::basepri
) and compromise memory safety.
pub fn unpend<I>(interrupt: I) where
I: Nr,
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I: Nr,
Clears interrupt
's pending state
impl NVIC
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pub fn ptr() -> *const RegisterBlock
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Returns a pointer to the register block
Trait Implementations
impl Deref for NVIC
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type Target = RegisterBlock
The resulting type after dereferencing.
fn deref(&self) -> &Self::Target
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impl Send for NVIC
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Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
pub fn borrow_mut(&mut self) -> &mut T
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impl<T> From<T> for T
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T> Same<T> for T
type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
pub fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,