Trait cranelift_codegen::MachInst

pub trait MachInst: Clone + Debug {
    type ABIMachineSpec: ABIMachineSpec<I = Self>;
    type LabelUse: MachInstLabelUse;

    const TRAP_OPCODE: &'static [u8];

    // Required methods
    fn get_operands(&mut self, collector: &mut impl OperandVisitor);
    fn is_move(&self) -> Option<(Writable<Reg>, Reg)>;
    fn is_term(&self) -> MachTerminator;
    fn is_trap(&self) -> bool;
    fn is_args(&self) -> bool;
    fn is_included_in_clobbers(&self) -> bool;
    fn is_mem_access(&self) -> bool;
    fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self;
    fn gen_dummy_use(reg: Reg) -> Self;
    fn rc_for_type(
        ty: Type,
    ) -> CodegenResult<(&'static [RegClass], &'static [Type])>;
    fn canonical_type_for_rc(rc: RegClass) -> Type;
    fn gen_jump(target: MachLabel) -> Self;
    fn gen_nop(preferred_size: usize) -> Self;
    fn worst_case_size() -> CodeOffset;
    fn ref_type_regclass(_flags: &Flags) -> RegClass;
    fn is_safepoint(&self) -> bool;
    fn function_alignment() -> FunctionAlignment;

    // Provided methods
    fn gen_imm_u64(_value: u64, _dst: Writable<Reg>) -> Option<Self> { ... }
    fn gen_imm_f64(
        _value: f64,
        _tmp: Writable<Reg>,
        _dst: Writable<Reg>,
    ) -> SmallVec<[Self; 2]> { ... }
    fn align_basic_block(offset: CodeOffset) -> CodeOffset { ... }
    fn gen_block_start(
        _is_indirect_branch_target: bool,
        _is_forward_edge_cfi_enabled: bool,
    ) -> Option<Self> { ... }
}

A machine instruction.

Required Associated Types

type ABIMachineSpec: ABIMachineSpec<I = Self>

The ABI machine spec for this MachInst.

type LabelUse: MachInstLabelUse

A label-use kind: a type that describes the types of label references that can occur in an instruction.

Required Associated Constants

const TRAP_OPCODE: &'static [u8]

Byte representation of a trap opcode which is inserted by MachBuffer during its defer_trap method.

Required Methods

fn get_operands(&mut self, collector: &mut impl OperandVisitor)

Return the registers referenced by this machine instruction along with the modes of reference (use, def, modify).

fn is_move(&self) -> Option<(Writable<Reg>, Reg)>

If this is a simple move, return the (source, destination) tuple of registers.

fn is_term(&self) -> MachTerminator

Is this a terminator (branch or ret)? If so, return its type (ret/uncond/cond) and target if applicable.

fn is_trap(&self) -> bool

Is this an unconditional trap?

fn is_args(&self) -> bool

Is this an “args” pseudoinst?

fn is_included_in_clobbers(&self) -> bool

Should this instruction be included in the clobber-set?

fn is_mem_access(&self) -> bool

Does this instruction access memory?

fn gen_move(to_reg: Writable<Reg>, from_reg: Reg, ty: Type) -> Self

Generate a move.

fn gen_dummy_use(reg: Reg) -> Self

Generate a dummy instruction that will keep a value alive but has no other purpose.

fn rc_for_type( ty: Type, ) -> CodegenResult<(&'static [RegClass], &'static [Type])>

Determine register class(es) to store the given Cranelift type, and the Cranelift type actually stored in the underlying register(s). May return an error if the type isn’t supported by this backend.

If the type requires multiple registers, then the list of registers is returned in little-endian order.

Note that the type actually stored in the register(s) may differ in the case that a value is split across registers: for example, on a 32-bit target, an I64 may be stored in two registers, each of which holds an I32. The actually-stored types are used only to inform the backend when generating spills and reloads for individual registers.

fn canonical_type_for_rc(rc: RegClass) -> Type

Get an appropriate type that can fully hold a value in a given register class. This may not be the only type that maps to that class, but when used with gen_move() or the ABI trait’s load/spill constructors, it should produce instruction(s) that move the entire register contents.

fn gen_jump(target: MachLabel) -> Self

Generate a jump to another target. Used during lowering of control flow.

fn gen_nop(preferred_size: usize) -> Self

Generate a NOP. The preferred_size parameter allows the caller to request a NOP of that size, or as close to it as possible. The machine backend may return a NOP whose binary encoding is smaller than the preferred size, but must not return a NOP that is larger. However, the instruction must have a nonzero size if preferred_size is nonzero.

fn worst_case_size() -> CodeOffset

What is the worst-case instruction size emitted by this instruction type?

fn ref_type_regclass(_flags: &Flags) -> RegClass

What is the register class used for reference types (GC-observable pointers)? Can be dependent on compilation flags.

fn is_safepoint(&self) -> bool

Is this a safepoint?

fn function_alignment() -> FunctionAlignment

Returns a description of the alignment required for functions for this architecture.

Provided Methods

fn gen_imm_u64(_value: u64, _dst: Writable<Reg>) -> Option<Self>

Generate a store of an immediate 64-bit integer to a register. Used by the control plane to generate random instructions.

fn gen_imm_f64( _value: f64, _tmp: Writable<Reg>, _dst: Writable<Reg>, ) -> SmallVec<[Self; 2]>

Generate a store of an immediate 64-bit integer to a register. Used by the control plane to generate random instructions. The tmp register may be used by architectures which don’t support writing immediate values to floating point registers directly.

fn align_basic_block(offset: CodeOffset) -> CodeOffset

Align a basic block offset (from start of function). By default, no alignment occurs.

fn gen_block_start( _is_indirect_branch_target: bool, _is_forward_edge_cfi_enabled: bool, ) -> Option<Self>

Generate an instruction that must appear at the beginning of a basic block, if any. Note that the return value must not be subject to register allocation.

Object Safety

This trait is not object safe.

Implementors

impl MachInst for Inst

type ABIMachineSpec = X64ABIMachineSpec

type LabelUse = LabelUse

const TRAP_OPCODE: &'static [u8] = _