Trait cranelift_codegen::isa::TargetIsa [−][src]
pub trait TargetIsa: Display + Send + Sync {
fn name(&self) -> &'static str;
fn triple(&self) -> &Triple;
fn flags(&self) -> &Flags;
fn isa_flags(&self) -> Vec<Value>;
fn unsigned_add_overflow_condition(&self) -> IntCC;
fn get_mach_backend(&self) -> &dyn MachBackend;
fn map_regalloc_reg_to_dwarf(
&self,
_: Reg
) -> Result<u16, RegisterMappingError> { ... }
fn create_systemv_cie(&self) -> Option<CommonInformationEntry> { ... }
}
Expand description
Methods that are specialized to a target ISA.
Implies a Display trait that shows the shared flags, as well as any ISA-specific flags.
Required methods
Get the ISA-independent flags that were used to make this trait object.
Get the ISA-dependent flag values that were used to make this trait object.
fn unsigned_add_overflow_condition(&self) -> IntCC
fn unsigned_add_overflow_condition(&self) -> IntCC
IntCC condition for Unsigned Addition Overflow (Carry).
fn get_mach_backend(&self) -> &dyn MachBackend
fn get_mach_backend(&self) -> &dyn MachBackend
Get the new-style MachBackend.
Provided methods
fn map_regalloc_reg_to_dwarf(&self, _: Reg) -> Result<u16, RegisterMappingError>
fn map_regalloc_reg_to_dwarf(&self, _: Reg) -> Result<u16, RegisterMappingError>
Map a regalloc::Reg to its corresponding DWARF register.
fn create_systemv_cie(&self) -> Option<CommonInformationEntry>
fn create_systemv_cie(&self) -> Option<CommonInformationEntry>
Creates a new System V Common Information Entry for the ISA.
Returns None
if the ISA does not support System V unwind information.
Implementations
Methods implemented for free for target ISA!
Get the default calling convention of this target.
Get the endianness of this ISA.
Returns the code (text) section alignment for this ISA.
Get the pointer type of this ISA.
Get the width of pointers on this ISA, in units of bits.
Get the width of pointers on this ISA, in units of bytes.
Get the information needed by frontends producing Cranelift IR.
Trait Implementations
Performs the conversion.