Module esp32c2_hal::pac::spi2::ctrl

Expand description

SPI control register

Structs

SPI control register
Register CTRL reader
Register CTRL writer

Type Definitions

Field DUMMY_OUT reader - 0: In the dummy phase, the FSPI bus signals are not output. 1: In the dummy phase, the FSPI bus signals are output. Can be configured in CONF state.
Field DUMMY_OUT writer - 0: In the dummy phase, the FSPI bus signals are not output. 1: In the dummy phase, the FSPI bus signals are output. Can be configured in CONF state.
Field D_POL reader - The bit is used to set MOSI line polarity, 1: high 0, low. Can be configured in CONF state.
Field D_POL writer - The bit is used to set MOSI line polarity, 1: high 0, low. Can be configured in CONF state.
Field FADDR_DUAL reader - Apply 2 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.
Field FADDR_DUAL writer - Apply 2 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.
Field FADDR_OCT reader - Apply 8 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.
Field FADDR_QUAD reader - Apply 4 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.
Field FADDR_QUAD writer - Apply 4 signals during addr phase 1:enable 0: disable. Can be configured in CONF state.
Field FCMD_DUAL reader - Apply 2 signals during command phase 1:enable 0: disable. Can be configured in CONF state.
Field FCMD_DUAL writer - Apply 2 signals during command phase 1:enable 0: disable. Can be configured in CONF state.
Field FCMD_OCT reader - Apply 8 signals during command phase 1:enable 0: disable. Can be configured in CONF state.
Field FCMD_QUAD reader - Apply 4 signals during command phase 1:enable 0: disable. Can be configured in CONF state.
Field FCMD_QUAD writer - Apply 4 signals during command phase 1:enable 0: disable. Can be configured in CONF state.
Field FREAD_DUAL reader - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable. Can be configured in CONF state.
Field FREAD_DUAL writer - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable. Can be configured in CONF state.
Field FREAD_OCT reader - In the read operations read-data phase apply 8 signals. 1: enable 0: disable. Can be configured in CONF state.
Field FREAD_QUAD reader - In the read operations read-data phase apply 4 signals. 1: enable 0: disable. Can be configured in CONF state.
Field FREAD_QUAD writer - In the read operations read-data phase apply 4 signals. 1: enable 0: disable. Can be configured in CONF state.
Field HOLD_POL reader - SPI_HOLD output value when SPI is idle. 1: output high, 0: output low. Can be configured in CONF state.
Field HOLD_POL writer - SPI_HOLD output value when SPI is idle. 1: output high, 0: output low. Can be configured in CONF state.
Field Q_POL reader - The bit is used to set MISO line polarity, 1: high 0, low. Can be configured in CONF state.
Field Q_POL writer - The bit is used to set MISO line polarity, 1: high 0, low. Can be configured in CONF state.
Field RD_BIT_ORDER reader - In read-data (MISO) phase 1: LSB first 0: MSB first. Can be configured in CONF state.
Field RD_BIT_ORDER writer - In read-data (MISO) phase 1: LSB first 0: MSB first. Can be configured in CONF state.
Field WP_POL reader - Write protect signal output when SPI is idle. 1: output high, 0: output low. Can be configured in CONF state.
Field WP_POL writer - Write protect signal output when SPI is idle. 1: output high, 0: output low. Can be configured in CONF state.
Field WR_BIT_ORDER reader - In command address write-data (MOSI) phases 1: LSB firs 0: MSB first. Can be configured in CONF state.
Field WR_BIT_ORDER writer - In command address write-data (MOSI) phases 1: LSB firs 0: MSB first. Can be configured in CONF state.