pub enum Opcode {
Show 80 variants
ADD(RegisterId, RegisterId, RegisterId),
ADDI(RegisterId, RegisterId, Immediate12),
AND(RegisterId, RegisterId, RegisterId),
ANDI(RegisterId, RegisterId, Immediate12),
DIV(RegisterId, RegisterId, RegisterId),
DIVI(RegisterId, RegisterId, Immediate12),
EQ(RegisterId, RegisterId, RegisterId),
EXP(RegisterId, RegisterId, RegisterId),
EXPI(RegisterId, RegisterId, Immediate12),
GT(RegisterId, RegisterId, RegisterId),
LT(RegisterId, RegisterId, RegisterId),
MLOG(RegisterId, RegisterId, RegisterId),
MROO(RegisterId, RegisterId, RegisterId),
MOD(RegisterId, RegisterId, RegisterId),
MODI(RegisterId, RegisterId, Immediate12),
MOVE(RegisterId, RegisterId),
MOVI(RegisterId, Immediate18),
MUL(RegisterId, RegisterId, RegisterId),
MULI(RegisterId, RegisterId, Immediate12),
NOT(RegisterId, RegisterId),
OR(RegisterId, RegisterId, RegisterId),
ORI(RegisterId, RegisterId, Immediate12),
SLL(RegisterId, RegisterId, RegisterId),
SLLI(RegisterId, RegisterId, Immediate12),
SRL(RegisterId, RegisterId, RegisterId),
SRLI(RegisterId, RegisterId, Immediate12),
SUB(RegisterId, RegisterId, RegisterId),
SUBI(RegisterId, RegisterId, Immediate12),
XOR(RegisterId, RegisterId, RegisterId),
XORI(RegisterId, RegisterId, Immediate12),
JI(Immediate24),
JNEI(RegisterId, RegisterId, Immediate12),
JNZI(RegisterId, Immediate18),
JMP(RegisterId),
JNE(RegisterId, RegisterId, RegisterId),
RET(RegisterId),
RETD(RegisterId, RegisterId),
CFEI(Immediate24),
CFSI(Immediate24),
LB(RegisterId, RegisterId, Immediate12),
LW(RegisterId, RegisterId, Immediate12),
ALOC(RegisterId),
MCL(RegisterId, RegisterId),
MCLI(RegisterId, Immediate18),
MCP(RegisterId, RegisterId, RegisterId),
MCPI(RegisterId, RegisterId, Immediate12),
MEQ(RegisterId, RegisterId, RegisterId, RegisterId),
SB(RegisterId, RegisterId, Immediate12),
SW(RegisterId, RegisterId, Immediate12),
BAL(RegisterId, RegisterId, RegisterId),
BHSH(RegisterId, RegisterId),
BHEI(RegisterId),
BURN(RegisterId),
CALL(RegisterId, RegisterId, RegisterId, RegisterId),
CCP(RegisterId, RegisterId, RegisterId, RegisterId),
CROO(RegisterId, RegisterId),
CSIZ(RegisterId, RegisterId),
CB(RegisterId),
LDC(RegisterId, RegisterId, RegisterId),
LOG(RegisterId, RegisterId, RegisterId, RegisterId),
LOGD(RegisterId, RegisterId, RegisterId, RegisterId),
MINT(RegisterId),
RVRT(RegisterId),
SMO(RegisterId, RegisterId, RegisterId, RegisterId),
SCWQ(RegisterId, RegisterId, RegisterId),
SRW(RegisterId, RegisterId, RegisterId),
SRWQ(RegisterId, RegisterId, RegisterId, RegisterId),
SWW(RegisterId, RegisterId, RegisterId),
SWWQ(RegisterId, RegisterId, RegisterId, RegisterId),
TIME(RegisterId, RegisterId),
TR(RegisterId, RegisterId, RegisterId),
TRO(RegisterId, RegisterId, RegisterId, RegisterId),
ECR(RegisterId, RegisterId, RegisterId),
K256(RegisterId, RegisterId, RegisterId),
S256(RegisterId, RegisterId, RegisterId),
NOOP,
FLAG(RegisterId),
GM(RegisterId, Immediate18),
GTF(RegisterId, RegisterId, Immediate12),
Undefined,
}
Expand description
Instruction representation for the interpreter.
Memory Opcodes
All these opcodes advance the program counter $pc
by 4
after performing
their operation. Every instruction is guaranteed to fit in u32
representation.
Arithmetic/Logic (ALU) Opcodes
All these opcodes advance the program counter $pc
by 4
after performing
their operation.
If the F_UNSAFEMATH
flag is unset, an operation that
would have set $err
to true
is instead a panic.
If the F_WRAPPING
flag is unset, an operation that
would have set $of
to a non-zero value is instead a panic. ## Contract
Opcodes
All these opcodes advance the program counter $pc
by 4
after performing
their operation, except for CALL and
REVERT.
Cryptographic Opcodes
All these opcodes advance the program counter $pc
by 4
after performing
their operation.
Variants
ADD(RegisterId, RegisterId, RegisterId)
Adds two registers.
ADDI(RegisterId, RegisterId, Immediate12)
Adds a register and an immediate value.
AND(RegisterId, RegisterId, RegisterId)
Bitwise ANDs two registers.
ANDI(RegisterId, RegisterId, Immediate12)
Bitwise ANDs a register and an immediate value.
DIV(RegisterId, RegisterId, RegisterId)
Divides two registers.
DIVI(RegisterId, RegisterId, Immediate12)
Divides a register and an immediate value.
EQ(RegisterId, RegisterId, RegisterId)
Compares two registers for equality.
EXP(RegisterId, RegisterId, RegisterId)
Raises one register to the power of another.
EXPI(RegisterId, RegisterId, Immediate12)
Raises one register to the power of an immediate value.
GT(RegisterId, RegisterId, RegisterId)
Compares two registers for greater-than.
LT(RegisterId, RegisterId, RegisterId)
Compares two registers for less-than.
MLOG(RegisterId, RegisterId, RegisterId)
The integer logarithm of a register.
MROO(RegisterId, RegisterId, RegisterId)
The integer root of a register.
MOD(RegisterId, RegisterId, RegisterId)
Modulo remainder of two registers.
MODI(RegisterId, RegisterId, Immediate12)
Modulo remainder of a register and an immediate value.
MOVE(RegisterId, RegisterId)
Copy from one register to another.
MOVI(RegisterId, Immediate18)
Copy immediate value into a register
MUL(RegisterId, RegisterId, RegisterId)
Multiplies two registers.
MULI(RegisterId, RegisterId, Immediate12)
Multiplies a register and an immediate value.
NOT(RegisterId, RegisterId)
Bitwise NOT a register.
OR(RegisterId, RegisterId, RegisterId)
Bitwise ORs two registers.
ORI(RegisterId, RegisterId, Immediate12)
Bitwise ORs a register and an immediate value.
SLL(RegisterId, RegisterId, RegisterId)
Left shifts a register by a register.
SLLI(RegisterId, RegisterId, Immediate12)
Left shifts a register by an immediate value.
SRL(RegisterId, RegisterId, RegisterId)
Right shifts a register by a register.
SRLI(RegisterId, RegisterId, Immediate12)
Right shifts a register by an immediate value.
SUB(RegisterId, RegisterId, RegisterId)
Subtracts two registers.
SUBI(RegisterId, RegisterId, Immediate12)
Subtracts a register and an immediate value.
XOR(RegisterId, RegisterId, RegisterId)
Bitwise XORs two registers.
XORI(RegisterId, RegisterId, Immediate12)
Bitwise XORs a register and an immediate value.
JI(Immediate24)
Jump.
JNEI(RegisterId, RegisterId, Immediate12)
Conditional jump.
JNZI(RegisterId, Immediate18)
Conditional jump against zero.
JMP(RegisterId)
Dynamic jump.
JNE(RegisterId, RegisterId, RegisterId)
Conditional dynamic jump.
RET(RegisterId)
Return from context.
RETD(RegisterId, RegisterId)
Return from context with data.
CFEI(Immediate24)
Extend the current call frame’s stack by an immediate value.
CFSI(Immediate24)
Shrink the current call frame’s stack by an immediate value.
LB(RegisterId, RegisterId, Immediate12)
A byte is loaded from the specified address offset by an immediate value.
LW(RegisterId, RegisterId, Immediate12)
A word is loaded from the specified address offset by an immediate value.
ALOC(RegisterId)
Allocate a number of bytes from the heap.
MCL(RegisterId, RegisterId)
Clear a variable number of bytes in memory.
MCLI(RegisterId, Immediate18)
Clear an immediate number of bytes in memory.
MCP(RegisterId, RegisterId, RegisterId)
Copy a variable number of bytes in memory.
MCPI(RegisterId, RegisterId, Immediate12)
Copy an immediate number of bytes in memory.
MEQ(RegisterId, RegisterId, RegisterId, RegisterId)
Compare bytes in memory.
SB(RegisterId, RegisterId, Immediate12)
Write the least significant byte of a register to memory.
SW(RegisterId, RegisterId, Immediate12)
Write a register to memory.
BAL(RegisterId, RegisterId, RegisterId)
Get the balance of contract of an asset ID.
BHSH(RegisterId, RegisterId)
Get block header hash for height.
BHEI(RegisterId)
Get current block height.
BURN(RegisterId)
Burn coins of the current contract’s asset ID.
CALL(RegisterId, RegisterId, RegisterId, RegisterId)
Call a contract.
CCP(RegisterId, RegisterId, RegisterId, RegisterId)
Copy contract code for a contract.
CROO(RegisterId, RegisterId)
Get code root of a contract.
CSIZ(RegisterId, RegisterId)
Get code size of a contract.
CB(RegisterId)
Get current block proposer’s address.
LDC(RegisterId, RegisterId, RegisterId)
Load a contract’s code as executable.
LOG(RegisterId, RegisterId, RegisterId, RegisterId)
Log an event.
LOGD(RegisterId, RegisterId, RegisterId, RegisterId)
Log data.
MINT(RegisterId)
Mint coins of the current contract’s asset ID.
RVRT(RegisterId)
Halt execution, reverting state changes and returning a value.
SMO(RegisterId, RegisterId, RegisterId, RegisterId)
Send a message to recipient address with call abi, coins, and output.
SCWQ(RegisterId, RegisterId, RegisterId)
Clear a series of slots from contract storage.
SRW(RegisterId, RegisterId, RegisterId)
Load a word from contract storage.
SRWQ(RegisterId, RegisterId, RegisterId, RegisterId)
Load a series of 32 byte slots from contract storage.
SWW(RegisterId, RegisterId, RegisterId)
Store a word in contract storage.
SWWQ(RegisterId, RegisterId, RegisterId, RegisterId)
Store a series of 32 byte slots in contract storage.
TIME(RegisterId, RegisterId)
Get timestamp of block at given height.
TR(RegisterId, RegisterId, RegisterId)
Transfer coins to a contract unconditionally.
TRO(RegisterId, RegisterId, RegisterId, RegisterId)
Transfer coins to a variable output.
ECR(RegisterId, RegisterId, RegisterId)
The 64-byte public key (x, y) recovered from 64-byte signature on 32-byte message.
K256(RegisterId, RegisterId, RegisterId)
The keccak-256 hash of a slice.
S256(RegisterId, RegisterId, RegisterId)
The SHA-2-256 hash of a slice.
NOOP
Performs no operation.
FLAG(RegisterId)
Set flag register to a register.
GM(RegisterId, Immediate18)
Get metadata from memory.
GTF(RegisterId, RegisterId, Immediate12)
Get transaction fields.
Undefined
Undefined opcode, potentially from inconsistent serialization.
Implementations
sourceimpl Opcode
impl Opcode
sourcepub const fn new(instruction: Instruction) -> Self
pub const fn new(instruction: Instruction) -> Self
Create a new Opcode
given the internal attributes
sourcepub unsafe fn from_bytes_unchecked(bytes: &[u8]) -> Self
pub unsafe fn from_bytes_unchecked(bytes: &[u8]) -> Self
Create a Opcode
from a slice of bytes
Safety
Reflects the requirements of bytes::from_slice_unchecked
sourcepub const fn registers(&self) -> [Option<RegisterId>; 4]
pub const fn registers(&self) -> [Option<RegisterId>; 4]
Transform the Opcode
into an optional array of 4 register
identifiers
sourcepub const fn immediate(&self) -> Option<Word>
pub const fn immediate(&self) -> Option<Word>
Return the underlying immediate value, if present
sourcepub const fn gm(ra: RegisterId, args: GMArgs) -> Self
pub const fn gm(ra: RegisterId, args: GMArgs) -> Self
Create a new Opcode::GM
instruction from its args
sourcepub const fn gtf(ra: RegisterId, rb: RegisterId, args: GTFArgs) -> Self
pub const fn gtf(ra: RegisterId, rb: RegisterId, args: GTFArgs) -> Self
Create a new Opcode::GTF
instruction from its args
sourceimpl Opcode
impl Opcode
sourcepub fn from_bytes(bytes: &[u8]) -> Result<Self>
Available on crate feature std
only.
pub fn from_bytes(bytes: &[u8]) -> Result<Self>
std
only.Create a Opcode
from a slice of bytes
This function will fail if the length of the bytes is smaller than
Opcode::LEN
.
sourcepub fn from_bytes_iter<I>(bytes: I) -> Vec<Self>where
I: IntoIterator<Item = u8>,
Available on crate feature std
only.
pub fn from_bytes_iter<I>(bytes: I) -> Vec<Self>where
I: IntoIterator<Item = u8>,
std
only.Create a set of Opcode
from an iterator of bytes
If not padded to Self::LEN
, will consume the unaligned bytes but won’t try to parse an
opcode from them.
Trait Implementations
sourceimpl<'arbitrary> Arbitrary<'arbitrary> for Opcode
impl<'arbitrary> Arbitrary<'arbitrary> for Opcode
sourcefn arbitrary(u: &mut Unstructured<'arbitrary>) -> Result<Self>
fn arbitrary(u: &mut Unstructured<'arbitrary>) -> Result<Self>
Self
from the given unstructured data. Read moresourcefn arbitrary_take_rest(u: Unstructured<'arbitrary>) -> Result<Self>
fn arbitrary_take_rest(u: Unstructured<'arbitrary>) -> Result<Self>
Self
from the entirety of the given
unstructured data. Read moresourceimpl<'de> Deserialize<'de> for Opcode
impl<'de> Deserialize<'de> for Opcode
sourcefn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
sourceimpl From<Instruction> for Opcode
impl From<Instruction> for Opcode
sourcefn from(parsed: Instruction) -> Self
fn from(parsed: Instruction) -> Self
sourceimpl From<InstructionResult> for Opcode
impl From<InstructionResult> for Opcode
sourcefn from(r: InstructionResult) -> Self
fn from(r: InstructionResult) -> Self
sourceimpl From<Opcode> for Instruction
impl From<Opcode> for Instruction
sourceimpl FromIterator<Opcode> for Vec<Instruction>
Available on crate feature std
only.
impl FromIterator<Opcode> for Vec<Instruction>
std
only.sourcefn from_iter<T>(iter: T) -> Selfwhere
T: IntoIterator<Item = Opcode>,
fn from_iter<T>(iter: T) -> Selfwhere
T: IntoIterator<Item = Opcode>,
sourceimpl FromIterator<Opcode> for Vec<u8>
Available on crate feature std
only.
impl FromIterator<Opcode> for Vec<u8>
std
only.sourcefn from_iter<T>(iter: T) -> Selfwhere
T: IntoIterator<Item = Opcode>,
fn from_iter<T>(iter: T) -> Selfwhere
T: IntoIterator<Item = Opcode>,
sourceimpl Read for Opcode
Available on crate feature std
only.
impl Read for Opcode
std
only.sourcefn read(&mut self, buf: &mut [u8]) -> Result<usize>
fn read(&mut self, buf: &mut [u8]) -> Result<usize>
1.36.0 · sourcefn read_vectored(&mut self, bufs: &mut [IoSliceMut<'_>]) -> Result<usize, Error>
fn read_vectored(&mut self, bufs: &mut [IoSliceMut<'_>]) -> Result<usize, Error>
read
, except that it reads into a slice of buffers. Read moresourcefn is_read_vectored(&self) -> bool
fn is_read_vectored(&self) -> bool
can_vector
)1.0.0 · sourcefn read_to_end(&mut self, buf: &mut Vec<u8, Global>) -> Result<usize, Error>
fn read_to_end(&mut self, buf: &mut Vec<u8, Global>) -> Result<usize, Error>
buf
. Read more1.0.0 · sourcefn read_to_string(&mut self, buf: &mut String) -> Result<usize, Error>
fn read_to_string(&mut self, buf: &mut String) -> Result<usize, Error>
buf
. Read more1.6.0 · sourcefn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Error>
fn read_exact(&mut self, buf: &mut [u8]) -> Result<(), Error>
buf
. Read moresourcefn read_buf(&mut self, buf: BorrowedCursor<'_>) -> Result<(), Error>
fn read_buf(&mut self, buf: BorrowedCursor<'_>) -> Result<(), Error>
read_buf
)sourcefn read_buf_exact(&mut self, cursor: BorrowedCursor<'_>) -> Result<(), Error>
fn read_buf_exact(&mut self, cursor: BorrowedCursor<'_>) -> Result<(), Error>
read_buf
)cursor
. Read more1.0.0 · sourcefn by_ref(&mut self) -> &mut Selfwhere
Self: Sized,
fn by_ref(&mut self) -> &mut Selfwhere
Self: Sized,
Read
. Read moresourceimpl Write for Opcode
Available on crate feature std
only.
impl Write for Opcode
std
only.sourcefn write(&mut self, buf: &[u8]) -> Result<usize>
fn write(&mut self, buf: &[u8]) -> Result<usize>
sourcefn flush(&mut self) -> Result<()>
fn flush(&mut self) -> Result<()>
sourcefn is_write_vectored(&self) -> bool
fn is_write_vectored(&self) -> bool
can_vector
)1.0.0 · sourcefn write_all(&mut self, buf: &[u8]) -> Result<(), Error>
fn write_all(&mut self, buf: &[u8]) -> Result<(), Error>
sourcefn write_all_vectored(&mut self, bufs: &mut [IoSlice<'_>]) -> Result<(), Error>
fn write_all_vectored(&mut self, bufs: &mut [IoSlice<'_>]) -> Result<(), Error>
write_all_vectored
)