Struct moore_svlog::port_list::ExtPort

pub struct ExtPort<'a> {
    pub id: NodeId,
    pub node: &'a dyn PortedNode<'a>,
    pub span: Span,
    pub name: Option<Spanned<Name>>,
    pub exprs: Vec<ExtPortExpr>,
}

An external port.

Fields

id: NodeId

Node ID of the port.

node: &'a dyn PortedNode<'a>

The node containing the port.

span: Span

Location of the port declaration in the source file.

name: Option<Spanned<Name>>

Optional name of the port.

exprs: Vec<ExtPortExpr>

Port expressions that map this external to internal ports. May be empty in case of a port that does not connect to anything.

Trait Implementations

impl<'a> Debug for ExtPort<'a>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl HasDesc for ExtPort<'_>

fn desc(&self) -> &'static str

Obtain a human-readable descriptive name for this node.

fn desc_full(&self) -> String

Obtain a human-readable description for this node, possibly containing the node’s name.

impl HasSpan for ExtPort<'_>

fn span(&self) -> Span

Obtain the full span of the input file that this node covers.

fn human_span(&self) -> Span

Obtain a span which can be used to refer to this node in error messages presented to humans. This will generally be the name for things like entities, processes, and variables. Defaults to return whatever span() returns.

impl<'a> PartialEq<ExtPort<'a>> for ExtPort<'a>

fn eq(&self, other: &ExtPort<'a>) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &ExtPort<'a>) -> bool

This method tests for !=.

impl<'a> Eq for ExtPort<'a>

impl<'a> StructuralEq for ExtPort<'a>

impl<'a> StructuralPartialEq for ExtPort<'a>