Struct Chip

pub struct Chip {
    pub name: String,
    pub part: Option<u16>,
    pub svd: Option<String>,
    pub documentation: HashMap<String, Url>,
    pub package_variants: Vec<String>,
    pub cores: Vec<Core>,
    pub memory_map: Vec<MemoryRegion>,
    pub flash_algorithms: Vec<String>,
    pub rtt_scan_ranges: Option<Vec<Range<u64>>>,
    pub jtag: Option<Jtag>,
    pub default_binary_format: Option<String>,
}

A single chip variant.

This describes an exact chip variant, including the cores, flash and memory size. For example, the nRF52832 chip has two variants, nRF52832_xxAA and nRF52832_xxBB. For this case, the struct will correspond to one of the variants, e.g. nRF52832_xxAA.

Fields

name: String

This is the name of the chip in base form. E.g. nRF52832.

part: Option<u16>

The PART register of the chip. This value can be determined via the cli info command.

svd: Option<String>

An URL to the SVD file for this chip.

documentation: HashMap<String, Url>

Documentation URLs associated with this chip.

package_variants: Vec<String>

The package variants available for this chip.

If empty, the chip is assumed to have only one package variant.

cores: Vec<Core>

The cores available on the chip.

memory_map: Vec<MemoryRegion>

The memory regions available on the chip.

flash_algorithms: Vec<String>

Names of all flash algorithms available for this chip.

This can be used to look up the flash algorithm in the ChipFamily::flash_algorithms field.

rtt_scan_ranges: Option<Vec<Range<u64>>>

Specific memory ranges to search for a dynamic RTT header for code running on this chip.

This need not be specified for most chips because the default is to search all RAM regions specified in memory_map. However, that behavior isn’t appropriate for some chips, such as those which have a very large amount of RAM that would be time-consuming to scan exhaustively.

If specified then this is a list of zero or more address ranges to scan. Each address range must be enclosed in exactly one RAM region from memory_map. An empty list disables automatic scanning altogether, in which case RTT will be enabled only when using an executable image that includes the _SEGGER_RTT symbol pointing to the exact address of the RTT header.

jtag: Option<Jtag>

JTAG-specific options

default_binary_format: Option<String>

The default binary format for this chip

Implementations

impl Chip

pub fn generic_arm(name: &str, core_type: CoreType) -> Chip

Create a generic chip with the given name, a single core, and no flash algorithm or memory map. Used to create generic targets.

pub fn package_variants(&self) -> impl Iterator<Item = &String>

Returns the package variants for this chip.

Trait Implementations

impl Clone for Chip

fn clone(&self) -> Chip

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Chip

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl<'de> Deserialize<'de> for Chip

fn deserialize<__D>( __deserializer: __D, ) -> Result<Chip, <__D as Deserializer<'de>>::Error>

where __D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer.

impl Serialize for Chip

fn serialize<__S>( &self, __serializer: __S, ) -> Result<<__S as Serializer>::Ok, <__S as Serializer>::Error>

where __S: Serializer,

Serialize this value into the given Serde serializer.