#[repr(u8)]pub enum RiscvChip {
Show 13 variants
CH32V103 = 1,
CH57X = 2,
CH56X = 3,
CH32V20X = 5,
CH32V30X = 6,
CH58X = 7,
CH32V003 = 9,
CH8571 = 10,
CH59X = 11,
CH643 = 12,
CH32X035 = 13,
CH32L103 = 14,
CH641 = 73,
}
Expand description
Currently supported RISC-V chip series/families. The IP core name is “Qingke”.
Variants§
CH32V103 = 1
CH32V103 Qingke-V3A series
CH57X = 2
CH571/CH573 Qingke-V3A BLE 4.2 series
CH56X = 3
CH565/CH569 Qingke-V3A series
CH32V20X = 5
CH32V20X Qingke-V4B/V4C series
CH32V30X = 6
CH32V30X Qingke-V4C/V4F series, the same as CH32V20X
CH58X = 7
CH58x Qingke-V4A BLE 5.3 series
CH32V003 = 9
CH32V003 Qingke-V2A series
CH8571 = 10
RISC-V EC controller, undocumented.
CH59X = 11
CH59x Qingke-V4C BLE 5.4 series, fallback as CH58X
CH643 = 12
CH643 Qingke-V4C series, RGB Display Driver MCU
CH32X035 = 13
CH32X035 Qingke-V4C USB-PD series, fallback as CH643
CH32L103 = 14
CH32L103 Qingke-V4C low power series, USB-PD
CH641 = 73
CH641 Qingke-V2A series, USB-PD, fallback as CH32V003
Trait Implementations§
impl Copy for RiscvChip
impl Eq for RiscvChip
impl StructuralPartialEq for RiscvChip
Auto Trait Implementations§
impl Freeze for RiscvChip
impl RefUnwindSafe for RiscvChip
impl Send for RiscvChip
impl Sync for RiscvChip
impl Unpin for RiscvChip
impl UnwindSafe for RiscvChip
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